xref: /openbmc/linux/arch/mips/include/asm/octeon/cvmx-ciu2-defs.h (revision 597473720f4dc69749542bfcfed4a927a43d935e)
1*c5aa59e8SDavid Daney /***********************license start***************
2*c5aa59e8SDavid Daney  * Author: Cavium Networks
3*c5aa59e8SDavid Daney  *
4*c5aa59e8SDavid Daney  * Contact: support@caviumnetworks.com
5*c5aa59e8SDavid Daney  * This file is part of the OCTEON SDK
6*c5aa59e8SDavid Daney  *
7*c5aa59e8SDavid Daney  * Copyright (c) 2003-2012 Cavium Networks
8*c5aa59e8SDavid Daney  *
9*c5aa59e8SDavid Daney  * This file is free software; you can redistribute it and/or modify
10*c5aa59e8SDavid Daney  * it under the terms of the GNU General Public License, Version 2, as
11*c5aa59e8SDavid Daney  * published by the Free Software Foundation.
12*c5aa59e8SDavid Daney  *
13*c5aa59e8SDavid Daney  * This file is distributed in the hope that it will be useful, but
14*c5aa59e8SDavid Daney  * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
15*c5aa59e8SDavid Daney  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
16*c5aa59e8SDavid Daney  * NONINFRINGEMENT.  See the GNU General Public License for more
17*c5aa59e8SDavid Daney  * details.
18*c5aa59e8SDavid Daney  *
19*c5aa59e8SDavid Daney  * You should have received a copy of the GNU General Public License
20*c5aa59e8SDavid Daney  * along with this file; if not, write to the Free Software
21*c5aa59e8SDavid Daney  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22*c5aa59e8SDavid Daney  * or visit http://www.gnu.org/licenses/.
23*c5aa59e8SDavid Daney  *
24*c5aa59e8SDavid Daney  * This file may also be available under a different license from Cavium.
25*c5aa59e8SDavid Daney  * Contact Cavium Networks for more information
26*c5aa59e8SDavid Daney  ***********************license end**************************************/
27*c5aa59e8SDavid Daney 
28*c5aa59e8SDavid Daney #ifndef __CVMX_CIU2_DEFS_H__
29*c5aa59e8SDavid Daney #define __CVMX_CIU2_DEFS_H__
30*c5aa59e8SDavid Daney 
31*c5aa59e8SDavid Daney #define CVMX_CIU2_ACK_PPX_IP2(block_id) (CVMX_ADD_IO_SEG(0x00010701000C0000ull) + ((block_id) & 31) * 0x200000ull)
32*c5aa59e8SDavid Daney #define CVMX_CIU2_ACK_PPX_IP3(block_id) (CVMX_ADD_IO_SEG(0x00010701000C0200ull) + ((block_id) & 31) * 0x200000ull)
33*c5aa59e8SDavid Daney #define CVMX_CIU2_EN_PPX_IP2_RML(block_id) (CVMX_ADD_IO_SEG(0x0001070100092000ull) + ((block_id) & 31) * 0x200000ull)
34*c5aa59e8SDavid Daney #define CVMX_CIU2_EN_PPX_IP2_WDOG(block_id) (CVMX_ADD_IO_SEG(0x0001070100091000ull) + ((block_id) & 31) * 0x200000ull)
35*c5aa59e8SDavid Daney #define CVMX_CIU2_EN_PPX_IP2_WRKQ(block_id) (CVMX_ADD_IO_SEG(0x0001070100090000ull) + ((block_id) & 31) * 0x200000ull)
36*c5aa59e8SDavid Daney #define CVMX_CIU2_EN_PPX_IP2_WRKQ_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B0000ull) + ((block_id) & 31) * 0x200000ull)
37*c5aa59e8SDavid Daney #define CVMX_CIU2_EN_PPX_IP2_WRKQ_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A0000ull) + ((block_id) & 31) * 0x200000ull)
38*c5aa59e8SDavid Daney #define CVMX_CIU2_EN_PPX_IP3_MBOX_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B8200ull) + ((block_id) & 31) * 0x200000ull)
39*c5aa59e8SDavid Daney #define CVMX_CIU2_EN_PPX_IP3_MBOX_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A8200ull) + ((block_id) & 31) * 0x200000ull)
40*c5aa59e8SDavid Daney #define CVMX_CIU2_INTR_CIU_READY (CVMX_ADD_IO_SEG(0x0001070100102008ull))
41*c5aa59e8SDavid Daney #define CVMX_CIU2_RAW_PPX_IP2_WRKQ(block_id) (CVMX_ADD_IO_SEG(0x0001070100040000ull) + ((block_id) & 31) * 0x200000ull)
42*c5aa59e8SDavid Daney #define CVMX_CIU2_SRC_PPX_IP2_RML(block_id) (CVMX_ADD_IO_SEG(0x0001070100082000ull) + ((block_id) & 31) * 0x200000ull)
43*c5aa59e8SDavid Daney #define CVMX_CIU2_SRC_PPX_IP2_WDOG(block_id) (CVMX_ADD_IO_SEG(0x0001070100081000ull) + ((block_id) & 31) * 0x200000ull)
44*c5aa59e8SDavid Daney #define CVMX_CIU2_SRC_PPX_IP2_WRKQ(block_id) (CVMX_ADD_IO_SEG(0x0001070100080000ull) + ((block_id) & 31) * 0x200000ull)
45*c5aa59e8SDavid Daney #define CVMX_CIU2_SUM_PPX_IP2(offset) (CVMX_ADD_IO_SEG(0x0001070100000000ull) + ((offset) & 31) * 8)
46*c5aa59e8SDavid Daney #define CVMX_CIU2_SUM_PPX_IP3(offset) (CVMX_ADD_IO_SEG(0x0001070100000200ull) + ((offset) & 31) * 8)
47*c5aa59e8SDavid Daney 
48*c5aa59e8SDavid Daney #endif
49