1*b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */ 2384740dcSRalf Baechle #ifndef __ASM_RC32434_IRQ_H 3384740dcSRalf Baechle #define __ASM_RC32434_IRQ_H 4384740dcSRalf Baechle 5384740dcSRalf Baechle #define NR_IRQS 256 6384740dcSRalf Baechle 7384740dcSRalf Baechle #include <asm/mach-generic/irq.h> 8384740dcSRalf Baechle #include <asm/mach-rc32434/rb.h> 9384740dcSRalf Baechle 10384740dcSRalf Baechle /* Interrupt Controller */ 11384740dcSRalf Baechle #define IC_GROUP0_PEND (REGBASE + 0x38000) 12384740dcSRalf Baechle #define IC_GROUP0_MASK (REGBASE + 0x38008) 13384740dcSRalf Baechle #define IC_GROUP_OFFSET 0x0C 14384740dcSRalf Baechle 15384740dcSRalf Baechle #define NUM_INTR_GROUPS 5 16384740dcSRalf Baechle 17384740dcSRalf Baechle /* 16550 UARTs */ 18384740dcSRalf Baechle #define GROUP0_IRQ_BASE 8 /* GRP2 IRQ numbers start here */ 19384740dcSRalf Baechle /* GRP3 IRQ numbers start here */ 20384740dcSRalf Baechle #define GROUP1_IRQ_BASE (GROUP0_IRQ_BASE + 32) 21384740dcSRalf Baechle /* GRP4 IRQ numbers start here */ 22384740dcSRalf Baechle #define GROUP2_IRQ_BASE (GROUP1_IRQ_BASE + 32) 23384740dcSRalf Baechle /* GRP5 IRQ numbers start here */ 24384740dcSRalf Baechle #define GROUP3_IRQ_BASE (GROUP2_IRQ_BASE + 32) 25384740dcSRalf Baechle #define GROUP4_IRQ_BASE (GROUP3_IRQ_BASE + 32) 26384740dcSRalf Baechle 27384740dcSRalf Baechle #define UART0_IRQ (GROUP3_IRQ_BASE + 0) 28384740dcSRalf Baechle 29384740dcSRalf Baechle #define ETH0_DMA_RX_IRQ (GROUP1_IRQ_BASE + 0) 30384740dcSRalf Baechle #define ETH0_DMA_TX_IRQ (GROUP1_IRQ_BASE + 1) 31384740dcSRalf Baechle #define ETH0_RX_OVR_IRQ (GROUP3_IRQ_BASE + 9) 32384740dcSRalf Baechle #define ETH0_TX_UND_IRQ (GROUP3_IRQ_BASE + 10) 33384740dcSRalf Baechle 344aa0f4d7SPhil Sutter #define GPIO_MAPPED_IRQ_BASE GROUP4_IRQ_BASE 354aa0f4d7SPhil Sutter #define GPIO_MAPPED_IRQ_GROUP 4 364aa0f4d7SPhil Sutter 37384740dcSRalf Baechle #endif /* __ASM_RC32434_IRQ_H */ 38