1*384740dcSRalf Baechle /* 2*384740dcSRalf Baechle * Definitions for the Watchdog registers 3*384740dcSRalf Baechle * 4*384740dcSRalf Baechle * Copyright 2002 Ryan Holm <ryan.holmQVist@idt.com> 5*384740dcSRalf Baechle * Copyright 2008 Florian Fainelli <florian@openwrt.org> 6*384740dcSRalf Baechle * 7*384740dcSRalf Baechle * This program is free software; you can redistribute it and/or modify it 8*384740dcSRalf Baechle * under the terms of the GNU General Public License as published by the 9*384740dcSRalf Baechle * Free Software Foundation; either version 2 of the License, or (at your 10*384740dcSRalf Baechle * option) any later version. 11*384740dcSRalf Baechle * 12*384740dcSRalf Baechle * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 13*384740dcSRalf Baechle * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 14*384740dcSRalf Baechle * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN 15*384740dcSRalf Baechle * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 16*384740dcSRalf Baechle * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 17*384740dcSRalf Baechle * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 18*384740dcSRalf Baechle * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 19*384740dcSRalf Baechle * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 20*384740dcSRalf Baechle * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 21*384740dcSRalf Baechle * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 22*384740dcSRalf Baechle * 23*384740dcSRalf Baechle * You should have received a copy of the GNU General Public License along 24*384740dcSRalf Baechle * with this program; if not, write to the Free Software Foundation, Inc., 25*384740dcSRalf Baechle * 675 Mass Ave, Cambridge, MA 02139, USA. 26*384740dcSRalf Baechle * 27*384740dcSRalf Baechle */ 28*384740dcSRalf Baechle 29*384740dcSRalf Baechle #ifndef __RC32434_INTEG_H__ 30*384740dcSRalf Baechle #define __RC32434_INTEG_H__ 31*384740dcSRalf Baechle 32*384740dcSRalf Baechle #include <asm/mach-rc32434/rb.h> 33*384740dcSRalf Baechle 34*384740dcSRalf Baechle #define INTEG0_BASE_ADDR 0x18030030 35*384740dcSRalf Baechle 36*384740dcSRalf Baechle struct integ { 37*384740dcSRalf Baechle u32 errcs; /* sticky use ERRCS_ */ 38*384740dcSRalf Baechle u32 wtcount; /* Watchdog timer count reg. */ 39*384740dcSRalf Baechle u32 wtcompare; /* Watchdog timer timeout value. */ 40*384740dcSRalf Baechle u32 wtc; /* Watchdog timer control. use WTC_ */ 41*384740dcSRalf Baechle }; 42*384740dcSRalf Baechle 43*384740dcSRalf Baechle /* Error counters */ 44*384740dcSRalf Baechle #define RC32434_ERR_WTO 0 45*384740dcSRalf Baechle #define RC32434_ERR_WNE 1 46*384740dcSRalf Baechle #define RC32434_ERR_UCW 2 47*384740dcSRalf Baechle #define RC32434_ERR_UCR 3 48*384740dcSRalf Baechle #define RC32434_ERR_UPW 4 49*384740dcSRalf Baechle #define RC32434_ERR_UPR 5 50*384740dcSRalf Baechle #define RC32434_ERR_UDW 6 51*384740dcSRalf Baechle #define RC32434_ERR_UDR 7 52*384740dcSRalf Baechle #define RC32434_ERR_SAE 8 53*384740dcSRalf Baechle #define RC32434_ERR_WRE 9 54*384740dcSRalf Baechle 55*384740dcSRalf Baechle /* Watchdog control bits */ 56*384740dcSRalf Baechle #define RC32434_WTC_EN 0 57*384740dcSRalf Baechle #define RC32434_WTC_TO 1 58*384740dcSRalf Baechle 59*384740dcSRalf Baechle #endif /* __RC32434_INTEG_H__ */ 60