1384740dcSRalf Baechle /* 2384740dcSRalf Baechle * This file is subject to the terms and conditions of the GNU General Public 3384740dcSRalf Baechle * License. See the file "COPYING" in the main directory of this archive 4384740dcSRalf Baechle * for more details. 5384740dcSRalf Baechle * 6384740dcSRalf Baechle * Copyright (C) 2005 Ilya A. Volynets-Evenbakh 7384740dcSRalf Baechle * Copyright (C) 2005, 07 Ralf Baechle (ralf@linux-mips.org) 8384740dcSRalf Baechle */ 9384740dcSRalf Baechle #ifndef __ASM_MACH_IP32_CPU_FEATURE_OVERRIDES_H 10384740dcSRalf Baechle #define __ASM_MACH_IP32_CPU_FEATURE_OVERRIDES_H 11384740dcSRalf Baechle 12384740dcSRalf Baechle 13384740dcSRalf Baechle /* 14384740dcSRalf Baechle * R5000 has an interesting "restriction": ll(d)/sc(d) 15384740dcSRalf Baechle * instructions to XKPHYS region simply do uncached bus 16384740dcSRalf Baechle * requests. This breaks all the atomic bitops functions. 17384740dcSRalf Baechle * so, for 64bit IP32 kernel we just don't use ll/sc. 18384740dcSRalf Baechle * This does not affect luserland. 19384740dcSRalf Baechle */ 20384740dcSRalf Baechle #if (defined(CONFIG_CPU_R5000) || defined(CONFIG_CPU_NEVADA)) && defined(CONFIG_64BIT) 21384740dcSRalf Baechle #define cpu_has_llsc 0 22384740dcSRalf Baechle #else 23384740dcSRalf Baechle #define cpu_has_llsc 1 24384740dcSRalf Baechle #endif 25384740dcSRalf Baechle 26384740dcSRalf Baechle /* Settings which are common for all ip32 CPUs */ 27384740dcSRalf Baechle #define cpu_has_tlb 1 28384740dcSRalf Baechle #define cpu_has_4kex 1 29384740dcSRalf Baechle #define cpu_has_32fpr 1 30384740dcSRalf Baechle #define cpu_has_counter 1 31384740dcSRalf Baechle #define cpu_has_mips16 0 32*65ae8d26SMaciej W. Rozycki #define cpu_has_mips16e2 0 33384740dcSRalf Baechle #define cpu_has_vce 0 34384740dcSRalf Baechle #define cpu_has_cache_cdex_s 0 35384740dcSRalf Baechle #define cpu_has_mcheck 0 36384740dcSRalf Baechle #define cpu_has_ejtag 0 37384740dcSRalf Baechle #define cpu_has_vtag_icache 0 38384740dcSRalf Baechle #define cpu_has_ic_fills_f_dc 0 39384740dcSRalf Baechle #define cpu_has_dsp 0 4047503256SRalf Baechle #define cpu_has_dsp2 0 41384740dcSRalf Baechle #define cpu_has_4k_cache 1 42384740dcSRalf Baechle #define cpu_has_mipsmt 0 43384740dcSRalf Baechle #define cpu_has_userlocal 0 44384740dcSRalf Baechle 45384740dcSRalf Baechle 46384740dcSRalf Baechle #define cpu_has_mips32r1 0 47384740dcSRalf Baechle #define cpu_has_mips32r2 0 48384740dcSRalf Baechle #define cpu_has_mips64r1 0 49384740dcSRalf Baechle #define cpu_has_mips64r2 0 50384740dcSRalf Baechle 51384740dcSRalf Baechle #endif /* __ASM_MACH_IP32_CPU_FEATURE_OVERRIDES_H */ 52