1*b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */ 2e7300d04SMaxime Bizon #ifndef BCM63XX_IO_H_ 3e7300d04SMaxime Bizon #define BCM63XX_IO_H_ 4e7300d04SMaxime Bizon 5a1ce3928SDavid Howells #include <asm/mach-bcm63xx/bcm63xx_cpu.h> 6e7300d04SMaxime Bizon 7e7300d04SMaxime Bizon /* 8e7300d04SMaxime Bizon * Physical memory map, RAM is mapped at 0x0. 9e7300d04SMaxime Bizon * 10e7300d04SMaxime Bizon * Note that size MUST be a power of two. 11e7300d04SMaxime Bizon */ 12e7300d04SMaxime Bizon #define BCM_PCMCIA_COMMON_BASE_PA (0x20000000) 13e7300d04SMaxime Bizon #define BCM_PCMCIA_COMMON_SIZE (16 * 1024 * 1024) 14e7300d04SMaxime Bizon #define BCM_PCMCIA_COMMON_END_PA (BCM_PCMCIA_COMMON_BASE_PA + \ 15e7300d04SMaxime Bizon BCM_PCMCIA_COMMON_SIZE - 1) 16e7300d04SMaxime Bizon 17e7300d04SMaxime Bizon #define BCM_PCMCIA_ATTR_BASE_PA (0x21000000) 18e7300d04SMaxime Bizon #define BCM_PCMCIA_ATTR_SIZE (16 * 1024 * 1024) 19e7300d04SMaxime Bizon #define BCM_PCMCIA_ATTR_END_PA (BCM_PCMCIA_ATTR_BASE_PA + \ 20e7300d04SMaxime Bizon BCM_PCMCIA_ATTR_SIZE - 1) 21e7300d04SMaxime Bizon 22e7300d04SMaxime Bizon #define BCM_PCMCIA_IO_BASE_PA (0x22000000) 23e7300d04SMaxime Bizon #define BCM_PCMCIA_IO_SIZE (64 * 1024) 24e7300d04SMaxime Bizon #define BCM_PCMCIA_IO_END_PA (BCM_PCMCIA_IO_BASE_PA + \ 25e7300d04SMaxime Bizon BCM_PCMCIA_IO_SIZE - 1) 26e7300d04SMaxime Bizon 27e7300d04SMaxime Bizon #define BCM_PCI_MEM_BASE_PA (0x30000000) 28e7300d04SMaxime Bizon #define BCM_PCI_MEM_SIZE (128 * 1024 * 1024) 29e7300d04SMaxime Bizon #define BCM_PCI_MEM_END_PA (BCM_PCI_MEM_BASE_PA + \ 30e7300d04SMaxime Bizon BCM_PCI_MEM_SIZE - 1) 31e7300d04SMaxime Bizon 32e7300d04SMaxime Bizon #define BCM_PCI_IO_BASE_PA (0x08000000) 33e7300d04SMaxime Bizon #define BCM_PCI_IO_SIZE (64 * 1024) 34e7300d04SMaxime Bizon #define BCM_PCI_IO_END_PA (BCM_PCI_IO_BASE_PA + \ 35e7300d04SMaxime Bizon BCM_PCI_IO_SIZE - 1) 36e7300d04SMaxime Bizon #define BCM_PCI_IO_HALF_PA (BCM_PCI_IO_BASE_PA + \ 37e7300d04SMaxime Bizon (BCM_PCI_IO_SIZE / 2) - 1) 38e7300d04SMaxime Bizon 39e7300d04SMaxime Bizon #define BCM_CB_MEM_BASE_PA (0x38000000) 40e7300d04SMaxime Bizon #define BCM_CB_MEM_SIZE (128 * 1024 * 1024) 41e7300d04SMaxime Bizon #define BCM_CB_MEM_END_PA (BCM_CB_MEM_BASE_PA + \ 42e7300d04SMaxime Bizon BCM_CB_MEM_SIZE - 1) 43e7300d04SMaxime Bizon 4419c860d9SJonas Gorski #define BCM_PCIE_MEM_BASE_PA 0x10f00000 4519c860d9SJonas Gorski #define BCM_PCIE_MEM_SIZE (16 * 1024 * 1024) 4619c860d9SJonas Gorski #define BCM_PCIE_MEM_END_PA (BCM_PCIE_MEM_BASE_PA + \ 4719c860d9SJonas Gorski BCM_PCIE_MEM_SIZE - 1) 48e7300d04SMaxime Bizon 49e7300d04SMaxime Bizon /* 50e7300d04SMaxime Bizon * Internal registers are accessed through KSEG3 51e7300d04SMaxime Bizon */ 52e7300d04SMaxime Bizon #define BCM_REGS_VA(x) ((void __iomem *)(x)) 53e7300d04SMaxime Bizon 54e7300d04SMaxime Bizon #define bcm_readb(a) (*(volatile unsigned char *) BCM_REGS_VA(a)) 55e7300d04SMaxime Bizon #define bcm_readw(a) (*(volatile unsigned short *) BCM_REGS_VA(a)) 56e7300d04SMaxime Bizon #define bcm_readl(a) (*(volatile unsigned int *) BCM_REGS_VA(a)) 57015ce7d3SMaxime Bizon #define bcm_readq(a) (*(volatile u64 *) BCM_REGS_VA(a)) 58e7300d04SMaxime Bizon #define bcm_writeb(v, a) (*(volatile unsigned char *) BCM_REGS_VA((a)) = (v)) 59e7300d04SMaxime Bizon #define bcm_writew(v, a) (*(volatile unsigned short *) BCM_REGS_VA((a)) = (v)) 60e7300d04SMaxime Bizon #define bcm_writel(v, a) (*(volatile unsigned int *) BCM_REGS_VA((a)) = (v)) 61015ce7d3SMaxime Bizon #define bcm_writeq(v, a) (*(volatile u64 *) BCM_REGS_VA((a)) = (v)) 62e7300d04SMaxime Bizon 63e7300d04SMaxime Bizon /* 64e7300d04SMaxime Bizon * IO helpers to access register set for current CPU 65e7300d04SMaxime Bizon */ 66e7300d04SMaxime Bizon #define bcm_rset_readb(s, o) bcm_readb(bcm63xx_regset_address(s) + (o)) 67e7300d04SMaxime Bizon #define bcm_rset_readw(s, o) bcm_readw(bcm63xx_regset_address(s) + (o)) 68e7300d04SMaxime Bizon #define bcm_rset_readl(s, o) bcm_readl(bcm63xx_regset_address(s) + (o)) 69e7300d04SMaxime Bizon #define bcm_rset_writeb(s, v, o) bcm_writeb((v), \ 70e7300d04SMaxime Bizon bcm63xx_regset_address(s) + (o)) 71e7300d04SMaxime Bizon #define bcm_rset_writew(s, v, o) bcm_writew((v), \ 72e7300d04SMaxime Bizon bcm63xx_regset_address(s) + (o)) 73e7300d04SMaxime Bizon #define bcm_rset_writel(s, v, o) bcm_writel((v), \ 74e7300d04SMaxime Bizon bcm63xx_regset_address(s) + (o)) 75e7300d04SMaxime Bizon 76e7300d04SMaxime Bizon /* 77e7300d04SMaxime Bizon * helpers for frequently used register sets 78e7300d04SMaxime Bizon */ 79e7300d04SMaxime Bizon #define bcm_perf_readl(o) bcm_rset_readl(RSET_PERF, (o)) 80e7300d04SMaxime Bizon #define bcm_perf_writel(v, o) bcm_rset_writel(RSET_PERF, (v), (o)) 81e7300d04SMaxime Bizon #define bcm_timer_readl(o) bcm_rset_readl(RSET_TIMER, (o)) 82e7300d04SMaxime Bizon #define bcm_timer_writel(v, o) bcm_rset_writel(RSET_TIMER, (v), (o)) 83e7300d04SMaxime Bizon #define bcm_wdt_readl(o) bcm_rset_readl(RSET_WDT, (o)) 84e7300d04SMaxime Bizon #define bcm_wdt_writel(v, o) bcm_rset_writel(RSET_WDT, (v), (o)) 85e7300d04SMaxime Bizon #define bcm_gpio_readl(o) bcm_rset_readl(RSET_GPIO, (o)) 86e7300d04SMaxime Bizon #define bcm_gpio_writel(v, o) bcm_rset_writel(RSET_GPIO, (v), (o)) 87e7300d04SMaxime Bizon #define bcm_uart0_readl(o) bcm_rset_readl(RSET_UART0, (o)) 88e7300d04SMaxime Bizon #define bcm_uart0_writel(v, o) bcm_rset_writel(RSET_UART0, (v), (o)) 89e7300d04SMaxime Bizon #define bcm_mpi_readl(o) bcm_rset_readl(RSET_MPI, (o)) 90e7300d04SMaxime Bizon #define bcm_mpi_writel(v, o) bcm_rset_writel(RSET_MPI, (v), (o)) 91e7300d04SMaxime Bizon #define bcm_pcmcia_readl(o) bcm_rset_readl(RSET_PCMCIA, (o)) 92e7300d04SMaxime Bizon #define bcm_pcmcia_writel(v, o) bcm_rset_writel(RSET_PCMCIA, (v), (o)) 9319c860d9SJonas Gorski #define bcm_pcie_readl(o) bcm_rset_readl(RSET_PCIE, (o)) 9419c860d9SJonas Gorski #define bcm_pcie_writel(v, o) bcm_rset_writel(RSET_PCIE, (v), (o)) 95e7300d04SMaxime Bizon #define bcm_sdram_readl(o) bcm_rset_readl(RSET_SDRAM, (o)) 96e7300d04SMaxime Bizon #define bcm_sdram_writel(v, o) bcm_rset_writel(RSET_SDRAM, (v), (o)) 97e7300d04SMaxime Bizon #define bcm_memc_readl(o) bcm_rset_readl(RSET_MEMC, (o)) 98e7300d04SMaxime Bizon #define bcm_memc_writel(v, o) bcm_rset_writel(RSET_MEMC, (v), (o)) 99e7300d04SMaxime Bizon #define bcm_ddr_readl(o) bcm_rset_readl(RSET_DDR, (o)) 100e7300d04SMaxime Bizon #define bcm_ddr_writel(v, o) bcm_rset_writel(RSET_DDR, (v), (o)) 101e5766aeaSJonas Gorski #define bcm_misc_readl(o) bcm_rset_readl(RSET_MISC, (o)) 102e5766aeaSJonas Gorski #define bcm_misc_writel(v, o) bcm_rset_writel(RSET_MISC, (v), (o)) 103e7300d04SMaxime Bizon 104e7300d04SMaxime Bizon #endif /* ! BCM63XX_IO_H_ */ 105