1*2874c5fdSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later 2eed0eabdSPaul Burton /* 3eed0eabdSPaul Burton * Copyright (C) 2016 Imagination Technologies 4fb615d61SPaul Burton * Author: Paul Burton <paul.burton@mips.com> 5eed0eabdSPaul Burton */ 6eed0eabdSPaul Burton 7eed0eabdSPaul Burton #include <linux/clk.h> 8eed0eabdSPaul Burton #include <linux/clk-provider.h> 9eed0eabdSPaul Burton #include <linux/clocksource.h> 10eed0eabdSPaul Burton #include <linux/init.h> 11eed0eabdSPaul Burton #include <linux/types.h> 12eed0eabdSPaul Burton 13eed0eabdSPaul Burton #include <asm/irq.h> 1472eb2995SPaul Burton #include <asm/mips-cps.h> 152904cdbaSPaul Burton #include <asm/time.h> 16eed0eabdSPaul Burton get_c0_fdc_int(void)17eed0eabdSPaul Burtonint get_c0_fdc_int(void) 18eed0eabdSPaul Burton { 19eed0eabdSPaul Burton int mips_cpu_fdc_irq; 20eed0eabdSPaul Burton 217bf8b16dSMatt Redfearn if (mips_gic_present()) 22eed0eabdSPaul Burton mips_cpu_fdc_irq = gic_get_c0_fdc_int(); 237bf8b16dSMatt Redfearn else if (cpu_has_veic) 247bf8b16dSMatt Redfearn panic("Unimplemented!"); 25eed0eabdSPaul Burton else if (cp0_fdc_irq >= 0) 26eed0eabdSPaul Burton mips_cpu_fdc_irq = MIPS_CPU_IRQ_BASE + cp0_fdc_irq; 27eed0eabdSPaul Burton else 28eed0eabdSPaul Burton mips_cpu_fdc_irq = -1; 29eed0eabdSPaul Burton 30eed0eabdSPaul Burton return mips_cpu_fdc_irq; 31eed0eabdSPaul Burton } 32eed0eabdSPaul Burton get_c0_perfcount_int(void)33eed0eabdSPaul Burtonint get_c0_perfcount_int(void) 34eed0eabdSPaul Burton { 35eed0eabdSPaul Burton int mips_cpu_perf_irq; 36eed0eabdSPaul Burton 377bf8b16dSMatt Redfearn if (mips_gic_present()) 38eed0eabdSPaul Burton mips_cpu_perf_irq = gic_get_c0_perfcount_int(); 397bf8b16dSMatt Redfearn else if (cpu_has_veic) 407bf8b16dSMatt Redfearn panic("Unimplemented!"); 41eed0eabdSPaul Burton else if (cp0_perfcount_irq >= 0) 42eed0eabdSPaul Burton mips_cpu_perf_irq = MIPS_CPU_IRQ_BASE + cp0_perfcount_irq; 43eed0eabdSPaul Burton else 44eed0eabdSPaul Burton mips_cpu_perf_irq = -1; 45eed0eabdSPaul Burton 46eed0eabdSPaul Burton return mips_cpu_perf_irq; 47eed0eabdSPaul Burton } 48eed0eabdSPaul Burton get_c0_compare_int(void)49eed0eabdSPaul Burtonunsigned int get_c0_compare_int(void) 50eed0eabdSPaul Burton { 51eed0eabdSPaul Burton int mips_cpu_timer_irq; 52eed0eabdSPaul Burton 537bf8b16dSMatt Redfearn if (mips_gic_present()) 54eed0eabdSPaul Burton mips_cpu_timer_irq = gic_get_c0_compare_int(); 557bf8b16dSMatt Redfearn else if (cpu_has_veic) 567bf8b16dSMatt Redfearn panic("Unimplemented!"); 57eed0eabdSPaul Burton else 58eed0eabdSPaul Burton mips_cpu_timer_irq = MIPS_CPU_IRQ_BASE + cp0_compare_irq; 59eed0eabdSPaul Burton 60eed0eabdSPaul Burton return mips_cpu_timer_irq; 61eed0eabdSPaul Burton } 62