1*16216333SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later 21097c6acSYoichi Yuasa /* 31097c6acSYoichi Yuasa * Cobalt time initialization. 41097c6acSYoichi Yuasa * 5ada8e951SYoichi Yuasa * Copyright (C) 2007 Yoichi Yuasa <yuasa@linux-mips.org> 61097c6acSYoichi Yuasa */ 7334955efSRalf Baechle #include <linux/i8253.h> 81097c6acSYoichi Yuasa #include <linux/init.h> 91097c6acSYoichi Yuasa 101097c6acSYoichi Yuasa #include <asm/gt64120.h> 111097c6acSYoichi Yuasa #include <asm/time.h> 121097c6acSYoichi Yuasa 131097c6acSYoichi Yuasa #define GT641XX_BASE_CLOCK 50000000 /* 50MHz */ 141097c6acSYoichi Yuasa plat_time_init(void)151097c6acSYoichi Yuasavoid __init plat_time_init(void) 161097c6acSYoichi Yuasa { 1718ca38d2SYoichi Yuasa u32 start, end; 1818ca38d2SYoichi Yuasa int i = HZ / 10; 1918ca38d2SYoichi Yuasa 201097c6acSYoichi Yuasa setup_pit_timer(); 211097c6acSYoichi Yuasa 221097c6acSYoichi Yuasa gt641xx_set_base_clock(GT641XX_BASE_CLOCK); 231097c6acSYoichi Yuasa 2418ca38d2SYoichi Yuasa /* 2518ca38d2SYoichi Yuasa * MIPS counter frequency is measured during a 100msec interval 2618ca38d2SYoichi Yuasa * using GT64111 timer0. 2718ca38d2SYoichi Yuasa */ 2818ca38d2SYoichi Yuasa while (!gt641xx_timer0_state()) 2918ca38d2SYoichi Yuasa ; 3018ca38d2SYoichi Yuasa 3118ca38d2SYoichi Yuasa start = read_c0_count(); 3218ca38d2SYoichi Yuasa 3318ca38d2SYoichi Yuasa while (i--) 3418ca38d2SYoichi Yuasa while (!gt641xx_timer0_state()) 3518ca38d2SYoichi Yuasa ; 3618ca38d2SYoichi Yuasa 3718ca38d2SYoichi Yuasa end = read_c0_count(); 3818ca38d2SYoichi Yuasa 3918ca38d2SYoichi Yuasa mips_hpt_frequency = (end - start) * 10; 4018ca38d2SYoichi Yuasa printk(KERN_INFO "MIPS counter frequency %dHz\n", mips_hpt_frequency); 411097c6acSYoichi Yuasa } 42