xref: /openbmc/linux/arch/mips/cavium-octeon/executive/cvmx-helper-npi.c (revision 4b4193256c8d3bc3a5397b5cd9494c2ad386317d)
1*af866496SDavid Daney /***********************license start***************
2*af866496SDavid Daney  * Author: Cavium Networks
3*af866496SDavid Daney  *
4*af866496SDavid Daney  * Contact: support@caviumnetworks.com
5*af866496SDavid Daney  * This file is part of the OCTEON SDK
6*af866496SDavid Daney  *
7*af866496SDavid Daney  * Copyright (c) 2003-2008 Cavium Networks
8*af866496SDavid Daney  *
9*af866496SDavid Daney  * This file is free software; you can redistribute it and/or modify
10*af866496SDavid Daney  * it under the terms of the GNU General Public License, Version 2, as
11*af866496SDavid Daney  * published by the Free Software Foundation.
12*af866496SDavid Daney  *
13*af866496SDavid Daney  * This file is distributed in the hope that it will be useful, but
14*af866496SDavid Daney  * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
15*af866496SDavid Daney  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
16*af866496SDavid Daney  * NONINFRINGEMENT.  See the GNU General Public License for more
17*af866496SDavid Daney  * details.
18*af866496SDavid Daney  *
19*af866496SDavid Daney  * You should have received a copy of the GNU General Public License
20*af866496SDavid Daney  * along with this file; if not, write to the Free Software
21*af866496SDavid Daney  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22*af866496SDavid Daney  * or visit http://www.gnu.org/licenses/.
23*af866496SDavid Daney  *
24*af866496SDavid Daney  * This file may also be available under a different license from Cavium.
25*af866496SDavid Daney  * Contact Cavium Networks for more information
26*af866496SDavid Daney  ***********************license end**************************************/
27*af866496SDavid Daney 
28*af866496SDavid Daney /*
29*af866496SDavid Daney  * Functions for NPI initialization, configuration,
30*af866496SDavid Daney  * and monitoring.
31*af866496SDavid Daney  */
32*af866496SDavid Daney #include <asm/octeon/octeon.h>
33*af866496SDavid Daney 
34*af866496SDavid Daney #include <asm/octeon/cvmx-config.h>
35*af866496SDavid Daney 
36*af866496SDavid Daney #include <asm/octeon/cvmx-helper.h>
37*af866496SDavid Daney 
38*af866496SDavid Daney #include <asm/octeon/cvmx-pip-defs.h>
39*af866496SDavid Daney 
40*af866496SDavid Daney /**
41*af866496SDavid Daney  * Probe a NPI interface and determine the number of ports
42*af866496SDavid Daney  * connected to it. The NPI interface should still be down
43*af866496SDavid Daney  * after this call.
44*af866496SDavid Daney  *
45*af866496SDavid Daney  * @interface: Interface to probe
46*af866496SDavid Daney  *
47*af866496SDavid Daney  * Returns Number of ports on the interface. Zero to disable.
48*af866496SDavid Daney  */
__cvmx_helper_npi_probe(int interface)49*af866496SDavid Daney int __cvmx_helper_npi_probe(int interface)
50*af866496SDavid Daney {
51*af866496SDavid Daney #if CVMX_PKO_QUEUES_PER_PORT_PCI > 0
52*af866496SDavid Daney 	if (OCTEON_IS_MODEL(OCTEON_CN38XX) || OCTEON_IS_MODEL(OCTEON_CN58XX))
53*af866496SDavid Daney 		return 4;
54*af866496SDavid Daney 	else if (OCTEON_IS_MODEL(OCTEON_CN56XX)
55*af866496SDavid Daney 		 && !OCTEON_IS_MODEL(OCTEON_CN56XX_PASS1_X))
56*af866496SDavid Daney 		/* The packet engines didn't exist before pass 2 */
57*af866496SDavid Daney 		return 4;
58*af866496SDavid Daney 	else if (OCTEON_IS_MODEL(OCTEON_CN52XX)
59*af866496SDavid Daney 		 && !OCTEON_IS_MODEL(OCTEON_CN52XX_PASS1_X))
60*af866496SDavid Daney 		/* The packet engines didn't exist before pass 2 */
61*af866496SDavid Daney 		return 4;
62*af866496SDavid Daney #endif
63*af866496SDavid Daney 	return 0;
64*af866496SDavid Daney }
65*af866496SDavid Daney 
66*af866496SDavid Daney /**
67*af866496SDavid Daney  * Bringup and enable a NPI interface. After this call packet
68*af866496SDavid Daney  * I/O should be fully functional. This is called with IPD
69*af866496SDavid Daney  * enabled but PKO disabled.
70*af866496SDavid Daney  *
71*af866496SDavid Daney  * @interface: Interface to bring up
72*af866496SDavid Daney  *
73*af866496SDavid Daney  * Returns Zero on success, negative on failure
74*af866496SDavid Daney  */
__cvmx_helper_npi_enable(int interface)75*af866496SDavid Daney int __cvmx_helper_npi_enable(int interface)
76*af866496SDavid Daney {
77*af866496SDavid Daney 	/*
78*af866496SDavid Daney 	 * On CN50XX, CN52XX, and CN56XX we need to disable length
79*af866496SDavid Daney 	 * checking so packet < 64 bytes and jumbo frames don't get
80*af866496SDavid Daney 	 * errors.
81*af866496SDavid Daney 	 */
82*af866496SDavid Daney 	if (!OCTEON_IS_MODEL(OCTEON_CN3XXX) &&
83*af866496SDavid Daney 	    !OCTEON_IS_MODEL(OCTEON_CN58XX)) {
84*af866496SDavid Daney 		int num_ports = cvmx_helper_ports_on_interface(interface);
85*af866496SDavid Daney 		int port;
86*af866496SDavid Daney 		for (port = 0; port < num_ports; port++) {
87*af866496SDavid Daney 			union cvmx_pip_prt_cfgx port_cfg;
88*af866496SDavid Daney 			int ipd_port =
89*af866496SDavid Daney 			    cvmx_helper_get_ipd_port(interface, port);
90*af866496SDavid Daney 			port_cfg.u64 =
91*af866496SDavid Daney 			    cvmx_read_csr(CVMX_PIP_PRT_CFGX(ipd_port));
92*af866496SDavid Daney 			port_cfg.s.maxerr_en = 0;
93*af866496SDavid Daney 			port_cfg.s.minerr_en = 0;
94*af866496SDavid Daney 			cvmx_write_csr(CVMX_PIP_PRT_CFGX(ipd_port),
95*af866496SDavid Daney 				       port_cfg.u64);
96*af866496SDavid Daney 		}
97*af866496SDavid Daney 	}
98*af866496SDavid Daney 
99*af866496SDavid Daney 	/* Enables are controlled by the remote host, so nothing to do here */
100*af866496SDavid Daney 	return 0;
101*af866496SDavid Daney }
102