1*7aacf86bSNathan Sullivan/dts-v1/; 2*7aacf86bSNathan Sullivan 3*7aacf86bSNathan Sullivan/ { 4*7aacf86bSNathan Sullivan #address-cells = <1>; 5*7aacf86bSNathan Sullivan #size-cells = <1>; 6*7aacf86bSNathan Sullivan compatible = "ni,169445"; 7*7aacf86bSNathan Sullivan 8*7aacf86bSNathan Sullivan cpus { 9*7aacf86bSNathan Sullivan #address-cells = <1>; 10*7aacf86bSNathan Sullivan #size-cells = <0>; 11*7aacf86bSNathan Sullivan cpu@0 { 12*7aacf86bSNathan Sullivan device_type = "cpu"; 13*7aacf86bSNathan Sullivan compatible = "mti,mips14KEc"; 14*7aacf86bSNathan Sullivan clocks = <&baseclk>; 15*7aacf86bSNathan Sullivan reg = <0>; 16*7aacf86bSNathan Sullivan }; 17*7aacf86bSNathan Sullivan }; 18*7aacf86bSNathan Sullivan 19*7aacf86bSNathan Sullivan memory@0 { 20*7aacf86bSNathan Sullivan device_type = "memory"; 21*7aacf86bSNathan Sullivan reg = <0x0 0x10000000>; 22*7aacf86bSNathan Sullivan }; 23*7aacf86bSNathan Sullivan 24*7aacf86bSNathan Sullivan baseclk: baseclock { 25*7aacf86bSNathan Sullivan compatible = "fixed-clock"; 26*7aacf86bSNathan Sullivan #clock-cells = <0>; 27*7aacf86bSNathan Sullivan clock-frequency = <50000000>; 28*7aacf86bSNathan Sullivan }; 29*7aacf86bSNathan Sullivan 30*7aacf86bSNathan Sullivan cpu_intc: interrupt-controller { 31*7aacf86bSNathan Sullivan #address-cells = <0>; 32*7aacf86bSNathan Sullivan compatible = "mti,cpu-interrupt-controller"; 33*7aacf86bSNathan Sullivan interrupt-controller; 34*7aacf86bSNathan Sullivan #interrupt-cells = <1>; 35*7aacf86bSNathan Sullivan }; 36*7aacf86bSNathan Sullivan 37*7aacf86bSNathan Sullivan ahb@1f300000 { 38*7aacf86bSNathan Sullivan compatible = "simple-bus"; 39*7aacf86bSNathan Sullivan #address-cells = <1>; 40*7aacf86bSNathan Sullivan #size-cells = <1>; 41*7aacf86bSNathan Sullivan ranges = <0x0 0x1f300000 0x80FFF>; 42*7aacf86bSNathan Sullivan 43*7aacf86bSNathan Sullivan gpio1: gpio@10 { 44*7aacf86bSNathan Sullivan compatible = "ni,169445-nand-gpio"; 45*7aacf86bSNathan Sullivan reg = <0x10 0x4>; 46*7aacf86bSNathan Sullivan reg-names = "dat"; 47*7aacf86bSNathan Sullivan gpio-controller; 48*7aacf86bSNathan Sullivan #gpio-cells = <2>; 49*7aacf86bSNathan Sullivan }; 50*7aacf86bSNathan Sullivan 51*7aacf86bSNathan Sullivan gpio2: gpio@14 { 52*7aacf86bSNathan Sullivan compatible = "ni,169445-nand-gpio"; 53*7aacf86bSNathan Sullivan reg = <0x14 0x4>; 54*7aacf86bSNathan Sullivan reg-names = "dat"; 55*7aacf86bSNathan Sullivan gpio-controller; 56*7aacf86bSNathan Sullivan #gpio-cells = <2>; 57*7aacf86bSNathan Sullivan no-output; 58*7aacf86bSNathan Sullivan }; 59*7aacf86bSNathan Sullivan 60*7aacf86bSNathan Sullivan nand@0 { 61*7aacf86bSNathan Sullivan compatible = "gpio-control-nand"; 62*7aacf86bSNathan Sullivan nand-on-flash-bbt; 63*7aacf86bSNathan Sullivan nand-ecc-mode = "soft_bch"; 64*7aacf86bSNathan Sullivan nand-ecc-step-size = <512>; 65*7aacf86bSNathan Sullivan nand-ecc-strength = <4>; 66*7aacf86bSNathan Sullivan reg = <0x0 4>; 67*7aacf86bSNathan Sullivan gpios = <&gpio2 0 0>, /* rdy */ 68*7aacf86bSNathan Sullivan <&gpio1 1 0>, /* nce */ 69*7aacf86bSNathan Sullivan <&gpio1 2 0>, /* ale */ 70*7aacf86bSNathan Sullivan <&gpio1 3 0>, /* cle */ 71*7aacf86bSNathan Sullivan <&gpio1 4 0>; /* nwp */ 72*7aacf86bSNathan Sullivan }; 73*7aacf86bSNathan Sullivan 74*7aacf86bSNathan Sullivan serial@80000 { 75*7aacf86bSNathan Sullivan compatible = "ns16550a"; 76*7aacf86bSNathan Sullivan reg = <0x80000 0x1000>; 77*7aacf86bSNathan Sullivan interrupt-parent = <&cpu_intc>; 78*7aacf86bSNathan Sullivan interrupts = <6>; 79*7aacf86bSNathan Sullivan clocks = <&baseclk>; 80*7aacf86bSNathan Sullivan reg-shift = <0>; 81*7aacf86bSNathan Sullivan }; 82*7aacf86bSNathan Sullivan 83*7aacf86bSNathan Sullivan ethernet@40000 { 84*7aacf86bSNathan Sullivan compatible = "snps,dwmac-4.10a"; 85*7aacf86bSNathan Sullivan interrupt-parent = <&cpu_intc>; 86*7aacf86bSNathan Sullivan interrupts = <5>; 87*7aacf86bSNathan Sullivan interrupt-names = "macirq"; 88*7aacf86bSNathan Sullivan reg = <0x40000 0x2000>; 89*7aacf86bSNathan Sullivan clock-names = "stmmaceth", "pclk"; 90*7aacf86bSNathan Sullivan clocks = <&baseclk>, <&baseclk>; 91*7aacf86bSNathan Sullivan 92*7aacf86bSNathan Sullivan phy-mode = "rgmii"; 93*7aacf86bSNathan Sullivan 94*7aacf86bSNathan Sullivan fixed-link { 95*7aacf86bSNathan Sullivan speed = <1000>; 96*7aacf86bSNathan Sullivan full-duplex; 97*7aacf86bSNathan Sullivan }; 98*7aacf86bSNathan Sullivan }; 99*7aacf86bSNathan Sullivan }; 100*7aacf86bSNathan Sullivan}; 101