17a16ccd3S周琰杰 (Zhou Yanjie)// SPDX-License-Identifier: GPL-2.0 2eb411138S周琰杰 (Zhou Yanjie)#include <dt-bindings/clock/ingenic,tcu.h> 3c4a11bf4SPaul Cercueil#include <dt-bindings/clock/ingenic,x1000-cgu.h> 47a16ccd3S周琰杰 (Zhou Yanjie)#include <dt-bindings/dma/x1000-dma.h> 57a16ccd3S周琰杰 (Zhou Yanjie) 67a16ccd3S周琰杰 (Zhou Yanjie)/ { 77a16ccd3S周琰杰 (Zhou Yanjie) #address-cells = <1>; 87a16ccd3S周琰杰 (Zhou Yanjie) #size-cells = <1>; 97a16ccd3S周琰杰 (Zhou Yanjie) compatible = "ingenic,x1000", "ingenic,x1000e"; 107a16ccd3S周琰杰 (Zhou Yanjie) 11c1f6b45eS周琰杰 (Zhou Yanjie) cpus { 12c1f6b45eS周琰杰 (Zhou Yanjie) #address-cells = <1>; 13c1f6b45eS周琰杰 (Zhou Yanjie) #size-cells = <0>; 14c1f6b45eS周琰杰 (Zhou Yanjie) 15c1f6b45eS周琰杰 (Zhou Yanjie) cpu0: cpu@0 { 16c1f6b45eS周琰杰 (Zhou Yanjie) device_type = "cpu"; 17c1f6b45eS周琰杰 (Zhou Yanjie) compatible = "ingenic,xburst-fpu1.0-mxu1.1"; 18c1f6b45eS周琰杰 (Zhou Yanjie) reg = <0>; 19c1f6b45eS周琰杰 (Zhou Yanjie) 20c1f6b45eS周琰杰 (Zhou Yanjie) clocks = <&cgu X1000_CLK_CPU>; 21c1f6b45eS周琰杰 (Zhou Yanjie) clock-names = "cpu"; 22c1f6b45eS周琰杰 (Zhou Yanjie) }; 23c1f6b45eS周琰杰 (Zhou Yanjie) }; 24c1f6b45eS周琰杰 (Zhou Yanjie) 257a16ccd3S周琰杰 (Zhou Yanjie) cpuintc: interrupt-controller { 267a16ccd3S周琰杰 (Zhou Yanjie) #address-cells = <0>; 277a16ccd3S周琰杰 (Zhou Yanjie) #interrupt-cells = <1>; 287a16ccd3S周琰杰 (Zhou Yanjie) interrupt-controller; 297a16ccd3S周琰杰 (Zhou Yanjie) compatible = "mti,cpu-interrupt-controller"; 307a16ccd3S周琰杰 (Zhou Yanjie) }; 317a16ccd3S周琰杰 (Zhou Yanjie) 327a16ccd3S周琰杰 (Zhou Yanjie) intc: interrupt-controller@10001000 { 337a16ccd3S周琰杰 (Zhou Yanjie) compatible = "ingenic,x1000-intc", "ingenic,jz4780-intc"; 347a16ccd3S周琰杰 (Zhou Yanjie) reg = <0x10001000 0x50>; 357a16ccd3S周琰杰 (Zhou Yanjie) 367a16ccd3S周琰杰 (Zhou Yanjie) interrupt-controller; 377a16ccd3S周琰杰 (Zhou Yanjie) #interrupt-cells = <1>; 387a16ccd3S周琰杰 (Zhou Yanjie) 397a16ccd3S周琰杰 (Zhou Yanjie) interrupt-parent = <&cpuintc>; 407a16ccd3S周琰杰 (Zhou Yanjie) interrupts = <2>; 417a16ccd3S周琰杰 (Zhou Yanjie) }; 427a16ccd3S周琰杰 (Zhou Yanjie) 437a16ccd3S周琰杰 (Zhou Yanjie) exclk: ext { 447a16ccd3S周琰杰 (Zhou Yanjie) compatible = "fixed-clock"; 457a16ccd3S周琰杰 (Zhou Yanjie) #clock-cells = <0>; 467a16ccd3S周琰杰 (Zhou Yanjie) }; 477a16ccd3S周琰杰 (Zhou Yanjie) 487a16ccd3S周琰杰 (Zhou Yanjie) rtclk: rtc { 497a16ccd3S周琰杰 (Zhou Yanjie) compatible = "fixed-clock"; 507a16ccd3S周琰杰 (Zhou Yanjie) #clock-cells = <0>; 517a16ccd3S周琰杰 (Zhou Yanjie) clock-frequency = <32768>; 527a16ccd3S周琰杰 (Zhou Yanjie) }; 537a16ccd3S周琰杰 (Zhou Yanjie) 547a16ccd3S周琰杰 (Zhou Yanjie) cgu: x1000-cgu@10000000 { 55158c774dS周琰杰 (Zhou Yanjie) compatible = "ingenic,x1000-cgu", "simple-mfd"; 567a16ccd3S周琰杰 (Zhou Yanjie) reg = <0x10000000 0x100>; 57158c774dS周琰杰 (Zhou Yanjie) #address-cells = <1>; 58158c774dS周琰杰 (Zhou Yanjie) #size-cells = <1>; 59158c774dS周琰杰 (Zhou Yanjie) ranges = <0x0 0x10000000 0x100>; 607a16ccd3S周琰杰 (Zhou Yanjie) 617a16ccd3S周琰杰 (Zhou Yanjie) #clock-cells = <1>; 627a16ccd3S周琰杰 (Zhou Yanjie) 637a16ccd3S周琰杰 (Zhou Yanjie) clocks = <&exclk>, <&rtclk>; 647a16ccd3S周琰杰 (Zhou Yanjie) clock-names = "ext", "rtc"; 65158c774dS周琰杰 (Zhou Yanjie) 66158c774dS周琰杰 (Zhou Yanjie) otg_phy: usb-phy@3c { 67158c774dS周琰杰 (Zhou Yanjie) compatible = "ingenic,x1000-phy"; 68158c774dS周琰杰 (Zhou Yanjie) reg = <0x3c 0x10>; 69158c774dS周琰杰 (Zhou Yanjie) 70158c774dS周琰杰 (Zhou Yanjie) clocks = <&cgu X1000_CLK_OTGPHY>; 71158c774dS周琰杰 (Zhou Yanjie) 72158c774dS周琰杰 (Zhou Yanjie) #phy-cells = <0>; 73158c774dS周琰杰 (Zhou Yanjie) 74158c774dS周琰杰 (Zhou Yanjie) status = "disabled"; 75158c774dS周琰杰 (Zhou Yanjie) }; 76158c774dS周琰杰 (Zhou Yanjie) 77158c774dS周琰杰 (Zhou Yanjie) rng: rng@d8 { 78158c774dS周琰杰 (Zhou Yanjie) compatible = "ingenic,x1000-rng"; 79158c774dS周琰杰 (Zhou Yanjie) reg = <0xd8 0x8>; 80158c774dS周琰杰 (Zhou Yanjie) 81158c774dS周琰杰 (Zhou Yanjie) status = "disabled"; 82158c774dS周琰杰 (Zhou Yanjie) }; 83ab3040e1S周琰杰 (Zhou Yanjie) 84ab3040e1S周琰杰 (Zhou Yanjie) mac_phy_ctrl: mac-phy-ctrl@e8 { 85ab3040e1S周琰杰 (Zhou Yanjie) compatible = "syscon"; 86ab3040e1S周琰杰 (Zhou Yanjie) reg = <0xe8 0x4>; 87ab3040e1S周琰杰 (Zhou Yanjie) }; 88158c774dS周琰杰 (Zhou Yanjie) }; 89158c774dS周琰杰 (Zhou Yanjie) 90158c774dS周琰杰 (Zhou Yanjie) ost: timer@12000000 { 91158c774dS周琰杰 (Zhou Yanjie) compatible = "ingenic,x1000-ost"; 92158c774dS周琰杰 (Zhou Yanjie) reg = <0x12000000 0x3c>; 93158c774dS周琰杰 (Zhou Yanjie) 94158c774dS周琰杰 (Zhou Yanjie) #clock-cells = <1>; 95158c774dS周琰杰 (Zhou Yanjie) 96158c774dS周琰杰 (Zhou Yanjie) clocks = <&cgu X1000_CLK_OST>; 97158c774dS周琰杰 (Zhou Yanjie) clock-names = "ost"; 98158c774dS周琰杰 (Zhou Yanjie) 99158c774dS周琰杰 (Zhou Yanjie) interrupt-parent = <&cpuintc>; 100158c774dS周琰杰 (Zhou Yanjie) interrupts = <3>; 1017a16ccd3S周琰杰 (Zhou Yanjie) }; 1027a16ccd3S周琰杰 (Zhou Yanjie) 1037a16ccd3S周琰杰 (Zhou Yanjie) tcu: timer@10002000 { 104233ed6f3S周琰杰 (Zhou Yanjie) compatible = "ingenic,x1000-tcu", "simple-mfd"; 1057a16ccd3S周琰杰 (Zhou Yanjie) reg = <0x10002000 0x1000>; 1067a16ccd3S周琰杰 (Zhou Yanjie) #address-cells = <1>; 1077a16ccd3S周琰杰 (Zhou Yanjie) #size-cells = <1>; 1087a16ccd3S周琰杰 (Zhou Yanjie) ranges = <0x0 0x10002000 0x1000>; 1097a16ccd3S周琰杰 (Zhou Yanjie) 1107a16ccd3S周琰杰 (Zhou Yanjie) #clock-cells = <1>; 1117a16ccd3S周琰杰 (Zhou Yanjie) 112cf2e6b8eSPaul Cercueil clocks = <&cgu X1000_CLK_RTCLK>, 113cf2e6b8eSPaul Cercueil <&cgu X1000_CLK_EXCLK>, 114db30dc1aSAidan MacDonald <&cgu X1000_CLK_PCLK>, 115db30dc1aSAidan MacDonald <&cgu X1000_CLK_TCU>; 116db30dc1aSAidan MacDonald clock-names = "rtc", "ext", "pclk", "tcu"; 1177a16ccd3S周琰杰 (Zhou Yanjie) 1187a16ccd3S周琰杰 (Zhou Yanjie) interrupt-controller; 1197a16ccd3S周琰杰 (Zhou Yanjie) #interrupt-cells = <1>; 1207a16ccd3S周琰杰 (Zhou Yanjie) 1217a16ccd3S周琰杰 (Zhou Yanjie) interrupt-parent = <&intc>; 1227a16ccd3S周琰杰 (Zhou Yanjie) interrupts = <27 26 25>; 1237a16ccd3S周琰杰 (Zhou Yanjie) 1247a16ccd3S周琰杰 (Zhou Yanjie) wdt: watchdog@0 { 1257a16ccd3S周琰杰 (Zhou Yanjie) compatible = "ingenic,x1000-watchdog", "ingenic,jz4780-watchdog"; 1267a16ccd3S周琰杰 (Zhou Yanjie) reg = <0x0 0x10>; 1277a16ccd3S周琰杰 (Zhou Yanjie) 128eb411138S周琰杰 (Zhou Yanjie) clocks = <&tcu TCU_CLK_WDT>; 1297a16ccd3S周琰杰 (Zhou Yanjie) clock-names = "wdt"; 1307a16ccd3S周琰杰 (Zhou Yanjie) }; 1317671f967SAidan MacDonald 1327671f967SAidan MacDonald pwm: pwm@40 { 1337671f967SAidan MacDonald compatible = "ingenic,x1000-pwm"; 1347671f967SAidan MacDonald reg = <0x40 0x50>; 1357671f967SAidan MacDonald 1367671f967SAidan MacDonald #pwm-cells = <3>; 1377671f967SAidan MacDonald 1387671f967SAidan MacDonald clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>, 1397671f967SAidan MacDonald <&tcu TCU_CLK_TIMER2>, <&tcu TCU_CLK_TIMER3>, 1407671f967SAidan MacDonald <&tcu TCU_CLK_TIMER4>; 1417671f967SAidan MacDonald clock-names = "timer0", "timer1", "timer2", "timer3", "timer4"; 1427671f967SAidan MacDonald }; 1437a16ccd3S周琰杰 (Zhou Yanjie) }; 1447a16ccd3S周琰杰 (Zhou Yanjie) 1457a16ccd3S周琰杰 (Zhou Yanjie) rtc: rtc@10003000 { 1467a16ccd3S周琰杰 (Zhou Yanjie) compatible = "ingenic,x1000-rtc", "ingenic,jz4780-rtc"; 1477a16ccd3S周琰杰 (Zhou Yanjie) reg = <0x10003000 0x4c>; 1487a16ccd3S周琰杰 (Zhou Yanjie) 1497a16ccd3S周琰杰 (Zhou Yanjie) interrupt-parent = <&intc>; 1507a16ccd3S周琰杰 (Zhou Yanjie) interrupts = <32>; 1517a16ccd3S周琰杰 (Zhou Yanjie) 1527a16ccd3S周琰杰 (Zhou Yanjie) clocks = <&cgu X1000_CLK_RTCLK>; 1537a16ccd3S周琰杰 (Zhou Yanjie) clock-names = "rtc"; 1547a16ccd3S周琰杰 (Zhou Yanjie) }; 1557a16ccd3S周琰杰 (Zhou Yanjie) 1567a16ccd3S周琰杰 (Zhou Yanjie) pinctrl: pin-controller@10010000 { 1577a16ccd3S周琰杰 (Zhou Yanjie) compatible = "ingenic,x1000-pinctrl"; 1587a16ccd3S周琰杰 (Zhou Yanjie) reg = <0x10010000 0x800>; 1597a16ccd3S周琰杰 (Zhou Yanjie) #address-cells = <1>; 1607a16ccd3S周琰杰 (Zhou Yanjie) #size-cells = <0>; 1617a16ccd3S周琰杰 (Zhou Yanjie) 1627a16ccd3S周琰杰 (Zhou Yanjie) gpa: gpio@0 { 1637a16ccd3S周琰杰 (Zhou Yanjie) compatible = "ingenic,x1000-gpio"; 1647a16ccd3S周琰杰 (Zhou Yanjie) reg = <0>; 1657a16ccd3S周琰杰 (Zhou Yanjie) 1667a16ccd3S周琰杰 (Zhou Yanjie) gpio-controller; 1677a16ccd3S周琰杰 (Zhou Yanjie) gpio-ranges = <&pinctrl 0 0 32>; 1687a16ccd3S周琰杰 (Zhou Yanjie) #gpio-cells = <2>; 1697a16ccd3S周琰杰 (Zhou Yanjie) 1707a16ccd3S周琰杰 (Zhou Yanjie) interrupt-controller; 1717a16ccd3S周琰杰 (Zhou Yanjie) #interrupt-cells = <2>; 1727a16ccd3S周琰杰 (Zhou Yanjie) 1737a16ccd3S周琰杰 (Zhou Yanjie) interrupt-parent = <&intc>; 1747a16ccd3S周琰杰 (Zhou Yanjie) interrupts = <17>; 1757a16ccd3S周琰杰 (Zhou Yanjie) }; 1767a16ccd3S周琰杰 (Zhou Yanjie) 1777a16ccd3S周琰杰 (Zhou Yanjie) gpb: gpio@1 { 1787a16ccd3S周琰杰 (Zhou Yanjie) compatible = "ingenic,x1000-gpio"; 1797a16ccd3S周琰杰 (Zhou Yanjie) reg = <1>; 1807a16ccd3S周琰杰 (Zhou Yanjie) 1817a16ccd3S周琰杰 (Zhou Yanjie) gpio-controller; 1827a16ccd3S周琰杰 (Zhou Yanjie) gpio-ranges = <&pinctrl 0 32 32>; 1837a16ccd3S周琰杰 (Zhou Yanjie) #gpio-cells = <2>; 1847a16ccd3S周琰杰 (Zhou Yanjie) 1857a16ccd3S周琰杰 (Zhou Yanjie) interrupt-controller; 1867a16ccd3S周琰杰 (Zhou Yanjie) #interrupt-cells = <2>; 1877a16ccd3S周琰杰 (Zhou Yanjie) 1887a16ccd3S周琰杰 (Zhou Yanjie) interrupt-parent = <&intc>; 1897a16ccd3S周琰杰 (Zhou Yanjie) interrupts = <16>; 1907a16ccd3S周琰杰 (Zhou Yanjie) }; 1917a16ccd3S周琰杰 (Zhou Yanjie) 1927a16ccd3S周琰杰 (Zhou Yanjie) gpc: gpio@2 { 1937a16ccd3S周琰杰 (Zhou Yanjie) compatible = "ingenic,x1000-gpio"; 1947a16ccd3S周琰杰 (Zhou Yanjie) reg = <2>; 1957a16ccd3S周琰杰 (Zhou Yanjie) 1967a16ccd3S周琰杰 (Zhou Yanjie) gpio-controller; 1977a16ccd3S周琰杰 (Zhou Yanjie) gpio-ranges = <&pinctrl 0 64 32>; 1987a16ccd3S周琰杰 (Zhou Yanjie) #gpio-cells = <2>; 1997a16ccd3S周琰杰 (Zhou Yanjie) 2007a16ccd3S周琰杰 (Zhou Yanjie) interrupt-controller; 2017a16ccd3S周琰杰 (Zhou Yanjie) #interrupt-cells = <2>; 2027a16ccd3S周琰杰 (Zhou Yanjie) 2037a16ccd3S周琰杰 (Zhou Yanjie) interrupt-parent = <&intc>; 2047a16ccd3S周琰杰 (Zhou Yanjie) interrupts = <15>; 2057a16ccd3S周琰杰 (Zhou Yanjie) }; 2067a16ccd3S周琰杰 (Zhou Yanjie) 2077a16ccd3S周琰杰 (Zhou Yanjie) gpd: gpio@3 { 2087a16ccd3S周琰杰 (Zhou Yanjie) compatible = "ingenic,x1000-gpio"; 2097a16ccd3S周琰杰 (Zhou Yanjie) reg = <3>; 2107a16ccd3S周琰杰 (Zhou Yanjie) 2117a16ccd3S周琰杰 (Zhou Yanjie) gpio-controller; 2127a16ccd3S周琰杰 (Zhou Yanjie) gpio-ranges = <&pinctrl 0 96 32>; 2137a16ccd3S周琰杰 (Zhou Yanjie) #gpio-cells = <2>; 2147a16ccd3S周琰杰 (Zhou Yanjie) 2157a16ccd3S周琰杰 (Zhou Yanjie) interrupt-controller; 2167a16ccd3S周琰杰 (Zhou Yanjie) #interrupt-cells = <2>; 2177a16ccd3S周琰杰 (Zhou Yanjie) 2187a16ccd3S周琰杰 (Zhou Yanjie) interrupt-parent = <&intc>; 2197a16ccd3S周琰杰 (Zhou Yanjie) interrupts = <14>; 2207a16ccd3S周琰杰 (Zhou Yanjie) }; 2217a16ccd3S周琰杰 (Zhou Yanjie) }; 2227a16ccd3S周琰杰 (Zhou Yanjie) 223233ed6f3S周琰杰 (Zhou Yanjie) uart0: serial@10030000 { 224233ed6f3S周琰杰 (Zhou Yanjie) compatible = "ingenic,x1000-uart"; 225233ed6f3S周琰杰 (Zhou Yanjie) reg = <0x10030000 0x100>; 226233ed6f3S周琰杰 (Zhou Yanjie) 227233ed6f3S周琰杰 (Zhou Yanjie) interrupt-parent = <&intc>; 228233ed6f3S周琰杰 (Zhou Yanjie) interrupts = <51>; 229233ed6f3S周琰杰 (Zhou Yanjie) 230233ed6f3S周琰杰 (Zhou Yanjie) clocks = <&exclk>, <&cgu X1000_CLK_UART0>; 231233ed6f3S周琰杰 (Zhou Yanjie) clock-names = "baud", "module"; 232233ed6f3S周琰杰 (Zhou Yanjie) 233233ed6f3S周琰杰 (Zhou Yanjie) status = "disabled"; 234233ed6f3S周琰杰 (Zhou Yanjie) }; 235233ed6f3S周琰杰 (Zhou Yanjie) 236233ed6f3S周琰杰 (Zhou Yanjie) uart1: serial@10031000 { 237233ed6f3S周琰杰 (Zhou Yanjie) compatible = "ingenic,x1000-uart"; 238233ed6f3S周琰杰 (Zhou Yanjie) reg = <0x10031000 0x100>; 239233ed6f3S周琰杰 (Zhou Yanjie) 240233ed6f3S周琰杰 (Zhou Yanjie) interrupt-parent = <&intc>; 241233ed6f3S周琰杰 (Zhou Yanjie) interrupts = <50>; 242233ed6f3S周琰杰 (Zhou Yanjie) 243233ed6f3S周琰杰 (Zhou Yanjie) clocks = <&exclk>, <&cgu X1000_CLK_UART1>; 244233ed6f3S周琰杰 (Zhou Yanjie) clock-names = "baud", "module"; 245233ed6f3S周琰杰 (Zhou Yanjie) 246233ed6f3S周琰杰 (Zhou Yanjie) status = "disabled"; 247233ed6f3S周琰杰 (Zhou Yanjie) }; 248233ed6f3S周琰杰 (Zhou Yanjie) 249233ed6f3S周琰杰 (Zhou Yanjie) uart2: serial@10032000 { 250233ed6f3S周琰杰 (Zhou Yanjie) compatible = "ingenic,x1000-uart"; 251233ed6f3S周琰杰 (Zhou Yanjie) reg = <0x10032000 0x100>; 252233ed6f3S周琰杰 (Zhou Yanjie) 253233ed6f3S周琰杰 (Zhou Yanjie) interrupt-parent = <&intc>; 254233ed6f3S周琰杰 (Zhou Yanjie) interrupts = <49>; 255233ed6f3S周琰杰 (Zhou Yanjie) 256233ed6f3S周琰杰 (Zhou Yanjie) clocks = <&exclk>, <&cgu X1000_CLK_UART2>; 257233ed6f3S周琰杰 (Zhou Yanjie) clock-names = "baud", "module"; 258233ed6f3S周琰杰 (Zhou Yanjie) 259233ed6f3S周琰杰 (Zhou Yanjie) status = "disabled"; 260233ed6f3S周琰杰 (Zhou Yanjie) }; 261233ed6f3S周琰杰 (Zhou Yanjie) 262562dc4c9S周琰杰 (Zhou Yanjie) ssi: spi@10043000 { 263562dc4c9S周琰杰 (Zhou Yanjie) compatible = "ingenic,x1000-spi"; 264562dc4c9S周琰杰 (Zhou Yanjie) reg = <0x10043000 0x20>; 265562dc4c9S周琰杰 (Zhou Yanjie) #address-cells = <1>; 266562dc4c9S周琰杰 (Zhou Yanjie) #size-cells = <0>; 267562dc4c9S周琰杰 (Zhou Yanjie) 268562dc4c9S周琰杰 (Zhou Yanjie) interrupt-parent = <&intc>; 269562dc4c9S周琰杰 (Zhou Yanjie) interrupts = <8>; 270562dc4c9S周琰杰 (Zhou Yanjie) 271562dc4c9S周琰杰 (Zhou Yanjie) clocks = <&cgu X1000_CLK_SSI>; 272562dc4c9S周琰杰 (Zhou Yanjie) clock-names = "spi"; 273562dc4c9S周琰杰 (Zhou Yanjie) 274562dc4c9S周琰杰 (Zhou Yanjie) dmas = <&pdma X1000_DMA_SSI0_RX 0xffffffff>, 275562dc4c9S周琰杰 (Zhou Yanjie) <&pdma X1000_DMA_SSI0_TX 0xffffffff>; 276562dc4c9S周琰杰 (Zhou Yanjie) dma-names = "rx", "tx"; 277562dc4c9S周琰杰 (Zhou Yanjie) 278562dc4c9S周琰杰 (Zhou Yanjie) status = "disabled"; 279562dc4c9S周琰杰 (Zhou Yanjie) }; 280562dc4c9S周琰杰 (Zhou Yanjie) 2810ba96b34S周琰杰 (Zhou Yanjie) i2c0: i2c-controller@10050000 { 2820ba96b34S周琰杰 (Zhou Yanjie) compatible = "ingenic,x1000-i2c"; 2830ba96b34S周琰杰 (Zhou Yanjie) reg = <0x10050000 0x1000>; 2840ba96b34S周琰杰 (Zhou Yanjie) #address-cells = <1>; 2850ba96b34S周琰杰 (Zhou Yanjie) #size-cells = <0>; 2860ba96b34S周琰杰 (Zhou Yanjie) 2870ba96b34S周琰杰 (Zhou Yanjie) interrupt-parent = <&intc>; 2880ba96b34S周琰杰 (Zhou Yanjie) interrupts = <60>; 2890ba96b34S周琰杰 (Zhou Yanjie) 2900ba96b34S周琰杰 (Zhou Yanjie) clocks = <&cgu X1000_CLK_I2C0>; 2910ba96b34S周琰杰 (Zhou Yanjie) 2920ba96b34S周琰杰 (Zhou Yanjie) status = "disabled"; 2930ba96b34S周琰杰 (Zhou Yanjie) }; 2940ba96b34S周琰杰 (Zhou Yanjie) 2950ba96b34S周琰杰 (Zhou Yanjie) i2c1: i2c-controller@10051000 { 2960ba96b34S周琰杰 (Zhou Yanjie) compatible = "ingenic,x1000-i2c"; 2970ba96b34S周琰杰 (Zhou Yanjie) reg = <0x10051000 0x1000>; 2980ba96b34S周琰杰 (Zhou Yanjie) #address-cells = <1>; 2990ba96b34S周琰杰 (Zhou Yanjie) #size-cells = <0>; 3000ba96b34S周琰杰 (Zhou Yanjie) 3010ba96b34S周琰杰 (Zhou Yanjie) interrupt-parent = <&intc>; 3020ba96b34S周琰杰 (Zhou Yanjie) interrupts = <59>; 3030ba96b34S周琰杰 (Zhou Yanjie) 3040ba96b34S周琰杰 (Zhou Yanjie) clocks = <&cgu X1000_CLK_I2C1>; 3050ba96b34S周琰杰 (Zhou Yanjie) 3060ba96b34S周琰杰 (Zhou Yanjie) status = "disabled"; 3070ba96b34S周琰杰 (Zhou Yanjie) }; 3080ba96b34S周琰杰 (Zhou Yanjie) 3090ba96b34S周琰杰 (Zhou Yanjie) i2c2: i2c-controller@10052000 { 3100ba96b34S周琰杰 (Zhou Yanjie) compatible = "ingenic,x1000-i2c"; 3110ba96b34S周琰杰 (Zhou Yanjie) reg = <0x10052000 0x1000>; 3120ba96b34S周琰杰 (Zhou Yanjie) #address-cells = <1>; 3130ba96b34S周琰杰 (Zhou Yanjie) #size-cells = <0>; 3140ba96b34S周琰杰 (Zhou Yanjie) 3150ba96b34S周琰杰 (Zhou Yanjie) interrupt-parent = <&intc>; 3160ba96b34S周琰杰 (Zhou Yanjie) interrupts = <58>; 3170ba96b34S周琰杰 (Zhou Yanjie) 3180ba96b34S周琰杰 (Zhou Yanjie) clocks = <&cgu X1000_CLK_I2C2>; 3190ba96b34S周琰杰 (Zhou Yanjie) 3200ba96b34S周琰杰 (Zhou Yanjie) status = "disabled"; 3210ba96b34S周琰杰 (Zhou Yanjie) }; 3220ba96b34S周琰杰 (Zhou Yanjie) 3237a16ccd3S周琰杰 (Zhou Yanjie) pdma: dma-controller@13420000 { 3247a16ccd3S周琰杰 (Zhou Yanjie) compatible = "ingenic,x1000-dma"; 325cf2e6b8eSPaul Cercueil reg = <0x13420000 0x400>, <0x13421000 0x40>; 326562dc4c9S周琰杰 (Zhou Yanjie) 3277a16ccd3S周琰杰 (Zhou Yanjie) #dma-cells = <2>; 3287a16ccd3S周琰杰 (Zhou Yanjie) 3297a16ccd3S周琰杰 (Zhou Yanjie) interrupt-parent = <&intc>; 3307a16ccd3S周琰杰 (Zhou Yanjie) interrupts = <10>; 3317a16ccd3S周琰杰 (Zhou Yanjie) 3327a16ccd3S周琰杰 (Zhou Yanjie) clocks = <&cgu X1000_CLK_PDMA>; 3337a16ccd3S周琰杰 (Zhou Yanjie) }; 3347a16ccd3S周琰杰 (Zhou Yanjie) 3357a16ccd3S周琰杰 (Zhou Yanjie) msc0: mmc@13450000 { 3367a16ccd3S周琰杰 (Zhou Yanjie) compatible = "ingenic,x1000-mmc"; 3377a16ccd3S周琰杰 (Zhou Yanjie) reg = <0x13450000 0x1000>; 3387a16ccd3S周琰杰 (Zhou Yanjie) 3397a16ccd3S周琰杰 (Zhou Yanjie) interrupt-parent = <&intc>; 3407a16ccd3S周琰杰 (Zhou Yanjie) interrupts = <37>; 3417a16ccd3S周琰杰 (Zhou Yanjie) 3427a16ccd3S周琰杰 (Zhou Yanjie) clocks = <&cgu X1000_CLK_MSC0>; 3437a16ccd3S周琰杰 (Zhou Yanjie) clock-names = "mmc"; 3447a16ccd3S周琰杰 (Zhou Yanjie) 3457a16ccd3S周琰杰 (Zhou Yanjie) cap-sd-highspeed; 3467a16ccd3S周琰杰 (Zhou Yanjie) cap-mmc-highspeed; 3477a16ccd3S周琰杰 (Zhou Yanjie) cap-sdio-irq; 3487a16ccd3S周琰杰 (Zhou Yanjie) 3497a16ccd3S周琰杰 (Zhou Yanjie) dmas = <&pdma X1000_DMA_MSC0_RX 0xffffffff>, 3507a16ccd3S周琰杰 (Zhou Yanjie) <&pdma X1000_DMA_MSC0_TX 0xffffffff>; 3517a16ccd3S周琰杰 (Zhou Yanjie) dma-names = "rx", "tx"; 3527a16ccd3S周琰杰 (Zhou Yanjie) 3537a16ccd3S周琰杰 (Zhou Yanjie) status = "disabled"; 3547a16ccd3S周琰杰 (Zhou Yanjie) }; 3557a16ccd3S周琰杰 (Zhou Yanjie) 3567a16ccd3S周琰杰 (Zhou Yanjie) msc1: mmc@13460000 { 3577a16ccd3S周琰杰 (Zhou Yanjie) compatible = "ingenic,x1000-mmc"; 3587a16ccd3S周琰杰 (Zhou Yanjie) reg = <0x13460000 0x1000>; 3597a16ccd3S周琰杰 (Zhou Yanjie) 3607a16ccd3S周琰杰 (Zhou Yanjie) interrupt-parent = <&intc>; 3617a16ccd3S周琰杰 (Zhou Yanjie) interrupts = <36>; 3627a16ccd3S周琰杰 (Zhou Yanjie) 3637a16ccd3S周琰杰 (Zhou Yanjie) clocks = <&cgu X1000_CLK_MSC1>; 3647a16ccd3S周琰杰 (Zhou Yanjie) clock-names = "mmc"; 3657a16ccd3S周琰杰 (Zhou Yanjie) 3667a16ccd3S周琰杰 (Zhou Yanjie) cap-sd-highspeed; 3677a16ccd3S周琰杰 (Zhou Yanjie) cap-mmc-highspeed; 3687a16ccd3S周琰杰 (Zhou Yanjie) cap-sdio-irq; 3697a16ccd3S周琰杰 (Zhou Yanjie) 3707a16ccd3S周琰杰 (Zhou Yanjie) dmas = <&pdma X1000_DMA_MSC1_RX 0xffffffff>, 3717a16ccd3S周琰杰 (Zhou Yanjie) <&pdma X1000_DMA_MSC1_TX 0xffffffff>; 3727a16ccd3S周琰杰 (Zhou Yanjie) dma-names = "rx", "tx"; 3737a16ccd3S周琰杰 (Zhou Yanjie) 3747a16ccd3S周琰杰 (Zhou Yanjie) status = "disabled"; 3757a16ccd3S周琰杰 (Zhou Yanjie) }; 376233ed6f3S周琰杰 (Zhou Yanjie) 377233ed6f3S周琰杰 (Zhou Yanjie) mac: ethernet@134b0000 { 378233ed6f3S周琰杰 (Zhou Yanjie) compatible = "ingenic,x1000-mac", "snps,dwmac"; 379233ed6f3S周琰杰 (Zhou Yanjie) reg = <0x134b0000 0x2000>; 380233ed6f3S周琰杰 (Zhou Yanjie) 381233ed6f3S周琰杰 (Zhou Yanjie) interrupt-parent = <&intc>; 382233ed6f3S周琰杰 (Zhou Yanjie) interrupts = <55>; 383233ed6f3S周琰杰 (Zhou Yanjie) interrupt-names = "macirq"; 384233ed6f3S周琰杰 (Zhou Yanjie) 385233ed6f3S周琰杰 (Zhou Yanjie) clocks = <&cgu X1000_CLK_MAC>; 386233ed6f3S周琰杰 (Zhou Yanjie) clock-names = "stmmaceth"; 387233ed6f3S周琰杰 (Zhou Yanjie) 388ab3040e1S周琰杰 (Zhou Yanjie) mode-reg = <&mac_phy_ctrl>; 389ab3040e1S周琰杰 (Zhou Yanjie) 390233ed6f3S周琰杰 (Zhou Yanjie) status = "disabled"; 391233ed6f3S周琰杰 (Zhou Yanjie) 392233ed6f3S周琰杰 (Zhou Yanjie) mdio: mdio { 393233ed6f3S周琰杰 (Zhou Yanjie) compatible = "snps,dwmac-mdio"; 394233ed6f3S周琰杰 (Zhou Yanjie) #address-cells = <1>; 395233ed6f3S周琰杰 (Zhou Yanjie) #size-cells = <0>; 396233ed6f3S周琰杰 (Zhou Yanjie) 397233ed6f3S周琰杰 (Zhou Yanjie) status = "disabled"; 398233ed6f3S周琰杰 (Zhou Yanjie) }; 399233ed6f3S周琰杰 (Zhou Yanjie) }; 400158c774dS周琰杰 (Zhou Yanjie) 401158c774dS周琰杰 (Zhou Yanjie) otg: usb@13500000 { 402ab3a560aS周琰杰 (Zhou Yanjie) compatible = "ingenic,x1000-otg"; 403158c774dS周琰杰 (Zhou Yanjie) reg = <0x13500000 0x40000>; 404158c774dS周琰杰 (Zhou Yanjie) 405158c774dS周琰杰 (Zhou Yanjie) interrupt-parent = <&intc>; 406158c774dS周琰杰 (Zhou Yanjie) interrupts = <21>; 407158c774dS周琰杰 (Zhou Yanjie) 408158c774dS周琰杰 (Zhou Yanjie) clocks = <&cgu X1000_CLK_OTG>; 409158c774dS周琰杰 (Zhou Yanjie) clock-names = "otg"; 410158c774dS周琰杰 (Zhou Yanjie) 411158c774dS周琰杰 (Zhou Yanjie) phys = <&otg_phy>; 412158c774dS周琰杰 (Zhou Yanjie) phy-names = "usb2-phy"; 413158c774dS周琰杰 (Zhou Yanjie) 414158c774dS周琰杰 (Zhou Yanjie) g-rx-fifo-size = <768>; 415158c774dS周琰杰 (Zhou Yanjie) g-np-tx-fifo-size = <256>; 416158c774dS周琰杰 (Zhou Yanjie) g-tx-fifo-size = <256 256 256 256 256 256 256 512>; 417158c774dS周琰杰 (Zhou Yanjie) 418158c774dS周琰杰 (Zhou Yanjie) status = "disabled"; 419158c774dS周琰杰 (Zhou Yanjie) }; 420*c5e4d838SAidan MacDonald 421*c5e4d838SAidan MacDonald aic: audio-controller@10020000 { 422*c5e4d838SAidan MacDonald compatible = "ingenic,x1000-i2s"; 423*c5e4d838SAidan MacDonald reg = <0x10020000 0x38>; 424*c5e4d838SAidan MacDonald 425*c5e4d838SAidan MacDonald #sound-dai-cells = <0>; 426*c5e4d838SAidan MacDonald 427*c5e4d838SAidan MacDonald interrupt-parent = <&intc>; 428*c5e4d838SAidan MacDonald interrupts = <1>; 429*c5e4d838SAidan MacDonald 430*c5e4d838SAidan MacDonald clocks = <&cgu X1000_CLK_AIC>, 431*c5e4d838SAidan MacDonald <&cgu X1000_CLK_I2S>; 432*c5e4d838SAidan MacDonald clock-names = "aic", "i2s"; 433*c5e4d838SAidan MacDonald 434*c5e4d838SAidan MacDonald dmas = <&pdma X1000_DMA_I2S0_RX 0xffffffff>, 435*c5e4d838SAidan MacDonald <&pdma X1000_DMA_I2S0_TX 0xffffffff>; 436*c5e4d838SAidan MacDonald dma-names = "rx", "tx"; 437*c5e4d838SAidan MacDonald }; 4387a16ccd3S周琰杰 (Zhou Yanjie)}; 439