xref: /openbmc/linux/arch/mips/boot/dts/ingenic/jz4780.dtsi (revision bf40bf5ecf3f96b95c0ed8d6badf0b34df879adf)
1b2441318SGreg Kroah-Hartman// SPDX-License-Identifier: GPL-2.0
25b9cdd24SPaul Burton#include <dt-bindings/clock/jz4780-cgu.h>
311479e8eSPaul Cercueil#include <dt-bindings/clock/ingenic,tcu.h>
42d972b6aSEzequiel Garcia#include <dt-bindings/dma/jz4780-dma.h>
55b9cdd24SPaul Burton
65b9cdd24SPaul Burton/ {
75b9cdd24SPaul Burton	#address-cells = <1>;
85b9cdd24SPaul Burton	#size-cells = <1>;
95b9cdd24SPaul Burton	compatible = "ingenic,jz4780";
105b9cdd24SPaul Burton
115b9cdd24SPaul Burton	cpuintc: interrupt-controller {
125b9cdd24SPaul Burton		#address-cells = <0>;
135b9cdd24SPaul Burton		#interrupt-cells = <1>;
145b9cdd24SPaul Burton		interrupt-controller;
155b9cdd24SPaul Burton		compatible = "mti,cpu-interrupt-controller";
165b9cdd24SPaul Burton	};
175b9cdd24SPaul Burton
185b9cdd24SPaul Burton	intc: interrupt-controller@10001000 {
195b9cdd24SPaul Burton		compatible = "ingenic,jz4780-intc";
205b9cdd24SPaul Burton		reg = <0x10001000 0x50>;
215b9cdd24SPaul Burton
225b9cdd24SPaul Burton		interrupt-controller;
235b9cdd24SPaul Burton		#interrupt-cells = <1>;
245b9cdd24SPaul Burton
255b9cdd24SPaul Burton		interrupt-parent = <&cpuintc>;
265b9cdd24SPaul Burton		interrupts = <2>;
275b9cdd24SPaul Burton	};
285b9cdd24SPaul Burton
295b9cdd24SPaul Burton	ext: ext {
305b9cdd24SPaul Burton		compatible = "fixed-clock";
315b9cdd24SPaul Burton		#clock-cells = <0>;
325b9cdd24SPaul Burton	};
335b9cdd24SPaul Burton
345b9cdd24SPaul Burton	rtc: rtc {
355b9cdd24SPaul Burton		compatible = "fixed-clock";
365b9cdd24SPaul Burton		#clock-cells = <0>;
375b9cdd24SPaul Burton		clock-frequency = <32768>;
385b9cdd24SPaul Burton	};
395b9cdd24SPaul Burton
405b9cdd24SPaul Burton	cgu: jz4780-cgu@10000000 {
415b9cdd24SPaul Burton		compatible = "ingenic,jz4780-cgu";
425b9cdd24SPaul Burton		reg = <0x10000000 0x100>;
435b9cdd24SPaul Burton
445b9cdd24SPaul Burton		clocks = <&ext>, <&rtc>;
455b9cdd24SPaul Burton		clock-names = "ext", "rtc";
465b9cdd24SPaul Burton
475b9cdd24SPaul Burton		#clock-cells = <1>;
485b9cdd24SPaul Burton	};
495b9cdd24SPaul Burton
5036aafdbdSPaul Cercueil	tcu: timer@10002000 {
5136aafdbdSPaul Cercueil		compatible = "ingenic,jz4780-tcu",
5236aafdbdSPaul Cercueil			     "ingenic,jz4770-tcu",
5336aafdbdSPaul Cercueil			     "simple-mfd";
5436aafdbdSPaul Cercueil		reg = <0x10002000 0x1000>;
5536aafdbdSPaul Cercueil		#address-cells = <1>;
5636aafdbdSPaul Cercueil		#size-cells = <1>;
5736aafdbdSPaul Cercueil		ranges = <0x0 0x10002000 0x1000>;
5836aafdbdSPaul Cercueil
5936aafdbdSPaul Cercueil		#clock-cells = <1>;
6036aafdbdSPaul Cercueil
61cf2e6b8eSPaul Cercueil		clocks = <&cgu JZ4780_CLK_RTCLK>,
62cf2e6b8eSPaul Cercueil			 <&cgu JZ4780_CLK_EXCLK>,
63cf2e6b8eSPaul Cercueil			 <&cgu JZ4780_CLK_PCLK>;
6436aafdbdSPaul Cercueil		clock-names = "rtc", "ext", "pclk";
6536aafdbdSPaul Cercueil
6636aafdbdSPaul Cercueil		interrupt-controller;
6736aafdbdSPaul Cercueil		#interrupt-cells = <1>;
6836aafdbdSPaul Cercueil
6936aafdbdSPaul Cercueil		interrupt-parent = <&intc>;
7036aafdbdSPaul Cercueil		interrupts = <27 26 25>;
7111479e8eSPaul Cercueil
7211479e8eSPaul Cercueil		watchdog: watchdog@0 {
7311479e8eSPaul Cercueil			compatible = "ingenic,jz4780-watchdog";
7411479e8eSPaul Cercueil			reg = <0x0 0xc>;
7511479e8eSPaul Cercueil
7611479e8eSPaul Cercueil			clocks = <&tcu TCU_CLK_WDT>;
7711479e8eSPaul Cercueil			clock-names = "wdt";
7811479e8eSPaul Cercueil		};
79*bf40bf5eSPaul Cercueil
80*bf40bf5eSPaul Cercueil		pwm: pwm@40 {
81*bf40bf5eSPaul Cercueil			compatible = "ingenic,jz4780-pwm", "ingenic,jz4740-pwm";
82*bf40bf5eSPaul Cercueil			reg = <0x40 0x80>;
83*bf40bf5eSPaul Cercueil
84*bf40bf5eSPaul Cercueil			#pwm-cells = <3>;
85*bf40bf5eSPaul Cercueil
86*bf40bf5eSPaul Cercueil			clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>,
87*bf40bf5eSPaul Cercueil				 <&tcu TCU_CLK_TIMER2>, <&tcu TCU_CLK_TIMER3>,
88*bf40bf5eSPaul Cercueil				 <&tcu TCU_CLK_TIMER4>, <&tcu TCU_CLK_TIMER5>,
89*bf40bf5eSPaul Cercueil				 <&tcu TCU_CLK_TIMER6>, <&tcu TCU_CLK_TIMER7>;
90*bf40bf5eSPaul Cercueil			clock-names = "timer0", "timer1", "timer2", "timer3",
91*bf40bf5eSPaul Cercueil				      "timer4", "timer5", "timer6", "timer7";
92*bf40bf5eSPaul Cercueil		};
93*bf40bf5eSPaul Cercueil
94*bf40bf5eSPaul Cercueil		ost: timer@e0 {
95*bf40bf5eSPaul Cercueil			compatible = "ingenic,jz4780-ost", "ingenic,jz4770-ost";
96*bf40bf5eSPaul Cercueil			reg = <0xe0 0x20>;
97*bf40bf5eSPaul Cercueil
98*bf40bf5eSPaul Cercueil			clocks = <&tcu TCU_CLK_OST>;
99*bf40bf5eSPaul Cercueil			clock-names = "ost";
100*bf40bf5eSPaul Cercueil
101*bf40bf5eSPaul Cercueil			interrupts = <15>;
102*bf40bf5eSPaul Cercueil		};
10336aafdbdSPaul Cercueil	};
10436aafdbdSPaul Cercueil
105ed326616SMathieu Malaterre	rtc_dev: rtc@10003000 {
106ed326616SMathieu Malaterre		compatible = "ingenic,jz4780-rtc";
107ed326616SMathieu Malaterre		reg = <0x10003000 0x4c>;
108ed326616SMathieu Malaterre
109ed326616SMathieu Malaterre		interrupt-parent = <&intc>;
110ed326616SMathieu Malaterre		interrupts = <32>;
111ed326616SMathieu Malaterre
112ed326616SMathieu Malaterre		clocks = <&cgu JZ4780_CLK_RTCLK>;
113ed326616SMathieu Malaterre		clock-names = "rtc";
114ed326616SMathieu Malaterre	};
115ed326616SMathieu Malaterre
116d32613c3SPaul Cercueil	pinctrl: pin-controller@10010000 {
117d32613c3SPaul Cercueil		compatible = "ingenic,jz4780-pinctrl";
118d32613c3SPaul Cercueil		reg = <0x10010000 0x600>;
119d32613c3SPaul Cercueil
120d32613c3SPaul Cercueil		#address-cells = <1>;
121d32613c3SPaul Cercueil		#size-cells = <0>;
122d32613c3SPaul Cercueil
123d32613c3SPaul Cercueil		gpa: gpio@0 {
124d32613c3SPaul Cercueil			compatible = "ingenic,jz4780-gpio";
125d32613c3SPaul Cercueil			reg = <0>;
126d32613c3SPaul Cercueil
127d32613c3SPaul Cercueil			gpio-controller;
128d32613c3SPaul Cercueil			gpio-ranges = <&pinctrl 0 0 32>;
129d32613c3SPaul Cercueil			#gpio-cells = <2>;
130d32613c3SPaul Cercueil
131d32613c3SPaul Cercueil			interrupt-controller;
132d32613c3SPaul Cercueil			#interrupt-cells = <2>;
133d32613c3SPaul Cercueil
134d32613c3SPaul Cercueil			interrupt-parent = <&intc>;
135d32613c3SPaul Cercueil			interrupts = <17>;
136d32613c3SPaul Cercueil		};
137d32613c3SPaul Cercueil
138d32613c3SPaul Cercueil		gpb: gpio@1 {
139d32613c3SPaul Cercueil			compatible = "ingenic,jz4780-gpio";
140d32613c3SPaul Cercueil			reg = <1>;
141d32613c3SPaul Cercueil
142d32613c3SPaul Cercueil			gpio-controller;
143d32613c3SPaul Cercueil			gpio-ranges = <&pinctrl 0 32 32>;
144d32613c3SPaul Cercueil			#gpio-cells = <2>;
145d32613c3SPaul Cercueil
146d32613c3SPaul Cercueil			interrupt-controller;
147d32613c3SPaul Cercueil			#interrupt-cells = <2>;
148d32613c3SPaul Cercueil
149d32613c3SPaul Cercueil			interrupt-parent = <&intc>;
150d32613c3SPaul Cercueil			interrupts = <16>;
151d32613c3SPaul Cercueil		};
152d32613c3SPaul Cercueil
153d32613c3SPaul Cercueil		gpc: gpio@2 {
154d32613c3SPaul Cercueil			compatible = "ingenic,jz4780-gpio";
155d32613c3SPaul Cercueil			reg = <2>;
156d32613c3SPaul Cercueil
157d32613c3SPaul Cercueil			gpio-controller;
158d32613c3SPaul Cercueil			gpio-ranges = <&pinctrl 0 64 32>;
159d32613c3SPaul Cercueil			#gpio-cells = <2>;
160d32613c3SPaul Cercueil
161d32613c3SPaul Cercueil			interrupt-controller;
162d32613c3SPaul Cercueil			#interrupt-cells = <2>;
163d32613c3SPaul Cercueil
164d32613c3SPaul Cercueil			interrupt-parent = <&intc>;
165d32613c3SPaul Cercueil			interrupts = <15>;
166d32613c3SPaul Cercueil		};
167d32613c3SPaul Cercueil
168d32613c3SPaul Cercueil		gpd: gpio@3 {
169d32613c3SPaul Cercueil			compatible = "ingenic,jz4780-gpio";
170d32613c3SPaul Cercueil			reg = <3>;
171d32613c3SPaul Cercueil
172d32613c3SPaul Cercueil			gpio-controller;
173d32613c3SPaul Cercueil			gpio-ranges = <&pinctrl 0 96 32>;
174d32613c3SPaul Cercueil			#gpio-cells = <2>;
175d32613c3SPaul Cercueil
176d32613c3SPaul Cercueil			interrupt-controller;
177d32613c3SPaul Cercueil			#interrupt-cells = <2>;
178d32613c3SPaul Cercueil
179d32613c3SPaul Cercueil			interrupt-parent = <&intc>;
180d32613c3SPaul Cercueil			interrupts = <14>;
181d32613c3SPaul Cercueil		};
182d32613c3SPaul Cercueil
183d32613c3SPaul Cercueil		gpe: gpio@4 {
184d32613c3SPaul Cercueil			compatible = "ingenic,jz4780-gpio";
185d32613c3SPaul Cercueil			reg = <4>;
186d32613c3SPaul Cercueil
187d32613c3SPaul Cercueil			gpio-controller;
188d32613c3SPaul Cercueil			gpio-ranges = <&pinctrl 0 128 32>;
189d32613c3SPaul Cercueil			#gpio-cells = <2>;
190d32613c3SPaul Cercueil
191d32613c3SPaul Cercueil			interrupt-controller;
192d32613c3SPaul Cercueil			#interrupt-cells = <2>;
193d32613c3SPaul Cercueil
194d32613c3SPaul Cercueil			interrupt-parent = <&intc>;
195d32613c3SPaul Cercueil			interrupts = <13>;
196d32613c3SPaul Cercueil		};
197d32613c3SPaul Cercueil
198d32613c3SPaul Cercueil		gpf: gpio@5 {
199d32613c3SPaul Cercueil			compatible = "ingenic,jz4780-gpio";
200d32613c3SPaul Cercueil			reg = <5>;
201d32613c3SPaul Cercueil
202d32613c3SPaul Cercueil			gpio-controller;
203d32613c3SPaul Cercueil			gpio-ranges = <&pinctrl 0 160 32>;
204d32613c3SPaul Cercueil			#gpio-cells = <2>;
205d32613c3SPaul Cercueil
206d32613c3SPaul Cercueil			interrupt-controller;
207d32613c3SPaul Cercueil			#interrupt-cells = <2>;
208d32613c3SPaul Cercueil
209d32613c3SPaul Cercueil			interrupt-parent = <&intc>;
210d32613c3SPaul Cercueil			interrupts = <12>;
211d32613c3SPaul Cercueil		};
212d32613c3SPaul Cercueil	};
213d32613c3SPaul Cercueil
214c24f5762SMathieu Malaterre	spi_gpio {
215c24f5762SMathieu Malaterre		compatible = "spi-gpio";
216c24f5762SMathieu Malaterre		#address-cells = <1>;
217c24f5762SMathieu Malaterre		#size-cells = <0>;
218c24f5762SMathieu Malaterre		num-chipselects = <2>;
219c24f5762SMathieu Malaterre
220c24f5762SMathieu Malaterre		gpio-miso = <&gpe 14 0>;
221c24f5762SMathieu Malaterre		gpio-sck = <&gpe 15 0>;
222c24f5762SMathieu Malaterre		gpio-mosi = <&gpe 17 0>;
223cf2e6b8eSPaul Cercueil		cs-gpios = <&gpe 16 0>, <&gpe 18 0>;
224c24f5762SMathieu Malaterre
225c24f5762SMathieu Malaterre		spidev@0 {
226c24f5762SMathieu Malaterre			compatible = "spidev";
227c24f5762SMathieu Malaterre			reg = <0>;
228c24f5762SMathieu Malaterre			spi-max-frequency = <1000000>;
229c24f5762SMathieu Malaterre		};
230c24f5762SMathieu Malaterre	};
231c24f5762SMathieu Malaterre
2325b9cdd24SPaul Burton	uart0: serial@10030000 {
2335b9cdd24SPaul Burton		compatible = "ingenic,jz4780-uart";
2345b9cdd24SPaul Burton		reg = <0x10030000 0x100>;
2355b9cdd24SPaul Burton
2365b9cdd24SPaul Burton		interrupt-parent = <&intc>;
2375b9cdd24SPaul Burton		interrupts = <51>;
2385b9cdd24SPaul Burton
2395b9cdd24SPaul Burton		clocks = <&ext>, <&cgu JZ4780_CLK_UART0>;
2405b9cdd24SPaul Burton		clock-names = "baud", "module";
2415b9cdd24SPaul Burton
2425b9cdd24SPaul Burton		status = "disabled";
2435b9cdd24SPaul Burton	};
2445b9cdd24SPaul Burton
2455b9cdd24SPaul Burton	uart1: serial@10031000 {
2465b9cdd24SPaul Burton		compatible = "ingenic,jz4780-uart";
2475b9cdd24SPaul Burton		reg = <0x10031000 0x100>;
2485b9cdd24SPaul Burton
2495b9cdd24SPaul Burton		interrupt-parent = <&intc>;
2505b9cdd24SPaul Burton		interrupts = <50>;
2515b9cdd24SPaul Burton
2525b9cdd24SPaul Burton		clocks = <&ext>, <&cgu JZ4780_CLK_UART1>;
2535b9cdd24SPaul Burton		clock-names = "baud", "module";
2545b9cdd24SPaul Burton
2555b9cdd24SPaul Burton		status = "disabled";
2565b9cdd24SPaul Burton	};
2575b9cdd24SPaul Burton
2585b9cdd24SPaul Burton	uart2: serial@10032000 {
2595b9cdd24SPaul Burton		compatible = "ingenic,jz4780-uart";
2605b9cdd24SPaul Burton		reg = <0x10032000 0x100>;
2615b9cdd24SPaul Burton
2625b9cdd24SPaul Burton		interrupt-parent = <&intc>;
2635b9cdd24SPaul Burton		interrupts = <49>;
2645b9cdd24SPaul Burton
2655b9cdd24SPaul Burton		clocks = <&ext>, <&cgu JZ4780_CLK_UART2>;
2665b9cdd24SPaul Burton		clock-names = "baud", "module";
2675b9cdd24SPaul Burton
2685b9cdd24SPaul Burton		status = "disabled";
2695b9cdd24SPaul Burton	};
2705b9cdd24SPaul Burton
2715b9cdd24SPaul Burton	uart3: serial@10033000 {
2725b9cdd24SPaul Burton		compatible = "ingenic,jz4780-uart";
2735b9cdd24SPaul Burton		reg = <0x10033000 0x100>;
2745b9cdd24SPaul Burton
2755b9cdd24SPaul Burton		interrupt-parent = <&intc>;
2765b9cdd24SPaul Burton		interrupts = <48>;
2775b9cdd24SPaul Burton
2785b9cdd24SPaul Burton		clocks = <&ext>, <&cgu JZ4780_CLK_UART3>;
2795b9cdd24SPaul Burton		clock-names = "baud", "module";
2805b9cdd24SPaul Burton
2815b9cdd24SPaul Burton		status = "disabled";
2825b9cdd24SPaul Burton	};
2835b9cdd24SPaul Burton
2845b9cdd24SPaul Burton	uart4: serial@10034000 {
2855b9cdd24SPaul Burton		compatible = "ingenic,jz4780-uart";
2865b9cdd24SPaul Burton		reg = <0x10034000 0x100>;
2875b9cdd24SPaul Burton
2885b9cdd24SPaul Burton		interrupt-parent = <&intc>;
2895b9cdd24SPaul Burton		interrupts = <34>;
2905b9cdd24SPaul Burton
2915b9cdd24SPaul Burton		clocks = <&ext>, <&cgu JZ4780_CLK_UART4>;
2925b9cdd24SPaul Burton		clock-names = "baud", "module";
2935b9cdd24SPaul Burton
2945b9cdd24SPaul Burton		status = "disabled";
2955b9cdd24SPaul Burton	};
29678800558SAlex Smith
297f56a040cSAlexandre GRIVEAUX	i2c0: i2c@10050000 {
298f56a040cSAlexandre GRIVEAUX		compatible = "ingenic,jz4780-i2c";
299f56a040cSAlexandre GRIVEAUX		#address-cells = <1>;
300f56a040cSAlexandre GRIVEAUX		#size-cells = <0>;
301f56a040cSAlexandre GRIVEAUX
302f56a040cSAlexandre GRIVEAUX		reg = <0x10050000 0x1000>;
303f56a040cSAlexandre GRIVEAUX
304f56a040cSAlexandre GRIVEAUX		interrupt-parent = <&intc>;
305f56a040cSAlexandre GRIVEAUX		interrupts = <60>;
306f56a040cSAlexandre GRIVEAUX
307f56a040cSAlexandre GRIVEAUX		clocks = <&cgu JZ4780_CLK_SMB0>;
308f56a040cSAlexandre GRIVEAUX		clock-frequency = <100000>;
309f56a040cSAlexandre GRIVEAUX		pinctrl-names = "default";
310f56a040cSAlexandre GRIVEAUX		pinctrl-0 = <&pins_i2c0_data>;
311f56a040cSAlexandre GRIVEAUX
312f56a040cSAlexandre GRIVEAUX		status = "disabled";
313f56a040cSAlexandre GRIVEAUX	};
314f56a040cSAlexandre GRIVEAUX
315f56a040cSAlexandre GRIVEAUX	i2c1: i2c@10051000 {
316f56a040cSAlexandre GRIVEAUX		compatible = "ingenic,jz4780-i2c";
317f56a040cSAlexandre GRIVEAUX		#address-cells = <1>;
318f56a040cSAlexandre GRIVEAUX		#size-cells = <0>;
319f56a040cSAlexandre GRIVEAUX		reg = <0x10051000 0x1000>;
320f56a040cSAlexandre GRIVEAUX
321f56a040cSAlexandre GRIVEAUX		interrupt-parent = <&intc>;
322f56a040cSAlexandre GRIVEAUX		interrupts = <59>;
323f56a040cSAlexandre GRIVEAUX
324f56a040cSAlexandre GRIVEAUX		clocks = <&cgu JZ4780_CLK_SMB1>;
325f56a040cSAlexandre GRIVEAUX		clock-frequency = <100000>;
326f56a040cSAlexandre GRIVEAUX		pinctrl-names = "default";
327f56a040cSAlexandre GRIVEAUX		pinctrl-0 = <&pins_i2c1_data>;
328f56a040cSAlexandre GRIVEAUX
329f56a040cSAlexandre GRIVEAUX		status = "disabled";
330f56a040cSAlexandre GRIVEAUX	};
331f56a040cSAlexandre GRIVEAUX
332f56a040cSAlexandre GRIVEAUX	i2c2: i2c@10052000 {
333f56a040cSAlexandre GRIVEAUX		compatible = "ingenic,jz4780-i2c";
334f56a040cSAlexandre GRIVEAUX		#address-cells = <1>;
335f56a040cSAlexandre GRIVEAUX		#size-cells = <0>;
336f56a040cSAlexandre GRIVEAUX		reg = <0x10052000 0x1000>;
337f56a040cSAlexandre GRIVEAUX
338f56a040cSAlexandre GRIVEAUX		interrupt-parent = <&intc>;
339f56a040cSAlexandre GRIVEAUX		interrupts = <58>;
340f56a040cSAlexandre GRIVEAUX
341f56a040cSAlexandre GRIVEAUX		clocks = <&cgu JZ4780_CLK_SMB2>;
342f56a040cSAlexandre GRIVEAUX		clock-frequency = <100000>;
343f56a040cSAlexandre GRIVEAUX		pinctrl-names = "default";
344f56a040cSAlexandre GRIVEAUX		pinctrl-0 = <&pins_i2c2_data>;
345f56a040cSAlexandre GRIVEAUX
346f56a040cSAlexandre GRIVEAUX		status = "disabled";
347f56a040cSAlexandre GRIVEAUX	};
348f56a040cSAlexandre GRIVEAUX
349f56a040cSAlexandre GRIVEAUX	i2c3: i2c@10053000 {
350f56a040cSAlexandre GRIVEAUX		compatible = "ingenic,jz4780-i2c";
351f56a040cSAlexandre GRIVEAUX		#address-cells = <1>;
352f56a040cSAlexandre GRIVEAUX		#size-cells = <0>;
353f56a040cSAlexandre GRIVEAUX		reg = <0x10053000 0x1000>;
354f56a040cSAlexandre GRIVEAUX
355f56a040cSAlexandre GRIVEAUX		interrupt-parent = <&intc>;
356f56a040cSAlexandre GRIVEAUX		interrupts = <57>;
357f56a040cSAlexandre GRIVEAUX
358f56a040cSAlexandre GRIVEAUX		clocks = <&cgu JZ4780_CLK_SMB3>;
359f56a040cSAlexandre GRIVEAUX		clock-frequency = <100000>;
360f56a040cSAlexandre GRIVEAUX		pinctrl-names = "default";
361f56a040cSAlexandre GRIVEAUX		pinctrl-0 = <&pins_i2c3_data>;
362f56a040cSAlexandre GRIVEAUX
363f56a040cSAlexandre GRIVEAUX		status = "disabled";
364f56a040cSAlexandre GRIVEAUX	};
365f56a040cSAlexandre GRIVEAUX
366f56a040cSAlexandre GRIVEAUX	i2c4: i2c@10054000 {
367f56a040cSAlexandre GRIVEAUX		compatible = "ingenic,jz4780-i2c";
368f56a040cSAlexandre GRIVEAUX		#address-cells = <1>;
369f56a040cSAlexandre GRIVEAUX		#size-cells = <0>;
370f56a040cSAlexandre GRIVEAUX		reg = <0x10054000 0x1000>;
371f56a040cSAlexandre GRIVEAUX
372f56a040cSAlexandre GRIVEAUX		interrupt-parent = <&intc>;
373f56a040cSAlexandre GRIVEAUX		interrupts = <56>;
374f56a040cSAlexandre GRIVEAUX
375f56a040cSAlexandre GRIVEAUX		clocks = <&cgu JZ4780_CLK_SMB4>;
376f56a040cSAlexandre GRIVEAUX		clock-frequency = <100000>;
377f56a040cSAlexandre GRIVEAUX		pinctrl-names = "default";
378f56a040cSAlexandre GRIVEAUX		pinctrl-0 = <&pins_i2c4_data>;
379f56a040cSAlexandre GRIVEAUX
380f56a040cSAlexandre GRIVEAUX		status = "disabled";
381f56a040cSAlexandre GRIVEAUX	};
382f56a040cSAlexandre GRIVEAUX
38378800558SAlex Smith	nemc: nemc@13410000 {
384190607f2SPrasannaKumar Muralidharan		compatible = "ingenic,jz4780-nemc", "simple-mfd";
38578800558SAlex Smith		reg = <0x13410000 0x10000>;
38678800558SAlex Smith		#address-cells = <2>;
38778800558SAlex Smith		#size-cells = <1>;
388cf2e6b8eSPaul Cercueil		ranges = <0 0 0x13410000 0x10000>,
389cf2e6b8eSPaul Cercueil			 <1 0 0x1b000000 0x1000000>,
390cf2e6b8eSPaul Cercueil			 <2 0 0x1a000000 0x1000000>,
391cf2e6b8eSPaul Cercueil			 <3 0 0x19000000 0x1000000>,
392cf2e6b8eSPaul Cercueil			 <4 0 0x18000000 0x1000000>,
393cf2e6b8eSPaul Cercueil			 <5 0 0x17000000 0x1000000>,
394cf2e6b8eSPaul Cercueil			 <6 0 0x16000000 0x1000000>;
39578800558SAlex Smith
39678800558SAlex Smith		clocks = <&cgu JZ4780_CLK_NEMC>;
39778800558SAlex Smith
39878800558SAlex Smith		status = "disabled";
399190607f2SPrasannaKumar Muralidharan
400190607f2SPrasannaKumar Muralidharan		efuse: efuse@d0 {
401190607f2SPrasannaKumar Muralidharan			reg = <0 0xd0 0x30>;
402190607f2SPrasannaKumar Muralidharan			compatible = "ingenic,jz4780-efuse";
403190607f2SPrasannaKumar Muralidharan
404190607f2SPrasannaKumar Muralidharan			clocks = <&cgu JZ4780_CLK_AHB2>;
405190607f2SPrasannaKumar Muralidharan
406190607f2SPrasannaKumar Muralidharan			#address-cells = <1>;
407190607f2SPrasannaKumar Muralidharan			#size-cells = <1>;
408190607f2SPrasannaKumar Muralidharan
409190607f2SPrasannaKumar Muralidharan			eth0_addr: eth-mac-addr@0x22 {
410190607f2SPrasannaKumar Muralidharan				reg = <0x22 0x6>;
411190607f2SPrasannaKumar Muralidharan			};
412190607f2SPrasannaKumar Muralidharan		};
41378800558SAlex Smith	};
41478800558SAlex Smith
4152d972b6aSEzequiel Garcia	dma: dma@13420000 {
4162d972b6aSEzequiel Garcia		compatible = "ingenic,jz4780-dma";
417cf2e6b8eSPaul Cercueil		reg = <0x13420000 0x400>, <0x13421000 0x40>;
4182d972b6aSEzequiel Garcia		#dma-cells = <2>;
4192d972b6aSEzequiel Garcia
4202d972b6aSEzequiel Garcia		interrupt-parent = <&intc>;
4212d972b6aSEzequiel Garcia		interrupts = <10>;
4222d972b6aSEzequiel Garcia
4232d972b6aSEzequiel Garcia		clocks = <&cgu JZ4780_CLK_PDMA>;
4242d972b6aSEzequiel Garcia	};
4252d972b6aSEzequiel Garcia
4267f5a07f4SEzequiel Garcia	mmc0: mmc@13450000 {
4277f5a07f4SEzequiel Garcia		compatible = "ingenic,jz4780-mmc";
4287f5a07f4SEzequiel Garcia		reg = <0x13450000 0x1000>;
4297f5a07f4SEzequiel Garcia
4307f5a07f4SEzequiel Garcia		interrupt-parent = <&intc>;
4317f5a07f4SEzequiel Garcia		interrupts = <37>;
4327f5a07f4SEzequiel Garcia
4337f5a07f4SEzequiel Garcia		clocks = <&cgu JZ4780_CLK_MSC0>;
4347f5a07f4SEzequiel Garcia		clock-names = "mmc";
4357f5a07f4SEzequiel Garcia
4367f5a07f4SEzequiel Garcia		cap-sd-highspeed;
4377f5a07f4SEzequiel Garcia		cap-mmc-highspeed;
4387f5a07f4SEzequiel Garcia		cap-sdio-irq;
4397f5a07f4SEzequiel Garcia		dmas = <&dma JZ4780_DMA_MSC0_RX 0xffffffff>,
4407f5a07f4SEzequiel Garcia		       <&dma JZ4780_DMA_MSC0_TX 0xffffffff>;
4417f5a07f4SEzequiel Garcia		dma-names = "rx", "tx";
4427f5a07f4SEzequiel Garcia
4437f5a07f4SEzequiel Garcia		status = "disabled";
4447f5a07f4SEzequiel Garcia	};
4457f5a07f4SEzequiel Garcia
4467f5a07f4SEzequiel Garcia	mmc1: mmc@13460000 {
4477f5a07f4SEzequiel Garcia		compatible = "ingenic,jz4780-mmc";
4487f5a07f4SEzequiel Garcia		reg = <0x13460000 0x1000>;
4497f5a07f4SEzequiel Garcia
4507f5a07f4SEzequiel Garcia		interrupt-parent = <&intc>;
4517f5a07f4SEzequiel Garcia		interrupts = <36>;
4527f5a07f4SEzequiel Garcia
4537f5a07f4SEzequiel Garcia		clocks = <&cgu JZ4780_CLK_MSC1>;
4547f5a07f4SEzequiel Garcia		clock-names = "mmc";
4557f5a07f4SEzequiel Garcia
4567f5a07f4SEzequiel Garcia		cap-sd-highspeed;
4577f5a07f4SEzequiel Garcia		cap-mmc-highspeed;
4587f5a07f4SEzequiel Garcia		cap-sdio-irq;
4597f5a07f4SEzequiel Garcia		dmas = <&dma JZ4780_DMA_MSC1_RX 0xffffffff>,
4607f5a07f4SEzequiel Garcia		       <&dma JZ4780_DMA_MSC1_TX 0xffffffff>;
4617f5a07f4SEzequiel Garcia		dma-names = "rx", "tx";
4627f5a07f4SEzequiel Garcia
4637f5a07f4SEzequiel Garcia		status = "disabled";
4647f5a07f4SEzequiel Garcia	};
4657f5a07f4SEzequiel Garcia
46678800558SAlex Smith	bch: bch@134d0000 {
46778800558SAlex Smith		compatible = "ingenic,jz4780-bch";
46878800558SAlex Smith		reg = <0x134d0000 0x10000>;
46978800558SAlex Smith
47078800558SAlex Smith		clocks = <&cgu JZ4780_CLK_BCH>;
47178800558SAlex Smith
47278800558SAlex Smith		status = "disabled";
47378800558SAlex Smith	};
4745b9cdd24SPaul Burton};
475