xref: /openbmc/linux/arch/mips/boot/dts/ingenic/jz4780.dtsi (revision 318951afb3af26af5526b21896cb3a035c5f8a34)
1b2441318SGreg Kroah-Hartman// SPDX-License-Identifier: GPL-2.0
25b9cdd24SPaul Burton#include <dt-bindings/clock/jz4780-cgu.h>
311479e8eSPaul Cercueil#include <dt-bindings/clock/ingenic,tcu.h>
42d972b6aSEzequiel Garcia#include <dt-bindings/dma/jz4780-dma.h>
55b9cdd24SPaul Burton
65b9cdd24SPaul Burton/ {
75b9cdd24SPaul Burton	#address-cells = <1>;
85b9cdd24SPaul Burton	#size-cells = <1>;
95b9cdd24SPaul Burton	compatible = "ingenic,jz4780";
105b9cdd24SPaul Burton
11c1f6b45eS周琰杰 (Zhou Yanjie)	cpus {
12c1f6b45eS周琰杰 (Zhou Yanjie)		#address-cells = <1>;
13c1f6b45eS周琰杰 (Zhou Yanjie)		#size-cells = <0>;
14c1f6b45eS周琰杰 (Zhou Yanjie)
15c1f6b45eS周琰杰 (Zhou Yanjie)		cpu0: cpu@0 {
16c1f6b45eS周琰杰 (Zhou Yanjie)			device_type = "cpu";
17c1f6b45eS周琰杰 (Zhou Yanjie)			compatible = "ingenic,xburst-fpu1.0-mxu1.1";
18c1f6b45eS周琰杰 (Zhou Yanjie)			reg = <0>;
19c1f6b45eS周琰杰 (Zhou Yanjie)
20c1f6b45eS周琰杰 (Zhou Yanjie)			clocks = <&cgu JZ4780_CLK_CPU>;
21c1f6b45eS周琰杰 (Zhou Yanjie)			clock-names = "cpu";
22c1f6b45eS周琰杰 (Zhou Yanjie)		};
23c1f6b45eS周琰杰 (Zhou Yanjie)
24c1f6b45eS周琰杰 (Zhou Yanjie)		cpu1: cpu@1 {
25c1f6b45eS周琰杰 (Zhou Yanjie)			device_type = "cpu";
26c1f6b45eS周琰杰 (Zhou Yanjie)			compatible = "ingenic,xburst-fpu1.0-mxu1.1";
27c1f6b45eS周琰杰 (Zhou Yanjie)			reg = <1>;
28c1f6b45eS周琰杰 (Zhou Yanjie)
29c1f6b45eS周琰杰 (Zhou Yanjie)			clocks = <&cgu JZ4780_CLK_CORE1>;
30c1f6b45eS周琰杰 (Zhou Yanjie)			clock-names = "cpu";
31c1f6b45eS周琰杰 (Zhou Yanjie)		};
32c1f6b45eS周琰杰 (Zhou Yanjie)	};
33c1f6b45eS周琰杰 (Zhou Yanjie)
345b9cdd24SPaul Burton	cpuintc: interrupt-controller {
355b9cdd24SPaul Burton		#address-cells = <0>;
365b9cdd24SPaul Burton		#interrupt-cells = <1>;
375b9cdd24SPaul Burton		interrupt-controller;
385b9cdd24SPaul Burton		compatible = "mti,cpu-interrupt-controller";
395b9cdd24SPaul Burton	};
405b9cdd24SPaul Burton
415b9cdd24SPaul Burton	intc: interrupt-controller@10001000 {
425b9cdd24SPaul Burton		compatible = "ingenic,jz4780-intc";
435b9cdd24SPaul Burton		reg = <0x10001000 0x50>;
445b9cdd24SPaul Burton
455b9cdd24SPaul Burton		interrupt-controller;
465b9cdd24SPaul Burton		#interrupt-cells = <1>;
475b9cdd24SPaul Burton
485b9cdd24SPaul Burton		interrupt-parent = <&cpuintc>;
495b9cdd24SPaul Burton		interrupts = <2>;
505b9cdd24SPaul Burton	};
515b9cdd24SPaul Burton
525b9cdd24SPaul Burton	ext: ext {
535b9cdd24SPaul Burton		compatible = "fixed-clock";
545b9cdd24SPaul Burton		#clock-cells = <0>;
555b9cdd24SPaul Burton	};
565b9cdd24SPaul Burton
575b9cdd24SPaul Burton	rtc: rtc {
585b9cdd24SPaul Burton		compatible = "fixed-clock";
595b9cdd24SPaul Burton		#clock-cells = <0>;
605b9cdd24SPaul Burton		clock-frequency = <32768>;
615b9cdd24SPaul Burton	};
625b9cdd24SPaul Burton
635b9cdd24SPaul Burton	cgu: jz4780-cgu@10000000 {
64158c774dS周琰杰 (Zhou Yanjie)		compatible = "ingenic,jz4780-cgu", "simple-mfd";
655b9cdd24SPaul Burton		reg = <0x10000000 0x100>;
66158c774dS周琰杰 (Zhou Yanjie)		#address-cells = <1>;
67158c774dS周琰杰 (Zhou Yanjie)		#size-cells = <1>;
68158c774dS周琰杰 (Zhou Yanjie)		ranges = <0x0 0x10000000 0x100>;
69158c774dS周琰杰 (Zhou Yanjie)
70158c774dS周琰杰 (Zhou Yanjie)		#clock-cells = <1>;
715b9cdd24SPaul Burton
725b9cdd24SPaul Burton		clocks = <&ext>, <&rtc>;
735b9cdd24SPaul Burton		clock-names = "ext", "rtc";
745b9cdd24SPaul Burton
75158c774dS周琰杰 (Zhou Yanjie)		otg_phy: usb-phy@3c {
76158c774dS周琰杰 (Zhou Yanjie)			compatible = "ingenic,jz4780-phy";
77158c774dS周琰杰 (Zhou Yanjie)			reg = <0x3c 0x10>;
78158c774dS周琰杰 (Zhou Yanjie)
79158c774dS周琰杰 (Zhou Yanjie)			clocks = <&cgu JZ4780_CLK_OTG1>;
80158c774dS周琰杰 (Zhou Yanjie)
81158c774dS周琰杰 (Zhou Yanjie)			#phy-cells = <0>;
82158c774dS周琰杰 (Zhou Yanjie)
83158c774dS周琰杰 (Zhou Yanjie)			status = "disabled";
84158c774dS周琰杰 (Zhou Yanjie)		};
85158c774dS周琰杰 (Zhou Yanjie)
86158c774dS周琰杰 (Zhou Yanjie)		rng: rng@d8 {
87158c774dS周琰杰 (Zhou Yanjie)			compatible = "ingenic,jz4780-rng";
88158c774dS周琰杰 (Zhou Yanjie)			reg = <0xd8 0x8>;
89158c774dS周琰杰 (Zhou Yanjie)
90158c774dS周琰杰 (Zhou Yanjie)			status = "disabled";
91158c774dS周琰杰 (Zhou Yanjie)		};
925b9cdd24SPaul Burton	};
935b9cdd24SPaul Burton
9436aafdbdSPaul Cercueil	tcu: timer@10002000 {
9536aafdbdSPaul Cercueil		compatible = "ingenic,jz4780-tcu",
9636aafdbdSPaul Cercueil			     "ingenic,jz4770-tcu",
9736aafdbdSPaul Cercueil			     "simple-mfd";
9836aafdbdSPaul Cercueil		reg = <0x10002000 0x1000>;
9936aafdbdSPaul Cercueil		#address-cells = <1>;
10036aafdbdSPaul Cercueil		#size-cells = <1>;
10136aafdbdSPaul Cercueil		ranges = <0x0 0x10002000 0x1000>;
10236aafdbdSPaul Cercueil
10336aafdbdSPaul Cercueil		#clock-cells = <1>;
10436aafdbdSPaul Cercueil
105cf2e6b8eSPaul Cercueil		clocks = <&cgu JZ4780_CLK_RTCLK>,
106cf2e6b8eSPaul Cercueil			 <&cgu JZ4780_CLK_EXCLK>,
107cf2e6b8eSPaul Cercueil			 <&cgu JZ4780_CLK_PCLK>;
10836aafdbdSPaul Cercueil		clock-names = "rtc", "ext", "pclk";
10936aafdbdSPaul Cercueil
11036aafdbdSPaul Cercueil		interrupt-controller;
11136aafdbdSPaul Cercueil		#interrupt-cells = <1>;
11236aafdbdSPaul Cercueil
11336aafdbdSPaul Cercueil		interrupt-parent = <&intc>;
11436aafdbdSPaul Cercueil		interrupts = <27 26 25>;
11511479e8eSPaul Cercueil
11611479e8eSPaul Cercueil		watchdog: watchdog@0 {
11711479e8eSPaul Cercueil			compatible = "ingenic,jz4780-watchdog";
11811479e8eSPaul Cercueil			reg = <0x0 0xc>;
11911479e8eSPaul Cercueil
12011479e8eSPaul Cercueil			clocks = <&tcu TCU_CLK_WDT>;
12111479e8eSPaul Cercueil			clock-names = "wdt";
12211479e8eSPaul Cercueil		};
123bf40bf5eSPaul Cercueil
124bf40bf5eSPaul Cercueil		pwm: pwm@40 {
125bf40bf5eSPaul Cercueil			compatible = "ingenic,jz4780-pwm", "ingenic,jz4740-pwm";
126bf40bf5eSPaul Cercueil			reg = <0x40 0x80>;
127bf40bf5eSPaul Cercueil
128bf40bf5eSPaul Cercueil			#pwm-cells = <3>;
129bf40bf5eSPaul Cercueil
130bf40bf5eSPaul Cercueil			clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>,
131bf40bf5eSPaul Cercueil				 <&tcu TCU_CLK_TIMER2>, <&tcu TCU_CLK_TIMER3>,
132bf40bf5eSPaul Cercueil				 <&tcu TCU_CLK_TIMER4>, <&tcu TCU_CLK_TIMER5>,
133bf40bf5eSPaul Cercueil				 <&tcu TCU_CLK_TIMER6>, <&tcu TCU_CLK_TIMER7>;
134bf40bf5eSPaul Cercueil			clock-names = "timer0", "timer1", "timer2", "timer3",
135bf40bf5eSPaul Cercueil				      "timer4", "timer5", "timer6", "timer7";
136bf40bf5eSPaul Cercueil		};
137bf40bf5eSPaul Cercueil
138bf40bf5eSPaul Cercueil		ost: timer@e0 {
139bf40bf5eSPaul Cercueil			compatible = "ingenic,jz4780-ost", "ingenic,jz4770-ost";
140bf40bf5eSPaul Cercueil			reg = <0xe0 0x20>;
141bf40bf5eSPaul Cercueil
142bf40bf5eSPaul Cercueil			clocks = <&tcu TCU_CLK_OST>;
143bf40bf5eSPaul Cercueil			clock-names = "ost";
144bf40bf5eSPaul Cercueil
145bf40bf5eSPaul Cercueil			interrupts = <15>;
146bf40bf5eSPaul Cercueil		};
14736aafdbdSPaul Cercueil	};
14836aafdbdSPaul Cercueil
149ed326616SMathieu Malaterre	rtc_dev: rtc@10003000 {
150ed326616SMathieu Malaterre		compatible = "ingenic,jz4780-rtc";
151ed326616SMathieu Malaterre		reg = <0x10003000 0x4c>;
152ed326616SMathieu Malaterre
153ed326616SMathieu Malaterre		interrupt-parent = <&intc>;
154ed326616SMathieu Malaterre		interrupts = <32>;
155ed326616SMathieu Malaterre
156ed326616SMathieu Malaterre		clocks = <&cgu JZ4780_CLK_RTCLK>;
157ed326616SMathieu Malaterre		clock-names = "rtc";
158ed326616SMathieu Malaterre	};
159ed326616SMathieu Malaterre
160d32613c3SPaul Cercueil	pinctrl: pin-controller@10010000 {
161d32613c3SPaul Cercueil		compatible = "ingenic,jz4780-pinctrl";
162d32613c3SPaul Cercueil		reg = <0x10010000 0x600>;
163d32613c3SPaul Cercueil
164d32613c3SPaul Cercueil		#address-cells = <1>;
165d32613c3SPaul Cercueil		#size-cells = <0>;
166d32613c3SPaul Cercueil
167d32613c3SPaul Cercueil		gpa: gpio@0 {
168d32613c3SPaul Cercueil			compatible = "ingenic,jz4780-gpio";
169d32613c3SPaul Cercueil			reg = <0>;
170d32613c3SPaul Cercueil
171d32613c3SPaul Cercueil			gpio-controller;
172d32613c3SPaul Cercueil			gpio-ranges = <&pinctrl 0 0 32>;
173d32613c3SPaul Cercueil			#gpio-cells = <2>;
174d32613c3SPaul Cercueil
175d32613c3SPaul Cercueil			interrupt-controller;
176d32613c3SPaul Cercueil			#interrupt-cells = <2>;
177d32613c3SPaul Cercueil
178d32613c3SPaul Cercueil			interrupt-parent = <&intc>;
179d32613c3SPaul Cercueil			interrupts = <17>;
180d32613c3SPaul Cercueil		};
181d32613c3SPaul Cercueil
182d32613c3SPaul Cercueil		gpb: gpio@1 {
183d32613c3SPaul Cercueil			compatible = "ingenic,jz4780-gpio";
184d32613c3SPaul Cercueil			reg = <1>;
185d32613c3SPaul Cercueil
186d32613c3SPaul Cercueil			gpio-controller;
187d32613c3SPaul Cercueil			gpio-ranges = <&pinctrl 0 32 32>;
188d32613c3SPaul Cercueil			#gpio-cells = <2>;
189d32613c3SPaul Cercueil
190d32613c3SPaul Cercueil			interrupt-controller;
191d32613c3SPaul Cercueil			#interrupt-cells = <2>;
192d32613c3SPaul Cercueil
193d32613c3SPaul Cercueil			interrupt-parent = <&intc>;
194d32613c3SPaul Cercueil			interrupts = <16>;
195d32613c3SPaul Cercueil		};
196d32613c3SPaul Cercueil
197d32613c3SPaul Cercueil		gpc: gpio@2 {
198d32613c3SPaul Cercueil			compatible = "ingenic,jz4780-gpio";
199d32613c3SPaul Cercueil			reg = <2>;
200d32613c3SPaul Cercueil
201d32613c3SPaul Cercueil			gpio-controller;
202d32613c3SPaul Cercueil			gpio-ranges = <&pinctrl 0 64 32>;
203d32613c3SPaul Cercueil			#gpio-cells = <2>;
204d32613c3SPaul Cercueil
205d32613c3SPaul Cercueil			interrupt-controller;
206d32613c3SPaul Cercueil			#interrupt-cells = <2>;
207d32613c3SPaul Cercueil
208d32613c3SPaul Cercueil			interrupt-parent = <&intc>;
209d32613c3SPaul Cercueil			interrupts = <15>;
210d32613c3SPaul Cercueil		};
211d32613c3SPaul Cercueil
212d32613c3SPaul Cercueil		gpd: gpio@3 {
213d32613c3SPaul Cercueil			compatible = "ingenic,jz4780-gpio";
214d32613c3SPaul Cercueil			reg = <3>;
215d32613c3SPaul Cercueil
216d32613c3SPaul Cercueil			gpio-controller;
217d32613c3SPaul Cercueil			gpio-ranges = <&pinctrl 0 96 32>;
218d32613c3SPaul Cercueil			#gpio-cells = <2>;
219d32613c3SPaul Cercueil
220d32613c3SPaul Cercueil			interrupt-controller;
221d32613c3SPaul Cercueil			#interrupt-cells = <2>;
222d32613c3SPaul Cercueil
223d32613c3SPaul Cercueil			interrupt-parent = <&intc>;
224d32613c3SPaul Cercueil			interrupts = <14>;
225d32613c3SPaul Cercueil		};
226d32613c3SPaul Cercueil
227d32613c3SPaul Cercueil		gpe: gpio@4 {
228d32613c3SPaul Cercueil			compatible = "ingenic,jz4780-gpio";
229d32613c3SPaul Cercueil			reg = <4>;
230d32613c3SPaul Cercueil
231d32613c3SPaul Cercueil			gpio-controller;
232d32613c3SPaul Cercueil			gpio-ranges = <&pinctrl 0 128 32>;
233d32613c3SPaul Cercueil			#gpio-cells = <2>;
234d32613c3SPaul Cercueil
235d32613c3SPaul Cercueil			interrupt-controller;
236d32613c3SPaul Cercueil			#interrupt-cells = <2>;
237d32613c3SPaul Cercueil
238d32613c3SPaul Cercueil			interrupt-parent = <&intc>;
239d32613c3SPaul Cercueil			interrupts = <13>;
240d32613c3SPaul Cercueil		};
241d32613c3SPaul Cercueil
242d32613c3SPaul Cercueil		gpf: gpio@5 {
243d32613c3SPaul Cercueil			compatible = "ingenic,jz4780-gpio";
244d32613c3SPaul Cercueil			reg = <5>;
245d32613c3SPaul Cercueil
246d32613c3SPaul Cercueil			gpio-controller;
247d32613c3SPaul Cercueil			gpio-ranges = <&pinctrl 0 160 32>;
248d32613c3SPaul Cercueil			#gpio-cells = <2>;
249d32613c3SPaul Cercueil
250d32613c3SPaul Cercueil			interrupt-controller;
251d32613c3SPaul Cercueil			#interrupt-cells = <2>;
252d32613c3SPaul Cercueil
253d32613c3SPaul Cercueil			interrupt-parent = <&intc>;
254d32613c3SPaul Cercueil			interrupts = <12>;
255d32613c3SPaul Cercueil		};
256d32613c3SPaul Cercueil	};
257d32613c3SPaul Cercueil
258c24f5762SMathieu Malaterre	spi_gpio {
259c24f5762SMathieu Malaterre		compatible = "spi-gpio";
260c24f5762SMathieu Malaterre		#address-cells = <1>;
261c24f5762SMathieu Malaterre		#size-cells = <0>;
262c24f5762SMathieu Malaterre		num-chipselects = <2>;
263c24f5762SMathieu Malaterre
264c24f5762SMathieu Malaterre		gpio-miso = <&gpe 14 0>;
265c24f5762SMathieu Malaterre		gpio-sck = <&gpe 15 0>;
266c24f5762SMathieu Malaterre		gpio-mosi = <&gpe 17 0>;
267cf2e6b8eSPaul Cercueil		cs-gpios = <&gpe 16 0>, <&gpe 18 0>;
268c24f5762SMathieu Malaterre
269c24f5762SMathieu Malaterre		spidev@0 {
270c24f5762SMathieu Malaterre			compatible = "spidev";
271c24f5762SMathieu Malaterre			reg = <0>;
272c24f5762SMathieu Malaterre			spi-max-frequency = <1000000>;
273c24f5762SMathieu Malaterre		};
274c24f5762SMathieu Malaterre	};
275c24f5762SMathieu Malaterre
2765b9cdd24SPaul Burton	uart0: serial@10030000 {
2775b9cdd24SPaul Burton		compatible = "ingenic,jz4780-uart";
2785b9cdd24SPaul Burton		reg = <0x10030000 0x100>;
2795b9cdd24SPaul Burton
2805b9cdd24SPaul Burton		interrupt-parent = <&intc>;
2815b9cdd24SPaul Burton		interrupts = <51>;
2825b9cdd24SPaul Burton
2835b9cdd24SPaul Burton		clocks = <&ext>, <&cgu JZ4780_CLK_UART0>;
2845b9cdd24SPaul Burton		clock-names = "baud", "module";
2855b9cdd24SPaul Burton
2865b9cdd24SPaul Burton		status = "disabled";
2875b9cdd24SPaul Burton	};
2885b9cdd24SPaul Burton
2895b9cdd24SPaul Burton	uart1: serial@10031000 {
2905b9cdd24SPaul Burton		compatible = "ingenic,jz4780-uart";
2915b9cdd24SPaul Burton		reg = <0x10031000 0x100>;
2925b9cdd24SPaul Burton
2935b9cdd24SPaul Burton		interrupt-parent = <&intc>;
2945b9cdd24SPaul Burton		interrupts = <50>;
2955b9cdd24SPaul Burton
2965b9cdd24SPaul Burton		clocks = <&ext>, <&cgu JZ4780_CLK_UART1>;
2975b9cdd24SPaul Burton		clock-names = "baud", "module";
2985b9cdd24SPaul Burton
2995b9cdd24SPaul Burton		status = "disabled";
3005b9cdd24SPaul Burton	};
3015b9cdd24SPaul Burton
3025b9cdd24SPaul Burton	uart2: serial@10032000 {
3035b9cdd24SPaul Burton		compatible = "ingenic,jz4780-uart";
3045b9cdd24SPaul Burton		reg = <0x10032000 0x100>;
3055b9cdd24SPaul Burton
3065b9cdd24SPaul Burton		interrupt-parent = <&intc>;
3075b9cdd24SPaul Burton		interrupts = <49>;
3085b9cdd24SPaul Burton
3095b9cdd24SPaul Burton		clocks = <&ext>, <&cgu JZ4780_CLK_UART2>;
3105b9cdd24SPaul Burton		clock-names = "baud", "module";
3115b9cdd24SPaul Burton
3125b9cdd24SPaul Burton		status = "disabled";
3135b9cdd24SPaul Burton	};
3145b9cdd24SPaul Burton
3155b9cdd24SPaul Burton	uart3: serial@10033000 {
3165b9cdd24SPaul Burton		compatible = "ingenic,jz4780-uart";
3175b9cdd24SPaul Burton		reg = <0x10033000 0x100>;
3185b9cdd24SPaul Burton
3195b9cdd24SPaul Burton		interrupt-parent = <&intc>;
3205b9cdd24SPaul Burton		interrupts = <48>;
3215b9cdd24SPaul Burton
3225b9cdd24SPaul Burton		clocks = <&ext>, <&cgu JZ4780_CLK_UART3>;
3235b9cdd24SPaul Burton		clock-names = "baud", "module";
3245b9cdd24SPaul Burton
3255b9cdd24SPaul Burton		status = "disabled";
3265b9cdd24SPaul Burton	};
3275b9cdd24SPaul Burton
3285b9cdd24SPaul Burton	uart4: serial@10034000 {
3295b9cdd24SPaul Burton		compatible = "ingenic,jz4780-uart";
3305b9cdd24SPaul Burton		reg = <0x10034000 0x100>;
3315b9cdd24SPaul Burton
3325b9cdd24SPaul Burton		interrupt-parent = <&intc>;
3335b9cdd24SPaul Burton		interrupts = <34>;
3345b9cdd24SPaul Burton
3355b9cdd24SPaul Burton		clocks = <&ext>, <&cgu JZ4780_CLK_UART4>;
3365b9cdd24SPaul Burton		clock-names = "baud", "module";
3375b9cdd24SPaul Burton
3385b9cdd24SPaul Burton		status = "disabled";
3395b9cdd24SPaul Burton	};
34078800558SAlex Smith
341f56a040cSAlexandre GRIVEAUX	i2c0: i2c@10050000 {
342*318951afSPaul Cercueil		compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c";
343f56a040cSAlexandre GRIVEAUX		#address-cells = <1>;
344f56a040cSAlexandre GRIVEAUX		#size-cells = <0>;
345f56a040cSAlexandre GRIVEAUX
346f56a040cSAlexandre GRIVEAUX		reg = <0x10050000 0x1000>;
347f56a040cSAlexandre GRIVEAUX
348f56a040cSAlexandre GRIVEAUX		interrupt-parent = <&intc>;
349f56a040cSAlexandre GRIVEAUX		interrupts = <60>;
350f56a040cSAlexandre GRIVEAUX
351f56a040cSAlexandre GRIVEAUX		clocks = <&cgu JZ4780_CLK_SMB0>;
352f56a040cSAlexandre GRIVEAUX		clock-frequency = <100000>;
353f56a040cSAlexandre GRIVEAUX		pinctrl-names = "default";
354f56a040cSAlexandre GRIVEAUX		pinctrl-0 = <&pins_i2c0_data>;
355f56a040cSAlexandre GRIVEAUX
356f56a040cSAlexandre GRIVEAUX		status = "disabled";
357f56a040cSAlexandre GRIVEAUX	};
358f56a040cSAlexandre GRIVEAUX
359f56a040cSAlexandre GRIVEAUX	i2c1: i2c@10051000 {
360*318951afSPaul Cercueil		compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c";
361f56a040cSAlexandre GRIVEAUX		#address-cells = <1>;
362f56a040cSAlexandre GRIVEAUX		#size-cells = <0>;
363f56a040cSAlexandre GRIVEAUX		reg = <0x10051000 0x1000>;
364f56a040cSAlexandre GRIVEAUX
365f56a040cSAlexandre GRIVEAUX		interrupt-parent = <&intc>;
366f56a040cSAlexandre GRIVEAUX		interrupts = <59>;
367f56a040cSAlexandre GRIVEAUX
368f56a040cSAlexandre GRIVEAUX		clocks = <&cgu JZ4780_CLK_SMB1>;
369f56a040cSAlexandre GRIVEAUX		clock-frequency = <100000>;
370f56a040cSAlexandre GRIVEAUX		pinctrl-names = "default";
371f56a040cSAlexandre GRIVEAUX		pinctrl-0 = <&pins_i2c1_data>;
372f56a040cSAlexandre GRIVEAUX
373f56a040cSAlexandre GRIVEAUX		status = "disabled";
374f56a040cSAlexandre GRIVEAUX	};
375f56a040cSAlexandre GRIVEAUX
376f56a040cSAlexandre GRIVEAUX	i2c2: i2c@10052000 {
377*318951afSPaul Cercueil		compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c";
378f56a040cSAlexandre GRIVEAUX		#address-cells = <1>;
379f56a040cSAlexandre GRIVEAUX		#size-cells = <0>;
380f56a040cSAlexandre GRIVEAUX		reg = <0x10052000 0x1000>;
381f56a040cSAlexandre GRIVEAUX
382f56a040cSAlexandre GRIVEAUX		interrupt-parent = <&intc>;
383f56a040cSAlexandre GRIVEAUX		interrupts = <58>;
384f56a040cSAlexandre GRIVEAUX
385f56a040cSAlexandre GRIVEAUX		clocks = <&cgu JZ4780_CLK_SMB2>;
386f56a040cSAlexandre GRIVEAUX		clock-frequency = <100000>;
387f56a040cSAlexandre GRIVEAUX		pinctrl-names = "default";
388f56a040cSAlexandre GRIVEAUX		pinctrl-0 = <&pins_i2c2_data>;
389f56a040cSAlexandre GRIVEAUX
390f56a040cSAlexandre GRIVEAUX		status = "disabled";
391f56a040cSAlexandre GRIVEAUX	};
392f56a040cSAlexandre GRIVEAUX
393f56a040cSAlexandre GRIVEAUX	i2c3: i2c@10053000 {
394*318951afSPaul Cercueil		compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c";
395f56a040cSAlexandre GRIVEAUX		#address-cells = <1>;
396f56a040cSAlexandre GRIVEAUX		#size-cells = <0>;
397f56a040cSAlexandre GRIVEAUX		reg = <0x10053000 0x1000>;
398f56a040cSAlexandre GRIVEAUX
399f56a040cSAlexandre GRIVEAUX		interrupt-parent = <&intc>;
400f56a040cSAlexandre GRIVEAUX		interrupts = <57>;
401f56a040cSAlexandre GRIVEAUX
402f56a040cSAlexandre GRIVEAUX		clocks = <&cgu JZ4780_CLK_SMB3>;
403f56a040cSAlexandre GRIVEAUX		clock-frequency = <100000>;
404f56a040cSAlexandre GRIVEAUX		pinctrl-names = "default";
405f56a040cSAlexandre GRIVEAUX		pinctrl-0 = <&pins_i2c3_data>;
406f56a040cSAlexandre GRIVEAUX
407f56a040cSAlexandre GRIVEAUX		status = "disabled";
408f56a040cSAlexandre GRIVEAUX	};
409f56a040cSAlexandre GRIVEAUX
410f56a040cSAlexandre GRIVEAUX	i2c4: i2c@10054000 {
411*318951afSPaul Cercueil		compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c";
412f56a040cSAlexandre GRIVEAUX		#address-cells = <1>;
413f56a040cSAlexandre GRIVEAUX		#size-cells = <0>;
414f56a040cSAlexandre GRIVEAUX		reg = <0x10054000 0x1000>;
415f56a040cSAlexandre GRIVEAUX
416f56a040cSAlexandre GRIVEAUX		interrupt-parent = <&intc>;
417f56a040cSAlexandre GRIVEAUX		interrupts = <56>;
418f56a040cSAlexandre GRIVEAUX
419f56a040cSAlexandre GRIVEAUX		clocks = <&cgu JZ4780_CLK_SMB4>;
420f56a040cSAlexandre GRIVEAUX		clock-frequency = <100000>;
421f56a040cSAlexandre GRIVEAUX		pinctrl-names = "default";
422f56a040cSAlexandre GRIVEAUX		pinctrl-0 = <&pins_i2c4_data>;
423f56a040cSAlexandre GRIVEAUX
424f56a040cSAlexandre GRIVEAUX		status = "disabled";
425f56a040cSAlexandre GRIVEAUX	};
426f56a040cSAlexandre GRIVEAUX
42778800558SAlex Smith	nemc: nemc@13410000 {
428190607f2SPrasannaKumar Muralidharan		compatible = "ingenic,jz4780-nemc", "simple-mfd";
42978800558SAlex Smith		reg = <0x13410000 0x10000>;
43078800558SAlex Smith		#address-cells = <2>;
43178800558SAlex Smith		#size-cells = <1>;
432cf2e6b8eSPaul Cercueil		ranges = <0 0 0x13410000 0x10000>,
433cf2e6b8eSPaul Cercueil			 <1 0 0x1b000000 0x1000000>,
434cf2e6b8eSPaul Cercueil			 <2 0 0x1a000000 0x1000000>,
435cf2e6b8eSPaul Cercueil			 <3 0 0x19000000 0x1000000>,
436cf2e6b8eSPaul Cercueil			 <4 0 0x18000000 0x1000000>,
437cf2e6b8eSPaul Cercueil			 <5 0 0x17000000 0x1000000>,
438cf2e6b8eSPaul Cercueil			 <6 0 0x16000000 0x1000000>;
43978800558SAlex Smith
44078800558SAlex Smith		clocks = <&cgu JZ4780_CLK_NEMC>;
44178800558SAlex Smith
44278800558SAlex Smith		status = "disabled";
443190607f2SPrasannaKumar Muralidharan
444190607f2SPrasannaKumar Muralidharan		efuse: efuse@d0 {
445190607f2SPrasannaKumar Muralidharan			reg = <0 0xd0 0x30>;
446190607f2SPrasannaKumar Muralidharan			compatible = "ingenic,jz4780-efuse";
447190607f2SPrasannaKumar Muralidharan
448190607f2SPrasannaKumar Muralidharan			clocks = <&cgu JZ4780_CLK_AHB2>;
449190607f2SPrasannaKumar Muralidharan
450190607f2SPrasannaKumar Muralidharan			#address-cells = <1>;
451190607f2SPrasannaKumar Muralidharan			#size-cells = <1>;
452190607f2SPrasannaKumar Muralidharan
453190607f2SPrasannaKumar Muralidharan			eth0_addr: eth-mac-addr@0x22 {
454190607f2SPrasannaKumar Muralidharan				reg = <0x22 0x6>;
455190607f2SPrasannaKumar Muralidharan			};
456190607f2SPrasannaKumar Muralidharan		};
45778800558SAlex Smith	};
45878800558SAlex Smith
4592d972b6aSEzequiel Garcia	dma: dma@13420000 {
4602d972b6aSEzequiel Garcia		compatible = "ingenic,jz4780-dma";
461cf2e6b8eSPaul Cercueil		reg = <0x13420000 0x400>, <0x13421000 0x40>;
4622d972b6aSEzequiel Garcia		#dma-cells = <2>;
4632d972b6aSEzequiel Garcia
4642d972b6aSEzequiel Garcia		interrupt-parent = <&intc>;
4652d972b6aSEzequiel Garcia		interrupts = <10>;
4662d972b6aSEzequiel Garcia
4672d972b6aSEzequiel Garcia		clocks = <&cgu JZ4780_CLK_PDMA>;
4682d972b6aSEzequiel Garcia	};
4692d972b6aSEzequiel Garcia
4707f5a07f4SEzequiel Garcia	mmc0: mmc@13450000 {
4717f5a07f4SEzequiel Garcia		compatible = "ingenic,jz4780-mmc";
4727f5a07f4SEzequiel Garcia		reg = <0x13450000 0x1000>;
4737f5a07f4SEzequiel Garcia
4747f5a07f4SEzequiel Garcia		interrupt-parent = <&intc>;
4757f5a07f4SEzequiel Garcia		interrupts = <37>;
4767f5a07f4SEzequiel Garcia
4777f5a07f4SEzequiel Garcia		clocks = <&cgu JZ4780_CLK_MSC0>;
4787f5a07f4SEzequiel Garcia		clock-names = "mmc";
4797f5a07f4SEzequiel Garcia
4807f5a07f4SEzequiel Garcia		cap-sd-highspeed;
4817f5a07f4SEzequiel Garcia		cap-mmc-highspeed;
4827f5a07f4SEzequiel Garcia		cap-sdio-irq;
4837f5a07f4SEzequiel Garcia		dmas = <&dma JZ4780_DMA_MSC0_RX 0xffffffff>,
4847f5a07f4SEzequiel Garcia		       <&dma JZ4780_DMA_MSC0_TX 0xffffffff>;
4857f5a07f4SEzequiel Garcia		dma-names = "rx", "tx";
4867f5a07f4SEzequiel Garcia
4877f5a07f4SEzequiel Garcia		status = "disabled";
4887f5a07f4SEzequiel Garcia	};
4897f5a07f4SEzequiel Garcia
4907f5a07f4SEzequiel Garcia	mmc1: mmc@13460000 {
4917f5a07f4SEzequiel Garcia		compatible = "ingenic,jz4780-mmc";
4927f5a07f4SEzequiel Garcia		reg = <0x13460000 0x1000>;
4937f5a07f4SEzequiel Garcia
4947f5a07f4SEzequiel Garcia		interrupt-parent = <&intc>;
4957f5a07f4SEzequiel Garcia		interrupts = <36>;
4967f5a07f4SEzequiel Garcia
4977f5a07f4SEzequiel Garcia		clocks = <&cgu JZ4780_CLK_MSC1>;
4987f5a07f4SEzequiel Garcia		clock-names = "mmc";
4997f5a07f4SEzequiel Garcia
5007f5a07f4SEzequiel Garcia		cap-sd-highspeed;
5017f5a07f4SEzequiel Garcia		cap-mmc-highspeed;
5027f5a07f4SEzequiel Garcia		cap-sdio-irq;
5037f5a07f4SEzequiel Garcia		dmas = <&dma JZ4780_DMA_MSC1_RX 0xffffffff>,
5047f5a07f4SEzequiel Garcia		       <&dma JZ4780_DMA_MSC1_TX 0xffffffff>;
5057f5a07f4SEzequiel Garcia		dma-names = "rx", "tx";
5067f5a07f4SEzequiel Garcia
5077f5a07f4SEzequiel Garcia		status = "disabled";
5087f5a07f4SEzequiel Garcia	};
5097f5a07f4SEzequiel Garcia
51078800558SAlex Smith	bch: bch@134d0000 {
51178800558SAlex Smith		compatible = "ingenic,jz4780-bch";
51278800558SAlex Smith		reg = <0x134d0000 0x10000>;
51378800558SAlex Smith
51478800558SAlex Smith		clocks = <&cgu JZ4780_CLK_BCH>;
51578800558SAlex Smith
51678800558SAlex Smith		status = "disabled";
51778800558SAlex Smith	};
518158c774dS周琰杰 (Zhou Yanjie)
519158c774dS周琰杰 (Zhou Yanjie)	otg: usb@13500000 {
520158c774dS周琰杰 (Zhou Yanjie)		compatible = "ingenic,jz4780-otg", "snps,dwc2";
521158c774dS周琰杰 (Zhou Yanjie)		reg = <0x13500000 0x40000>;
522158c774dS周琰杰 (Zhou Yanjie)
523158c774dS周琰杰 (Zhou Yanjie)		interrupt-parent = <&intc>;
524158c774dS周琰杰 (Zhou Yanjie)		interrupts = <21>;
525158c774dS周琰杰 (Zhou Yanjie)
526158c774dS周琰杰 (Zhou Yanjie)		clocks = <&cgu JZ4780_CLK_UHC>;
527158c774dS周琰杰 (Zhou Yanjie)		clock-names = "otg";
528158c774dS周琰杰 (Zhou Yanjie)
529158c774dS周琰杰 (Zhou Yanjie)		phys = <&otg_phy>;
530158c774dS周琰杰 (Zhou Yanjie)		phy-names = "usb2-phy";
531158c774dS周琰杰 (Zhou Yanjie)
532158c774dS周琰杰 (Zhou Yanjie)		g-rx-fifo-size = <768>;
533158c774dS周琰杰 (Zhou Yanjie)		g-np-tx-fifo-size = <256>;
534158c774dS周琰杰 (Zhou Yanjie)		g-tx-fifo-size = <256 256 256 256 256 256 256 512>;
535158c774dS周琰杰 (Zhou Yanjie)
536158c774dS周琰杰 (Zhou Yanjie)		status = "disabled";
537158c774dS周琰杰 (Zhou Yanjie)	};
5385b9cdd24SPaul Burton};
539