xref: /openbmc/linux/arch/mips/boot/dts/ingenic/jz4740.dtsi (revision 5dad549d94c8dac1a99bbc72d481d64dc4974ea3)

// SPDX-License-Identifier: GPL-2.0
#include <dt-bindings/clock/jz4740-cgu.h>

/ {
	#address-cells = <1>;
	#size-cells = <1>;
	compatible = "ingenic,jz4740";

	cpuintc: interrupt-controller {
		#address-cells = <0>;
		#interrupt-cells = <1>;
		interrupt-controller;
		compatible = "mti,cpu-interrupt-controller";
	};

	intc: interrupt-controller@10001000 {
		compatible = "ingenic,jz4740-intc";
		reg = <0x10001000 0x14>;

		interrupt-controller;
		#interrupt-cells = <1>;

		interrupt-parent = <&cpuintc>;
		interrupts = <2>;
	};

	ext: ext {
		compatible = "fixed-clock";
		#clock-cells = <0>;
	};

	rtc: rtc {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <32768>;
	};

	cgu: jz4740-cgu@10000000 {
		compatible = "ingenic,jz4740-cgu";
		reg = <0x10000000 0x100>;

		clocks = <&ext>, <&rtc>;
		clock-names = "ext", "rtc";

		#clock-cells = <1>;
	};

	watchdog: watchdog@10002000 {
		compatible = "ingenic,jz4740-watchdog";
		reg = <0x10002000 0x10>;

		clocks = <&cgu JZ4740_CLK_RTC>;
		clock-names = "rtc";
	};

	rtc_dev: rtc@10003000 {
		compatible = "ingenic,jz4740-rtc";
		reg = <0x10003000 0x40>;

		interrupt-parent = <&intc>;
		interrupts = <15>;

		clocks = <&cgu JZ4740_CLK_RTC>;
		clock-names = "rtc";
	};

	pinctrl: pin-controller@10010000 {
		compatible = "ingenic,jz4740-pinctrl";
		reg = <0x10010000 0x400>;

		#address-cells = <1>;
		#size-cells = <0>;

		gpa: gpio@0 {
			compatible = "ingenic,jz4740-gpio";
			reg = <0>;

			gpio-controller;
			gpio-ranges = <&pinctrl 0 0 32>;
			#gpio-cells = <2>;

			interrupt-controller;
			#interrupt-cells = <2>;

			interrupt-parent = <&intc>;
			interrupts = <28>;
		};

		gpb: gpio@1 {
			compatible = "ingenic,jz4740-gpio";
			reg = <1>;

			gpio-controller;
			gpio-ranges = <&pinctrl 0 32 32>;
			#gpio-cells = <2>;

			interrupt-controller;
			#interrupt-cells = <2>;

			interrupt-parent = <&intc>;
			interrupts = <27>;
		};

		gpc: gpio@2 {
			compatible = "ingenic,jz4740-gpio";
			reg = <2>;

			gpio-controller;
			gpio-ranges = <&pinctrl 0 64 32>;
			#gpio-cells = <2>;

			interrupt-controller;
			#interrupt-cells = <2>;

			interrupt-parent = <&intc>;
			interrupts = <26>;
		};

		gpd: gpio@3 {
			compatible = "ingenic,jz4740-gpio";
			reg = <3>;

			gpio-controller;
			gpio-ranges = <&pinctrl 0 96 32>;
			#gpio-cells = <2>;

			interrupt-controller;
			#interrupt-cells = <2>;

			interrupt-parent = <&intc>;
			interrupts = <25>;
		};
	};

	mmc: mmc@10021000 {
		compatible = "ingenic,jz4740-mmc";
		reg = <0x10021000 0x1000>;

		clocks = <&cgu JZ4740_CLK_MMC>;
		clock-names = "mmc";

		interrupt-parent = <&intc>;
		interrupts = <14>;

		dmas = <&dmac 27 0xffffffff>, <&dmac 26 0xffffffff>;
		dma-names = "rx", "tx";

		cap-sd-highspeed;
		cap-mmc-highspeed;
		cap-sdio-irq;
	};

	uart0: serial@10030000 {
		compatible = "ingenic,jz4740-uart";
		reg = <0x10030000 0x100>;

		interrupt-parent = <&intc>;
		interrupts = <9>;

		clocks = <&ext>, <&cgu JZ4740_CLK_UART0>;
		clock-names = "baud", "module";
	};

	uart1: serial@10031000 {
		compatible = "ingenic,jz4740-uart";
		reg = <0x10031000 0x100>;

		interrupt-parent = <&intc>;
		interrupts = <8>;

		clocks = <&ext>, <&cgu JZ4740_CLK_UART1>;
		clock-names = "baud", "module";
	};

	dmac: dma-controller@13020000 {
		compatible = "ingenic,jz4740-dma";
		reg = <0x13020000 0xbc
		       0x13020300 0x14>;
		#dma-cells = <2>;

		interrupt-parent = <&intc>;
		interrupts = <20>;

		clocks = <&cgu JZ4740_CLK_DMA>;
	};

	uhc: uhc@13030000 {
		compatible = "ingenic,jz4740-ohci", "generic-ohci";
		reg = <0x13030000 0x1000>;

		clocks = <&cgu JZ4740_CLK_UHC>;
		assigned-clocks = <&cgu JZ4740_CLK_UHC>;
		assigned-clock-rates = <48000000>;

		interrupt-parent = <&intc>;
		interrupts = <3>;

		status = "disabled";
	};
};