1*d2912cb1SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only 25f2d4459SKevin Cernekee /* 35f2d4459SKevin Cernekee * 4e5a6fcc0SKevin Cernekee * Copyright (C) 2014 Broadcom Corporation 5e5a6fcc0SKevin Cernekee * Author: Kevin Cernekee <cernekee@gmail.com> 65f2d4459SKevin Cernekee */ 75f2d4459SKevin Cernekee 8e5a6fcc0SKevin Cernekee #include <linux/of.h> 9e5a6fcc0SKevin Cernekee #include <linux/irqchip.h> 105f2d4459SKevin Cernekee 115f2d4459SKevin Cernekee #include <asm/bmips.h> 12e5a6fcc0SKevin Cernekee #include <asm/irq.h> 135f2d4459SKevin Cernekee #include <asm/irq_cpu.h> 14e5a6fcc0SKevin Cernekee #include <asm/time.h> 155f2d4459SKevin Cernekee 16c7c42ec2SSimon Arlott static const struct of_device_id smp_intc_dt_match[] = { 17c7c42ec2SSimon Arlott { .compatible = "brcm,bcm7038-l1-intc" }, 18c7c42ec2SSimon Arlott { .compatible = "brcm,bcm6345-l1-intc" }, 19c7c42ec2SSimon Arlott {} 20c7c42ec2SSimon Arlott }; 21c7c42ec2SSimon Arlott get_c0_compare_int(void)225f2d4459SKevin Cernekeeunsigned int get_c0_compare_int(void) 235f2d4459SKevin Cernekee { 245f2d4459SKevin Cernekee return CP0_LEGACY_COMPARE_IRQ; 255f2d4459SKevin Cernekee } 265f2d4459SKevin Cernekee arch_init_irq(void)275f2d4459SKevin Cernekeevoid __init arch_init_irq(void) 285f2d4459SKevin Cernekee { 29e5a6fcc0SKevin Cernekee struct device_node *dn; 30e5a6fcc0SKevin Cernekee 31c7c42ec2SSimon Arlott /* Only these controllers support SMP IRQ affinity */ 32c7c42ec2SSimon Arlott dn = of_find_matching_node(NULL, smp_intc_dt_match); 33e5a6fcc0SKevin Cernekee if (dn) 34e5a6fcc0SKevin Cernekee of_node_put(dn); 35e5a6fcc0SKevin Cernekee else 365f2d4459SKevin Cernekee bmips_tp1_irqs = 0; 37e5a6fcc0SKevin Cernekee 38e5a6fcc0SKevin Cernekee irqchip_init(); 395f2d4459SKevin Cernekee } 40e5a6fcc0SKevin Cernekee 410a271c2aSJoel Porquet IRQCHIP_DECLARE(mips_cpu_intc, "mti,cpu-interrupt-controller", 42e5a6fcc0SKevin Cernekee mips_cpu_irq_of_init); 43