1e7300d04SMaxime Bizon /* 2e7300d04SMaxime Bizon * This file is subject to the terms and conditions of the GNU General Public 3e7300d04SMaxime Bizon * License. See the file "COPYING" in the main directory of this archive 4e7300d04SMaxime Bizon * for more details. 5e7300d04SMaxime Bizon * 6e7300d04SMaxime Bizon * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr> 7e7300d04SMaxime Bizon */ 8e7300d04SMaxime Bizon 9e7300d04SMaxime Bizon #include <linux/module.h> 10e7300d04SMaxime Bizon #include <linux/mutex.h> 11e7300d04SMaxime Bizon #include <linux/err.h> 12e7300d04SMaxime Bizon #include <linux/clk.h> 1304712f3fSMaxime Bizon #include <linux/delay.h> 14e7300d04SMaxime Bizon #include <bcm63xx_cpu.h> 15e7300d04SMaxime Bizon #include <bcm63xx_io.h> 16e7300d04SMaxime Bizon #include <bcm63xx_regs.h> 17e7300d04SMaxime Bizon #include <bcm63xx_clk.h> 18e7300d04SMaxime Bizon 19e7300d04SMaxime Bizon static DEFINE_MUTEX(clocks_mutex); 20e7300d04SMaxime Bizon 21e7300d04SMaxime Bizon 22e7300d04SMaxime Bizon static void clk_enable_unlocked(struct clk *clk) 23e7300d04SMaxime Bizon { 24e7300d04SMaxime Bizon if (clk->set && (clk->usage++) == 0) 25e7300d04SMaxime Bizon clk->set(clk, 1); 26e7300d04SMaxime Bizon } 27e7300d04SMaxime Bizon 28e7300d04SMaxime Bizon static void clk_disable_unlocked(struct clk *clk) 29e7300d04SMaxime Bizon { 30e7300d04SMaxime Bizon if (clk->set && (--clk->usage) == 0) 31e7300d04SMaxime Bizon clk->set(clk, 0); 32e7300d04SMaxime Bizon } 33e7300d04SMaxime Bizon 34e7300d04SMaxime Bizon static void bcm_hwclock_set(u32 mask, int enable) 35e7300d04SMaxime Bizon { 36e7300d04SMaxime Bizon u32 reg; 37e7300d04SMaxime Bizon 38e7300d04SMaxime Bizon reg = bcm_perf_readl(PERF_CKCTL_REG); 39e7300d04SMaxime Bizon if (enable) 40e7300d04SMaxime Bizon reg |= mask; 41e7300d04SMaxime Bizon else 42e7300d04SMaxime Bizon reg &= ~mask; 43e7300d04SMaxime Bizon bcm_perf_writel(reg, PERF_CKCTL_REG); 44e7300d04SMaxime Bizon } 45e7300d04SMaxime Bizon 46e7300d04SMaxime Bizon /* 47e7300d04SMaxime Bizon * Ethernet MAC "misc" clock: dma clocks and main clock on 6348 48e7300d04SMaxime Bizon */ 49e7300d04SMaxime Bizon static void enet_misc_set(struct clk *clk, int enable) 50e7300d04SMaxime Bizon { 51e7300d04SMaxime Bizon u32 mask; 52e7300d04SMaxime Bizon 53e7300d04SMaxime Bizon if (BCMCPU_IS_6338()) 54e7300d04SMaxime Bizon mask = CKCTL_6338_ENET_EN; 55e7300d04SMaxime Bizon else if (BCMCPU_IS_6345()) 56e7300d04SMaxime Bizon mask = CKCTL_6345_ENET_EN; 57e7300d04SMaxime Bizon else if (BCMCPU_IS_6348()) 58e7300d04SMaxime Bizon mask = CKCTL_6348_ENET_EN; 59e7300d04SMaxime Bizon else 60e7300d04SMaxime Bizon /* BCMCPU_IS_6358 */ 61e7300d04SMaxime Bizon mask = CKCTL_6358_EMUSB_EN; 62e7300d04SMaxime Bizon bcm_hwclock_set(mask, enable); 63e7300d04SMaxime Bizon } 64e7300d04SMaxime Bizon 65e7300d04SMaxime Bizon static struct clk clk_enet_misc = { 66e7300d04SMaxime Bizon .set = enet_misc_set, 67e7300d04SMaxime Bizon }; 68e7300d04SMaxime Bizon 69e7300d04SMaxime Bizon /* 70e7300d04SMaxime Bizon * Ethernet MAC clocks: only revelant on 6358, silently enable misc 71e7300d04SMaxime Bizon * clocks 72e7300d04SMaxime Bizon */ 73e7300d04SMaxime Bizon static void enetx_set(struct clk *clk, int enable) 74e7300d04SMaxime Bizon { 75e7300d04SMaxime Bizon if (enable) 76e7300d04SMaxime Bizon clk_enable_unlocked(&clk_enet_misc); 77e7300d04SMaxime Bizon else 78e7300d04SMaxime Bizon clk_disable_unlocked(&clk_enet_misc); 79e7300d04SMaxime Bizon 80e7300d04SMaxime Bizon if (BCMCPU_IS_6358()) { 81e7300d04SMaxime Bizon u32 mask; 82e7300d04SMaxime Bizon 83e7300d04SMaxime Bizon if (clk->id == 0) 84e7300d04SMaxime Bizon mask = CKCTL_6358_ENET0_EN; 85e7300d04SMaxime Bizon else 86e7300d04SMaxime Bizon mask = CKCTL_6358_ENET1_EN; 87e7300d04SMaxime Bizon bcm_hwclock_set(mask, enable); 88e7300d04SMaxime Bizon } 89e7300d04SMaxime Bizon } 90e7300d04SMaxime Bizon 91e7300d04SMaxime Bizon static struct clk clk_enet0 = { 92e7300d04SMaxime Bizon .id = 0, 93e7300d04SMaxime Bizon .set = enetx_set, 94e7300d04SMaxime Bizon }; 95e7300d04SMaxime Bizon 96e7300d04SMaxime Bizon static struct clk clk_enet1 = { 97e7300d04SMaxime Bizon .id = 1, 98e7300d04SMaxime Bizon .set = enetx_set, 99e7300d04SMaxime Bizon }; 100e7300d04SMaxime Bizon 101e7300d04SMaxime Bizon /* 102e7300d04SMaxime Bizon * Ethernet PHY clock 103e7300d04SMaxime Bizon */ 104e7300d04SMaxime Bizon static void ephy_set(struct clk *clk, int enable) 105e7300d04SMaxime Bizon { 106e7300d04SMaxime Bizon if (!BCMCPU_IS_6358()) 107e7300d04SMaxime Bizon return; 108e7300d04SMaxime Bizon bcm_hwclock_set(CKCTL_6358_EPHY_EN, enable); 109e7300d04SMaxime Bizon } 110e7300d04SMaxime Bizon 111e7300d04SMaxime Bizon 112e7300d04SMaxime Bizon static struct clk clk_ephy = { 113e7300d04SMaxime Bizon .set = ephy_set, 114e7300d04SMaxime Bizon }; 115e7300d04SMaxime Bizon 116e7300d04SMaxime Bizon /* 11704712f3fSMaxime Bizon * Ethernet switch clock 11804712f3fSMaxime Bizon */ 11904712f3fSMaxime Bizon static void enetsw_set(struct clk *clk, int enable) 12004712f3fSMaxime Bizon { 12104712f3fSMaxime Bizon if (!BCMCPU_IS_6368()) 12204712f3fSMaxime Bizon return; 123d9831a41SFlorian Fainelli bcm_hwclock_set(CKCTL_6368_ROBOSW_EN | 12404712f3fSMaxime Bizon CKCTL_6368_SWPKT_USB_EN | 12504712f3fSMaxime Bizon CKCTL_6368_SWPKT_SAR_EN, enable); 12604712f3fSMaxime Bizon if (enable) { 12704712f3fSMaxime Bizon u32 val; 12804712f3fSMaxime Bizon 12904712f3fSMaxime Bizon /* reset switch core afer clock change */ 13004712f3fSMaxime Bizon val = bcm_perf_readl(PERF_SOFTRESET_6368_REG); 13104712f3fSMaxime Bizon val &= ~SOFTRESET_6368_ENETSW_MASK; 13204712f3fSMaxime Bizon bcm_perf_writel(val, PERF_SOFTRESET_6368_REG); 13304712f3fSMaxime Bizon msleep(10); 13404712f3fSMaxime Bizon val |= SOFTRESET_6368_ENETSW_MASK; 13504712f3fSMaxime Bizon bcm_perf_writel(val, PERF_SOFTRESET_6368_REG); 13604712f3fSMaxime Bizon msleep(10); 13704712f3fSMaxime Bizon } 13804712f3fSMaxime Bizon } 13904712f3fSMaxime Bizon 14004712f3fSMaxime Bizon static struct clk clk_enetsw = { 14104712f3fSMaxime Bizon .set = enetsw_set, 14204712f3fSMaxime Bizon }; 14304712f3fSMaxime Bizon 14404712f3fSMaxime Bizon /* 145e7300d04SMaxime Bizon * PCM clock 146e7300d04SMaxime Bizon */ 147e7300d04SMaxime Bizon static void pcm_set(struct clk *clk, int enable) 148e7300d04SMaxime Bizon { 149e7300d04SMaxime Bizon if (!BCMCPU_IS_6358()) 150e7300d04SMaxime Bizon return; 151e7300d04SMaxime Bizon bcm_hwclock_set(CKCTL_6358_PCM_EN, enable); 152e7300d04SMaxime Bizon } 153e7300d04SMaxime Bizon 154e7300d04SMaxime Bizon static struct clk clk_pcm = { 155e7300d04SMaxime Bizon .set = pcm_set, 156e7300d04SMaxime Bizon }; 157e7300d04SMaxime Bizon 158e7300d04SMaxime Bizon /* 159e7300d04SMaxime Bizon * USB host clock 160e7300d04SMaxime Bizon */ 161e7300d04SMaxime Bizon static void usbh_set(struct clk *clk, int enable) 162e7300d04SMaxime Bizon { 163*dd89d60cSKevin Cernekee if (BCMCPU_IS_6328()) 164*dd89d60cSKevin Cernekee bcm_hwclock_set(CKCTL_6328_USBH_EN, enable); 165*dd89d60cSKevin Cernekee else if (BCMCPU_IS_6348()) 166e7300d04SMaxime Bizon bcm_hwclock_set(CKCTL_6348_USBH_EN, enable); 16704712f3fSMaxime Bizon else if (BCMCPU_IS_6368()) 168d9831a41SFlorian Fainelli bcm_hwclock_set(CKCTL_6368_USBH_EN, enable); 169e7300d04SMaxime Bizon } 170e7300d04SMaxime Bizon 171e7300d04SMaxime Bizon static struct clk clk_usbh = { 172e7300d04SMaxime Bizon .set = usbh_set, 173e7300d04SMaxime Bizon }; 174e7300d04SMaxime Bizon 175e7300d04SMaxime Bizon /* 176*dd89d60cSKevin Cernekee * USB device clock 177*dd89d60cSKevin Cernekee */ 178*dd89d60cSKevin Cernekee static void usbd_set(struct clk *clk, int enable) 179*dd89d60cSKevin Cernekee { 180*dd89d60cSKevin Cernekee if (BCMCPU_IS_6328()) 181*dd89d60cSKevin Cernekee bcm_hwclock_set(CKCTL_6328_USBD_EN, enable); 182*dd89d60cSKevin Cernekee else if (BCMCPU_IS_6368()) 183*dd89d60cSKevin Cernekee bcm_hwclock_set(CKCTL_6368_USBD_EN, enable); 184*dd89d60cSKevin Cernekee } 185*dd89d60cSKevin Cernekee 186*dd89d60cSKevin Cernekee static struct clk clk_usbd = { 187*dd89d60cSKevin Cernekee .set = usbd_set, 188*dd89d60cSKevin Cernekee }; 189*dd89d60cSKevin Cernekee 190*dd89d60cSKevin Cernekee /* 191e7300d04SMaxime Bizon * SPI clock 192e7300d04SMaxime Bizon */ 193e7300d04SMaxime Bizon static void spi_set(struct clk *clk, int enable) 194e7300d04SMaxime Bizon { 195e7300d04SMaxime Bizon u32 mask; 196e7300d04SMaxime Bizon 197e7300d04SMaxime Bizon if (BCMCPU_IS_6338()) 198e7300d04SMaxime Bizon mask = CKCTL_6338_SPI_EN; 199e7300d04SMaxime Bizon else if (BCMCPU_IS_6348()) 200e7300d04SMaxime Bizon mask = CKCTL_6348_SPI_EN; 20119372b24SFlorian Fainelli else if (BCMCPU_IS_6358()) 202e7300d04SMaxime Bizon mask = CKCTL_6358_SPI_EN; 20319372b24SFlorian Fainelli else 20419372b24SFlorian Fainelli /* BCMCPU_IS_6368 */ 20519372b24SFlorian Fainelli mask = CKCTL_6368_SPI_EN; 206e7300d04SMaxime Bizon bcm_hwclock_set(mask, enable); 207e7300d04SMaxime Bizon } 208e7300d04SMaxime Bizon 209e7300d04SMaxime Bizon static struct clk clk_spi = { 210e7300d04SMaxime Bizon .set = spi_set, 211e7300d04SMaxime Bizon }; 212e7300d04SMaxime Bizon 213e7300d04SMaxime Bizon /* 21404712f3fSMaxime Bizon * XTM clock 21504712f3fSMaxime Bizon */ 21604712f3fSMaxime Bizon static void xtm_set(struct clk *clk, int enable) 21704712f3fSMaxime Bizon { 21804712f3fSMaxime Bizon if (!BCMCPU_IS_6368()) 21904712f3fSMaxime Bizon return; 22004712f3fSMaxime Bizon 221d9831a41SFlorian Fainelli bcm_hwclock_set(CKCTL_6368_SAR_EN | 22204712f3fSMaxime Bizon CKCTL_6368_SWPKT_SAR_EN, enable); 22304712f3fSMaxime Bizon 22404712f3fSMaxime Bizon if (enable) { 22504712f3fSMaxime Bizon u32 val; 22604712f3fSMaxime Bizon 22704712f3fSMaxime Bizon /* reset sar core afer clock change */ 22804712f3fSMaxime Bizon val = bcm_perf_readl(PERF_SOFTRESET_6368_REG); 22904712f3fSMaxime Bizon val &= ~SOFTRESET_6368_SAR_MASK; 23004712f3fSMaxime Bizon bcm_perf_writel(val, PERF_SOFTRESET_6368_REG); 23104712f3fSMaxime Bizon mdelay(1); 23204712f3fSMaxime Bizon val |= SOFTRESET_6368_SAR_MASK; 23304712f3fSMaxime Bizon bcm_perf_writel(val, PERF_SOFTRESET_6368_REG); 23404712f3fSMaxime Bizon mdelay(1); 23504712f3fSMaxime Bizon } 23604712f3fSMaxime Bizon } 23704712f3fSMaxime Bizon 23804712f3fSMaxime Bizon 23904712f3fSMaxime Bizon static struct clk clk_xtm = { 24004712f3fSMaxime Bizon .set = xtm_set, 24104712f3fSMaxime Bizon }; 24204712f3fSMaxime Bizon 24304712f3fSMaxime Bizon /* 2440b55561bSFlorian Fainelli * IPsec clock 2450b55561bSFlorian Fainelli */ 2460b55561bSFlorian Fainelli static void ipsec_set(struct clk *clk, int enable) 2470b55561bSFlorian Fainelli { 2480b55561bSFlorian Fainelli bcm_hwclock_set(CKCTL_6368_IPSEC_EN, enable); 2490b55561bSFlorian Fainelli } 2500b55561bSFlorian Fainelli 2510b55561bSFlorian Fainelli static struct clk clk_ipsec = { 2520b55561bSFlorian Fainelli .set = ipsec_set, 2530b55561bSFlorian Fainelli }; 2540b55561bSFlorian Fainelli 2550b55561bSFlorian Fainelli /* 256e7300d04SMaxime Bizon * Internal peripheral clock 257e7300d04SMaxime Bizon */ 258e7300d04SMaxime Bizon static struct clk clk_periph = { 259e7300d04SMaxime Bizon .rate = (50 * 1000 * 1000), 260e7300d04SMaxime Bizon }; 261e7300d04SMaxime Bizon 262e7300d04SMaxime Bizon 263e7300d04SMaxime Bizon /* 264e7300d04SMaxime Bizon * Linux clock API implementation 265e7300d04SMaxime Bizon */ 266e7300d04SMaxime Bizon int clk_enable(struct clk *clk) 267e7300d04SMaxime Bizon { 268e7300d04SMaxime Bizon mutex_lock(&clocks_mutex); 269e7300d04SMaxime Bizon clk_enable_unlocked(clk); 270e7300d04SMaxime Bizon mutex_unlock(&clocks_mutex); 271e7300d04SMaxime Bizon return 0; 272e7300d04SMaxime Bizon } 273e7300d04SMaxime Bizon 274e7300d04SMaxime Bizon EXPORT_SYMBOL(clk_enable); 275e7300d04SMaxime Bizon 276e7300d04SMaxime Bizon void clk_disable(struct clk *clk) 277e7300d04SMaxime Bizon { 278e7300d04SMaxime Bizon mutex_lock(&clocks_mutex); 279e7300d04SMaxime Bizon clk_disable_unlocked(clk); 280e7300d04SMaxime Bizon mutex_unlock(&clocks_mutex); 281e7300d04SMaxime Bizon } 282e7300d04SMaxime Bizon 283e7300d04SMaxime Bizon EXPORT_SYMBOL(clk_disable); 284e7300d04SMaxime Bizon 285e7300d04SMaxime Bizon unsigned long clk_get_rate(struct clk *clk) 286e7300d04SMaxime Bizon { 287e7300d04SMaxime Bizon return clk->rate; 288e7300d04SMaxime Bizon } 289e7300d04SMaxime Bizon 290e7300d04SMaxime Bizon EXPORT_SYMBOL(clk_get_rate); 291e7300d04SMaxime Bizon 292e7300d04SMaxime Bizon struct clk *clk_get(struct device *dev, const char *id) 293e7300d04SMaxime Bizon { 294e7300d04SMaxime Bizon if (!strcmp(id, "enet0")) 295e7300d04SMaxime Bizon return &clk_enet0; 296e7300d04SMaxime Bizon if (!strcmp(id, "enet1")) 297e7300d04SMaxime Bizon return &clk_enet1; 29804712f3fSMaxime Bizon if (!strcmp(id, "enetsw")) 29904712f3fSMaxime Bizon return &clk_enetsw; 300e7300d04SMaxime Bizon if (!strcmp(id, "ephy")) 301e7300d04SMaxime Bizon return &clk_ephy; 302e7300d04SMaxime Bizon if (!strcmp(id, "usbh")) 303e7300d04SMaxime Bizon return &clk_usbh; 304*dd89d60cSKevin Cernekee if (!strcmp(id, "usbd")) 305*dd89d60cSKevin Cernekee return &clk_usbd; 306e7300d04SMaxime Bizon if (!strcmp(id, "spi")) 307e7300d04SMaxime Bizon return &clk_spi; 30804712f3fSMaxime Bizon if (!strcmp(id, "xtm")) 30904712f3fSMaxime Bizon return &clk_xtm; 310e7300d04SMaxime Bizon if (!strcmp(id, "periph")) 311e7300d04SMaxime Bizon return &clk_periph; 312e7300d04SMaxime Bizon if (BCMCPU_IS_6358() && !strcmp(id, "pcm")) 313e7300d04SMaxime Bizon return &clk_pcm; 3140b55561bSFlorian Fainelli if (BCMCPU_IS_6368() && !strcmp(id, "ipsec")) 3150b55561bSFlorian Fainelli return &clk_ipsec; 316e7300d04SMaxime Bizon return ERR_PTR(-ENOENT); 317e7300d04SMaxime Bizon } 318e7300d04SMaxime Bizon 319e7300d04SMaxime Bizon EXPORT_SYMBOL(clk_get); 320e7300d04SMaxime Bizon 321e7300d04SMaxime Bizon void clk_put(struct clk *clk) 322e7300d04SMaxime Bizon { 323e7300d04SMaxime Bizon } 324e7300d04SMaxime Bizon 325e7300d04SMaxime Bizon EXPORT_SYMBOL(clk_put); 326