1e7300d04SMaxime Bizon /* 2e7300d04SMaxime Bizon * This file is subject to the terms and conditions of the GNU General Public 3e7300d04SMaxime Bizon * License. See the file "COPYING" in the main directory of this archive 4e7300d04SMaxime Bizon * for more details. 5e7300d04SMaxime Bizon * 6e7300d04SMaxime Bizon * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr> 7e7300d04SMaxime Bizon */ 8e7300d04SMaxime Bizon 9e7300d04SMaxime Bizon #include <linux/module.h> 10e7300d04SMaxime Bizon #include <linux/mutex.h> 11e7300d04SMaxime Bizon #include <linux/err.h> 12e7300d04SMaxime Bizon #include <linux/clk.h> 1304712f3fSMaxime Bizon #include <linux/delay.h> 14e7300d04SMaxime Bizon #include <bcm63xx_cpu.h> 15e7300d04SMaxime Bizon #include <bcm63xx_io.h> 16e7300d04SMaxime Bizon #include <bcm63xx_regs.h> 17ba00e2e5SJonas Gorski #include <bcm63xx_reset.h> 18*042df4faSJonas Gorski 19*042df4faSJonas Gorski struct clk { 20*042df4faSJonas Gorski void (*set)(struct clk *, int); 21*042df4faSJonas Gorski unsigned int rate; 22*042df4faSJonas Gorski unsigned int usage; 23*042df4faSJonas Gorski int id; 24*042df4faSJonas Gorski }; 25e7300d04SMaxime Bizon 26e7300d04SMaxime Bizon static DEFINE_MUTEX(clocks_mutex); 27e7300d04SMaxime Bizon 28e7300d04SMaxime Bizon 29e7300d04SMaxime Bizon static void clk_enable_unlocked(struct clk *clk) 30e7300d04SMaxime Bizon { 31e7300d04SMaxime Bizon if (clk->set && (clk->usage++) == 0) 32e7300d04SMaxime Bizon clk->set(clk, 1); 33e7300d04SMaxime Bizon } 34e7300d04SMaxime Bizon 35e7300d04SMaxime Bizon static void clk_disable_unlocked(struct clk *clk) 36e7300d04SMaxime Bizon { 37e7300d04SMaxime Bizon if (clk->set && (--clk->usage) == 0) 38e7300d04SMaxime Bizon clk->set(clk, 0); 39e7300d04SMaxime Bizon } 40e7300d04SMaxime Bizon 41e7300d04SMaxime Bizon static void bcm_hwclock_set(u32 mask, int enable) 42e7300d04SMaxime Bizon { 43e7300d04SMaxime Bizon u32 reg; 44e7300d04SMaxime Bizon 45e7300d04SMaxime Bizon reg = bcm_perf_readl(PERF_CKCTL_REG); 46e7300d04SMaxime Bizon if (enable) 47e7300d04SMaxime Bizon reg |= mask; 48e7300d04SMaxime Bizon else 49e7300d04SMaxime Bizon reg &= ~mask; 50e7300d04SMaxime Bizon bcm_perf_writel(reg, PERF_CKCTL_REG); 51e7300d04SMaxime Bizon } 52e7300d04SMaxime Bizon 53e7300d04SMaxime Bizon /* 54e7300d04SMaxime Bizon * Ethernet MAC "misc" clock: dma clocks and main clock on 6348 55e7300d04SMaxime Bizon */ 56e7300d04SMaxime Bizon static void enet_misc_set(struct clk *clk, int enable) 57e7300d04SMaxime Bizon { 58e7300d04SMaxime Bizon u32 mask; 59e7300d04SMaxime Bizon 60e7300d04SMaxime Bizon if (BCMCPU_IS_6338()) 61e7300d04SMaxime Bizon mask = CKCTL_6338_ENET_EN; 62e7300d04SMaxime Bizon else if (BCMCPU_IS_6345()) 63e7300d04SMaxime Bizon mask = CKCTL_6345_ENET_EN; 64e7300d04SMaxime Bizon else if (BCMCPU_IS_6348()) 65e7300d04SMaxime Bizon mask = CKCTL_6348_ENET_EN; 66e7300d04SMaxime Bizon else 67e7300d04SMaxime Bizon /* BCMCPU_IS_6358 */ 68e7300d04SMaxime Bizon mask = CKCTL_6358_EMUSB_EN; 69e7300d04SMaxime Bizon bcm_hwclock_set(mask, enable); 70e7300d04SMaxime Bizon } 71e7300d04SMaxime Bizon 72e7300d04SMaxime Bizon static struct clk clk_enet_misc = { 73e7300d04SMaxime Bizon .set = enet_misc_set, 74e7300d04SMaxime Bizon }; 75e7300d04SMaxime Bizon 76e7300d04SMaxime Bizon /* 77e7300d04SMaxime Bizon * Ethernet MAC clocks: only revelant on 6358, silently enable misc 78e7300d04SMaxime Bizon * clocks 79e7300d04SMaxime Bizon */ 80e7300d04SMaxime Bizon static void enetx_set(struct clk *clk, int enable) 81e7300d04SMaxime Bizon { 82e7300d04SMaxime Bizon if (enable) 83e7300d04SMaxime Bizon clk_enable_unlocked(&clk_enet_misc); 84e7300d04SMaxime Bizon else 85e7300d04SMaxime Bizon clk_disable_unlocked(&clk_enet_misc); 86e7300d04SMaxime Bizon 87e7300d04SMaxime Bizon if (BCMCPU_IS_6358()) { 88e7300d04SMaxime Bizon u32 mask; 89e7300d04SMaxime Bizon 90e7300d04SMaxime Bizon if (clk->id == 0) 91e7300d04SMaxime Bizon mask = CKCTL_6358_ENET0_EN; 92e7300d04SMaxime Bizon else 93e7300d04SMaxime Bizon mask = CKCTL_6358_ENET1_EN; 94e7300d04SMaxime Bizon bcm_hwclock_set(mask, enable); 95e7300d04SMaxime Bizon } 96e7300d04SMaxime Bizon } 97e7300d04SMaxime Bizon 98e7300d04SMaxime Bizon static struct clk clk_enet0 = { 99e7300d04SMaxime Bizon .id = 0, 100e7300d04SMaxime Bizon .set = enetx_set, 101e7300d04SMaxime Bizon }; 102e7300d04SMaxime Bizon 103e7300d04SMaxime Bizon static struct clk clk_enet1 = { 104e7300d04SMaxime Bizon .id = 1, 105e7300d04SMaxime Bizon .set = enetx_set, 106e7300d04SMaxime Bizon }; 107e7300d04SMaxime Bizon 108e7300d04SMaxime Bizon /* 109e7300d04SMaxime Bizon * Ethernet PHY clock 110e7300d04SMaxime Bizon */ 111e7300d04SMaxime Bizon static void ephy_set(struct clk *clk, int enable) 112e7300d04SMaxime Bizon { 113e7300d04SMaxime Bizon if (!BCMCPU_IS_6358()) 114e7300d04SMaxime Bizon return; 115e7300d04SMaxime Bizon bcm_hwclock_set(CKCTL_6358_EPHY_EN, enable); 116e7300d04SMaxime Bizon } 117e7300d04SMaxime Bizon 118e7300d04SMaxime Bizon 119e7300d04SMaxime Bizon static struct clk clk_ephy = { 120e7300d04SMaxime Bizon .set = ephy_set, 121e7300d04SMaxime Bizon }; 122e7300d04SMaxime Bizon 123e7300d04SMaxime Bizon /* 12404712f3fSMaxime Bizon * Ethernet switch clock 12504712f3fSMaxime Bizon */ 12604712f3fSMaxime Bizon static void enetsw_set(struct clk *clk, int enable) 12704712f3fSMaxime Bizon { 12804712f3fSMaxime Bizon if (!BCMCPU_IS_6368()) 12904712f3fSMaxime Bizon return; 130d9831a41SFlorian Fainelli bcm_hwclock_set(CKCTL_6368_ROBOSW_EN | 13104712f3fSMaxime Bizon CKCTL_6368_SWPKT_USB_EN | 13204712f3fSMaxime Bizon CKCTL_6368_SWPKT_SAR_EN, enable); 13304712f3fSMaxime Bizon if (enable) { 13404712f3fSMaxime Bizon /* reset switch core afer clock change */ 135ba00e2e5SJonas Gorski bcm63xx_core_set_reset(BCM63XX_RESET_ENETSW, 1); 13604712f3fSMaxime Bizon msleep(10); 137ba00e2e5SJonas Gorski bcm63xx_core_set_reset(BCM63XX_RESET_ENETSW, 0); 13804712f3fSMaxime Bizon msleep(10); 13904712f3fSMaxime Bizon } 14004712f3fSMaxime Bizon } 14104712f3fSMaxime Bizon 14204712f3fSMaxime Bizon static struct clk clk_enetsw = { 14304712f3fSMaxime Bizon .set = enetsw_set, 14404712f3fSMaxime Bizon }; 14504712f3fSMaxime Bizon 14604712f3fSMaxime Bizon /* 147e7300d04SMaxime Bizon * PCM clock 148e7300d04SMaxime Bizon */ 149e7300d04SMaxime Bizon static void pcm_set(struct clk *clk, int enable) 150e7300d04SMaxime Bizon { 151e7300d04SMaxime Bizon if (!BCMCPU_IS_6358()) 152e7300d04SMaxime Bizon return; 153e7300d04SMaxime Bizon bcm_hwclock_set(CKCTL_6358_PCM_EN, enable); 154e7300d04SMaxime Bizon } 155e7300d04SMaxime Bizon 156e7300d04SMaxime Bizon static struct clk clk_pcm = { 157e7300d04SMaxime Bizon .set = pcm_set, 158e7300d04SMaxime Bizon }; 159e7300d04SMaxime Bizon 160e7300d04SMaxime Bizon /* 161e7300d04SMaxime Bizon * USB host clock 162e7300d04SMaxime Bizon */ 163e7300d04SMaxime Bizon static void usbh_set(struct clk *clk, int enable) 164e7300d04SMaxime Bizon { 165dd89d60cSKevin Cernekee if (BCMCPU_IS_6328()) 166dd89d60cSKevin Cernekee bcm_hwclock_set(CKCTL_6328_USBH_EN, enable); 167dd89d60cSKevin Cernekee else if (BCMCPU_IS_6348()) 168e7300d04SMaxime Bizon bcm_hwclock_set(CKCTL_6348_USBH_EN, enable); 16904712f3fSMaxime Bizon else if (BCMCPU_IS_6368()) 170d9831a41SFlorian Fainelli bcm_hwclock_set(CKCTL_6368_USBH_EN, enable); 171e7300d04SMaxime Bizon } 172e7300d04SMaxime Bizon 173e7300d04SMaxime Bizon static struct clk clk_usbh = { 174e7300d04SMaxime Bizon .set = usbh_set, 175e7300d04SMaxime Bizon }; 176e7300d04SMaxime Bizon 177e7300d04SMaxime Bizon /* 178dd89d60cSKevin Cernekee * USB device clock 179dd89d60cSKevin Cernekee */ 180dd89d60cSKevin Cernekee static void usbd_set(struct clk *clk, int enable) 181dd89d60cSKevin Cernekee { 182dd89d60cSKevin Cernekee if (BCMCPU_IS_6328()) 183dd89d60cSKevin Cernekee bcm_hwclock_set(CKCTL_6328_USBD_EN, enable); 184dd89d60cSKevin Cernekee else if (BCMCPU_IS_6368()) 185dd89d60cSKevin Cernekee bcm_hwclock_set(CKCTL_6368_USBD_EN, enable); 186dd89d60cSKevin Cernekee } 187dd89d60cSKevin Cernekee 188dd89d60cSKevin Cernekee static struct clk clk_usbd = { 189dd89d60cSKevin Cernekee .set = usbd_set, 190dd89d60cSKevin Cernekee }; 191dd89d60cSKevin Cernekee 192dd89d60cSKevin Cernekee /* 193e7300d04SMaxime Bizon * SPI clock 194e7300d04SMaxime Bizon */ 195e7300d04SMaxime Bizon static void spi_set(struct clk *clk, int enable) 196e7300d04SMaxime Bizon { 197e7300d04SMaxime Bizon u32 mask; 198e7300d04SMaxime Bizon 199e7300d04SMaxime Bizon if (BCMCPU_IS_6338()) 200e7300d04SMaxime Bizon mask = CKCTL_6338_SPI_EN; 201e7300d04SMaxime Bizon else if (BCMCPU_IS_6348()) 202e7300d04SMaxime Bizon mask = CKCTL_6348_SPI_EN; 20319372b24SFlorian Fainelli else if (BCMCPU_IS_6358()) 204e7300d04SMaxime Bizon mask = CKCTL_6358_SPI_EN; 20508a41d12SJonas Gorski else if (BCMCPU_IS_6362()) 20608a41d12SJonas Gorski mask = CKCTL_6362_SPI_EN; 20719372b24SFlorian Fainelli else 20819372b24SFlorian Fainelli /* BCMCPU_IS_6368 */ 20919372b24SFlorian Fainelli mask = CKCTL_6368_SPI_EN; 210e7300d04SMaxime Bizon bcm_hwclock_set(mask, enable); 211e7300d04SMaxime Bizon } 212e7300d04SMaxime Bizon 213e7300d04SMaxime Bizon static struct clk clk_spi = { 214e7300d04SMaxime Bizon .set = spi_set, 215e7300d04SMaxime Bizon }; 216e7300d04SMaxime Bizon 217e7300d04SMaxime Bizon /* 21804712f3fSMaxime Bizon * XTM clock 21904712f3fSMaxime Bizon */ 22004712f3fSMaxime Bizon static void xtm_set(struct clk *clk, int enable) 22104712f3fSMaxime Bizon { 22204712f3fSMaxime Bizon if (!BCMCPU_IS_6368()) 22304712f3fSMaxime Bizon return; 22404712f3fSMaxime Bizon 225d9831a41SFlorian Fainelli bcm_hwclock_set(CKCTL_6368_SAR_EN | 22604712f3fSMaxime Bizon CKCTL_6368_SWPKT_SAR_EN, enable); 22704712f3fSMaxime Bizon 22804712f3fSMaxime Bizon if (enable) { 22904712f3fSMaxime Bizon /* reset sar core afer clock change */ 230ba00e2e5SJonas Gorski bcm63xx_core_set_reset(BCM63XX_RESET_SAR, 1); 23104712f3fSMaxime Bizon mdelay(1); 232ba00e2e5SJonas Gorski bcm63xx_core_set_reset(BCM63XX_RESET_SAR, 0); 23304712f3fSMaxime Bizon mdelay(1); 23404712f3fSMaxime Bizon } 23504712f3fSMaxime Bizon } 23604712f3fSMaxime Bizon 23704712f3fSMaxime Bizon 23804712f3fSMaxime Bizon static struct clk clk_xtm = { 23904712f3fSMaxime Bizon .set = xtm_set, 24004712f3fSMaxime Bizon }; 24104712f3fSMaxime Bizon 24204712f3fSMaxime Bizon /* 2430b55561bSFlorian Fainelli * IPsec clock 2440b55561bSFlorian Fainelli */ 2450b55561bSFlorian Fainelli static void ipsec_set(struct clk *clk, int enable) 2460b55561bSFlorian Fainelli { 2470b55561bSFlorian Fainelli bcm_hwclock_set(CKCTL_6368_IPSEC_EN, enable); 2480b55561bSFlorian Fainelli } 2490b55561bSFlorian Fainelli 2500b55561bSFlorian Fainelli static struct clk clk_ipsec = { 2510b55561bSFlorian Fainelli .set = ipsec_set, 2520b55561bSFlorian Fainelli }; 2530b55561bSFlorian Fainelli 2540b55561bSFlorian Fainelli /* 255f2d1035eSJonas Gorski * PCIe clock 256f2d1035eSJonas Gorski */ 257f2d1035eSJonas Gorski 258f2d1035eSJonas Gorski static void pcie_set(struct clk *clk, int enable) 259f2d1035eSJonas Gorski { 260f2d1035eSJonas Gorski bcm_hwclock_set(CKCTL_6328_PCIE_EN, enable); 261f2d1035eSJonas Gorski } 262f2d1035eSJonas Gorski 263f2d1035eSJonas Gorski static struct clk clk_pcie = { 264f2d1035eSJonas Gorski .set = pcie_set, 265f2d1035eSJonas Gorski }; 266f2d1035eSJonas Gorski 267f2d1035eSJonas Gorski /* 268e7300d04SMaxime Bizon * Internal peripheral clock 269e7300d04SMaxime Bizon */ 270e7300d04SMaxime Bizon static struct clk clk_periph = { 271e7300d04SMaxime Bizon .rate = (50 * 1000 * 1000), 272e7300d04SMaxime Bizon }; 273e7300d04SMaxime Bizon 274e7300d04SMaxime Bizon 275e7300d04SMaxime Bizon /* 276e7300d04SMaxime Bizon * Linux clock API implementation 277e7300d04SMaxime Bizon */ 278e7300d04SMaxime Bizon int clk_enable(struct clk *clk) 279e7300d04SMaxime Bizon { 280e7300d04SMaxime Bizon mutex_lock(&clocks_mutex); 281e7300d04SMaxime Bizon clk_enable_unlocked(clk); 282e7300d04SMaxime Bizon mutex_unlock(&clocks_mutex); 283e7300d04SMaxime Bizon return 0; 284e7300d04SMaxime Bizon } 285e7300d04SMaxime Bizon 286e7300d04SMaxime Bizon EXPORT_SYMBOL(clk_enable); 287e7300d04SMaxime Bizon 288e7300d04SMaxime Bizon void clk_disable(struct clk *clk) 289e7300d04SMaxime Bizon { 290e7300d04SMaxime Bizon mutex_lock(&clocks_mutex); 291e7300d04SMaxime Bizon clk_disable_unlocked(clk); 292e7300d04SMaxime Bizon mutex_unlock(&clocks_mutex); 293e7300d04SMaxime Bizon } 294e7300d04SMaxime Bizon 295e7300d04SMaxime Bizon EXPORT_SYMBOL(clk_disable); 296e7300d04SMaxime Bizon 297e7300d04SMaxime Bizon unsigned long clk_get_rate(struct clk *clk) 298e7300d04SMaxime Bizon { 299e7300d04SMaxime Bizon return clk->rate; 300e7300d04SMaxime Bizon } 301e7300d04SMaxime Bizon 302e7300d04SMaxime Bizon EXPORT_SYMBOL(clk_get_rate); 303e7300d04SMaxime Bizon 304e7300d04SMaxime Bizon struct clk *clk_get(struct device *dev, const char *id) 305e7300d04SMaxime Bizon { 306e7300d04SMaxime Bizon if (!strcmp(id, "enet0")) 307e7300d04SMaxime Bizon return &clk_enet0; 308e7300d04SMaxime Bizon if (!strcmp(id, "enet1")) 309e7300d04SMaxime Bizon return &clk_enet1; 31004712f3fSMaxime Bizon if (!strcmp(id, "enetsw")) 31104712f3fSMaxime Bizon return &clk_enetsw; 312e7300d04SMaxime Bizon if (!strcmp(id, "ephy")) 313e7300d04SMaxime Bizon return &clk_ephy; 314e7300d04SMaxime Bizon if (!strcmp(id, "usbh")) 315e7300d04SMaxime Bizon return &clk_usbh; 316dd89d60cSKevin Cernekee if (!strcmp(id, "usbd")) 317dd89d60cSKevin Cernekee return &clk_usbd; 318e7300d04SMaxime Bizon if (!strcmp(id, "spi")) 319e7300d04SMaxime Bizon return &clk_spi; 32004712f3fSMaxime Bizon if (!strcmp(id, "xtm")) 32104712f3fSMaxime Bizon return &clk_xtm; 322e7300d04SMaxime Bizon if (!strcmp(id, "periph")) 323e7300d04SMaxime Bizon return &clk_periph; 324e7300d04SMaxime Bizon if (BCMCPU_IS_6358() && !strcmp(id, "pcm")) 325e7300d04SMaxime Bizon return &clk_pcm; 3260b55561bSFlorian Fainelli if (BCMCPU_IS_6368() && !strcmp(id, "ipsec")) 3270b55561bSFlorian Fainelli return &clk_ipsec; 328f2d1035eSJonas Gorski if (BCMCPU_IS_6328() && !strcmp(id, "pcie")) 329f2d1035eSJonas Gorski return &clk_pcie; 330e7300d04SMaxime Bizon return ERR_PTR(-ENOENT); 331e7300d04SMaxime Bizon } 332e7300d04SMaxime Bizon 333e7300d04SMaxime Bizon EXPORT_SYMBOL(clk_get); 334e7300d04SMaxime Bizon 335e7300d04SMaxime Bizon void clk_put(struct clk *clk) 336e7300d04SMaxime Bizon { 337e7300d04SMaxime Bizon } 338e7300d04SMaxime Bizon 339e7300d04SMaxime Bizon EXPORT_SYMBOL(clk_put); 340