11c0c13ebSAurelien Jarno /* 21c0c13ebSAurelien Jarno * Copyright (C) 2004 Florian Schirmer <jolt@tuxbox.org> 31c0c13ebSAurelien Jarno * Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org> 4eb032b98SMichael Büsch * Copyright (C) 2006 Michael Buesch <m@bues.ch> 5121915c4SWaldemar Brodkorb * Copyright (C) 2010 Waldemar Brodkorb <wbx@openadk.org> 6f384b3ddSHauke Mehrtens * Copyright (C) 2010-2012 Hauke Mehrtens <hauke@hauke-m.de> 71c0c13ebSAurelien Jarno * 81c0c13ebSAurelien Jarno * This program is free software; you can redistribute it and/or modify it 91c0c13ebSAurelien Jarno * under the terms of the GNU General Public License as published by the 101c0c13ebSAurelien Jarno * Free Software Foundation; either version 2 of the License, or (at your 111c0c13ebSAurelien Jarno * option) any later version. 121c0c13ebSAurelien Jarno * 131c0c13ebSAurelien Jarno * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 141c0c13ebSAurelien Jarno * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 151c0c13ebSAurelien Jarno * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN 161c0c13ebSAurelien Jarno * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 171c0c13ebSAurelien Jarno * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 181c0c13ebSAurelien Jarno * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 191c0c13ebSAurelien Jarno * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 201c0c13ebSAurelien Jarno * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 211c0c13ebSAurelien Jarno * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 221c0c13ebSAurelien Jarno * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 231c0c13ebSAurelien Jarno * 241c0c13ebSAurelien Jarno * You should have received a copy of the GNU General Public License along 251c0c13ebSAurelien Jarno * with this program; if not, write to the Free Software Foundation, Inc., 261c0c13ebSAurelien Jarno * 675 Mass Ave, Cambridge, MA 02139, USA. 271c0c13ebSAurelien Jarno */ 281c0c13ebSAurelien Jarno 29515fa75dSRafał Miłecki #include "bcm47xx_private.h" 30515fa75dSRafał Miłecki 31cae39d13SPaul Gortmaker #include <linux/export.h> 321c0c13ebSAurelien Jarno #include <linux/types.h> 33b04138b3SHauke Mehrtens #include <linux/ethtool.h> 34b04138b3SHauke Mehrtens #include <linux/phy.h> 35b04138b3SHauke Mehrtens #include <linux/phy_fixed.h> 361c0c13ebSAurelien Jarno #include <linux/ssb/ssb.h> 37b06f3e19SAurelien Jarno #include <linux/ssb/ssb_embedded.h> 38c1d1c5d4SHauke Mehrtens #include <linux/bcma/bcma_soc.h> 3925e5fb97SAurelien Jarno #include <asm/bootinfo.h> 4076b573e4SHauke Mehrtens #include <asm/idle.h> 417da4b6f8SHauke Mehrtens #include <asm/prom.h> 421c0c13ebSAurelien Jarno #include <asm/reboot.h> 431c0c13ebSAurelien Jarno #include <asm/time.h> 441c0c13ebSAurelien Jarno #include <bcm47xx.h> 45786c497aSHauke Mehrtens #include <bcm47xx_board.h> 461c0c13ebSAurelien Jarno 4708ccf572SHauke Mehrtens union bcm47xx_bus bcm47xx_bus; 4808ccf572SHauke Mehrtens EXPORT_SYMBOL(bcm47xx_bus); 4908ccf572SHauke Mehrtens 5008ccf572SHauke Mehrtens enum bcm47xx_bus_type bcm47xx_bus_type; 5108ccf572SHauke Mehrtens EXPORT_SYMBOL(bcm47xx_bus_type); 521c0c13ebSAurelien Jarno 531c0c13ebSAurelien Jarno static void bcm47xx_machine_restart(char *command) 541c0c13ebSAurelien Jarno { 55d548ca6bSRafał Miłecki pr_alert("Please stand by while rebooting the system...\n"); 561c0c13ebSAurelien Jarno local_irq_disable(); 571c0c13ebSAurelien Jarno /* Set the watchdog timer to reset immediately */ 5808ccf572SHauke Mehrtens switch (bcm47xx_bus_type) { 59a656ffcbSHauke Mehrtens #ifdef CONFIG_BCM47XX_SSB 6008ccf572SHauke Mehrtens case BCM47XX_BUS_TYPE_SSB: 612727cab2SHauke Mehrtens if (bcm47xx_bus.ssb.chip_id == 0x4785) 622727cab2SHauke Mehrtens write_c0_diag4(1 << 22); 632727cab2SHauke Mehrtens ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 1); 642727cab2SHauke Mehrtens if (bcm47xx_bus.ssb.chip_id == 0x4785) { 652727cab2SHauke Mehrtens __asm__ __volatile__( 662727cab2SHauke Mehrtens ".set\tmips3\n\t" 672727cab2SHauke Mehrtens "sync\n\t" 682727cab2SHauke Mehrtens "wait\n\t" 692727cab2SHauke Mehrtens ".set\tmips0"); 702727cab2SHauke Mehrtens } 7108ccf572SHauke Mehrtens break; 72a656ffcbSHauke Mehrtens #endif 73c1d1c5d4SHauke Mehrtens #ifdef CONFIG_BCM47XX_BCMA 74c1d1c5d4SHauke Mehrtens case BCM47XX_BUS_TYPE_BCMA: 752727cab2SHauke Mehrtens bcma_chipco_watchdog_timer_set(&bcm47xx_bus.bcma.bus.drv_cc, 1); 76c1d1c5d4SHauke Mehrtens break; 77c1d1c5d4SHauke Mehrtens #endif 7808ccf572SHauke Mehrtens } 791c0c13ebSAurelien Jarno while (1) 801c0c13ebSAurelien Jarno cpu_relax(); 811c0c13ebSAurelien Jarno } 821c0c13ebSAurelien Jarno 831c0c13ebSAurelien Jarno static void bcm47xx_machine_halt(void) 841c0c13ebSAurelien Jarno { 851c0c13ebSAurelien Jarno /* Disable interrupts and watchdog and spin forever */ 861c0c13ebSAurelien Jarno local_irq_disable(); 8708ccf572SHauke Mehrtens switch (bcm47xx_bus_type) { 88a656ffcbSHauke Mehrtens #ifdef CONFIG_BCM47XX_SSB 8908ccf572SHauke Mehrtens case BCM47XX_BUS_TYPE_SSB: 9008ccf572SHauke Mehrtens ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 0); 9108ccf572SHauke Mehrtens break; 92a656ffcbSHauke Mehrtens #endif 93c1d1c5d4SHauke Mehrtens #ifdef CONFIG_BCM47XX_BCMA 94c1d1c5d4SHauke Mehrtens case BCM47XX_BUS_TYPE_BCMA: 95c1d1c5d4SHauke Mehrtens bcma_chipco_watchdog_timer_set(&bcm47xx_bus.bcma.bus.drv_cc, 0); 96c1d1c5d4SHauke Mehrtens break; 97c1d1c5d4SHauke Mehrtens #endif 9808ccf572SHauke Mehrtens } 991c0c13ebSAurelien Jarno while (1) 1001c0c13ebSAurelien Jarno cpu_relax(); 1011c0c13ebSAurelien Jarno } 1021c0c13ebSAurelien Jarno 103a656ffcbSHauke Mehrtens #ifdef CONFIG_BCM47XX_SSB 10408ccf572SHauke Mehrtens static void __init bcm47xx_register_ssb(void) 1051c0c13ebSAurelien Jarno { 1061c0c13ebSAurelien Jarno int err; 1071690a7f9SHauke Mehrtens char buf[100]; 1081690a7f9SHauke Mehrtens struct ssb_mipscore *mcore; 1091c0c13ebSAurelien Jarno 110*541c9a84SRafał Miłecki err = ssb_bus_host_soc_register(&bcm47xx_bus.ssb, SSB_ENUM_BASE); 1111c0c13ebSAurelien Jarno if (err) 112ab75dc02SRalf Baechle panic("Failed to initialize SSB bus (err %d)", err); 1131c0c13ebSAurelien Jarno 11408ccf572SHauke Mehrtens mcore = &bcm47xx_bus.ssb.mipscore; 115111bd981SHauke Mehrtens if (bcm47xx_nvram_getenv("kernel_args", buf, sizeof(buf)) >= 0) { 1161690a7f9SHauke Mehrtens if (strstr(buf, "console=ttyS1")) { 1171690a7f9SHauke Mehrtens struct ssb_serial_port port; 1181690a7f9SHauke Mehrtens 119d548ca6bSRafał Miłecki pr_debug("Swapping serial ports!\n"); 1201690a7f9SHauke Mehrtens /* swap serial ports */ 1211690a7f9SHauke Mehrtens memcpy(&port, &mcore->serial_ports[0], sizeof(port)); 1221690a7f9SHauke Mehrtens memcpy(&mcore->serial_ports[0], &mcore->serial_ports[1], 1231690a7f9SHauke Mehrtens sizeof(port)); 1241690a7f9SHauke Mehrtens memcpy(&mcore->serial_ports[1], &port, sizeof(port)); 1251690a7f9SHauke Mehrtens } 1261690a7f9SHauke Mehrtens } 12708ccf572SHauke Mehrtens } 128a656ffcbSHauke Mehrtens #endif 12908ccf572SHauke Mehrtens 130c1d1c5d4SHauke Mehrtens #ifdef CONFIG_BCM47XX_BCMA 131c1d1c5d4SHauke Mehrtens static void __init bcm47xx_register_bcma(void) 132c1d1c5d4SHauke Mehrtens { 133c1d1c5d4SHauke Mehrtens int err; 134c1d1c5d4SHauke Mehrtens 135c1d1c5d4SHauke Mehrtens err = bcma_host_soc_register(&bcm47xx_bus.bcma); 136c1d1c5d4SHauke Mehrtens if (err) 137a395135dSRafał Miłecki panic("Failed to register BCMA bus (err %d)", err); 138c1d1c5d4SHauke Mehrtens } 139c1d1c5d4SHauke Mehrtens #endif 140c1d1c5d4SHauke Mehrtens 141e5810fa0SRafał Miłecki /* 142e5810fa0SRafał Miłecki * Memory setup is done in the early part of MIPS's arch_mem_init. It's supposed 143e5810fa0SRafał Miłecki * to detect memory and record it with add_memory_region. 144e5810fa0SRafał Miłecki * Any extra initializaion performed here must not use kmalloc or bootmem. 145e5810fa0SRafał Miłecki */ 14608ccf572SHauke Mehrtens void __init plat_mem_setup(void) 14708ccf572SHauke Mehrtens { 14808ccf572SHauke Mehrtens struct cpuinfo_mips *c = ¤t_cpu_data; 14908ccf572SHauke Mehrtens 150442e14a2SSteven J. Hill if ((c->cputype == CPU_74K) || (c->cputype == CPU_1074K)) { 151d548ca6bSRafał Miłecki pr_info("Using bcma bus\n"); 152c1d1c5d4SHauke Mehrtens #ifdef CONFIG_BCM47XX_BCMA 153c1d1c5d4SHauke Mehrtens bcm47xx_bus_type = BCM47XX_BUS_TYPE_BCMA; 154a59da8fbSRafał Miłecki bcm47xx_sprom_register_fallbacks(); 155c1d1c5d4SHauke Mehrtens bcm47xx_register_bcma(); 156dd573285SHauke Mehrtens bcm47xx_set_system_type(bcm47xx_bus.bcma.bus.chipinfo.id); 1576ee1d934SRafał Miłecki #ifdef CONFIG_HIGHMEM 1586ee1d934SRafał Miłecki bcm47xx_prom_highmem_init(); 1596ee1d934SRafał Miłecki #endif 160c1d1c5d4SHauke Mehrtens #endif 161c1d1c5d4SHauke Mehrtens } else { 162d548ca6bSRafał Miłecki pr_info("Using ssb bus\n"); 163a656ffcbSHauke Mehrtens #ifdef CONFIG_BCM47XX_SSB 16408ccf572SHauke Mehrtens bcm47xx_bus_type = BCM47XX_BUS_TYPE_SSB; 165a59da8fbSRafał Miłecki bcm47xx_sprom_register_fallbacks(); 16608ccf572SHauke Mehrtens bcm47xx_register_ssb(); 167dd573285SHauke Mehrtens bcm47xx_set_system_type(bcm47xx_bus.ssb.chip_id); 168a656ffcbSHauke Mehrtens #endif 169c1d1c5d4SHauke Mehrtens } 1701690a7f9SHauke Mehrtens 1711c0c13ebSAurelien Jarno _machine_restart = bcm47xx_machine_restart; 1721c0c13ebSAurelien Jarno _machine_halt = bcm47xx_machine_halt; 1731c0c13ebSAurelien Jarno pm_power_off = bcm47xx_machine_halt; 174e5810fa0SRafał Miłecki } 175e5810fa0SRafał Miłecki 176e5810fa0SRafał Miłecki /* 177e5810fa0SRafał Miłecki * This finishes bus initialization doing things that were not possible without 178e5810fa0SRafał Miłecki * kmalloc. Make sure to call it late enough (after mm_init). 179e5810fa0SRafał Miłecki */ 180e5810fa0SRafał Miłecki void __init bcm47xx_bus_setup(void) 181e5810fa0SRafał Miłecki { 182e5810fa0SRafał Miłecki #ifdef CONFIG_BCM47XX_BCMA 183e5810fa0SRafał Miłecki if (bcm47xx_bus_type == BCM47XX_BUS_TYPE_BCMA) { 184e5810fa0SRafał Miłecki int err; 185e5810fa0SRafał Miłecki 186e5810fa0SRafał Miłecki err = bcma_host_soc_init(&bcm47xx_bus.bcma); 187e5810fa0SRafał Miłecki if (err) 188e5810fa0SRafał Miłecki panic("Failed to initialize BCMA bus (err %d)", err); 189e5810fa0SRafał Miłecki } 190e5810fa0SRafał Miłecki #endif 191e5810fa0SRafał Miłecki 192e5810fa0SRafał Miłecki /* With bus initialized we can access NVRAM and detect the board */ 193786c497aSHauke Mehrtens bcm47xx_board_detect(); 1947da4b6f8SHauke Mehrtens mips_set_machine_name(bcm47xx_board_get_name()); 1951c0c13ebSAurelien Jarno } 196c1d1c5d4SHauke Mehrtens 1973c06b12bSHauke Mehrtens static int __init bcm47xx_cpu_fixes(void) 1983c06b12bSHauke Mehrtens { 1993c06b12bSHauke Mehrtens switch (bcm47xx_bus_type) { 2003c06b12bSHauke Mehrtens #ifdef CONFIG_BCM47XX_SSB 2013c06b12bSHauke Mehrtens case BCM47XX_BUS_TYPE_SSB: 2023c06b12bSHauke Mehrtens /* Nothing to do */ 2033c06b12bSHauke Mehrtens break; 2043c06b12bSHauke Mehrtens #endif 2053c06b12bSHauke Mehrtens #ifdef CONFIG_BCM47XX_BCMA 2063c06b12bSHauke Mehrtens case BCM47XX_BUS_TYPE_BCMA: 2073c06b12bSHauke Mehrtens /* The BCM4706 has a problem with the CPU wait instruction. 2083c06b12bSHauke Mehrtens * When r4k_wait or r4k_wait_irqoff is used will just hang and 2093c06b12bSHauke Mehrtens * not return from a msleep(). Removing the cpu_wait 2103c06b12bSHauke Mehrtens * functionality is a workaround for this problem. The BCM4716 2113c06b12bSHauke Mehrtens * does not have this problem. 2123c06b12bSHauke Mehrtens */ 2133c06b12bSHauke Mehrtens if (bcm47xx_bus.bcma.bus.chipinfo.id == BCMA_CHIP_ID_BCM4706) 2143c06b12bSHauke Mehrtens cpu_wait = NULL; 2153c06b12bSHauke Mehrtens break; 2163c06b12bSHauke Mehrtens #endif 2173c06b12bSHauke Mehrtens } 2183c06b12bSHauke Mehrtens return 0; 2193c06b12bSHauke Mehrtens } 2203c06b12bSHauke Mehrtens arch_initcall(bcm47xx_cpu_fixes); 2213c06b12bSHauke Mehrtens 222b04138b3SHauke Mehrtens static struct fixed_phy_status bcm47xx_fixed_phy_status __initdata = { 223b04138b3SHauke Mehrtens .link = 1, 224b04138b3SHauke Mehrtens .speed = SPEED_100, 225b04138b3SHauke Mehrtens .duplex = DUPLEX_FULL, 226b04138b3SHauke Mehrtens }; 227b04138b3SHauke Mehrtens 228c1d1c5d4SHauke Mehrtens static int __init bcm47xx_register_bus_complete(void) 229c1d1c5d4SHauke Mehrtens { 230c1d1c5d4SHauke Mehrtens switch (bcm47xx_bus_type) { 231c1d1c5d4SHauke Mehrtens #ifdef CONFIG_BCM47XX_SSB 232c1d1c5d4SHauke Mehrtens case BCM47XX_BUS_TYPE_SSB: 233c1d1c5d4SHauke Mehrtens /* Nothing to do */ 234c1d1c5d4SHauke Mehrtens break; 235c1d1c5d4SHauke Mehrtens #endif 236c1d1c5d4SHauke Mehrtens #ifdef CONFIG_BCM47XX_BCMA 237c1d1c5d4SHauke Mehrtens case BCM47XX_BUS_TYPE_BCMA: 238c1d1c5d4SHauke Mehrtens bcma_bus_register(&bcm47xx_bus.bcma.bus); 239c1d1c5d4SHauke Mehrtens break; 240c1d1c5d4SHauke Mehrtens #endif 241c1d1c5d4SHauke Mehrtens } 242ef1e3e7aSRafał Miłecki bcm47xx_buttons_register(); 243515fa75dSRafał Miłecki bcm47xx_leds_register(); 244a2bec078SRafał Miłecki bcm47xx_workarounds(); 245515fa75dSRafał Miłecki 246a5597008SAndrew Lunn fixed_phy_add(PHY_POLL, 0, &bcm47xx_fixed_phy_status, -1); 247c1d1c5d4SHauke Mehrtens return 0; 248c1d1c5d4SHauke Mehrtens } 249c1d1c5d4SHauke Mehrtens device_initcall(bcm47xx_register_bus_complete); 250