11c0c13ebSAurelien Jarno /*
21c0c13ebSAurelien Jarno * Copyright (C) 2004 Florian Schirmer <jolt@tuxbox.org>
31c0c13ebSAurelien Jarno * Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
4eb032b98SMichael Büsch * Copyright (C) 2006 Michael Buesch <m@bues.ch>
5121915c4SWaldemar Brodkorb * Copyright (C) 2010 Waldemar Brodkorb <wbx@openadk.org>
6f384b3ddSHauke Mehrtens * Copyright (C) 2010-2012 Hauke Mehrtens <hauke@hauke-m.de>
71c0c13ebSAurelien Jarno *
81c0c13ebSAurelien Jarno * This program is free software; you can redistribute it and/or modify it
91c0c13ebSAurelien Jarno * under the terms of the GNU General Public License as published by the
101c0c13ebSAurelien Jarno * Free Software Foundation; either version 2 of the License, or (at your
111c0c13ebSAurelien Jarno * option) any later version.
121c0c13ebSAurelien Jarno *
131c0c13ebSAurelien Jarno * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
141c0c13ebSAurelien Jarno * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
151c0c13ebSAurelien Jarno * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
161c0c13ebSAurelien Jarno * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
171c0c13ebSAurelien Jarno * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
181c0c13ebSAurelien Jarno * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
191c0c13ebSAurelien Jarno * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
201c0c13ebSAurelien Jarno * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
211c0c13ebSAurelien Jarno * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
221c0c13ebSAurelien Jarno * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
231c0c13ebSAurelien Jarno *
241c0c13ebSAurelien Jarno * You should have received a copy of the GNU General Public License along
251c0c13ebSAurelien Jarno * with this program; if not, write to the Free Software Foundation, Inc.,
261c0c13ebSAurelien Jarno * 675 Mass Ave, Cambridge, MA 02139, USA.
271c0c13ebSAurelien Jarno */
281c0c13ebSAurelien Jarno
29515fa75dSRafał Miłecki #include "bcm47xx_private.h"
30515fa75dSRafał Miłecki
312ab71a02SRafał Miłecki #include <linux/bcm47xx_sprom.h>
32cae39d13SPaul Gortmaker #include <linux/export.h>
331c0c13ebSAurelien Jarno #include <linux/types.h>
34b04138b3SHauke Mehrtens #include <linux/ethtool.h>
35b04138b3SHauke Mehrtens #include <linux/phy.h>
36b04138b3SHauke Mehrtens #include <linux/phy_fixed.h>
371c0c13ebSAurelien Jarno #include <linux/ssb/ssb.h>
38b06f3e19SAurelien Jarno #include <linux/ssb/ssb_embedded.h>
39c1d1c5d4SHauke Mehrtens #include <linux/bcma/bcma_soc.h>
4025e5fb97SAurelien Jarno #include <asm/bootinfo.h>
4176b573e4SHauke Mehrtens #include <asm/idle.h>
427da4b6f8SHauke Mehrtens #include <asm/prom.h>
431c0c13ebSAurelien Jarno #include <asm/reboot.h>
441c0c13ebSAurelien Jarno #include <asm/time.h>
451c0c13ebSAurelien Jarno #include <bcm47xx.h>
46786c497aSHauke Mehrtens #include <bcm47xx_board.h>
471c0c13ebSAurelien Jarno
4808ccf572SHauke Mehrtens union bcm47xx_bus bcm47xx_bus;
4908ccf572SHauke Mehrtens EXPORT_SYMBOL(bcm47xx_bus);
5008ccf572SHauke Mehrtens
5108ccf572SHauke Mehrtens enum bcm47xx_bus_type bcm47xx_bus_type;
5208ccf572SHauke Mehrtens EXPORT_SYMBOL(bcm47xx_bus_type);
531c0c13ebSAurelien Jarno
bcm47xx_machine_restart(char * command)541c0c13ebSAurelien Jarno static void bcm47xx_machine_restart(char *command)
551c0c13ebSAurelien Jarno {
56d548ca6bSRafał Miłecki pr_alert("Please stand by while rebooting the system...\n");
571c0c13ebSAurelien Jarno local_irq_disable();
581c0c13ebSAurelien Jarno /* Set the watchdog timer to reset immediately */
5908ccf572SHauke Mehrtens switch (bcm47xx_bus_type) {
60a656ffcbSHauke Mehrtens #ifdef CONFIG_BCM47XX_SSB
6108ccf572SHauke Mehrtens case BCM47XX_BUS_TYPE_SSB:
622727cab2SHauke Mehrtens if (bcm47xx_bus.ssb.chip_id == 0x4785)
632727cab2SHauke Mehrtens write_c0_diag4(1 << 22);
642727cab2SHauke Mehrtens ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 1);
652727cab2SHauke Mehrtens if (bcm47xx_bus.ssb.chip_id == 0x4785) {
662727cab2SHauke Mehrtens __asm__ __volatile__(
672727cab2SHauke Mehrtens ".set\tmips3\n\t"
682727cab2SHauke Mehrtens "sync\n\t"
692727cab2SHauke Mehrtens "wait\n\t"
702727cab2SHauke Mehrtens ".set\tmips0");
712727cab2SHauke Mehrtens }
7208ccf572SHauke Mehrtens break;
73a656ffcbSHauke Mehrtens #endif
74c1d1c5d4SHauke Mehrtens #ifdef CONFIG_BCM47XX_BCMA
75c1d1c5d4SHauke Mehrtens case BCM47XX_BUS_TYPE_BCMA:
762727cab2SHauke Mehrtens bcma_chipco_watchdog_timer_set(&bcm47xx_bus.bcma.bus.drv_cc, 1);
77c1d1c5d4SHauke Mehrtens break;
78c1d1c5d4SHauke Mehrtens #endif
7908ccf572SHauke Mehrtens }
801c0c13ebSAurelien Jarno while (1)
811c0c13ebSAurelien Jarno cpu_relax();
821c0c13ebSAurelien Jarno }
831c0c13ebSAurelien Jarno
bcm47xx_machine_halt(void)841c0c13ebSAurelien Jarno static void bcm47xx_machine_halt(void)
851c0c13ebSAurelien Jarno {
861c0c13ebSAurelien Jarno /* Disable interrupts and watchdog and spin forever */
871c0c13ebSAurelien Jarno local_irq_disable();
8808ccf572SHauke Mehrtens switch (bcm47xx_bus_type) {
89a656ffcbSHauke Mehrtens #ifdef CONFIG_BCM47XX_SSB
9008ccf572SHauke Mehrtens case BCM47XX_BUS_TYPE_SSB:
9108ccf572SHauke Mehrtens ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 0);
9208ccf572SHauke Mehrtens break;
93a656ffcbSHauke Mehrtens #endif
94c1d1c5d4SHauke Mehrtens #ifdef CONFIG_BCM47XX_BCMA
95c1d1c5d4SHauke Mehrtens case BCM47XX_BUS_TYPE_BCMA:
96c1d1c5d4SHauke Mehrtens bcma_chipco_watchdog_timer_set(&bcm47xx_bus.bcma.bus.drv_cc, 0);
97c1d1c5d4SHauke Mehrtens break;
98c1d1c5d4SHauke Mehrtens #endif
9908ccf572SHauke Mehrtens }
1001c0c13ebSAurelien Jarno while (1)
1011c0c13ebSAurelien Jarno cpu_relax();
1021c0c13ebSAurelien Jarno }
1031c0c13ebSAurelien Jarno
104a656ffcbSHauke Mehrtens #ifdef CONFIG_BCM47XX_SSB
bcm47xx_register_ssb(void)10508ccf572SHauke Mehrtens static void __init bcm47xx_register_ssb(void)
1061c0c13ebSAurelien Jarno {
1071c0c13ebSAurelien Jarno int err;
1081690a7f9SHauke Mehrtens char buf[100];
1091690a7f9SHauke Mehrtens struct ssb_mipscore *mcore;
1101c0c13ebSAurelien Jarno
111541c9a84SRafał Miłecki err = ssb_bus_host_soc_register(&bcm47xx_bus.ssb, SSB_ENUM_BASE);
1121c0c13ebSAurelien Jarno if (err)
113ab75dc02SRalf Baechle panic("Failed to initialize SSB bus (err %d)", err);
1141c0c13ebSAurelien Jarno
11508ccf572SHauke Mehrtens mcore = &bcm47xx_bus.ssb.mipscore;
116111bd981SHauke Mehrtens if (bcm47xx_nvram_getenv("kernel_args", buf, sizeof(buf)) >= 0) {
1171690a7f9SHauke Mehrtens if (strstr(buf, "console=ttyS1")) {
1181690a7f9SHauke Mehrtens struct ssb_serial_port port;
1191690a7f9SHauke Mehrtens
120d548ca6bSRafał Miłecki pr_debug("Swapping serial ports!\n");
1211690a7f9SHauke Mehrtens /* swap serial ports */
1221690a7f9SHauke Mehrtens memcpy(&port, &mcore->serial_ports[0], sizeof(port));
1231690a7f9SHauke Mehrtens memcpy(&mcore->serial_ports[0], &mcore->serial_ports[1],
1241690a7f9SHauke Mehrtens sizeof(port));
1251690a7f9SHauke Mehrtens memcpy(&mcore->serial_ports[1], &port, sizeof(port));
1261690a7f9SHauke Mehrtens }
1271690a7f9SHauke Mehrtens }
12808ccf572SHauke Mehrtens }
129a656ffcbSHauke Mehrtens #endif
13008ccf572SHauke Mehrtens
131c1d1c5d4SHauke Mehrtens #ifdef CONFIG_BCM47XX_BCMA
bcm47xx_register_bcma(void)132c1d1c5d4SHauke Mehrtens static void __init bcm47xx_register_bcma(void)
133c1d1c5d4SHauke Mehrtens {
134c1d1c5d4SHauke Mehrtens int err;
135c1d1c5d4SHauke Mehrtens
136c1d1c5d4SHauke Mehrtens err = bcma_host_soc_register(&bcm47xx_bus.bcma);
137c1d1c5d4SHauke Mehrtens if (err)
138a395135dSRafał Miłecki panic("Failed to register BCMA bus (err %d)", err);
139c1d1c5d4SHauke Mehrtens }
140c1d1c5d4SHauke Mehrtens #endif
141c1d1c5d4SHauke Mehrtens
142e5810fa0SRafał Miłecki /*
143e5810fa0SRafał Miłecki * Memory setup is done in the early part of MIPS's arch_mem_init. It's supposed
144*e7ae8d17SThomas Bogendoerfer * to detect memory and record it with memblock_add.
145e5810fa0SRafał Miłecki * Any extra initializaion performed here must not use kmalloc or bootmem.
146e5810fa0SRafał Miłecki */
plat_mem_setup(void)14708ccf572SHauke Mehrtens void __init plat_mem_setup(void)
14808ccf572SHauke Mehrtens {
14908ccf572SHauke Mehrtens struct cpuinfo_mips *c = ¤t_cpu_data;
15008ccf572SHauke Mehrtens
151be090fa6SWei Li if (c->cputype == CPU_74K) {
152d548ca6bSRafał Miłecki pr_info("Using bcma bus\n");
153c1d1c5d4SHauke Mehrtens #ifdef CONFIG_BCM47XX_BCMA
154c1d1c5d4SHauke Mehrtens bcm47xx_bus_type = BCM47XX_BUS_TYPE_BCMA;
155c1d1c5d4SHauke Mehrtens bcm47xx_register_bcma();
156dd573285SHauke Mehrtens bcm47xx_set_system_type(bcm47xx_bus.bcma.bus.chipinfo.id);
1576ee1d934SRafał Miłecki #ifdef CONFIG_HIGHMEM
1586ee1d934SRafał Miłecki bcm47xx_prom_highmem_init();
1596ee1d934SRafał Miłecki #endif
160c1d1c5d4SHauke Mehrtens #endif
161c1d1c5d4SHauke Mehrtens } else {
162d548ca6bSRafał Miłecki pr_info("Using ssb bus\n");
163a656ffcbSHauke Mehrtens #ifdef CONFIG_BCM47XX_SSB
16408ccf572SHauke Mehrtens bcm47xx_bus_type = BCM47XX_BUS_TYPE_SSB;
165a59da8fbSRafał Miłecki bcm47xx_sprom_register_fallbacks();
16608ccf572SHauke Mehrtens bcm47xx_register_ssb();
167dd573285SHauke Mehrtens bcm47xx_set_system_type(bcm47xx_bus.ssb.chip_id);
168a656ffcbSHauke Mehrtens #endif
169c1d1c5d4SHauke Mehrtens }
1701690a7f9SHauke Mehrtens
1711c0c13ebSAurelien Jarno _machine_restart = bcm47xx_machine_restart;
1721c0c13ebSAurelien Jarno _machine_halt = bcm47xx_machine_halt;
1731c0c13ebSAurelien Jarno pm_power_off = bcm47xx_machine_halt;
174e5810fa0SRafał Miłecki }
175e5810fa0SRafał Miłecki
176321c46b9SRafał Miłecki #ifdef CONFIG_BCM47XX_BCMA
bcm47xx_setup_device(void)177321c46b9SRafał Miłecki static struct device * __init bcm47xx_setup_device(void)
178321c46b9SRafał Miłecki {
179321c46b9SRafał Miłecki struct device *dev;
180321c46b9SRafał Miłecki int err;
181321c46b9SRafał Miłecki
182321c46b9SRafał Miłecki dev = kzalloc(sizeof(*dev), GFP_KERNEL);
183321c46b9SRafał Miłecki if (!dev)
184321c46b9SRafał Miłecki return NULL;
185321c46b9SRafał Miłecki
186321c46b9SRafał Miłecki err = dev_set_name(dev, "bcm47xx_soc");
187321c46b9SRafał Miłecki if (err) {
188321c46b9SRafał Miłecki pr_err("Failed to set SoC device name: %d\n", err);
189321c46b9SRafał Miłecki kfree(dev);
190321c46b9SRafał Miłecki return NULL;
191321c46b9SRafał Miłecki }
192321c46b9SRafał Miłecki
193321c46b9SRafał Miłecki err = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(32));
194321c46b9SRafał Miłecki if (err)
195321c46b9SRafał Miłecki pr_err("Failed to set SoC DMA mask: %d\n", err);
196321c46b9SRafał Miłecki
197321c46b9SRafał Miłecki return dev;
198321c46b9SRafał Miłecki }
199321c46b9SRafał Miłecki #endif
200321c46b9SRafał Miłecki
201e5810fa0SRafał Miłecki /*
202e5810fa0SRafał Miłecki * This finishes bus initialization doing things that were not possible without
203e5810fa0SRafał Miłecki * kmalloc. Make sure to call it late enough (after mm_init).
204e5810fa0SRafał Miłecki */
bcm47xx_bus_setup(void)205e5810fa0SRafał Miłecki void __init bcm47xx_bus_setup(void)
206e5810fa0SRafał Miłecki {
207e5810fa0SRafał Miłecki #ifdef CONFIG_BCM47XX_BCMA
208e5810fa0SRafał Miłecki if (bcm47xx_bus_type == BCM47XX_BUS_TYPE_BCMA) {
209e5810fa0SRafał Miłecki int err;
210e5810fa0SRafał Miłecki
211321c46b9SRafał Miłecki bcm47xx_bus.bcma.dev = bcm47xx_setup_device();
212321c46b9SRafał Miłecki if (!bcm47xx_bus.bcma.dev)
213321c46b9SRafał Miłecki panic("Failed to setup SoC device\n");
214321c46b9SRafał Miłecki
215e5810fa0SRafał Miłecki err = bcma_host_soc_init(&bcm47xx_bus.bcma);
216e5810fa0SRafał Miłecki if (err)
217e5810fa0SRafał Miłecki panic("Failed to initialize BCMA bus (err %d)", err);
218e5810fa0SRafał Miłecki }
219e5810fa0SRafał Miłecki #endif
220e5810fa0SRafał Miłecki
221e5810fa0SRafał Miłecki /* With bus initialized we can access NVRAM and detect the board */
222786c497aSHauke Mehrtens bcm47xx_board_detect();
2237da4b6f8SHauke Mehrtens mips_set_machine_name(bcm47xx_board_get_name());
2241c0c13ebSAurelien Jarno }
225c1d1c5d4SHauke Mehrtens
bcm47xx_cpu_fixes(void)2263c06b12bSHauke Mehrtens static int __init bcm47xx_cpu_fixes(void)
2273c06b12bSHauke Mehrtens {
2283c06b12bSHauke Mehrtens switch (bcm47xx_bus_type) {
2293c06b12bSHauke Mehrtens #ifdef CONFIG_BCM47XX_SSB
2303c06b12bSHauke Mehrtens case BCM47XX_BUS_TYPE_SSB:
2313c06b12bSHauke Mehrtens /* Nothing to do */
2323c06b12bSHauke Mehrtens break;
2333c06b12bSHauke Mehrtens #endif
2343c06b12bSHauke Mehrtens #ifdef CONFIG_BCM47XX_BCMA
2353c06b12bSHauke Mehrtens case BCM47XX_BUS_TYPE_BCMA:
2363c06b12bSHauke Mehrtens /* The BCM4706 has a problem with the CPU wait instruction.
2373c06b12bSHauke Mehrtens * When r4k_wait or r4k_wait_irqoff is used will just hang and
2383c06b12bSHauke Mehrtens * not return from a msleep(). Removing the cpu_wait
2393c06b12bSHauke Mehrtens * functionality is a workaround for this problem. The BCM4716
2403c06b12bSHauke Mehrtens * does not have this problem.
2413c06b12bSHauke Mehrtens */
2423c06b12bSHauke Mehrtens if (bcm47xx_bus.bcma.bus.chipinfo.id == BCMA_CHIP_ID_BCM4706)
2433c06b12bSHauke Mehrtens cpu_wait = NULL;
2443c06b12bSHauke Mehrtens break;
2453c06b12bSHauke Mehrtens #endif
2463c06b12bSHauke Mehrtens }
2473c06b12bSHauke Mehrtens return 0;
2483c06b12bSHauke Mehrtens }
2493c06b12bSHauke Mehrtens arch_initcall(bcm47xx_cpu_fixes);
2503c06b12bSHauke Mehrtens
251b04138b3SHauke Mehrtens static struct fixed_phy_status bcm47xx_fixed_phy_status __initdata = {
252b04138b3SHauke Mehrtens .link = 1,
253b04138b3SHauke Mehrtens .speed = SPEED_100,
254b04138b3SHauke Mehrtens .duplex = DUPLEX_FULL,
255b04138b3SHauke Mehrtens };
256b04138b3SHauke Mehrtens
bcm47xx_register_bus_complete(void)257c1d1c5d4SHauke Mehrtens static int __init bcm47xx_register_bus_complete(void)
258c1d1c5d4SHauke Mehrtens {
259c1d1c5d4SHauke Mehrtens switch (bcm47xx_bus_type) {
260c1d1c5d4SHauke Mehrtens #ifdef CONFIG_BCM47XX_SSB
261c1d1c5d4SHauke Mehrtens case BCM47XX_BUS_TYPE_SSB:
262c1d1c5d4SHauke Mehrtens /* Nothing to do */
263c1d1c5d4SHauke Mehrtens break;
264c1d1c5d4SHauke Mehrtens #endif
265c1d1c5d4SHauke Mehrtens #ifdef CONFIG_BCM47XX_BCMA
266c1d1c5d4SHauke Mehrtens case BCM47XX_BUS_TYPE_BCMA:
267321c46b9SRafał Miłecki if (device_register(bcm47xx_bus.bcma.dev))
268321c46b9SRafał Miłecki pr_err("Failed to register SoC device\n");
269c1d1c5d4SHauke Mehrtens bcma_bus_register(&bcm47xx_bus.bcma.bus);
270c1d1c5d4SHauke Mehrtens break;
271c1d1c5d4SHauke Mehrtens #endif
272c1d1c5d4SHauke Mehrtens }
273ef1e3e7aSRafał Miłecki bcm47xx_buttons_register();
274515fa75dSRafał Miłecki bcm47xx_leds_register();
275a2bec078SRafał Miłecki bcm47xx_workarounds();
276515fa75dSRafał Miłecki
2775468e82fSLinus Walleij fixed_phy_add(PHY_POLL, 0, &bcm47xx_fixed_phy_status);
278c1d1c5d4SHauke Mehrtens return 0;
279c1d1c5d4SHauke Mehrtens }
280c1d1c5d4SHauke Mehrtens device_initcall(bcm47xx_register_bus_complete);
281