1*b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */ 249148020SSam Ravnborg /* 349148020SSam Ravnborg * OSS 449148020SSam Ravnborg * 549148020SSam Ravnborg * This is used in place of VIA2 on the IIfx. 649148020SSam Ravnborg */ 749148020SSam Ravnborg 849148020SSam Ravnborg #define OSS_BASE (0x50f1a000) 949148020SSam Ravnborg 1049148020SSam Ravnborg /* 1149148020SSam Ravnborg * Interrupt level offsets for mac_oss->irq_level 1249148020SSam Ravnborg */ 1349148020SSam Ravnborg 1449148020SSam Ravnborg #define OSS_NUBUS0 0 1549148020SSam Ravnborg #define OSS_NUBUS1 1 1649148020SSam Ravnborg #define OSS_NUBUS2 2 1749148020SSam Ravnborg #define OSS_NUBUS3 3 1849148020SSam Ravnborg #define OSS_NUBUS4 4 1949148020SSam Ravnborg #define OSS_NUBUS5 5 2049148020SSam Ravnborg #define OSS_IOPISM 6 2149148020SSam Ravnborg #define OSS_IOPSCC 7 2249148020SSam Ravnborg #define OSS_SOUND 8 2349148020SSam Ravnborg #define OSS_SCSI 9 2449148020SSam Ravnborg #define OSS_60HZ 10 2549148020SSam Ravnborg #define OSS_VIA1 11 2649148020SSam Ravnborg #define OSS_UNUSED1 12 2749148020SSam Ravnborg #define OSS_UNUSED2 13 2849148020SSam Ravnborg #define OSS_PARITY 14 2949148020SSam Ravnborg #define OSS_UNUSED3 15 3049148020SSam Ravnborg 3149148020SSam Ravnborg #define OSS_NUM_SOURCES 16 3249148020SSam Ravnborg 3349148020SSam Ravnborg /* 3449148020SSam Ravnborg * Pending interrupt bits in mac_oss->irq_pending 3549148020SSam Ravnborg */ 3649148020SSam Ravnborg 3749148020SSam Ravnborg #define OSS_IP_NUBUS0 0x0001 3849148020SSam Ravnborg #define OSS_IP_NUBUS1 0x0002 3949148020SSam Ravnborg #define OSS_IP_NUBUS2 0x0004 4049148020SSam Ravnborg #define OSS_IP_NUBUS3 0x0008 4149148020SSam Ravnborg #define OSS_IP_NUBUS4 0x0010 4249148020SSam Ravnborg #define OSS_IP_NUBUS5 0x0020 4349148020SSam Ravnborg #define OSS_IP_IOPISM 0x0040 4449148020SSam Ravnborg #define OSS_IP_IOPSCC 0x0080 4549148020SSam Ravnborg #define OSS_IP_SOUND 0x0100 4649148020SSam Ravnborg #define OSS_IP_SCSI 0x0200 4749148020SSam Ravnborg #define OSS_IP_60HZ 0x0400 4849148020SSam Ravnborg #define OSS_IP_VIA1 0x0800 4949148020SSam Ravnborg #define OSS_IP_UNUSED1 0x1000 5049148020SSam Ravnborg #define OSS_IP_UNUSED2 0x2000 5149148020SSam Ravnborg #define OSS_IP_PARITY 0x4000 5249148020SSam Ravnborg #define OSS_IP_UNUSED3 0x8000 5349148020SSam Ravnborg 5449148020SSam Ravnborg #define OSS_IP_NUBUS (OSS_IP_NUBUS0|OSS_IP_NUBUS1|OSS_IP_NUBUS2|OSS_IP_NUBUS3|OSS_IP_NUBUS4|OSS_IP_NUBUS5) 5549148020SSam Ravnborg 5649148020SSam Ravnborg /* 5749148020SSam Ravnborg * Rom Control Register 5849148020SSam Ravnborg */ 5949148020SSam Ravnborg 6049148020SSam Ravnborg #define OSS_POWEROFF 0x80 6149148020SSam Ravnborg 6249148020SSam Ravnborg #ifndef __ASSEMBLY__ 6349148020SSam Ravnborg 6449148020SSam Ravnborg struct mac_oss { 6549148020SSam Ravnborg __u8 irq_level[0x10]; /* [0x000-0x00f] Interrupt levels */ 6649148020SSam Ravnborg __u8 padding0[0x1F2]; /* [0x010-0x201] IO space filler */ 6749148020SSam Ravnborg __u16 irq_pending; /* [0x202-0x203] pending interrupts bits */ 6849148020SSam Ravnborg __u8 rom_ctrl; /* [0x204-0x204] ROM cntl reg (for poweroff) */ 6949148020SSam Ravnborg __u8 padding1[0x2]; /* [0x205-0x206] currently unused by A/UX */ 7049148020SSam Ravnborg __u8 ack_60hz; /* [0x207-0x207] 60 Hz ack. */ 7149148020SSam Ravnborg }; 7249148020SSam Ravnborg 7349148020SSam Ravnborg extern volatile struct mac_oss *oss; 7449148020SSam Ravnborg extern int oss_present; 7549148020SSam Ravnborg 76ed04c97dSFinn Thain extern void oss_register_interrupts(void); 77ed04c97dSFinn Thain extern void oss_irq_enable(int); 78ed04c97dSFinn Thain extern void oss_irq_disable(int); 79ed04c97dSFinn Thain 8049148020SSam Ravnborg #endif /* __ASSEMBLY__ */ 81