xref: /openbmc/linux/arch/m68k/ifpsp060/fskeleton.S (revision 1da177e4c3f41524e886b7f1b8a0c1fc7321cac2)
1*1da177e4SLinus Torvalds|~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
2*1da177e4SLinus Torvalds|MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
3*1da177e4SLinus Torvalds|M68000 Hi-Performance Microprocessor Division
4*1da177e4SLinus Torvalds|M68060 Software Package
5*1da177e4SLinus Torvalds|Production Release P1.00 -- October 10, 1994
6*1da177e4SLinus Torvalds|
7*1da177e4SLinus Torvalds|M68060 Software Package Copyright1993, 1994 Motorola Inc.  All rights reserved.
8*1da177e4SLinus Torvalds|
9*1da177e4SLinus Torvalds|THE SOFTWARE is provided on an "AS IS" basis and without warranty.
10*1da177e4SLinus Torvalds|To the maximum extent permitted by applicable law,
11*1da177e4SLinus Torvalds|MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED,
12*1da177e4SLinus Torvalds|INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
13*1da177e4SLinus Torvalds|and any warranty against infringement with regard to the SOFTWARE
14*1da177e4SLinus Torvalds|(INCLUDING ANY MODIFIED VERSIONS THEREOF) and any accompanying written materials.
15*1da177e4SLinus Torvalds|
16*1da177e4SLinus Torvalds|To the maximum extent permitted by applicable law,
17*1da177e4SLinus Torvalds|IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER
18*1da177e4SLinus Torvalds|(INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS,
19*1da177e4SLinus Torvalds|BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS)
20*1da177e4SLinus Torvalds|ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE.
21*1da177e4SLinus Torvalds|Motorola assumes no responsibility for the maintenance and support of the SOFTWARE.
22*1da177e4SLinus Torvalds|
23*1da177e4SLinus Torvalds|You are hereby granted a copyright license to use, modify, and distribute the SOFTWARE
24*1da177e4SLinus Torvalds|so long as this entire notice is retained without alteration in any modified and/or
25*1da177e4SLinus Torvalds|redistributed versions, and that such modified versions are clearly identified as such.
26*1da177e4SLinus Torvalds|No licenses are granted by implication, estoppel or otherwise under any patents
27*1da177e4SLinus Torvalds|or trademarks of Motorola, Inc.
28*1da177e4SLinus Torvalds|~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
29*1da177e4SLinus Torvalds| fskeleton.s
30*1da177e4SLinus Torvalds|
31*1da177e4SLinus Torvalds| This file contains:
32*1da177e4SLinus Torvalds|	(1) example "Call-out"s
33*1da177e4SLinus Torvalds|	(2) example package entry code
34*1da177e4SLinus Torvalds|	(3) example "Call-out" table
35*1da177e4SLinus Torvalds|
36*1da177e4SLinus Torvalds
37*1da177e4SLinus Torvalds#include <linux/linkage.h>
38*1da177e4SLinus Torvalds
39*1da177e4SLinus Torvalds|################################
40*1da177e4SLinus Torvalds| (1) EXAMPLE CALL-OUTS		#
41*1da177e4SLinus Torvalds|				#
42*1da177e4SLinus Torvalds| _060_fpsp_done()		#
43*1da177e4SLinus Torvalds| _060_real_ovfl()		#
44*1da177e4SLinus Torvalds| _060_real_unfl()		#
45*1da177e4SLinus Torvalds| _060_real_operr()		#
46*1da177e4SLinus Torvalds| _060_real_snan()		#
47*1da177e4SLinus Torvalds| _060_real_dz()		#
48*1da177e4SLinus Torvalds| _060_real_inex()		#
49*1da177e4SLinus Torvalds| _060_real_bsun()		#
50*1da177e4SLinus Torvalds| _060_real_fline()		#
51*1da177e4SLinus Torvalds| _060_real_fpu_disabled()	#
52*1da177e4SLinus Torvalds| _060_real_trap()		#
53*1da177e4SLinus Torvalds|################################
54*1da177e4SLinus Torvalds
55*1da177e4SLinus Torvalds|
56*1da177e4SLinus Torvalds| _060_fpsp_done():
57*1da177e4SLinus Torvalds|
58*1da177e4SLinus Torvalds| This is the main exit point for the 68060 Floating-Point
59*1da177e4SLinus Torvalds| Software Package. For a normal exit, all 060FPSP routines call this
60*1da177e4SLinus Torvalds| routine. The operating system can do system dependent clean-up or
61*1da177e4SLinus Torvalds| simply execute an "rte" as with the sample code below.
62*1da177e4SLinus Torvalds|
63*1da177e4SLinus Torvalds	.global		_060_fpsp_done
64*1da177e4SLinus Torvalds_060_fpsp_done:
65*1da177e4SLinus Torvalds	bral	 _060_isp_done	| do the same as isp_done
66*1da177e4SLinus Torvalds
67*1da177e4SLinus Torvalds|
68*1da177e4SLinus Torvalds| _060_real_ovfl():
69*1da177e4SLinus Torvalds|
70*1da177e4SLinus Torvalds| This is the exit point for the 060FPSP when an enabled overflow exception
71*1da177e4SLinus Torvalds| is present. The routine below should point to the operating system handler
72*1da177e4SLinus Torvalds| for enabled overflow conditions. The exception stack frame is an overflow
73*1da177e4SLinus Torvalds| stack frame. The FP state frame holds the EXCEPTIONAL OPERAND.
74*1da177e4SLinus Torvalds|
75*1da177e4SLinus Torvalds| The sample routine below simply clears the exception status bit and
76*1da177e4SLinus Torvalds| does an "rte".
77*1da177e4SLinus Torvalds|
78*1da177e4SLinus Torvalds	.global		_060_real_ovfl
79*1da177e4SLinus Torvalds_060_real_ovfl:
80*1da177e4SLinus Torvalds	fsave		-(%sp)
81*1da177e4SLinus Torvalds	move.w		#0x6000,0x2(%sp)
82*1da177e4SLinus Torvalds	frestore	(%sp)+
83*1da177e4SLinus Torvalds	bral		trap	| jump to trap handler
84*1da177e4SLinus Torvalds
85*1da177e4SLinus Torvalds
86*1da177e4SLinus Torvalds|
87*1da177e4SLinus Torvalds| _060_real_unfl():
88*1da177e4SLinus Torvalds|
89*1da177e4SLinus Torvalds| This is the exit point for the 060FPSP when an enabled underflow exception
90*1da177e4SLinus Torvalds| is present. The routine below should point to the operating system handler
91*1da177e4SLinus Torvalds| for enabled underflow conditions. The exception stack frame is an underflow
92*1da177e4SLinus Torvalds| stack frame. The FP state frame holds the EXCEPTIONAL OPERAND.
93*1da177e4SLinus Torvalds|
94*1da177e4SLinus Torvalds| The sample routine below simply clears the exception status bit and
95*1da177e4SLinus Torvalds| does an "rte".
96*1da177e4SLinus Torvalds|
97*1da177e4SLinus Torvalds	.global		_060_real_unfl
98*1da177e4SLinus Torvalds_060_real_unfl:
99*1da177e4SLinus Torvalds	fsave		-(%sp)
100*1da177e4SLinus Torvalds	move.w		#0x6000,0x2(%sp)
101*1da177e4SLinus Torvalds	frestore	(%sp)+
102*1da177e4SLinus Torvalds	bral		trap	| jump to trap handler
103*1da177e4SLinus Torvalds
104*1da177e4SLinus Torvalds|
105*1da177e4SLinus Torvalds| _060_real_operr():
106*1da177e4SLinus Torvalds|
107*1da177e4SLinus Torvalds| This is the exit point for the 060FPSP when an enabled operand error exception
108*1da177e4SLinus Torvalds| is present. The routine below should point to the operating system handler
109*1da177e4SLinus Torvalds| for enabled operand error exceptions. The exception stack frame is an operand error
110*1da177e4SLinus Torvalds| stack frame. The FP state frame holds the source operand of the faulting
111*1da177e4SLinus Torvalds| instruction.
112*1da177e4SLinus Torvalds|
113*1da177e4SLinus Torvalds| The sample routine below simply clears the exception status bit and
114*1da177e4SLinus Torvalds| does an "rte".
115*1da177e4SLinus Torvalds|
116*1da177e4SLinus Torvalds	.global		_060_real_operr
117*1da177e4SLinus Torvalds_060_real_operr:
118*1da177e4SLinus Torvalds	fsave		-(%sp)
119*1da177e4SLinus Torvalds	move.w		#0x6000,0x2(%sp)
120*1da177e4SLinus Torvalds	frestore	(%sp)+
121*1da177e4SLinus Torvalds	bral		trap	| jump to trap handler
122*1da177e4SLinus Torvalds
123*1da177e4SLinus Torvalds|
124*1da177e4SLinus Torvalds| _060_real_snan():
125*1da177e4SLinus Torvalds|
126*1da177e4SLinus Torvalds| This is the exit point for the 060FPSP when an enabled signalling NaN exception
127*1da177e4SLinus Torvalds| is present. The routine below should point to the operating system handler
128*1da177e4SLinus Torvalds| for enabled signalling NaN exceptions. The exception stack frame is a signalling NaN
129*1da177e4SLinus Torvalds| stack frame. The FP state frame holds the source operand of the faulting
130*1da177e4SLinus Torvalds| instruction.
131*1da177e4SLinus Torvalds|
132*1da177e4SLinus Torvalds| The sample routine below simply clears the exception status bit and
133*1da177e4SLinus Torvalds| does an "rte".
134*1da177e4SLinus Torvalds|
135*1da177e4SLinus Torvalds	.global		_060_real_snan
136*1da177e4SLinus Torvalds_060_real_snan:
137*1da177e4SLinus Torvalds	fsave		-(%sp)
138*1da177e4SLinus Torvalds	move.w		#0x6000,0x2(%sp)
139*1da177e4SLinus Torvalds	frestore	(%sp)+
140*1da177e4SLinus Torvalds	bral		trap	| jump to trap handler
141*1da177e4SLinus Torvalds
142*1da177e4SLinus Torvalds|
143*1da177e4SLinus Torvalds| _060_real_dz():
144*1da177e4SLinus Torvalds|
145*1da177e4SLinus Torvalds| This is the exit point for the 060FPSP when an enabled divide-by-zero exception
146*1da177e4SLinus Torvalds| is present. The routine below should point to the operating system handler
147*1da177e4SLinus Torvalds| for enabled divide-by-zero exceptions. The exception stack frame is a divide-by-zero
148*1da177e4SLinus Torvalds| stack frame. The FP state frame holds the source operand of the faulting
149*1da177e4SLinus Torvalds| instruction.
150*1da177e4SLinus Torvalds|
151*1da177e4SLinus Torvalds| The sample routine below simply clears the exception status bit and
152*1da177e4SLinus Torvalds| does an "rte".
153*1da177e4SLinus Torvalds|
154*1da177e4SLinus Torvalds	.global		_060_real_dz
155*1da177e4SLinus Torvalds_060_real_dz:
156*1da177e4SLinus Torvalds	fsave		-(%sp)
157*1da177e4SLinus Torvalds	move.w		#0x6000,0x2(%sp)
158*1da177e4SLinus Torvalds	frestore	(%sp)+
159*1da177e4SLinus Torvalds	bral		trap	| jump to trap handler
160*1da177e4SLinus Torvalds
161*1da177e4SLinus Torvalds|
162*1da177e4SLinus Torvalds| _060_real_inex():
163*1da177e4SLinus Torvalds|
164*1da177e4SLinus Torvalds| This is the exit point for the 060FPSP when an enabled inexact exception
165*1da177e4SLinus Torvalds| is present. The routine below should point to the operating system handler
166*1da177e4SLinus Torvalds| for enabled inexact exceptions. The exception stack frame is an inexact
167*1da177e4SLinus Torvalds| stack frame. The FP state frame holds the source operand of the faulting
168*1da177e4SLinus Torvalds| instruction.
169*1da177e4SLinus Torvalds|
170*1da177e4SLinus Torvalds| The sample routine below simply clears the exception status bit and
171*1da177e4SLinus Torvalds| does an "rte".
172*1da177e4SLinus Torvalds|
173*1da177e4SLinus Torvalds	.global		_060_real_inex
174*1da177e4SLinus Torvalds_060_real_inex:
175*1da177e4SLinus Torvalds	fsave		-(%sp)
176*1da177e4SLinus Torvalds	move.w		#0x6000,0x2(%sp)
177*1da177e4SLinus Torvalds	frestore	(%sp)+
178*1da177e4SLinus Torvalds	bral		trap	| jump to trap handler
179*1da177e4SLinus Torvalds
180*1da177e4SLinus Torvalds|
181*1da177e4SLinus Torvalds| _060_real_bsun():
182*1da177e4SLinus Torvalds|
183*1da177e4SLinus Torvalds| This is the exit point for the 060FPSP when an enabled bsun exception
184*1da177e4SLinus Torvalds| is present. The routine below should point to the operating system handler
185*1da177e4SLinus Torvalds| for enabled bsun exceptions. The exception stack frame is a bsun
186*1da177e4SLinus Torvalds| stack frame.
187*1da177e4SLinus Torvalds|
188*1da177e4SLinus Torvalds| The sample routine below clears the exception status bit, clears the NaN
189*1da177e4SLinus Torvalds| bit in the FPSR, and does an "rte". The instruction that caused the
190*1da177e4SLinus Torvalds| bsun will now be re-executed but with the NaN FPSR bit cleared.
191*1da177e4SLinus Torvalds|
192*1da177e4SLinus Torvalds	.global		_060_real_bsun
193*1da177e4SLinus Torvalds_060_real_bsun:
194*1da177e4SLinus Torvalds|	fsave		-(%sp)
195*1da177e4SLinus Torvalds
196*1da177e4SLinus Torvalds	fmove.l		%fpsr,-(%sp)
197*1da177e4SLinus Torvalds	andi.b		#0xfe,(%sp)
198*1da177e4SLinus Torvalds	fmove.l		(%sp)+,%fpsr
199*1da177e4SLinus Torvalds
200*1da177e4SLinus Torvalds	bral		trap	| jump to trap handler
201*1da177e4SLinus Torvalds
202*1da177e4SLinus Torvalds|
203*1da177e4SLinus Torvalds| _060_real_fline():
204*1da177e4SLinus Torvalds|
205*1da177e4SLinus Torvalds| This is the exit point for the 060FPSP when an F-Line Illegal exception is
206*1da177e4SLinus Torvalds| encountered. Three different types of exceptions can enter the F-Line exception
207*1da177e4SLinus Torvalds| vector number 11: FP Unimplemented Instructions, FP implemented instructions when
208*1da177e4SLinus Torvalds| the FPU is disabled, and F-Line Illegal instructions. The 060FPSP module
209*1da177e4SLinus Torvalds| _fpsp_fline() distinguishes between the three and acts appropriately. F-Line
210*1da177e4SLinus Torvalds| Illegals branch here.
211*1da177e4SLinus Torvalds|
212*1da177e4SLinus Torvalds	.global		_060_real_fline
213*1da177e4SLinus Torvalds_060_real_fline:
214*1da177e4SLinus Torvalds	bral		trap	| jump to trap handler
215*1da177e4SLinus Torvalds
216*1da177e4SLinus Torvalds|
217*1da177e4SLinus Torvalds| _060_real_fpu_disabled():
218*1da177e4SLinus Torvalds|
219*1da177e4SLinus Torvalds| This is the exit point for the 060FPSP when an FPU disabled exception is
220*1da177e4SLinus Torvalds| encountered. Three different types of exceptions can enter the F-Line exception
221*1da177e4SLinus Torvalds| vector number 11: FP Unimplemented Instructions, FP implemented instructions when
222*1da177e4SLinus Torvalds| the FPU is disabled, and F-Line Illegal instructions. The 060FPSP module
223*1da177e4SLinus Torvalds| _fpsp_fline() distinguishes between the three and acts appropriately. FPU disabled
224*1da177e4SLinus Torvalds| exceptions branch here.
225*1da177e4SLinus Torvalds|
226*1da177e4SLinus Torvalds| The sample code below enables the FPU, sets the PC field in the exception stack
227*1da177e4SLinus Torvalds| frame to the PC of the instruction causing the exception, and does an "rte".
228*1da177e4SLinus Torvalds| The execution of the instruction then proceeds with an enabled floating-point
229*1da177e4SLinus Torvalds| unit.
230*1da177e4SLinus Torvalds|
231*1da177e4SLinus Torvalds	.global		_060_real_fpu_disabled
232*1da177e4SLinus Torvalds_060_real_fpu_disabled:
233*1da177e4SLinus Torvalds	move.l		%d0,-(%sp)		| enabled the fpu
234*1da177e4SLinus Torvalds	.long	0x4E7A0808			|movec		pcr,%d0
235*1da177e4SLinus Torvalds	bclr		#0x1,%d0
236*1da177e4SLinus Torvalds	.long	0x4E7B0808			|movec		%d0,pcr
237*1da177e4SLinus Torvalds	move.l		(%sp)+,%d0
238*1da177e4SLinus Torvalds
239*1da177e4SLinus Torvalds	move.l		0xc(%sp),0x2(%sp)	| set "Current PC"
240*1da177e4SLinus Torvalds	rte
241*1da177e4SLinus Torvalds
242*1da177e4SLinus Torvalds|
243*1da177e4SLinus Torvalds| _060_real_trap():
244*1da177e4SLinus Torvalds|
245*1da177e4SLinus Torvalds| This is the exit point for the 060FPSP when an emulated "ftrapcc" instruction
246*1da177e4SLinus Torvalds| discovers that the trap condition is true and it should branch to the operating
247*1da177e4SLinus Torvalds| system handler for the trap exception vector number 7.
248*1da177e4SLinus Torvalds|
249*1da177e4SLinus Torvalds| The sample code below simply executes an "rte".
250*1da177e4SLinus Torvalds|
251*1da177e4SLinus Torvalds	.global		_060_real_trap
252*1da177e4SLinus Torvalds_060_real_trap:
253*1da177e4SLinus Torvalds	bral		trap	| jump to trap handler
254*1da177e4SLinus Torvalds
255*1da177e4SLinus Torvalds|############################################################################
256*1da177e4SLinus Torvalds
257*1da177e4SLinus Torvalds|#################################
258*1da177e4SLinus Torvalds| (2) EXAMPLE PACKAGE ENTRY CODE #
259*1da177e4SLinus Torvalds|#################################
260*1da177e4SLinus Torvalds
261*1da177e4SLinus Torvalds	.global		_060_fpsp_snan
262*1da177e4SLinus Torvalds_060_fpsp_snan:
263*1da177e4SLinus Torvalds	bra.l		_FP_CALL_TOP+0x80+0x00
264*1da177e4SLinus Torvalds
265*1da177e4SLinus Torvalds	.global		_060_fpsp_operr
266*1da177e4SLinus Torvalds_060_fpsp_operr:
267*1da177e4SLinus Torvalds	bra.l		_FP_CALL_TOP+0x80+0x08
268*1da177e4SLinus Torvalds
269*1da177e4SLinus Torvalds	.global		_060_fpsp_ovfl
270*1da177e4SLinus Torvalds_060_fpsp_ovfl:
271*1da177e4SLinus Torvalds	bra.l		_FP_CALL_TOP+0x80+0x10
272*1da177e4SLinus Torvalds
273*1da177e4SLinus Torvalds	.global		_060_fpsp_unfl
274*1da177e4SLinus Torvalds_060_fpsp_unfl:
275*1da177e4SLinus Torvalds	bra.l		_FP_CALL_TOP+0x80+0x18
276*1da177e4SLinus Torvalds
277*1da177e4SLinus Torvalds	.global		_060_fpsp_dz
278*1da177e4SLinus Torvalds_060_fpsp_dz:
279*1da177e4SLinus Torvalds	bra.l		_FP_CALL_TOP+0x80+0x20
280*1da177e4SLinus Torvalds
281*1da177e4SLinus Torvalds	.global		_060_fpsp_inex
282*1da177e4SLinus Torvalds_060_fpsp_inex:
283*1da177e4SLinus Torvalds	bra.l		_FP_CALL_TOP+0x80+0x28
284*1da177e4SLinus Torvalds
285*1da177e4SLinus Torvalds	.global		_060_fpsp_fline
286*1da177e4SLinus Torvalds_060_fpsp_fline:
287*1da177e4SLinus Torvalds	bra.l		_FP_CALL_TOP+0x80+0x30
288*1da177e4SLinus Torvalds
289*1da177e4SLinus Torvalds	.global		_060_fpsp_unsupp
290*1da177e4SLinus Torvalds_060_fpsp_unsupp:
291*1da177e4SLinus Torvalds	bra.l		_FP_CALL_TOP+0x80+0x38
292*1da177e4SLinus Torvalds
293*1da177e4SLinus Torvalds	.global		_060_fpsp_effadd
294*1da177e4SLinus Torvalds_060_fpsp_effadd:
295*1da177e4SLinus Torvalds	bra.l		_FP_CALL_TOP+0x80+0x40
296*1da177e4SLinus Torvalds
297*1da177e4SLinus Torvalds|############################################################################
298*1da177e4SLinus Torvalds
299*1da177e4SLinus Torvalds|###############################
300*1da177e4SLinus Torvalds| (3) EXAMPLE CALL-OUT SECTION #
301*1da177e4SLinus Torvalds|###############################
302*1da177e4SLinus Torvalds
303*1da177e4SLinus Torvalds| The size of this section MUST be 128 bytes!!!
304*1da177e4SLinus Torvalds
305*1da177e4SLinus Torvalds_FP_CALL_TOP:
306*1da177e4SLinus Torvalds	.long	_060_real_bsun		- _FP_CALL_TOP
307*1da177e4SLinus Torvalds	.long	_060_real_snan		- _FP_CALL_TOP
308*1da177e4SLinus Torvalds	.long	_060_real_operr		- _FP_CALL_TOP
309*1da177e4SLinus Torvalds	.long	_060_real_ovfl		- _FP_CALL_TOP
310*1da177e4SLinus Torvalds	.long	_060_real_unfl		- _FP_CALL_TOP
311*1da177e4SLinus Torvalds	.long	_060_real_dz		- _FP_CALL_TOP
312*1da177e4SLinus Torvalds	.long	_060_real_inex		- _FP_CALL_TOP
313*1da177e4SLinus Torvalds	.long	_060_real_fline		- _FP_CALL_TOP
314*1da177e4SLinus Torvalds	.long	_060_real_fpu_disabled	- _FP_CALL_TOP
315*1da177e4SLinus Torvalds	.long	_060_real_trap		- _FP_CALL_TOP
316*1da177e4SLinus Torvalds	.long	_060_real_trace		- _FP_CALL_TOP
317*1da177e4SLinus Torvalds	.long	_060_real_access	- _FP_CALL_TOP
318*1da177e4SLinus Torvalds	.long	_060_fpsp_done		- _FP_CALL_TOP
319*1da177e4SLinus Torvalds
320*1da177e4SLinus Torvalds	.long	0x00000000, 0x00000000, 0x00000000
321*1da177e4SLinus Torvalds
322*1da177e4SLinus Torvalds	.long	_060_imem_read		- _FP_CALL_TOP
323*1da177e4SLinus Torvalds	.long	_060_dmem_read		- _FP_CALL_TOP
324*1da177e4SLinus Torvalds	.long	_060_dmem_write		- _FP_CALL_TOP
325*1da177e4SLinus Torvalds	.long	_060_imem_read_word	- _FP_CALL_TOP
326*1da177e4SLinus Torvalds	.long	_060_imem_read_long	- _FP_CALL_TOP
327*1da177e4SLinus Torvalds	.long	_060_dmem_read_byte	- _FP_CALL_TOP
328*1da177e4SLinus Torvalds	.long	_060_dmem_read_word	- _FP_CALL_TOP
329*1da177e4SLinus Torvalds	.long	_060_dmem_read_long	- _FP_CALL_TOP
330*1da177e4SLinus Torvalds	.long	_060_dmem_write_byte	- _FP_CALL_TOP
331*1da177e4SLinus Torvalds	.long	_060_dmem_write_word	- _FP_CALL_TOP
332*1da177e4SLinus Torvalds	.long	_060_dmem_write_long	- _FP_CALL_TOP
333*1da177e4SLinus Torvalds
334*1da177e4SLinus Torvalds	.long	0x00000000
335*1da177e4SLinus Torvalds
336*1da177e4SLinus Torvalds	.long	0x00000000, 0x00000000, 0x00000000, 0x00000000
337*1da177e4SLinus Torvalds
338*1da177e4SLinus Torvalds|############################################################################
339*1da177e4SLinus Torvalds
340*1da177e4SLinus Torvalds| 060 FPSP KERNEL PACKAGE NEEDS TO GO HERE!!!
341*1da177e4SLinus Torvalds
342*1da177e4SLinus Torvalds#include "fpsp.sa"
343