11da177e4SLinus Torvalds|~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 21da177e4SLinus Torvalds|MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP 31da177e4SLinus Torvalds|M68000 Hi-Performance Microprocessor Division 41da177e4SLinus Torvalds|M68060 Software Package 51da177e4SLinus Torvalds|Production Release P1.00 -- October 10, 1994 61da177e4SLinus Torvalds| 7*96de0e25SJan Engelhardt|M68060 Software Package Copyright © 1993, 1994 Motorola Inc. All rights reserved. 81da177e4SLinus Torvalds| 91da177e4SLinus Torvalds|THE SOFTWARE is provided on an "AS IS" basis and without warranty. 101da177e4SLinus Torvalds|To the maximum extent permitted by applicable law, 111da177e4SLinus Torvalds|MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED, 121da177e4SLinus Torvalds|INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE 131da177e4SLinus Torvalds|and any warranty against infringement with regard to the SOFTWARE 141da177e4SLinus Torvalds|(INCLUDING ANY MODIFIED VERSIONS THEREOF) and any accompanying written materials. 151da177e4SLinus Torvalds| 161da177e4SLinus Torvalds|To the maximum extent permitted by applicable law, 171da177e4SLinus Torvalds|IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER 181da177e4SLinus Torvalds|(INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, 191da177e4SLinus Torvalds|BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) 201da177e4SLinus Torvalds|ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE. 211da177e4SLinus Torvalds|Motorola assumes no responsibility for the maintenance and support of the SOFTWARE. 221da177e4SLinus Torvalds| 231da177e4SLinus Torvalds|You are hereby granted a copyright license to use, modify, and distribute the SOFTWARE 241da177e4SLinus Torvalds|so long as this entire notice is retained without alteration in any modified and/or 251da177e4SLinus Torvalds|redistributed versions, and that such modified versions are clearly identified as such. 261da177e4SLinus Torvalds|No licenses are granted by implication, estoppel or otherwise under any patents 271da177e4SLinus Torvalds|or trademarks of Motorola, Inc. 281da177e4SLinus Torvalds|~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 291da177e4SLinus Torvalds| fskeleton.s 301da177e4SLinus Torvalds| 311da177e4SLinus Torvalds| This file contains: 321da177e4SLinus Torvalds| (1) example "Call-out"s 331da177e4SLinus Torvalds| (2) example package entry code 341da177e4SLinus Torvalds| (3) example "Call-out" table 351da177e4SLinus Torvalds| 361da177e4SLinus Torvalds 371da177e4SLinus Torvalds#include <linux/linkage.h> 381da177e4SLinus Torvalds 391da177e4SLinus Torvalds|################################ 401da177e4SLinus Torvalds| (1) EXAMPLE CALL-OUTS # 411da177e4SLinus Torvalds| # 421da177e4SLinus Torvalds| _060_fpsp_done() # 431da177e4SLinus Torvalds| _060_real_ovfl() # 441da177e4SLinus Torvalds| _060_real_unfl() # 451da177e4SLinus Torvalds| _060_real_operr() # 461da177e4SLinus Torvalds| _060_real_snan() # 471da177e4SLinus Torvalds| _060_real_dz() # 481da177e4SLinus Torvalds| _060_real_inex() # 491da177e4SLinus Torvalds| _060_real_bsun() # 501da177e4SLinus Torvalds| _060_real_fline() # 511da177e4SLinus Torvalds| _060_real_fpu_disabled() # 521da177e4SLinus Torvalds| _060_real_trap() # 531da177e4SLinus Torvalds|################################ 541da177e4SLinus Torvalds 551da177e4SLinus Torvalds| 561da177e4SLinus Torvalds| _060_fpsp_done(): 571da177e4SLinus Torvalds| 581da177e4SLinus Torvalds| This is the main exit point for the 68060 Floating-Point 591da177e4SLinus Torvalds| Software Package. For a normal exit, all 060FPSP routines call this 601da177e4SLinus Torvalds| routine. The operating system can do system dependent clean-up or 611da177e4SLinus Torvalds| simply execute an "rte" as with the sample code below. 621da177e4SLinus Torvalds| 631da177e4SLinus Torvalds .global _060_fpsp_done 641da177e4SLinus Torvalds_060_fpsp_done: 651da177e4SLinus Torvalds bral _060_isp_done | do the same as isp_done 661da177e4SLinus Torvalds 671da177e4SLinus Torvalds| 681da177e4SLinus Torvalds| _060_real_ovfl(): 691da177e4SLinus Torvalds| 701da177e4SLinus Torvalds| This is the exit point for the 060FPSP when an enabled overflow exception 711da177e4SLinus Torvalds| is present. The routine below should point to the operating system handler 721da177e4SLinus Torvalds| for enabled overflow conditions. The exception stack frame is an overflow 731da177e4SLinus Torvalds| stack frame. The FP state frame holds the EXCEPTIONAL OPERAND. 741da177e4SLinus Torvalds| 751da177e4SLinus Torvalds| The sample routine below simply clears the exception status bit and 761da177e4SLinus Torvalds| does an "rte". 771da177e4SLinus Torvalds| 781da177e4SLinus Torvalds .global _060_real_ovfl 791da177e4SLinus Torvalds_060_real_ovfl: 801da177e4SLinus Torvalds fsave -(%sp) 811da177e4SLinus Torvalds move.w #0x6000,0x2(%sp) 821da177e4SLinus Torvalds frestore (%sp)+ 831da177e4SLinus Torvalds bral trap | jump to trap handler 841da177e4SLinus Torvalds 851da177e4SLinus Torvalds 861da177e4SLinus Torvalds| 871da177e4SLinus Torvalds| _060_real_unfl(): 881da177e4SLinus Torvalds| 891da177e4SLinus Torvalds| This is the exit point for the 060FPSP when an enabled underflow exception 901da177e4SLinus Torvalds| is present. The routine below should point to the operating system handler 911da177e4SLinus Torvalds| for enabled underflow conditions. The exception stack frame is an underflow 921da177e4SLinus Torvalds| stack frame. The FP state frame holds the EXCEPTIONAL OPERAND. 931da177e4SLinus Torvalds| 941da177e4SLinus Torvalds| The sample routine below simply clears the exception status bit and 951da177e4SLinus Torvalds| does an "rte". 961da177e4SLinus Torvalds| 971da177e4SLinus Torvalds .global _060_real_unfl 981da177e4SLinus Torvalds_060_real_unfl: 991da177e4SLinus Torvalds fsave -(%sp) 1001da177e4SLinus Torvalds move.w #0x6000,0x2(%sp) 1011da177e4SLinus Torvalds frestore (%sp)+ 1021da177e4SLinus Torvalds bral trap | jump to trap handler 1031da177e4SLinus Torvalds 1041da177e4SLinus Torvalds| 1051da177e4SLinus Torvalds| _060_real_operr(): 1061da177e4SLinus Torvalds| 1071da177e4SLinus Torvalds| This is the exit point for the 060FPSP when an enabled operand error exception 1081da177e4SLinus Torvalds| is present. The routine below should point to the operating system handler 1091da177e4SLinus Torvalds| for enabled operand error exceptions. The exception stack frame is an operand error 1101da177e4SLinus Torvalds| stack frame. The FP state frame holds the source operand of the faulting 1111da177e4SLinus Torvalds| instruction. 1121da177e4SLinus Torvalds| 1131da177e4SLinus Torvalds| The sample routine below simply clears the exception status bit and 1141da177e4SLinus Torvalds| does an "rte". 1151da177e4SLinus Torvalds| 1161da177e4SLinus Torvalds .global _060_real_operr 1171da177e4SLinus Torvalds_060_real_operr: 1181da177e4SLinus Torvalds fsave -(%sp) 1191da177e4SLinus Torvalds move.w #0x6000,0x2(%sp) 1201da177e4SLinus Torvalds frestore (%sp)+ 1211da177e4SLinus Torvalds bral trap | jump to trap handler 1221da177e4SLinus Torvalds 1231da177e4SLinus Torvalds| 1241da177e4SLinus Torvalds| _060_real_snan(): 1251da177e4SLinus Torvalds| 1261da177e4SLinus Torvalds| This is the exit point for the 060FPSP when an enabled signalling NaN exception 1271da177e4SLinus Torvalds| is present. The routine below should point to the operating system handler 1281da177e4SLinus Torvalds| for enabled signalling NaN exceptions. The exception stack frame is a signalling NaN 1291da177e4SLinus Torvalds| stack frame. The FP state frame holds the source operand of the faulting 1301da177e4SLinus Torvalds| instruction. 1311da177e4SLinus Torvalds| 1321da177e4SLinus Torvalds| The sample routine below simply clears the exception status bit and 1331da177e4SLinus Torvalds| does an "rte". 1341da177e4SLinus Torvalds| 1351da177e4SLinus Torvalds .global _060_real_snan 1361da177e4SLinus Torvalds_060_real_snan: 1371da177e4SLinus Torvalds fsave -(%sp) 1381da177e4SLinus Torvalds move.w #0x6000,0x2(%sp) 1391da177e4SLinus Torvalds frestore (%sp)+ 1401da177e4SLinus Torvalds bral trap | jump to trap handler 1411da177e4SLinus Torvalds 1421da177e4SLinus Torvalds| 1431da177e4SLinus Torvalds| _060_real_dz(): 1441da177e4SLinus Torvalds| 1451da177e4SLinus Torvalds| This is the exit point for the 060FPSP when an enabled divide-by-zero exception 1461da177e4SLinus Torvalds| is present. The routine below should point to the operating system handler 1471da177e4SLinus Torvalds| for enabled divide-by-zero exceptions. The exception stack frame is a divide-by-zero 1481da177e4SLinus Torvalds| stack frame. The FP state frame holds the source operand of the faulting 1491da177e4SLinus Torvalds| instruction. 1501da177e4SLinus Torvalds| 1511da177e4SLinus Torvalds| The sample routine below simply clears the exception status bit and 1521da177e4SLinus Torvalds| does an "rte". 1531da177e4SLinus Torvalds| 1541da177e4SLinus Torvalds .global _060_real_dz 1551da177e4SLinus Torvalds_060_real_dz: 1561da177e4SLinus Torvalds fsave -(%sp) 1571da177e4SLinus Torvalds move.w #0x6000,0x2(%sp) 1581da177e4SLinus Torvalds frestore (%sp)+ 1591da177e4SLinus Torvalds bral trap | jump to trap handler 1601da177e4SLinus Torvalds 1611da177e4SLinus Torvalds| 1621da177e4SLinus Torvalds| _060_real_inex(): 1631da177e4SLinus Torvalds| 1641da177e4SLinus Torvalds| This is the exit point for the 060FPSP when an enabled inexact exception 1651da177e4SLinus Torvalds| is present. The routine below should point to the operating system handler 1661da177e4SLinus Torvalds| for enabled inexact exceptions. The exception stack frame is an inexact 1671da177e4SLinus Torvalds| stack frame. The FP state frame holds the source operand of the faulting 1681da177e4SLinus Torvalds| instruction. 1691da177e4SLinus Torvalds| 1701da177e4SLinus Torvalds| The sample routine below simply clears the exception status bit and 1711da177e4SLinus Torvalds| does an "rte". 1721da177e4SLinus Torvalds| 1731da177e4SLinus Torvalds .global _060_real_inex 1741da177e4SLinus Torvalds_060_real_inex: 1751da177e4SLinus Torvalds fsave -(%sp) 1761da177e4SLinus Torvalds move.w #0x6000,0x2(%sp) 1771da177e4SLinus Torvalds frestore (%sp)+ 1781da177e4SLinus Torvalds bral trap | jump to trap handler 1791da177e4SLinus Torvalds 1801da177e4SLinus Torvalds| 1811da177e4SLinus Torvalds| _060_real_bsun(): 1821da177e4SLinus Torvalds| 1831da177e4SLinus Torvalds| This is the exit point for the 060FPSP when an enabled bsun exception 1841da177e4SLinus Torvalds| is present. The routine below should point to the operating system handler 1851da177e4SLinus Torvalds| for enabled bsun exceptions. The exception stack frame is a bsun 1861da177e4SLinus Torvalds| stack frame. 1871da177e4SLinus Torvalds| 1881da177e4SLinus Torvalds| The sample routine below clears the exception status bit, clears the NaN 1891da177e4SLinus Torvalds| bit in the FPSR, and does an "rte". The instruction that caused the 1901da177e4SLinus Torvalds| bsun will now be re-executed but with the NaN FPSR bit cleared. 1911da177e4SLinus Torvalds| 1921da177e4SLinus Torvalds .global _060_real_bsun 1931da177e4SLinus Torvalds_060_real_bsun: 1941da177e4SLinus Torvalds| fsave -(%sp) 1951da177e4SLinus Torvalds 1961da177e4SLinus Torvalds fmove.l %fpsr,-(%sp) 1971da177e4SLinus Torvalds andi.b #0xfe,(%sp) 1981da177e4SLinus Torvalds fmove.l (%sp)+,%fpsr 1991da177e4SLinus Torvalds 2001da177e4SLinus Torvalds bral trap | jump to trap handler 2011da177e4SLinus Torvalds 2021da177e4SLinus Torvalds| 2031da177e4SLinus Torvalds| _060_real_fline(): 2041da177e4SLinus Torvalds| 2051da177e4SLinus Torvalds| This is the exit point for the 060FPSP when an F-Line Illegal exception is 2061da177e4SLinus Torvalds| encountered. Three different types of exceptions can enter the F-Line exception 2071da177e4SLinus Torvalds| vector number 11: FP Unimplemented Instructions, FP implemented instructions when 2081da177e4SLinus Torvalds| the FPU is disabled, and F-Line Illegal instructions. The 060FPSP module 2091da177e4SLinus Torvalds| _fpsp_fline() distinguishes between the three and acts appropriately. F-Line 2101da177e4SLinus Torvalds| Illegals branch here. 2111da177e4SLinus Torvalds| 2121da177e4SLinus Torvalds .global _060_real_fline 2131da177e4SLinus Torvalds_060_real_fline: 2141da177e4SLinus Torvalds bral trap | jump to trap handler 2151da177e4SLinus Torvalds 2161da177e4SLinus Torvalds| 2171da177e4SLinus Torvalds| _060_real_fpu_disabled(): 2181da177e4SLinus Torvalds| 2191da177e4SLinus Torvalds| This is the exit point for the 060FPSP when an FPU disabled exception is 2201da177e4SLinus Torvalds| encountered. Three different types of exceptions can enter the F-Line exception 2211da177e4SLinus Torvalds| vector number 11: FP Unimplemented Instructions, FP implemented instructions when 2221da177e4SLinus Torvalds| the FPU is disabled, and F-Line Illegal instructions. The 060FPSP module 2231da177e4SLinus Torvalds| _fpsp_fline() distinguishes between the three and acts appropriately. FPU disabled 2241da177e4SLinus Torvalds| exceptions branch here. 2251da177e4SLinus Torvalds| 2261da177e4SLinus Torvalds| The sample code below enables the FPU, sets the PC field in the exception stack 2271da177e4SLinus Torvalds| frame to the PC of the instruction causing the exception, and does an "rte". 2281da177e4SLinus Torvalds| The execution of the instruction then proceeds with an enabled floating-point 2291da177e4SLinus Torvalds| unit. 2301da177e4SLinus Torvalds| 2311da177e4SLinus Torvalds .global _060_real_fpu_disabled 2321da177e4SLinus Torvalds_060_real_fpu_disabled: 2331da177e4SLinus Torvalds move.l %d0,-(%sp) | enabled the fpu 2341da177e4SLinus Torvalds .long 0x4E7A0808 |movec pcr,%d0 2351da177e4SLinus Torvalds bclr #0x1,%d0 2361da177e4SLinus Torvalds .long 0x4E7B0808 |movec %d0,pcr 2371da177e4SLinus Torvalds move.l (%sp)+,%d0 2381da177e4SLinus Torvalds 2391da177e4SLinus Torvalds move.l 0xc(%sp),0x2(%sp) | set "Current PC" 2401da177e4SLinus Torvalds rte 2411da177e4SLinus Torvalds 2421da177e4SLinus Torvalds| 2431da177e4SLinus Torvalds| _060_real_trap(): 2441da177e4SLinus Torvalds| 2451da177e4SLinus Torvalds| This is the exit point for the 060FPSP when an emulated "ftrapcc" instruction 2461da177e4SLinus Torvalds| discovers that the trap condition is true and it should branch to the operating 2471da177e4SLinus Torvalds| system handler for the trap exception vector number 7. 2481da177e4SLinus Torvalds| 2491da177e4SLinus Torvalds| The sample code below simply executes an "rte". 2501da177e4SLinus Torvalds| 2511da177e4SLinus Torvalds .global _060_real_trap 2521da177e4SLinus Torvalds_060_real_trap: 2531da177e4SLinus Torvalds bral trap | jump to trap handler 2541da177e4SLinus Torvalds 2551da177e4SLinus Torvalds|############################################################################ 2561da177e4SLinus Torvalds 2571da177e4SLinus Torvalds|################################# 2581da177e4SLinus Torvalds| (2) EXAMPLE PACKAGE ENTRY CODE # 2591da177e4SLinus Torvalds|################################# 2601da177e4SLinus Torvalds 2611da177e4SLinus Torvalds .global _060_fpsp_snan 2621da177e4SLinus Torvalds_060_fpsp_snan: 2631da177e4SLinus Torvalds bra.l _FP_CALL_TOP+0x80+0x00 2641da177e4SLinus Torvalds 2651da177e4SLinus Torvalds .global _060_fpsp_operr 2661da177e4SLinus Torvalds_060_fpsp_operr: 2671da177e4SLinus Torvalds bra.l _FP_CALL_TOP+0x80+0x08 2681da177e4SLinus Torvalds 2691da177e4SLinus Torvalds .global _060_fpsp_ovfl 2701da177e4SLinus Torvalds_060_fpsp_ovfl: 2711da177e4SLinus Torvalds bra.l _FP_CALL_TOP+0x80+0x10 2721da177e4SLinus Torvalds 2731da177e4SLinus Torvalds .global _060_fpsp_unfl 2741da177e4SLinus Torvalds_060_fpsp_unfl: 2751da177e4SLinus Torvalds bra.l _FP_CALL_TOP+0x80+0x18 2761da177e4SLinus Torvalds 2771da177e4SLinus Torvalds .global _060_fpsp_dz 2781da177e4SLinus Torvalds_060_fpsp_dz: 2791da177e4SLinus Torvalds bra.l _FP_CALL_TOP+0x80+0x20 2801da177e4SLinus Torvalds 2811da177e4SLinus Torvalds .global _060_fpsp_inex 2821da177e4SLinus Torvalds_060_fpsp_inex: 2831da177e4SLinus Torvalds bra.l _FP_CALL_TOP+0x80+0x28 2841da177e4SLinus Torvalds 2851da177e4SLinus Torvalds .global _060_fpsp_fline 2861da177e4SLinus Torvalds_060_fpsp_fline: 2871da177e4SLinus Torvalds bra.l _FP_CALL_TOP+0x80+0x30 2881da177e4SLinus Torvalds 2891da177e4SLinus Torvalds .global _060_fpsp_unsupp 2901da177e4SLinus Torvalds_060_fpsp_unsupp: 2911da177e4SLinus Torvalds bra.l _FP_CALL_TOP+0x80+0x38 2921da177e4SLinus Torvalds 2931da177e4SLinus Torvalds .global _060_fpsp_effadd 2941da177e4SLinus Torvalds_060_fpsp_effadd: 2951da177e4SLinus Torvalds bra.l _FP_CALL_TOP+0x80+0x40 2961da177e4SLinus Torvalds 2971da177e4SLinus Torvalds|############################################################################ 2981da177e4SLinus Torvalds 2991da177e4SLinus Torvalds|############################### 3001da177e4SLinus Torvalds| (3) EXAMPLE CALL-OUT SECTION # 3011da177e4SLinus Torvalds|############################### 3021da177e4SLinus Torvalds 3031da177e4SLinus Torvalds| The size of this section MUST be 128 bytes!!! 3041da177e4SLinus Torvalds 3051da177e4SLinus Torvalds_FP_CALL_TOP: 3061da177e4SLinus Torvalds .long _060_real_bsun - _FP_CALL_TOP 3071da177e4SLinus Torvalds .long _060_real_snan - _FP_CALL_TOP 3081da177e4SLinus Torvalds .long _060_real_operr - _FP_CALL_TOP 3091da177e4SLinus Torvalds .long _060_real_ovfl - _FP_CALL_TOP 3101da177e4SLinus Torvalds .long _060_real_unfl - _FP_CALL_TOP 3111da177e4SLinus Torvalds .long _060_real_dz - _FP_CALL_TOP 3121da177e4SLinus Torvalds .long _060_real_inex - _FP_CALL_TOP 3131da177e4SLinus Torvalds .long _060_real_fline - _FP_CALL_TOP 3141da177e4SLinus Torvalds .long _060_real_fpu_disabled - _FP_CALL_TOP 3151da177e4SLinus Torvalds .long _060_real_trap - _FP_CALL_TOP 3161da177e4SLinus Torvalds .long _060_real_trace - _FP_CALL_TOP 3171da177e4SLinus Torvalds .long _060_real_access - _FP_CALL_TOP 3181da177e4SLinus Torvalds .long _060_fpsp_done - _FP_CALL_TOP 3191da177e4SLinus Torvalds 3201da177e4SLinus Torvalds .long 0x00000000, 0x00000000, 0x00000000 3211da177e4SLinus Torvalds 3221da177e4SLinus Torvalds .long _060_imem_read - _FP_CALL_TOP 3231da177e4SLinus Torvalds .long _060_dmem_read - _FP_CALL_TOP 3241da177e4SLinus Torvalds .long _060_dmem_write - _FP_CALL_TOP 3251da177e4SLinus Torvalds .long _060_imem_read_word - _FP_CALL_TOP 3261da177e4SLinus Torvalds .long _060_imem_read_long - _FP_CALL_TOP 3271da177e4SLinus Torvalds .long _060_dmem_read_byte - _FP_CALL_TOP 3281da177e4SLinus Torvalds .long _060_dmem_read_word - _FP_CALL_TOP 3291da177e4SLinus Torvalds .long _060_dmem_read_long - _FP_CALL_TOP 3301da177e4SLinus Torvalds .long _060_dmem_write_byte - _FP_CALL_TOP 3311da177e4SLinus Torvalds .long _060_dmem_write_word - _FP_CALL_TOP 3321da177e4SLinus Torvalds .long _060_dmem_write_long - _FP_CALL_TOP 3331da177e4SLinus Torvalds 3341da177e4SLinus Torvalds .long 0x00000000 3351da177e4SLinus Torvalds 3361da177e4SLinus Torvalds .long 0x00000000, 0x00000000, 0x00000000, 0x00000000 3371da177e4SLinus Torvalds 3381da177e4SLinus Torvalds|############################################################################ 3391da177e4SLinus Torvalds 3401da177e4SLinus Torvalds| 060 FPSP KERNEL PACKAGE NEEDS TO GO HERE!!! 3411da177e4SLinus Torvalds 3421da177e4SLinus Torvalds#include "fpsp.sa" 343