1 /* 2 * linux/arch/ia64/kernel/irq.c 3 * 4 * Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar 5 * 6 * This file contains the code used by various IRQ handling routines: 7 * asking for different IRQs should be done through these routines 8 * instead of just grabbing them. Thus setups with different IRQ numbers 9 * shouldn't result in any weird surprises, and installing new handlers 10 * should be easier. 11 * 12 * Copyright (C) Ashok Raj<ashok.raj@intel.com>, Intel Corporation 2004 13 * 14 * 4/14/2004: Added code to handle cpu migration and do safe irq 15 * migration without losing interrupts for iosapic 16 * architecture. 17 */ 18 19 #include <asm/delay.h> 20 #include <asm/uaccess.h> 21 #include <linux/module.h> 22 #include <linux/seq_file.h> 23 #include <linux/interrupt.h> 24 #include <linux/kernel_stat.h> 25 26 /* 27 * 'what should we do if we get a hw irq event on an illegal vector'. 28 * each architecture has to answer this themselves. 29 */ 30 void ack_bad_irq(unsigned int irq) 31 { 32 printk(KERN_ERR "Unexpected irq vector 0x%x on CPU %u!\n", irq, smp_processor_id()); 33 } 34 35 #ifdef CONFIG_IA64_GENERIC 36 ia64_vector __ia64_irq_to_vector(int irq) 37 { 38 return irq_cfg[irq].vector; 39 } 40 41 unsigned int __ia64_local_vector_to_irq (ia64_vector vec) 42 { 43 return __get_cpu_var(vector_irq)[vec]; 44 } 45 #endif 46 47 /* 48 * Interrupt statistics: 49 */ 50 51 atomic_t irq_err_count; 52 53 /* 54 * /proc/interrupts printing: 55 */ 56 57 int show_interrupts(struct seq_file *p, void *v) 58 { 59 int i = *(loff_t *) v, j; 60 struct irqaction * action; 61 unsigned long flags; 62 63 if (i == 0) { 64 seq_printf(p, " "); 65 for_each_online_cpu(j) { 66 seq_printf(p, "CPU%d ",j); 67 } 68 seq_putc(p, '\n'); 69 } 70 71 if (i < NR_IRQS) { 72 spin_lock_irqsave(&irq_desc[i].lock, flags); 73 action = irq_desc[i].action; 74 if (!action) 75 goto skip; 76 seq_printf(p, "%3d: ",i); 77 #ifndef CONFIG_SMP 78 seq_printf(p, "%10u ", kstat_irqs(i)); 79 #else 80 for_each_online_cpu(j) { 81 seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); 82 } 83 #endif 84 seq_printf(p, " %14s", irq_desc[i].chip->name); 85 seq_printf(p, " %s", action->name); 86 87 for (action=action->next; action; action = action->next) 88 seq_printf(p, ", %s", action->name); 89 90 seq_putc(p, '\n'); 91 skip: 92 spin_unlock_irqrestore(&irq_desc[i].lock, flags); 93 } else if (i == NR_IRQS) 94 seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count)); 95 return 0; 96 } 97 98 #ifdef CONFIG_SMP 99 static char irq_redir [NR_IRQS]; // = { [0 ... NR_IRQS-1] = 1 }; 100 101 void set_irq_affinity_info (unsigned int irq, int hwid, int redir) 102 { 103 cpumask_t mask = CPU_MASK_NONE; 104 105 cpu_set(cpu_logical_id(hwid), mask); 106 107 if (irq < NR_IRQS) { 108 irq_desc[irq].affinity = mask; 109 irq_redir[irq] = (char) (redir & 0xff); 110 } 111 } 112 113 bool is_affinity_mask_valid(cpumask_t cpumask) 114 { 115 if (ia64_platform_is("sn2")) { 116 /* Only allow one CPU to be specified in the smp_affinity mask */ 117 if (cpus_weight(cpumask) != 1) 118 return false; 119 } 120 return true; 121 } 122 123 #endif /* CONFIG_SMP */ 124 125 #ifdef CONFIG_HOTPLUG_CPU 126 unsigned int vectors_in_migration[NR_IRQS]; 127 128 /* 129 * Since cpu_online_map is already updated, we just need to check for 130 * affinity that has zeros 131 */ 132 static void migrate_irqs(void) 133 { 134 cpumask_t mask; 135 irq_desc_t *desc; 136 int irq, new_cpu; 137 138 for (irq=0; irq < NR_IRQS; irq++) { 139 desc = irq_desc + irq; 140 141 if (desc->status == IRQ_DISABLED) 142 continue; 143 144 /* 145 * No handling for now. 146 * TBD: Implement a disable function so we can now 147 * tell CPU not to respond to these local intr sources. 148 * such as ITV,CPEI,MCA etc. 149 */ 150 if (desc->status == IRQ_PER_CPU) 151 continue; 152 153 cpus_and(mask, irq_desc[irq].affinity, cpu_online_map); 154 if (any_online_cpu(mask) == NR_CPUS) { 155 /* 156 * Save it for phase 2 processing 157 */ 158 vectors_in_migration[irq] = irq; 159 160 new_cpu = any_online_cpu(cpu_online_map); 161 mask = cpumask_of_cpu(new_cpu); 162 163 /* 164 * Al three are essential, currently WARN_ON.. maybe panic? 165 */ 166 if (desc->chip && desc->chip->disable && 167 desc->chip->enable && desc->chip->set_affinity) { 168 desc->chip->disable(irq); 169 desc->chip->set_affinity(irq, mask); 170 desc->chip->enable(irq); 171 } else { 172 WARN_ON((!(desc->chip) || !(desc->chip->disable) || 173 !(desc->chip->enable) || 174 !(desc->chip->set_affinity))); 175 } 176 } 177 } 178 } 179 180 void fixup_irqs(void) 181 { 182 unsigned int irq; 183 extern void ia64_process_pending_intr(void); 184 extern void ia64_disable_timer(void); 185 extern volatile int time_keeper_id; 186 187 ia64_disable_timer(); 188 189 /* 190 * Find a new timesync master 191 */ 192 if (smp_processor_id() == time_keeper_id) { 193 time_keeper_id = first_cpu(cpu_online_map); 194 printk ("CPU %d is now promoted to time-keeper master\n", time_keeper_id); 195 } 196 197 /* 198 * Phase 1: Locate IRQs bound to this cpu and 199 * relocate them for cpu removal. 200 */ 201 migrate_irqs(); 202 203 /* 204 * Phase 2: Perform interrupt processing for all entries reported in 205 * local APIC. 206 */ 207 ia64_process_pending_intr(); 208 209 /* 210 * Phase 3: Now handle any interrupts not captured in local APIC. 211 * This is to account for cases that device interrupted during the time the 212 * rte was being disabled and re-programmed. 213 */ 214 for (irq=0; irq < NR_IRQS; irq++) { 215 if (vectors_in_migration[irq]) { 216 struct pt_regs *old_regs = set_irq_regs(NULL); 217 218 vectors_in_migration[irq]=0; 219 generic_handle_irq(irq); 220 set_irq_regs(old_regs); 221 } 222 } 223 224 /* 225 * Now let processor die. We do irq disable and max_xtp() to 226 * ensure there is no more interrupts routed to this processor. 227 * But the local timer interrupt can have 1 pending which we 228 * take care in timer_interrupt(). 229 */ 230 max_xtp(); 231 local_irq_disable(); 232 } 233 #endif 234