xref: /openbmc/linux/arch/arm64/mm/mmu.c (revision f4710445458c0a1bd1c3c014ada2e7d7dc7b882f)
1c1cc1552SCatalin Marinas /*
2c1cc1552SCatalin Marinas  * Based on arch/arm/mm/mmu.c
3c1cc1552SCatalin Marinas  *
4c1cc1552SCatalin Marinas  * Copyright (C) 1995-2005 Russell King
5c1cc1552SCatalin Marinas  * Copyright (C) 2012 ARM Ltd.
6c1cc1552SCatalin Marinas  *
7c1cc1552SCatalin Marinas  * This program is free software; you can redistribute it and/or modify
8c1cc1552SCatalin Marinas  * it under the terms of the GNU General Public License version 2 as
9c1cc1552SCatalin Marinas  * published by the Free Software Foundation.
10c1cc1552SCatalin Marinas  *
11c1cc1552SCatalin Marinas  * This program is distributed in the hope that it will be useful,
12c1cc1552SCatalin Marinas  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13c1cc1552SCatalin Marinas  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14c1cc1552SCatalin Marinas  * GNU General Public License for more details.
15c1cc1552SCatalin Marinas  *
16c1cc1552SCatalin Marinas  * You should have received a copy of the GNU General Public License
17c1cc1552SCatalin Marinas  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
18c1cc1552SCatalin Marinas  */
19c1cc1552SCatalin Marinas 
20c1cc1552SCatalin Marinas #include <linux/export.h>
21c1cc1552SCatalin Marinas #include <linux/kernel.h>
22c1cc1552SCatalin Marinas #include <linux/errno.h>
23c1cc1552SCatalin Marinas #include <linux/init.h>
2461bd93ceSArd Biesheuvel #include <linux/libfdt.h>
25c1cc1552SCatalin Marinas #include <linux/mman.h>
26c1cc1552SCatalin Marinas #include <linux/nodemask.h>
27c1cc1552SCatalin Marinas #include <linux/memblock.h>
28c1cc1552SCatalin Marinas #include <linux/fs.h>
292475ff9dSCatalin Marinas #include <linux/io.h>
3041089357SCatalin Marinas #include <linux/slab.h>
31da141706SLaura Abbott #include <linux/stop_machine.h>
32c1cc1552SCatalin Marinas 
3321ab99c2SMark Rutland #include <asm/barrier.h>
34c1cc1552SCatalin Marinas #include <asm/cputype.h>
35af86e597SLaura Abbott #include <asm/fixmap.h>
36b433dce0SSuzuki K. Poulose #include <asm/kernel-pgtable.h>
37c1cc1552SCatalin Marinas #include <asm/sections.h>
38c1cc1552SCatalin Marinas #include <asm/setup.h>
39c1cc1552SCatalin Marinas #include <asm/sizes.h>
40c1cc1552SCatalin Marinas #include <asm/tlb.h>
41c79b954bSJungseok Lee #include <asm/memblock.h>
42c1cc1552SCatalin Marinas #include <asm/mmu_context.h>
43c1cc1552SCatalin Marinas 
44c1cc1552SCatalin Marinas #include "mm.h"
45c1cc1552SCatalin Marinas 
46dd006da2SArd Biesheuvel u64 idmap_t0sz = TCR_T0SZ(VA_BITS);
47dd006da2SArd Biesheuvel 
48c1cc1552SCatalin Marinas /*
49c1cc1552SCatalin Marinas  * Empty_zero_page is a special page that is used for zero-initialized data
50c1cc1552SCatalin Marinas  * and COW.
51c1cc1552SCatalin Marinas  */
525227cfa7SMark Rutland unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)] __page_aligned_bss;
53c1cc1552SCatalin Marinas EXPORT_SYMBOL(empty_zero_page);
54c1cc1552SCatalin Marinas 
55c1cc1552SCatalin Marinas pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
56c1cc1552SCatalin Marinas 			      unsigned long size, pgprot_t vma_prot)
57c1cc1552SCatalin Marinas {
58c1cc1552SCatalin Marinas 	if (!pfn_valid(pfn))
59c1cc1552SCatalin Marinas 		return pgprot_noncached(vma_prot);
60c1cc1552SCatalin Marinas 	else if (file->f_flags & O_SYNC)
61c1cc1552SCatalin Marinas 		return pgprot_writecombine(vma_prot);
62c1cc1552SCatalin Marinas 	return vma_prot;
63c1cc1552SCatalin Marinas }
64c1cc1552SCatalin Marinas EXPORT_SYMBOL(phys_mem_access_prot);
65c1cc1552SCatalin Marinas 
66*f4710445SMark Rutland static phys_addr_t __init early_pgtable_alloc(void)
67c1cc1552SCatalin Marinas {
687142392dSSuzuki K. Poulose 	phys_addr_t phys;
697142392dSSuzuki K. Poulose 	void *ptr;
707142392dSSuzuki K. Poulose 
7121ab99c2SMark Rutland 	phys = memblock_alloc(PAGE_SIZE, PAGE_SIZE);
727142392dSSuzuki K. Poulose 	BUG_ON(!phys);
73*f4710445SMark Rutland 
74*f4710445SMark Rutland 	/*
75*f4710445SMark Rutland 	 * The FIX_{PGD,PUD,PMD} slots may be in active use, but the FIX_PTE
76*f4710445SMark Rutland 	 * slot will be free, so we can (ab)use the FIX_PTE slot to initialise
77*f4710445SMark Rutland 	 * any level of table.
78*f4710445SMark Rutland 	 */
79*f4710445SMark Rutland 	ptr = pte_set_fixmap(phys);
80*f4710445SMark Rutland 
8121ab99c2SMark Rutland 	memset(ptr, 0, PAGE_SIZE);
8221ab99c2SMark Rutland 
83*f4710445SMark Rutland 	/*
84*f4710445SMark Rutland 	 * Implicit barriers also ensure the zeroed page is visible to the page
85*f4710445SMark Rutland 	 * table walker
86*f4710445SMark Rutland 	 */
87*f4710445SMark Rutland 	pte_clear_fixmap();
88*f4710445SMark Rutland 
89*f4710445SMark Rutland 	return phys;
90c1cc1552SCatalin Marinas }
91c1cc1552SCatalin Marinas 
92da141706SLaura Abbott /*
93da141706SLaura Abbott  * remap a PMD into pages
94da141706SLaura Abbott  */
95da141706SLaura Abbott static void split_pmd(pmd_t *pmd, pte_t *pte)
96da141706SLaura Abbott {
97da141706SLaura Abbott 	unsigned long pfn = pmd_pfn(*pmd);
98da141706SLaura Abbott 	int i = 0;
99da141706SLaura Abbott 
100da141706SLaura Abbott 	do {
101da141706SLaura Abbott 		/*
102da141706SLaura Abbott 		 * Need to have the least restrictive permissions available
103667c2759SCatalin Marinas 		 * permissions will be fixed up later
104da141706SLaura Abbott 		 */
105667c2759SCatalin Marinas 		set_pte(pte, pfn_pte(pfn, PAGE_KERNEL_EXEC));
106da141706SLaura Abbott 		pfn++;
107da141706SLaura Abbott 	} while (pte++, i++, i < PTRS_PER_PTE);
108da141706SLaura Abbott }
109da141706SLaura Abbott 
110da141706SLaura Abbott static void alloc_init_pte(pmd_t *pmd, unsigned long addr,
111667c2759SCatalin Marinas 				  unsigned long end, unsigned long pfn,
112da141706SLaura Abbott 				  pgprot_t prot,
113*f4710445SMark Rutland 				  phys_addr_t (*pgtable_alloc)(void))
114c1cc1552SCatalin Marinas {
115c1cc1552SCatalin Marinas 	pte_t *pte;
116c1cc1552SCatalin Marinas 
117a1c76574SMark Rutland 	if (pmd_none(*pmd) || pmd_sect(*pmd)) {
118*f4710445SMark Rutland 		phys_addr_t pte_phys = pgtable_alloc();
119*f4710445SMark Rutland 		pte = pte_set_fixmap(pte_phys);
120da141706SLaura Abbott 		if (pmd_sect(*pmd))
121da141706SLaura Abbott 			split_pmd(pmd, pte);
122*f4710445SMark Rutland 		__pmd_populate(pmd, pte_phys, PMD_TYPE_TABLE);
123da141706SLaura Abbott 		flush_tlb_all();
124*f4710445SMark Rutland 		pte_clear_fixmap();
125c1cc1552SCatalin Marinas 	}
126a1c76574SMark Rutland 	BUG_ON(pmd_bad(*pmd));
127c1cc1552SCatalin Marinas 
128*f4710445SMark Rutland 	pte = pte_set_fixmap_offset(pmd, addr);
129c1cc1552SCatalin Marinas 	do {
130667c2759SCatalin Marinas 		set_pte(pte, pfn_pte(pfn, prot));
131667c2759SCatalin Marinas 		pfn++;
132667c2759SCatalin Marinas 	} while (pte++, addr += PAGE_SIZE, addr != end);
133*f4710445SMark Rutland 
134*f4710445SMark Rutland 	pte_clear_fixmap();
135c1cc1552SCatalin Marinas }
136c1cc1552SCatalin Marinas 
1379a17a213SJisheng Zhang static void split_pud(pud_t *old_pud, pmd_t *pmd)
138da141706SLaura Abbott {
139da141706SLaura Abbott 	unsigned long addr = pud_pfn(*old_pud) << PAGE_SHIFT;
140da141706SLaura Abbott 	pgprot_t prot = __pgprot(pud_val(*old_pud) ^ addr);
141da141706SLaura Abbott 	int i = 0;
142da141706SLaura Abbott 
143da141706SLaura Abbott 	do {
1441e43ba9cSArd Biesheuvel 		set_pmd(pmd, __pmd(addr | pgprot_val(prot)));
145da141706SLaura Abbott 		addr += PMD_SIZE;
146da141706SLaura Abbott 	} while (pmd++, i++, i < PTRS_PER_PMD);
147da141706SLaura Abbott }
148da141706SLaura Abbott 
149da141706SLaura Abbott static void alloc_init_pmd(struct mm_struct *mm, pud_t *pud,
150e1e1fddaSArd Biesheuvel 				  unsigned long addr, unsigned long end,
151da141706SLaura Abbott 				  phys_addr_t phys, pgprot_t prot,
152*f4710445SMark Rutland 				  phys_addr_t (*pgtable_alloc)(void))
153c1cc1552SCatalin Marinas {
154c1cc1552SCatalin Marinas 	pmd_t *pmd;
155c1cc1552SCatalin Marinas 	unsigned long next;
156c1cc1552SCatalin Marinas 
157c1cc1552SCatalin Marinas 	/*
158c1cc1552SCatalin Marinas 	 * Check for initial section mappings in the pgd/pud and remove them.
159c1cc1552SCatalin Marinas 	 */
160a1c76574SMark Rutland 	if (pud_none(*pud) || pud_sect(*pud)) {
161*f4710445SMark Rutland 		phys_addr_t pmd_phys = pgtable_alloc();
162*f4710445SMark Rutland 		pmd = pmd_set_fixmap(pmd_phys);
163da141706SLaura Abbott 		if (pud_sect(*pud)) {
164da141706SLaura Abbott 			/*
165da141706SLaura Abbott 			 * need to have the 1G of mappings continue to be
166da141706SLaura Abbott 			 * present
167da141706SLaura Abbott 			 */
168da141706SLaura Abbott 			split_pud(pud, pmd);
169da141706SLaura Abbott 		}
170*f4710445SMark Rutland 		__pud_populate(pud, pmd_phys, PUD_TYPE_TABLE);
171da141706SLaura Abbott 		flush_tlb_all();
172*f4710445SMark Rutland 		pmd_clear_fixmap();
173c1cc1552SCatalin Marinas 	}
174a1c76574SMark Rutland 	BUG_ON(pud_bad(*pud));
175c1cc1552SCatalin Marinas 
176*f4710445SMark Rutland 	pmd = pmd_set_fixmap_offset(pud, addr);
177c1cc1552SCatalin Marinas 	do {
178c1cc1552SCatalin Marinas 		next = pmd_addr_end(addr, end);
179c1cc1552SCatalin Marinas 		/* try section mapping first */
180a55f9929SCatalin Marinas 		if (((addr | next | phys) & ~SECTION_MASK) == 0) {
181a55f9929SCatalin Marinas 			pmd_t old_pmd =*pmd;
1828ce837ceSArd Biesheuvel 			set_pmd(pmd, __pmd(phys |
1838ce837ceSArd Biesheuvel 					   pgprot_val(mk_sect_prot(prot))));
184a55f9929SCatalin Marinas 			/*
185a55f9929SCatalin Marinas 			 * Check for previous table entries created during
186a55f9929SCatalin Marinas 			 * boot (__create_page_tables) and flush them.
187a55f9929SCatalin Marinas 			 */
188523d6e9fSzhichang.yuan 			if (!pmd_none(old_pmd)) {
189a55f9929SCatalin Marinas 				flush_tlb_all();
190523d6e9fSzhichang.yuan 				if (pmd_table(old_pmd)) {
191316b39dbSMark Rutland 					phys_addr_t table = pmd_page_paddr(old_pmd);
19241089357SCatalin Marinas 					if (!WARN_ON_ONCE(slab_is_available()))
193523d6e9fSzhichang.yuan 						memblock_free(table, PAGE_SIZE);
194523d6e9fSzhichang.yuan 				}
195523d6e9fSzhichang.yuan 			}
196a55f9929SCatalin Marinas 		} else {
197667c2759SCatalin Marinas 			alloc_init_pte(pmd, addr, next, __phys_to_pfn(phys),
19821ab99c2SMark Rutland 				       prot, pgtable_alloc);
199a55f9929SCatalin Marinas 		}
200c1cc1552SCatalin Marinas 		phys += next - addr;
201c1cc1552SCatalin Marinas 	} while (pmd++, addr = next, addr != end);
202*f4710445SMark Rutland 
203*f4710445SMark Rutland 	pmd_clear_fixmap();
204c1cc1552SCatalin Marinas }
205c1cc1552SCatalin Marinas 
206da141706SLaura Abbott static inline bool use_1G_block(unsigned long addr, unsigned long next,
207da141706SLaura Abbott 			unsigned long phys)
208da141706SLaura Abbott {
209da141706SLaura Abbott 	if (PAGE_SHIFT != 12)
210da141706SLaura Abbott 		return false;
211da141706SLaura Abbott 
212da141706SLaura Abbott 	if (((addr | next | phys) & ~PUD_MASK) != 0)
213da141706SLaura Abbott 		return false;
214da141706SLaura Abbott 
215da141706SLaura Abbott 	return true;
216da141706SLaura Abbott }
217da141706SLaura Abbott 
218da141706SLaura Abbott static void alloc_init_pud(struct mm_struct *mm, pgd_t *pgd,
219e1e1fddaSArd Biesheuvel 				  unsigned long addr, unsigned long end,
220da141706SLaura Abbott 				  phys_addr_t phys, pgprot_t prot,
221*f4710445SMark Rutland 				  phys_addr_t (*pgtable_alloc)(void))
222c1cc1552SCatalin Marinas {
223c79b954bSJungseok Lee 	pud_t *pud;
224c1cc1552SCatalin Marinas 	unsigned long next;
225c1cc1552SCatalin Marinas 
226c79b954bSJungseok Lee 	if (pgd_none(*pgd)) {
227*f4710445SMark Rutland 		phys_addr_t pud_phys = pgtable_alloc();
228*f4710445SMark Rutland 		__pgd_populate(pgd, pud_phys, PUD_TYPE_TABLE);
229c79b954bSJungseok Lee 	}
230c79b954bSJungseok Lee 	BUG_ON(pgd_bad(*pgd));
231c79b954bSJungseok Lee 
232*f4710445SMark Rutland 	pud = pud_set_fixmap_offset(pgd, addr);
233c1cc1552SCatalin Marinas 	do {
234c1cc1552SCatalin Marinas 		next = pud_addr_end(addr, end);
235206a2a73SSteve Capper 
236206a2a73SSteve Capper 		/*
237206a2a73SSteve Capper 		 * For 4K granule only, attempt to put down a 1GB block
238206a2a73SSteve Capper 		 */
239da141706SLaura Abbott 		if (use_1G_block(addr, next, phys)) {
240206a2a73SSteve Capper 			pud_t old_pud = *pud;
2418ce837ceSArd Biesheuvel 			set_pud(pud, __pud(phys |
2428ce837ceSArd Biesheuvel 					   pgprot_val(mk_sect_prot(prot))));
243206a2a73SSteve Capper 
244206a2a73SSteve Capper 			/*
245206a2a73SSteve Capper 			 * If we have an old value for a pud, it will
246206a2a73SSteve Capper 			 * be pointing to a pmd table that we no longer
247206a2a73SSteve Capper 			 * need (from swapper_pg_dir).
248206a2a73SSteve Capper 			 *
249206a2a73SSteve Capper 			 * Look up the old pmd table and free it.
250206a2a73SSteve Capper 			 */
251206a2a73SSteve Capper 			if (!pud_none(old_pud)) {
252206a2a73SSteve Capper 				flush_tlb_all();
253523d6e9fSzhichang.yuan 				if (pud_table(old_pud)) {
254316b39dbSMark Rutland 					phys_addr_t table = pud_page_paddr(old_pud);
25541089357SCatalin Marinas 					if (!WARN_ON_ONCE(slab_is_available()))
256523d6e9fSzhichang.yuan 						memblock_free(table, PAGE_SIZE);
257523d6e9fSzhichang.yuan 				}
258206a2a73SSteve Capper 			}
259206a2a73SSteve Capper 		} else {
26021ab99c2SMark Rutland 			alloc_init_pmd(mm, pud, addr, next, phys, prot,
26121ab99c2SMark Rutland 				       pgtable_alloc);
262206a2a73SSteve Capper 		}
263c1cc1552SCatalin Marinas 		phys += next - addr;
264c1cc1552SCatalin Marinas 	} while (pud++, addr = next, addr != end);
265*f4710445SMark Rutland 
266*f4710445SMark Rutland 	pud_clear_fixmap();
267c1cc1552SCatalin Marinas }
268c1cc1552SCatalin Marinas 
269c1cc1552SCatalin Marinas /*
270c1cc1552SCatalin Marinas  * Create the page directory entries and any necessary page tables for the
271c1cc1552SCatalin Marinas  * mapping specified by 'md'.
272c1cc1552SCatalin Marinas  */
273da141706SLaura Abbott static void  __create_mapping(struct mm_struct *mm, pgd_t *pgd,
274e1e1fddaSArd Biesheuvel 				    phys_addr_t phys, unsigned long virt,
275da141706SLaura Abbott 				    phys_addr_t size, pgprot_t prot,
276*f4710445SMark Rutland 				    phys_addr_t (*pgtable_alloc)(void))
277c1cc1552SCatalin Marinas {
278c1cc1552SCatalin Marinas 	unsigned long addr, length, end, next;
279c1cc1552SCatalin Marinas 
280cc5d2b3bSMark Rutland 	/*
281cc5d2b3bSMark Rutland 	 * If the virtual and physical address don't have the same offset
282cc5d2b3bSMark Rutland 	 * within a page, we cannot map the region as the caller expects.
283cc5d2b3bSMark Rutland 	 */
284cc5d2b3bSMark Rutland 	if (WARN_ON((phys ^ virt) & ~PAGE_MASK))
285cc5d2b3bSMark Rutland 		return;
286cc5d2b3bSMark Rutland 
2879c4e08a3SMark Rutland 	phys &= PAGE_MASK;
288c1cc1552SCatalin Marinas 	addr = virt & PAGE_MASK;
289c1cc1552SCatalin Marinas 	length = PAGE_ALIGN(size + (virt & ~PAGE_MASK));
290c1cc1552SCatalin Marinas 
291c1cc1552SCatalin Marinas 	end = addr + length;
292c1cc1552SCatalin Marinas 	do {
293c1cc1552SCatalin Marinas 		next = pgd_addr_end(addr, end);
29421ab99c2SMark Rutland 		alloc_init_pud(mm, pgd, addr, next, phys, prot, pgtable_alloc);
295c1cc1552SCatalin Marinas 		phys += next - addr;
296c1cc1552SCatalin Marinas 	} while (pgd++, addr = next, addr != end);
297c1cc1552SCatalin Marinas }
298c1cc1552SCatalin Marinas 
299*f4710445SMark Rutland static phys_addr_t late_pgtable_alloc(void)
300da141706SLaura Abbott {
30121ab99c2SMark Rutland 	void *ptr = (void *)__get_free_page(PGALLOC_GFP);
302da141706SLaura Abbott 	BUG_ON(!ptr);
30321ab99c2SMark Rutland 
30421ab99c2SMark Rutland 	/* Ensure the zeroed page is visible to the page table walker */
30521ab99c2SMark Rutland 	dsb(ishst);
306*f4710445SMark Rutland 	return __pa(ptr);
307da141706SLaura Abbott }
308da141706SLaura Abbott 
309c53e0baaSMark Rutland static void __init create_mapping(phys_addr_t phys, unsigned long virt,
310da141706SLaura Abbott 				  phys_addr_t size, pgprot_t prot)
311d7ecbddfSMark Salter {
312d7ecbddfSMark Salter 	if (virt < VMALLOC_START) {
313d7ecbddfSMark Salter 		pr_warn("BUG: not creating mapping for %pa at 0x%016lx - outside kernel range\n",
314d7ecbddfSMark Salter 			&phys, virt);
315d7ecbddfSMark Salter 		return;
316d7ecbddfSMark Salter 	}
317e2c30ee3SMark Rutland 	__create_mapping(&init_mm, pgd_offset_k(virt), phys, virt,
31821ab99c2SMark Rutland 			 size, prot, early_pgtable_alloc);
319d7ecbddfSMark Salter }
320d7ecbddfSMark Salter 
3218ce837ceSArd Biesheuvel void __init create_pgd_mapping(struct mm_struct *mm, phys_addr_t phys,
3228ce837ceSArd Biesheuvel 			       unsigned long virt, phys_addr_t size,
3238ce837ceSArd Biesheuvel 			       pgprot_t prot)
3248ce837ceSArd Biesheuvel {
325da141706SLaura Abbott 	__create_mapping(mm, pgd_offset(mm, virt), phys, virt, size, prot,
32621ab99c2SMark Rutland 				late_pgtable_alloc);
327d7ecbddfSMark Salter }
328d7ecbddfSMark Salter 
329da141706SLaura Abbott static void create_mapping_late(phys_addr_t phys, unsigned long virt,
330da141706SLaura Abbott 				  phys_addr_t size, pgprot_t prot)
331da141706SLaura Abbott {
332da141706SLaura Abbott 	if (virt < VMALLOC_START) {
333da141706SLaura Abbott 		pr_warn("BUG: not creating mapping for %pa at 0x%016lx - outside kernel range\n",
334da141706SLaura Abbott 			&phys, virt);
335da141706SLaura Abbott 		return;
336da141706SLaura Abbott 	}
337da141706SLaura Abbott 
338e2c30ee3SMark Rutland 	return __create_mapping(&init_mm, pgd_offset_k(virt),
33921ab99c2SMark Rutland 				phys, virt, size, prot, late_pgtable_alloc);
340da141706SLaura Abbott }
341da141706SLaura Abbott 
342da141706SLaura Abbott #ifdef CONFIG_DEBUG_RODATA
343da141706SLaura Abbott static void __init __map_memblock(phys_addr_t start, phys_addr_t end)
344da141706SLaura Abbott {
345da141706SLaura Abbott 	/*
346da141706SLaura Abbott 	 * Set up the executable regions using the existing section mappings
347da141706SLaura Abbott 	 * for now. This will get more fine grained later once all memory
348da141706SLaura Abbott 	 * is mapped
349da141706SLaura Abbott 	 */
3504fee9f36SArd Biesheuvel 	unsigned long kernel_x_start = round_down(__pa(_stext), SWAPPER_BLOCK_SIZE);
3514fee9f36SArd Biesheuvel 	unsigned long kernel_x_end = round_up(__pa(__init_end), SWAPPER_BLOCK_SIZE);
352da141706SLaura Abbott 
353da141706SLaura Abbott 	if (end < kernel_x_start) {
354da141706SLaura Abbott 		create_mapping(start, __phys_to_virt(start),
355da141706SLaura Abbott 			end - start, PAGE_KERNEL);
356da141706SLaura Abbott 	} else if (start >= kernel_x_end) {
357da141706SLaura Abbott 		create_mapping(start, __phys_to_virt(start),
358da141706SLaura Abbott 			end - start, PAGE_KERNEL);
359da141706SLaura Abbott 	} else {
360da141706SLaura Abbott 		if (start < kernel_x_start)
361da141706SLaura Abbott 			create_mapping(start, __phys_to_virt(start),
362da141706SLaura Abbott 				kernel_x_start - start,
363da141706SLaura Abbott 				PAGE_KERNEL);
364da141706SLaura Abbott 		create_mapping(kernel_x_start,
365da141706SLaura Abbott 				__phys_to_virt(kernel_x_start),
366da141706SLaura Abbott 				kernel_x_end - kernel_x_start,
367da141706SLaura Abbott 				PAGE_KERNEL_EXEC);
368da141706SLaura Abbott 		if (kernel_x_end < end)
369da141706SLaura Abbott 			create_mapping(kernel_x_end,
370da141706SLaura Abbott 				__phys_to_virt(kernel_x_end),
371da141706SLaura Abbott 				end - kernel_x_end,
372da141706SLaura Abbott 				PAGE_KERNEL);
373da141706SLaura Abbott 	}
374da141706SLaura Abbott 
375da141706SLaura Abbott }
376da141706SLaura Abbott #else
377da141706SLaura Abbott static void __init __map_memblock(phys_addr_t start, phys_addr_t end)
378da141706SLaura Abbott {
379da141706SLaura Abbott 	create_mapping(start, __phys_to_virt(start), end - start,
380da141706SLaura Abbott 			PAGE_KERNEL_EXEC);
381da141706SLaura Abbott }
382da141706SLaura Abbott #endif
383da141706SLaura Abbott 
384c1cc1552SCatalin Marinas static void __init map_mem(void)
385c1cc1552SCatalin Marinas {
386c1cc1552SCatalin Marinas 	struct memblock_region *reg;
387e25208f7SCatalin Marinas 	phys_addr_t limit;
388c1cc1552SCatalin Marinas 
389f6bc87c3SSteve Capper 	/*
390f6bc87c3SSteve Capper 	 * Temporarily limit the memblock range. We need to do this as
391f6bc87c3SSteve Capper 	 * create_mapping requires puds, pmds and ptes to be allocated from
392f6bc87c3SSteve Capper 	 * memory addressable from the initial direct kernel mapping.
393f6bc87c3SSteve Capper 	 *
3943dec0fe4SCatalin Marinas 	 * The initial direct kernel mapping, located at swapper_pg_dir, gives
395b433dce0SSuzuki K. Poulose 	 * us PUD_SIZE (with SECTION maps) or PMD_SIZE (without SECTION maps,
396b433dce0SSuzuki K. Poulose 	 * memory starting from PHYS_OFFSET (which must be aligned to 2MB as
397b433dce0SSuzuki K. Poulose 	 * per Documentation/arm64/booting.txt).
398f6bc87c3SSteve Capper 	 */
399b433dce0SSuzuki K. Poulose 	limit = PHYS_OFFSET + SWAPPER_INIT_MAP_SIZE;
400e25208f7SCatalin Marinas 	memblock_set_current_limit(limit);
401f6bc87c3SSteve Capper 
402c1cc1552SCatalin Marinas 	/* map all the memory banks */
403c1cc1552SCatalin Marinas 	for_each_memblock(memory, reg) {
404c1cc1552SCatalin Marinas 		phys_addr_t start = reg->base;
405c1cc1552SCatalin Marinas 		phys_addr_t end = start + reg->size;
406c1cc1552SCatalin Marinas 
407c1cc1552SCatalin Marinas 		if (start >= end)
408c1cc1552SCatalin Marinas 			break;
40968709f45SArd Biesheuvel 		if (memblock_is_nomap(reg))
41068709f45SArd Biesheuvel 			continue;
411c1cc1552SCatalin Marinas 
412b433dce0SSuzuki K. Poulose 		if (ARM64_SWAPPER_USES_SECTION_MAPS) {
413e25208f7SCatalin Marinas 			/*
414e25208f7SCatalin Marinas 			 * For the first memory bank align the start address and
415e25208f7SCatalin Marinas 			 * current memblock limit to prevent create_mapping() from
416b433dce0SSuzuki K. Poulose 			 * allocating pte page tables from unmapped memory. With
417b433dce0SSuzuki K. Poulose 			 * the section maps, if the first block doesn't end on section
418b433dce0SSuzuki K. Poulose 			 * size boundary, create_mapping() will try to allocate a pte
419b433dce0SSuzuki K. Poulose 			 * page, which may be returned from an unmapped area.
420b433dce0SSuzuki K. Poulose 			 * When section maps are not used, the pte page table for the
421b433dce0SSuzuki K. Poulose 			 * current limit is already present in swapper_pg_dir.
422e25208f7SCatalin Marinas 			 */
423e25208f7SCatalin Marinas 			if (start < limit)
424b433dce0SSuzuki K. Poulose 				start = ALIGN(start, SECTION_SIZE);
425e25208f7SCatalin Marinas 			if (end < limit) {
426b433dce0SSuzuki K. Poulose 				limit = end & SECTION_MASK;
427e25208f7SCatalin Marinas 				memblock_set_current_limit(limit);
428e25208f7SCatalin Marinas 			}
429b433dce0SSuzuki K. Poulose 		}
430da141706SLaura Abbott 		__map_memblock(start, end);
431c1cc1552SCatalin Marinas 	}
432f6bc87c3SSteve Capper 
433f6bc87c3SSteve Capper 	/* Limit no longer required. */
434f6bc87c3SSteve Capper 	memblock_set_current_limit(MEMBLOCK_ALLOC_ANYWHERE);
435c1cc1552SCatalin Marinas }
436c1cc1552SCatalin Marinas 
4379a17a213SJisheng Zhang static void __init fixup_executable(void)
438da141706SLaura Abbott {
439da141706SLaura Abbott #ifdef CONFIG_DEBUG_RODATA
440da141706SLaura Abbott 	/* now that we are actually fully mapped, make the start/end more fine grained */
4414fee9f36SArd Biesheuvel 	if (!IS_ALIGNED((unsigned long)_stext, SWAPPER_BLOCK_SIZE)) {
442da141706SLaura Abbott 		unsigned long aligned_start = round_down(__pa(_stext),
4434fee9f36SArd Biesheuvel 							 SWAPPER_BLOCK_SIZE);
444da141706SLaura Abbott 
445da141706SLaura Abbott 		create_mapping(aligned_start, __phys_to_virt(aligned_start),
446da141706SLaura Abbott 				__pa(_stext) - aligned_start,
447da141706SLaura Abbott 				PAGE_KERNEL);
448da141706SLaura Abbott 	}
449da141706SLaura Abbott 
4504fee9f36SArd Biesheuvel 	if (!IS_ALIGNED((unsigned long)__init_end, SWAPPER_BLOCK_SIZE)) {
451da141706SLaura Abbott 		unsigned long aligned_end = round_up(__pa(__init_end),
4524fee9f36SArd Biesheuvel 							  SWAPPER_BLOCK_SIZE);
453da141706SLaura Abbott 		create_mapping(__pa(__init_end), (unsigned long)__init_end,
454da141706SLaura Abbott 				aligned_end - __pa(__init_end),
455da141706SLaura Abbott 				PAGE_KERNEL);
456da141706SLaura Abbott 	}
457da141706SLaura Abbott #endif
458da141706SLaura Abbott }
459da141706SLaura Abbott 
460da141706SLaura Abbott #ifdef CONFIG_DEBUG_RODATA
461da141706SLaura Abbott void mark_rodata_ro(void)
462da141706SLaura Abbott {
463da141706SLaura Abbott 	create_mapping_late(__pa(_stext), (unsigned long)_stext,
464da141706SLaura Abbott 				(unsigned long)_etext - (unsigned long)_stext,
4650b2aa5b8SLaura Abbott 				PAGE_KERNEL_ROX);
466da141706SLaura Abbott 
467da141706SLaura Abbott }
468da141706SLaura Abbott #endif
469da141706SLaura Abbott 
470da141706SLaura Abbott void fixup_init(void)
471da141706SLaura Abbott {
472da141706SLaura Abbott 	create_mapping_late(__pa(__init_begin), (unsigned long)__init_begin,
473da141706SLaura Abbott 			(unsigned long)__init_end - (unsigned long)__init_begin,
474da141706SLaura Abbott 			PAGE_KERNEL);
475da141706SLaura Abbott }
476da141706SLaura Abbott 
477c1cc1552SCatalin Marinas /*
478c1cc1552SCatalin Marinas  * paging_init() sets up the page tables, initialises the zone memory
479c1cc1552SCatalin Marinas  * maps and sets up the zero page.
480c1cc1552SCatalin Marinas  */
481c1cc1552SCatalin Marinas void __init paging_init(void)
482c1cc1552SCatalin Marinas {
483c1cc1552SCatalin Marinas 	map_mem();
484da141706SLaura Abbott 	fixup_executable();
485c1cc1552SCatalin Marinas 
486c1cc1552SCatalin Marinas 	bootmem_init();
487c1cc1552SCatalin Marinas }
488c1cc1552SCatalin Marinas 
489c1cc1552SCatalin Marinas /*
490c1cc1552SCatalin Marinas  * Check whether a kernel address is valid (derived from arch/x86/).
491c1cc1552SCatalin Marinas  */
492c1cc1552SCatalin Marinas int kern_addr_valid(unsigned long addr)
493c1cc1552SCatalin Marinas {
494c1cc1552SCatalin Marinas 	pgd_t *pgd;
495c1cc1552SCatalin Marinas 	pud_t *pud;
496c1cc1552SCatalin Marinas 	pmd_t *pmd;
497c1cc1552SCatalin Marinas 	pte_t *pte;
498c1cc1552SCatalin Marinas 
499c1cc1552SCatalin Marinas 	if ((((long)addr) >> VA_BITS) != -1UL)
500c1cc1552SCatalin Marinas 		return 0;
501c1cc1552SCatalin Marinas 
502c1cc1552SCatalin Marinas 	pgd = pgd_offset_k(addr);
503c1cc1552SCatalin Marinas 	if (pgd_none(*pgd))
504c1cc1552SCatalin Marinas 		return 0;
505c1cc1552SCatalin Marinas 
506c1cc1552SCatalin Marinas 	pud = pud_offset(pgd, addr);
507c1cc1552SCatalin Marinas 	if (pud_none(*pud))
508c1cc1552SCatalin Marinas 		return 0;
509c1cc1552SCatalin Marinas 
510206a2a73SSteve Capper 	if (pud_sect(*pud))
511206a2a73SSteve Capper 		return pfn_valid(pud_pfn(*pud));
512206a2a73SSteve Capper 
513c1cc1552SCatalin Marinas 	pmd = pmd_offset(pud, addr);
514c1cc1552SCatalin Marinas 	if (pmd_none(*pmd))
515c1cc1552SCatalin Marinas 		return 0;
516c1cc1552SCatalin Marinas 
517da6e4cb6SDave Anderson 	if (pmd_sect(*pmd))
518da6e4cb6SDave Anderson 		return pfn_valid(pmd_pfn(*pmd));
519da6e4cb6SDave Anderson 
520c1cc1552SCatalin Marinas 	pte = pte_offset_kernel(pmd, addr);
521c1cc1552SCatalin Marinas 	if (pte_none(*pte))
522c1cc1552SCatalin Marinas 		return 0;
523c1cc1552SCatalin Marinas 
524c1cc1552SCatalin Marinas 	return pfn_valid(pte_pfn(*pte));
525c1cc1552SCatalin Marinas }
526c1cc1552SCatalin Marinas #ifdef CONFIG_SPARSEMEM_VMEMMAP
527b433dce0SSuzuki K. Poulose #if !ARM64_SWAPPER_USES_SECTION_MAPS
5280aad818bSJohannes Weiner int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node)
529c1cc1552SCatalin Marinas {
5300aad818bSJohannes Weiner 	return vmemmap_populate_basepages(start, end, node);
531c1cc1552SCatalin Marinas }
532b433dce0SSuzuki K. Poulose #else	/* !ARM64_SWAPPER_USES_SECTION_MAPS */
5330aad818bSJohannes Weiner int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node)
534c1cc1552SCatalin Marinas {
5350aad818bSJohannes Weiner 	unsigned long addr = start;
536c1cc1552SCatalin Marinas 	unsigned long next;
537c1cc1552SCatalin Marinas 	pgd_t *pgd;
538c1cc1552SCatalin Marinas 	pud_t *pud;
539c1cc1552SCatalin Marinas 	pmd_t *pmd;
540c1cc1552SCatalin Marinas 
541c1cc1552SCatalin Marinas 	do {
542c1cc1552SCatalin Marinas 		next = pmd_addr_end(addr, end);
543c1cc1552SCatalin Marinas 
544c1cc1552SCatalin Marinas 		pgd = vmemmap_pgd_populate(addr, node);
545c1cc1552SCatalin Marinas 		if (!pgd)
546c1cc1552SCatalin Marinas 			return -ENOMEM;
547c1cc1552SCatalin Marinas 
548c1cc1552SCatalin Marinas 		pud = vmemmap_pud_populate(pgd, addr, node);
549c1cc1552SCatalin Marinas 		if (!pud)
550c1cc1552SCatalin Marinas 			return -ENOMEM;
551c1cc1552SCatalin Marinas 
552c1cc1552SCatalin Marinas 		pmd = pmd_offset(pud, addr);
553c1cc1552SCatalin Marinas 		if (pmd_none(*pmd)) {
554c1cc1552SCatalin Marinas 			void *p = NULL;
555c1cc1552SCatalin Marinas 
556c1cc1552SCatalin Marinas 			p = vmemmap_alloc_block_buf(PMD_SIZE, node);
557c1cc1552SCatalin Marinas 			if (!p)
558c1cc1552SCatalin Marinas 				return -ENOMEM;
559c1cc1552SCatalin Marinas 
560a501e324SCatalin Marinas 			set_pmd(pmd, __pmd(__pa(p) | PROT_SECT_NORMAL));
561c1cc1552SCatalin Marinas 		} else
562c1cc1552SCatalin Marinas 			vmemmap_verify((pte_t *)pmd, node, addr, next);
563c1cc1552SCatalin Marinas 	} while (addr = next, addr != end);
564c1cc1552SCatalin Marinas 
565c1cc1552SCatalin Marinas 	return 0;
566c1cc1552SCatalin Marinas }
567c1cc1552SCatalin Marinas #endif	/* CONFIG_ARM64_64K_PAGES */
5680aad818bSJohannes Weiner void vmemmap_free(unsigned long start, unsigned long end)
5690197518cSTang Chen {
5700197518cSTang Chen }
571c1cc1552SCatalin Marinas #endif	/* CONFIG_SPARSEMEM_VMEMMAP */
572af86e597SLaura Abbott 
573af86e597SLaura Abbott static pte_t bm_pte[PTRS_PER_PTE] __page_aligned_bss;
5749f25e6adSKirill A. Shutemov #if CONFIG_PGTABLE_LEVELS > 2
575af86e597SLaura Abbott static pmd_t bm_pmd[PTRS_PER_PMD] __page_aligned_bss;
576af86e597SLaura Abbott #endif
5779f25e6adSKirill A. Shutemov #if CONFIG_PGTABLE_LEVELS > 3
578af86e597SLaura Abbott static pud_t bm_pud[PTRS_PER_PUD] __page_aligned_bss;
579af86e597SLaura Abbott #endif
580af86e597SLaura Abbott 
581af86e597SLaura Abbott static inline pud_t * fixmap_pud(unsigned long addr)
582af86e597SLaura Abbott {
583af86e597SLaura Abbott 	pgd_t *pgd = pgd_offset_k(addr);
584af86e597SLaura Abbott 
585af86e597SLaura Abbott 	BUG_ON(pgd_none(*pgd) || pgd_bad(*pgd));
586af86e597SLaura Abbott 
587af86e597SLaura Abbott 	return pud_offset(pgd, addr);
588af86e597SLaura Abbott }
589af86e597SLaura Abbott 
590af86e597SLaura Abbott static inline pmd_t * fixmap_pmd(unsigned long addr)
591af86e597SLaura Abbott {
592af86e597SLaura Abbott 	pud_t *pud = fixmap_pud(addr);
593af86e597SLaura Abbott 
594af86e597SLaura Abbott 	BUG_ON(pud_none(*pud) || pud_bad(*pud));
595af86e597SLaura Abbott 
596af86e597SLaura Abbott 	return pmd_offset(pud, addr);
597af86e597SLaura Abbott }
598af86e597SLaura Abbott 
599af86e597SLaura Abbott static inline pte_t * fixmap_pte(unsigned long addr)
600af86e597SLaura Abbott {
601af86e597SLaura Abbott 	pmd_t *pmd = fixmap_pmd(addr);
602af86e597SLaura Abbott 
603af86e597SLaura Abbott 	BUG_ON(pmd_none(*pmd) || pmd_bad(*pmd));
604af86e597SLaura Abbott 
605af86e597SLaura Abbott 	return pte_offset_kernel(pmd, addr);
606af86e597SLaura Abbott }
607af86e597SLaura Abbott 
608af86e597SLaura Abbott void __init early_fixmap_init(void)
609af86e597SLaura Abbott {
610af86e597SLaura Abbott 	pgd_t *pgd;
611af86e597SLaura Abbott 	pud_t *pud;
612af86e597SLaura Abbott 	pmd_t *pmd;
613af86e597SLaura Abbott 	unsigned long addr = FIXADDR_START;
614af86e597SLaura Abbott 
615af86e597SLaura Abbott 	pgd = pgd_offset_k(addr);
616af86e597SLaura Abbott 	pgd_populate(&init_mm, pgd, bm_pud);
617af86e597SLaura Abbott 	pud = pud_offset(pgd, addr);
618af86e597SLaura Abbott 	pud_populate(&init_mm, pud, bm_pmd);
619af86e597SLaura Abbott 	pmd = pmd_offset(pud, addr);
620af86e597SLaura Abbott 	pmd_populate_kernel(&init_mm, pmd, bm_pte);
621af86e597SLaura Abbott 
622af86e597SLaura Abbott 	/*
623af86e597SLaura Abbott 	 * The boot-ioremap range spans multiple pmds, for which
624af86e597SLaura Abbott 	 * we are not preparted:
625af86e597SLaura Abbott 	 */
626af86e597SLaura Abbott 	BUILD_BUG_ON((__fix_to_virt(FIX_BTMAP_BEGIN) >> PMD_SHIFT)
627af86e597SLaura Abbott 		     != (__fix_to_virt(FIX_BTMAP_END) >> PMD_SHIFT));
628af86e597SLaura Abbott 
629af86e597SLaura Abbott 	if ((pmd != fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN)))
630af86e597SLaura Abbott 	     || pmd != fixmap_pmd(fix_to_virt(FIX_BTMAP_END))) {
631af86e597SLaura Abbott 		WARN_ON(1);
632af86e597SLaura Abbott 		pr_warn("pmd %p != %p, %p\n",
633af86e597SLaura Abbott 			pmd, fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN)),
634af86e597SLaura Abbott 			fixmap_pmd(fix_to_virt(FIX_BTMAP_END)));
635af86e597SLaura Abbott 		pr_warn("fix_to_virt(FIX_BTMAP_BEGIN): %08lx\n",
636af86e597SLaura Abbott 			fix_to_virt(FIX_BTMAP_BEGIN));
637af86e597SLaura Abbott 		pr_warn("fix_to_virt(FIX_BTMAP_END):   %08lx\n",
638af86e597SLaura Abbott 			fix_to_virt(FIX_BTMAP_END));
639af86e597SLaura Abbott 
640af86e597SLaura Abbott 		pr_warn("FIX_BTMAP_END:       %d\n", FIX_BTMAP_END);
641af86e597SLaura Abbott 		pr_warn("FIX_BTMAP_BEGIN:     %d\n", FIX_BTMAP_BEGIN);
642af86e597SLaura Abbott 	}
643af86e597SLaura Abbott }
644af86e597SLaura Abbott 
645af86e597SLaura Abbott void __set_fixmap(enum fixed_addresses idx,
646af86e597SLaura Abbott 			       phys_addr_t phys, pgprot_t flags)
647af86e597SLaura Abbott {
648af86e597SLaura Abbott 	unsigned long addr = __fix_to_virt(idx);
649af86e597SLaura Abbott 	pte_t *pte;
650af86e597SLaura Abbott 
651b63dbef9SMark Rutland 	BUG_ON(idx <= FIX_HOLE || idx >= __end_of_fixed_addresses);
652af86e597SLaura Abbott 
653af86e597SLaura Abbott 	pte = fixmap_pte(addr);
654af86e597SLaura Abbott 
655af86e597SLaura Abbott 	if (pgprot_val(flags)) {
656af86e597SLaura Abbott 		set_pte(pte, pfn_pte(phys >> PAGE_SHIFT, flags));
657af86e597SLaura Abbott 	} else {
658af86e597SLaura Abbott 		pte_clear(&init_mm, addr, pte);
659af86e597SLaura Abbott 		flush_tlb_kernel_range(addr, addr+PAGE_SIZE);
660af86e597SLaura Abbott 	}
661af86e597SLaura Abbott }
66261bd93ceSArd Biesheuvel 
66361bd93ceSArd Biesheuvel void *__init fixmap_remap_fdt(phys_addr_t dt_phys)
66461bd93ceSArd Biesheuvel {
66561bd93ceSArd Biesheuvel 	const u64 dt_virt_base = __fix_to_virt(FIX_FDT);
666fb226c3dSArd Biesheuvel 	pgprot_t prot = PAGE_KERNEL_RO;
667b433dce0SSuzuki K. Poulose 	int size, offset;
66861bd93ceSArd Biesheuvel 	void *dt_virt;
66961bd93ceSArd Biesheuvel 
67061bd93ceSArd Biesheuvel 	/*
67161bd93ceSArd Biesheuvel 	 * Check whether the physical FDT address is set and meets the minimum
67261bd93ceSArd Biesheuvel 	 * alignment requirement. Since we are relying on MIN_FDT_ALIGN to be
67361bd93ceSArd Biesheuvel 	 * at least 8 bytes so that we can always access the size field of the
67461bd93ceSArd Biesheuvel 	 * FDT header after mapping the first chunk, double check here if that
67561bd93ceSArd Biesheuvel 	 * is indeed the case.
67661bd93ceSArd Biesheuvel 	 */
67761bd93ceSArd Biesheuvel 	BUILD_BUG_ON(MIN_FDT_ALIGN < 8);
67861bd93ceSArd Biesheuvel 	if (!dt_phys || dt_phys % MIN_FDT_ALIGN)
67961bd93ceSArd Biesheuvel 		return NULL;
68061bd93ceSArd Biesheuvel 
68161bd93ceSArd Biesheuvel 	/*
68261bd93ceSArd Biesheuvel 	 * Make sure that the FDT region can be mapped without the need to
68361bd93ceSArd Biesheuvel 	 * allocate additional translation table pages, so that it is safe
68461bd93ceSArd Biesheuvel 	 * to call create_mapping() this early.
68561bd93ceSArd Biesheuvel 	 *
68661bd93ceSArd Biesheuvel 	 * On 64k pages, the FDT will be mapped using PTEs, so we need to
68761bd93ceSArd Biesheuvel 	 * be in the same PMD as the rest of the fixmap.
68861bd93ceSArd Biesheuvel 	 * On 4k pages, we'll use section mappings for the FDT so we only
68961bd93ceSArd Biesheuvel 	 * have to be in the same PUD.
69061bd93ceSArd Biesheuvel 	 */
69161bd93ceSArd Biesheuvel 	BUILD_BUG_ON(dt_virt_base % SZ_2M);
69261bd93ceSArd Biesheuvel 
693b433dce0SSuzuki K. Poulose 	BUILD_BUG_ON(__fix_to_virt(FIX_FDT_END) >> SWAPPER_TABLE_SHIFT !=
694b433dce0SSuzuki K. Poulose 		     __fix_to_virt(FIX_BTMAP_BEGIN) >> SWAPPER_TABLE_SHIFT);
69561bd93ceSArd Biesheuvel 
696b433dce0SSuzuki K. Poulose 	offset = dt_phys % SWAPPER_BLOCK_SIZE;
69761bd93ceSArd Biesheuvel 	dt_virt = (void *)dt_virt_base + offset;
69861bd93ceSArd Biesheuvel 
69961bd93ceSArd Biesheuvel 	/* map the first chunk so we can read the size from the header */
700b433dce0SSuzuki K. Poulose 	create_mapping(round_down(dt_phys, SWAPPER_BLOCK_SIZE), dt_virt_base,
701b433dce0SSuzuki K. Poulose 		       SWAPPER_BLOCK_SIZE, prot);
70261bd93ceSArd Biesheuvel 
70361bd93ceSArd Biesheuvel 	if (fdt_check_header(dt_virt) != 0)
70461bd93ceSArd Biesheuvel 		return NULL;
70561bd93ceSArd Biesheuvel 
70661bd93ceSArd Biesheuvel 	size = fdt_totalsize(dt_virt);
70761bd93ceSArd Biesheuvel 	if (size > MAX_FDT_SIZE)
70861bd93ceSArd Biesheuvel 		return NULL;
70961bd93ceSArd Biesheuvel 
710b433dce0SSuzuki K. Poulose 	if (offset + size > SWAPPER_BLOCK_SIZE)
711b433dce0SSuzuki K. Poulose 		create_mapping(round_down(dt_phys, SWAPPER_BLOCK_SIZE), dt_virt_base,
712b433dce0SSuzuki K. Poulose 			       round_up(offset + size, SWAPPER_BLOCK_SIZE), prot);
71361bd93ceSArd Biesheuvel 
71461bd93ceSArd Biesheuvel 	memblock_reserve(dt_phys, size);
71561bd93ceSArd Biesheuvel 
71661bd93ceSArd Biesheuvel 	return dt_virt;
71761bd93ceSArd Biesheuvel }
718