1c1cc1552SCatalin Marinas /* 2c1cc1552SCatalin Marinas * Based on arch/arm/mm/mmu.c 3c1cc1552SCatalin Marinas * 4c1cc1552SCatalin Marinas * Copyright (C) 1995-2005 Russell King 5c1cc1552SCatalin Marinas * Copyright (C) 2012 ARM Ltd. 6c1cc1552SCatalin Marinas * 7c1cc1552SCatalin Marinas * This program is free software; you can redistribute it and/or modify 8c1cc1552SCatalin Marinas * it under the terms of the GNU General Public License version 2 as 9c1cc1552SCatalin Marinas * published by the Free Software Foundation. 10c1cc1552SCatalin Marinas * 11c1cc1552SCatalin Marinas * This program is distributed in the hope that it will be useful, 12c1cc1552SCatalin Marinas * but WITHOUT ANY WARRANTY; without even the implied warranty of 13c1cc1552SCatalin Marinas * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14c1cc1552SCatalin Marinas * GNU General Public License for more details. 15c1cc1552SCatalin Marinas * 16c1cc1552SCatalin Marinas * You should have received a copy of the GNU General Public License 17c1cc1552SCatalin Marinas * along with this program. If not, see <http://www.gnu.org/licenses/>. 18c1cc1552SCatalin Marinas */ 19c1cc1552SCatalin Marinas 205a9e3e15SJisheng Zhang #include <linux/cache.h> 21c1cc1552SCatalin Marinas #include <linux/export.h> 22c1cc1552SCatalin Marinas #include <linux/kernel.h> 23c1cc1552SCatalin Marinas #include <linux/errno.h> 24c1cc1552SCatalin Marinas #include <linux/init.h> 2561bd93ceSArd Biesheuvel #include <linux/libfdt.h> 26c1cc1552SCatalin Marinas #include <linux/mman.h> 27c1cc1552SCatalin Marinas #include <linux/nodemask.h> 28c1cc1552SCatalin Marinas #include <linux/memblock.h> 29c1cc1552SCatalin Marinas #include <linux/fs.h> 302475ff9dSCatalin Marinas #include <linux/io.h> 31c1cc1552SCatalin Marinas 3221ab99c2SMark Rutland #include <asm/barrier.h> 33c1cc1552SCatalin Marinas #include <asm/cputype.h> 34af86e597SLaura Abbott #include <asm/fixmap.h> 35068a17a5SMark Rutland #include <asm/kasan.h> 36b433dce0SSuzuki K. Poulose #include <asm/kernel-pgtable.h> 37c1cc1552SCatalin Marinas #include <asm/sections.h> 38c1cc1552SCatalin Marinas #include <asm/setup.h> 39c1cc1552SCatalin Marinas #include <asm/sizes.h> 40c1cc1552SCatalin Marinas #include <asm/tlb.h> 41c79b954bSJungseok Lee #include <asm/memblock.h> 42c1cc1552SCatalin Marinas #include <asm/mmu_context.h> 43c1cc1552SCatalin Marinas 44dd006da2SArd Biesheuvel u64 idmap_t0sz = TCR_T0SZ(VA_BITS); 45dd006da2SArd Biesheuvel 465a9e3e15SJisheng Zhang u64 kimage_voffset __ro_after_init; 47a7f8de16SArd Biesheuvel EXPORT_SYMBOL(kimage_voffset); 48a7f8de16SArd Biesheuvel 49c1cc1552SCatalin Marinas /* 50c1cc1552SCatalin Marinas * Empty_zero_page is a special page that is used for zero-initialized data 51c1cc1552SCatalin Marinas * and COW. 52c1cc1552SCatalin Marinas */ 535227cfa7SMark Rutland unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)] __page_aligned_bss; 54c1cc1552SCatalin Marinas EXPORT_SYMBOL(empty_zero_page); 55c1cc1552SCatalin Marinas 56f9040773SArd Biesheuvel static pte_t bm_pte[PTRS_PER_PTE] __page_aligned_bss; 57f9040773SArd Biesheuvel static pmd_t bm_pmd[PTRS_PER_PMD] __page_aligned_bss __maybe_unused; 58f9040773SArd Biesheuvel static pud_t bm_pud[PTRS_PER_PUD] __page_aligned_bss __maybe_unused; 59f9040773SArd Biesheuvel 60c1cc1552SCatalin Marinas pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, 61c1cc1552SCatalin Marinas unsigned long size, pgprot_t vma_prot) 62c1cc1552SCatalin Marinas { 63c1cc1552SCatalin Marinas if (!pfn_valid(pfn)) 64c1cc1552SCatalin Marinas return pgprot_noncached(vma_prot); 65c1cc1552SCatalin Marinas else if (file->f_flags & O_SYNC) 66c1cc1552SCatalin Marinas return pgprot_writecombine(vma_prot); 67c1cc1552SCatalin Marinas return vma_prot; 68c1cc1552SCatalin Marinas } 69c1cc1552SCatalin Marinas EXPORT_SYMBOL(phys_mem_access_prot); 70c1cc1552SCatalin Marinas 71f4710445SMark Rutland static phys_addr_t __init early_pgtable_alloc(void) 72c1cc1552SCatalin Marinas { 737142392dSSuzuki K. Poulose phys_addr_t phys; 747142392dSSuzuki K. Poulose void *ptr; 757142392dSSuzuki K. Poulose 7621ab99c2SMark Rutland phys = memblock_alloc(PAGE_SIZE, PAGE_SIZE); 77f4710445SMark Rutland 78f4710445SMark Rutland /* 79f4710445SMark Rutland * The FIX_{PGD,PUD,PMD} slots may be in active use, but the FIX_PTE 80f4710445SMark Rutland * slot will be free, so we can (ab)use the FIX_PTE slot to initialise 81f4710445SMark Rutland * any level of table. 82f4710445SMark Rutland */ 83f4710445SMark Rutland ptr = pte_set_fixmap(phys); 84f4710445SMark Rutland 8521ab99c2SMark Rutland memset(ptr, 0, PAGE_SIZE); 8621ab99c2SMark Rutland 87f4710445SMark Rutland /* 88f4710445SMark Rutland * Implicit barriers also ensure the zeroed page is visible to the page 89f4710445SMark Rutland * table walker 90f4710445SMark Rutland */ 91f4710445SMark Rutland pte_clear_fixmap(); 92f4710445SMark Rutland 93f4710445SMark Rutland return phys; 94c1cc1552SCatalin Marinas } 95c1cc1552SCatalin Marinas 96e98216b5SArd Biesheuvel static bool pgattr_change_is_safe(u64 old, u64 new) 97e98216b5SArd Biesheuvel { 98e98216b5SArd Biesheuvel /* 99e98216b5SArd Biesheuvel * The following mapping attributes may be updated in live 100e98216b5SArd Biesheuvel * kernel mappings without the need for break-before-make. 101e98216b5SArd Biesheuvel */ 102e98216b5SArd Biesheuvel static const pteval_t mask = PTE_PXN | PTE_RDONLY | PTE_WRITE; 103e98216b5SArd Biesheuvel 104e98216b5SArd Biesheuvel return old == 0 || new == 0 || ((old ^ new) & ~mask) == 0; 105e98216b5SArd Biesheuvel } 106e98216b5SArd Biesheuvel 107da141706SLaura Abbott static void alloc_init_pte(pmd_t *pmd, unsigned long addr, 108667c2759SCatalin Marinas unsigned long end, unsigned long pfn, 109da141706SLaura Abbott pgprot_t prot, 110f4710445SMark Rutland phys_addr_t (*pgtable_alloc)(void)) 111c1cc1552SCatalin Marinas { 112c1cc1552SCatalin Marinas pte_t *pte; 113c1cc1552SCatalin Marinas 1144133af6cSCatalin Marinas BUG_ON(pmd_sect(*pmd)); 1154133af6cSCatalin Marinas if (pmd_none(*pmd)) { 116132233a7SLaura Abbott phys_addr_t pte_phys; 117132233a7SLaura Abbott BUG_ON(!pgtable_alloc); 118132233a7SLaura Abbott pte_phys = pgtable_alloc(); 119f4710445SMark Rutland pte = pte_set_fixmap(pte_phys); 120f4710445SMark Rutland __pmd_populate(pmd, pte_phys, PMD_TYPE_TABLE); 121f4710445SMark Rutland pte_clear_fixmap(); 122c1cc1552SCatalin Marinas } 123a1c76574SMark Rutland BUG_ON(pmd_bad(*pmd)); 124c1cc1552SCatalin Marinas 125f4710445SMark Rutland pte = pte_set_fixmap_offset(pmd, addr); 126c1cc1552SCatalin Marinas do { 127e98216b5SArd Biesheuvel pte_t old_pte = *pte; 128e98216b5SArd Biesheuvel 129667c2759SCatalin Marinas set_pte(pte, pfn_pte(pfn, prot)); 130667c2759SCatalin Marinas pfn++; 131e98216b5SArd Biesheuvel 132e98216b5SArd Biesheuvel /* 133e98216b5SArd Biesheuvel * After the PTE entry has been populated once, we 134e98216b5SArd Biesheuvel * only allow updates to the permission attributes. 135e98216b5SArd Biesheuvel */ 136e98216b5SArd Biesheuvel BUG_ON(!pgattr_change_is_safe(pte_val(old_pte), pte_val(*pte))); 137e98216b5SArd Biesheuvel 138667c2759SCatalin Marinas } while (pte++, addr += PAGE_SIZE, addr != end); 139f4710445SMark Rutland 140f4710445SMark Rutland pte_clear_fixmap(); 141c1cc1552SCatalin Marinas } 142c1cc1552SCatalin Marinas 14311509a30SMark Rutland static void alloc_init_pmd(pud_t *pud, unsigned long addr, unsigned long end, 144da141706SLaura Abbott phys_addr_t phys, pgprot_t prot, 14553e1b329SArd Biesheuvel phys_addr_t (*pgtable_alloc)(void), 146*f14c66ceSArd Biesheuvel bool page_mappings_only) 147c1cc1552SCatalin Marinas { 148c1cc1552SCatalin Marinas pmd_t *pmd; 149c1cc1552SCatalin Marinas unsigned long next; 150c1cc1552SCatalin Marinas 151c1cc1552SCatalin Marinas /* 152c1cc1552SCatalin Marinas * Check for initial section mappings in the pgd/pud and remove them. 153c1cc1552SCatalin Marinas */ 1544133af6cSCatalin Marinas BUG_ON(pud_sect(*pud)); 1554133af6cSCatalin Marinas if (pud_none(*pud)) { 156132233a7SLaura Abbott phys_addr_t pmd_phys; 157132233a7SLaura Abbott BUG_ON(!pgtable_alloc); 158132233a7SLaura Abbott pmd_phys = pgtable_alloc(); 159f4710445SMark Rutland pmd = pmd_set_fixmap(pmd_phys); 160f4710445SMark Rutland __pud_populate(pud, pmd_phys, PUD_TYPE_TABLE); 161f4710445SMark Rutland pmd_clear_fixmap(); 162c1cc1552SCatalin Marinas } 163a1c76574SMark Rutland BUG_ON(pud_bad(*pud)); 164c1cc1552SCatalin Marinas 165f4710445SMark Rutland pmd = pmd_set_fixmap_offset(pud, addr); 166c1cc1552SCatalin Marinas do { 167e98216b5SArd Biesheuvel pmd_t old_pmd = *pmd; 168e98216b5SArd Biesheuvel 169c1cc1552SCatalin Marinas next = pmd_addr_end(addr, end); 170e98216b5SArd Biesheuvel 171c1cc1552SCatalin Marinas /* try section mapping first */ 17283863f25SLaura Abbott if (((addr | next | phys) & ~SECTION_MASK) == 0 && 173*f14c66ceSArd Biesheuvel !page_mappings_only) { 174c661cb1cSMark Rutland pmd_set_huge(pmd, phys, prot); 175e98216b5SArd Biesheuvel 176a55f9929SCatalin Marinas /* 177e98216b5SArd Biesheuvel * After the PMD entry has been populated once, we 178e98216b5SArd Biesheuvel * only allow updates to the permission attributes. 179a55f9929SCatalin Marinas */ 180e98216b5SArd Biesheuvel BUG_ON(!pgattr_change_is_safe(pmd_val(old_pmd), 181e98216b5SArd Biesheuvel pmd_val(*pmd))); 182a55f9929SCatalin Marinas } else { 183667c2759SCatalin Marinas alloc_init_pte(pmd, addr, next, __phys_to_pfn(phys), 18421ab99c2SMark Rutland prot, pgtable_alloc); 185e98216b5SArd Biesheuvel 186e98216b5SArd Biesheuvel BUG_ON(pmd_val(old_pmd) != 0 && 187e98216b5SArd Biesheuvel pmd_val(old_pmd) != pmd_val(*pmd)); 188a55f9929SCatalin Marinas } 189c1cc1552SCatalin Marinas phys += next - addr; 190c1cc1552SCatalin Marinas } while (pmd++, addr = next, addr != end); 191f4710445SMark Rutland 192f4710445SMark Rutland pmd_clear_fixmap(); 193c1cc1552SCatalin Marinas } 194c1cc1552SCatalin Marinas 195da141706SLaura Abbott static inline bool use_1G_block(unsigned long addr, unsigned long next, 196da141706SLaura Abbott unsigned long phys) 197da141706SLaura Abbott { 198da141706SLaura Abbott if (PAGE_SHIFT != 12) 199da141706SLaura Abbott return false; 200da141706SLaura Abbott 201da141706SLaura Abbott if (((addr | next | phys) & ~PUD_MASK) != 0) 202da141706SLaura Abbott return false; 203da141706SLaura Abbott 204da141706SLaura Abbott return true; 205da141706SLaura Abbott } 206da141706SLaura Abbott 20711509a30SMark Rutland static void alloc_init_pud(pgd_t *pgd, unsigned long addr, unsigned long end, 208da141706SLaura Abbott phys_addr_t phys, pgprot_t prot, 20953e1b329SArd Biesheuvel phys_addr_t (*pgtable_alloc)(void), 210*f14c66ceSArd Biesheuvel bool page_mappings_only) 211c1cc1552SCatalin Marinas { 212c79b954bSJungseok Lee pud_t *pud; 213c1cc1552SCatalin Marinas unsigned long next; 214c1cc1552SCatalin Marinas 215c79b954bSJungseok Lee if (pgd_none(*pgd)) { 216132233a7SLaura Abbott phys_addr_t pud_phys; 217132233a7SLaura Abbott BUG_ON(!pgtable_alloc); 218132233a7SLaura Abbott pud_phys = pgtable_alloc(); 219f4710445SMark Rutland __pgd_populate(pgd, pud_phys, PUD_TYPE_TABLE); 220c79b954bSJungseok Lee } 221c79b954bSJungseok Lee BUG_ON(pgd_bad(*pgd)); 222c79b954bSJungseok Lee 223f4710445SMark Rutland pud = pud_set_fixmap_offset(pgd, addr); 224c1cc1552SCatalin Marinas do { 225e98216b5SArd Biesheuvel pud_t old_pud = *pud; 226e98216b5SArd Biesheuvel 227c1cc1552SCatalin Marinas next = pud_addr_end(addr, end); 228206a2a73SSteve Capper 229206a2a73SSteve Capper /* 230206a2a73SSteve Capper * For 4K granule only, attempt to put down a 1GB block 231206a2a73SSteve Capper */ 232*f14c66ceSArd Biesheuvel if (use_1G_block(addr, next, phys) && !page_mappings_only) { 233c661cb1cSMark Rutland pud_set_huge(pud, phys, prot); 234206a2a73SSteve Capper 235206a2a73SSteve Capper /* 236e98216b5SArd Biesheuvel * After the PUD entry has been populated once, we 237e98216b5SArd Biesheuvel * only allow updates to the permission attributes. 238206a2a73SSteve Capper */ 239e98216b5SArd Biesheuvel BUG_ON(!pgattr_change_is_safe(pud_val(old_pud), 240e98216b5SArd Biesheuvel pud_val(*pud))); 241206a2a73SSteve Capper } else { 24211509a30SMark Rutland alloc_init_pmd(pud, addr, next, phys, prot, 243*f14c66ceSArd Biesheuvel pgtable_alloc, page_mappings_only); 244e98216b5SArd Biesheuvel 245e98216b5SArd Biesheuvel BUG_ON(pud_val(old_pud) != 0 && 246e98216b5SArd Biesheuvel pud_val(old_pud) != pud_val(*pud)); 247206a2a73SSteve Capper } 248c1cc1552SCatalin Marinas phys += next - addr; 249c1cc1552SCatalin Marinas } while (pud++, addr = next, addr != end); 250f4710445SMark Rutland 251f4710445SMark Rutland pud_clear_fixmap(); 252c1cc1552SCatalin Marinas } 253c1cc1552SCatalin Marinas 25440f87d31SArd Biesheuvel static void __create_pgd_mapping(pgd_t *pgdir, phys_addr_t phys, 25540f87d31SArd Biesheuvel unsigned long virt, phys_addr_t size, 25640f87d31SArd Biesheuvel pgprot_t prot, 25753e1b329SArd Biesheuvel phys_addr_t (*pgtable_alloc)(void), 258*f14c66ceSArd Biesheuvel bool page_mappings_only) 259c1cc1552SCatalin Marinas { 260c1cc1552SCatalin Marinas unsigned long addr, length, end, next; 26140f87d31SArd Biesheuvel pgd_t *pgd = pgd_offset_raw(pgdir, virt); 262c1cc1552SCatalin Marinas 263cc5d2b3bSMark Rutland /* 264cc5d2b3bSMark Rutland * If the virtual and physical address don't have the same offset 265cc5d2b3bSMark Rutland * within a page, we cannot map the region as the caller expects. 266cc5d2b3bSMark Rutland */ 267cc5d2b3bSMark Rutland if (WARN_ON((phys ^ virt) & ~PAGE_MASK)) 268cc5d2b3bSMark Rutland return; 269cc5d2b3bSMark Rutland 2709c4e08a3SMark Rutland phys &= PAGE_MASK; 271c1cc1552SCatalin Marinas addr = virt & PAGE_MASK; 272c1cc1552SCatalin Marinas length = PAGE_ALIGN(size + (virt & ~PAGE_MASK)); 273c1cc1552SCatalin Marinas 274c1cc1552SCatalin Marinas end = addr + length; 275c1cc1552SCatalin Marinas do { 276c1cc1552SCatalin Marinas next = pgd_addr_end(addr, end); 27753e1b329SArd Biesheuvel alloc_init_pud(pgd, addr, next, phys, prot, pgtable_alloc, 278*f14c66ceSArd Biesheuvel page_mappings_only); 279c1cc1552SCatalin Marinas phys += next - addr; 280c1cc1552SCatalin Marinas } while (pgd++, addr = next, addr != end); 281c1cc1552SCatalin Marinas } 282c1cc1552SCatalin Marinas 2831378dc3dSArd Biesheuvel static phys_addr_t pgd_pgtable_alloc(void) 284da141706SLaura Abbott { 28521ab99c2SMark Rutland void *ptr = (void *)__get_free_page(PGALLOC_GFP); 2861378dc3dSArd Biesheuvel if (!ptr || !pgtable_page_ctor(virt_to_page(ptr))) 2871378dc3dSArd Biesheuvel BUG(); 28821ab99c2SMark Rutland 28921ab99c2SMark Rutland /* Ensure the zeroed page is visible to the page table walker */ 29021ab99c2SMark Rutland dsb(ishst); 291f4710445SMark Rutland return __pa(ptr); 292da141706SLaura Abbott } 293da141706SLaura Abbott 294132233a7SLaura Abbott /* 295132233a7SLaura Abbott * This function can only be used to modify existing table entries, 296132233a7SLaura Abbott * without allocating new levels of table. Note that this permits the 297132233a7SLaura Abbott * creation of new section or page entries. 298132233a7SLaura Abbott */ 299132233a7SLaura Abbott static void __init create_mapping_noalloc(phys_addr_t phys, unsigned long virt, 300da141706SLaura Abbott phys_addr_t size, pgprot_t prot) 301d7ecbddfSMark Salter { 302d7ecbddfSMark Salter if (virt < VMALLOC_START) { 303d7ecbddfSMark Salter pr_warn("BUG: not creating mapping for %pa at 0x%016lx - outside kernel range\n", 304d7ecbddfSMark Salter &phys, virt); 305d7ecbddfSMark Salter return; 306d7ecbddfSMark Salter } 307*f14c66ceSArd Biesheuvel __create_pgd_mapping(init_mm.pgd, phys, virt, size, prot, NULL, false); 308d7ecbddfSMark Salter } 309d7ecbddfSMark Salter 3108ce837ceSArd Biesheuvel void __init create_pgd_mapping(struct mm_struct *mm, phys_addr_t phys, 3118ce837ceSArd Biesheuvel unsigned long virt, phys_addr_t size, 312*f14c66ceSArd Biesheuvel pgprot_t prot, bool page_mappings_only) 3138ce837ceSArd Biesheuvel { 3141378dc3dSArd Biesheuvel BUG_ON(mm == &init_mm); 3151378dc3dSArd Biesheuvel 31611509a30SMark Rutland __create_pgd_mapping(mm->pgd, phys, virt, size, prot, 317*f14c66ceSArd Biesheuvel pgd_pgtable_alloc, page_mappings_only); 318d7ecbddfSMark Salter } 319d7ecbddfSMark Salter 320da141706SLaura Abbott static void create_mapping_late(phys_addr_t phys, unsigned long virt, 321da141706SLaura Abbott phys_addr_t size, pgprot_t prot) 322da141706SLaura Abbott { 323da141706SLaura Abbott if (virt < VMALLOC_START) { 324da141706SLaura Abbott pr_warn("BUG: not creating mapping for %pa at 0x%016lx - outside kernel range\n", 325da141706SLaura Abbott &phys, virt); 326da141706SLaura Abbott return; 327da141706SLaura Abbott } 328da141706SLaura Abbott 32911509a30SMark Rutland __create_pgd_mapping(init_mm.pgd, phys, virt, size, prot, 330*f14c66ceSArd Biesheuvel NULL, debug_pagealloc_enabled()); 331da141706SLaura Abbott } 332da141706SLaura Abbott 333068a17a5SMark Rutland static void __init __map_memblock(pgd_t *pgd, phys_addr_t start, phys_addr_t end) 334da141706SLaura Abbott { 3357eb90f2fSArd Biesheuvel unsigned long kernel_start = __pa(_text); 3369fdc14c5SArd Biesheuvel unsigned long kernel_end = __pa(__init_begin); 337068a17a5SMark Rutland 338da141706SLaura Abbott /* 339f9040773SArd Biesheuvel * Take care not to create a writable alias for the 340f9040773SArd Biesheuvel * read-only text and rodata sections of the kernel image. 341da141706SLaura Abbott */ 342da141706SLaura Abbott 3439fdc14c5SArd Biesheuvel /* No overlap with the kernel text/rodata */ 344068a17a5SMark Rutland if (end < kernel_start || start >= kernel_end) { 345068a17a5SMark Rutland __create_pgd_mapping(pgd, start, __phys_to_virt(start), 346068a17a5SMark Rutland end - start, PAGE_KERNEL, 34753e1b329SArd Biesheuvel early_pgtable_alloc, 348*f14c66ceSArd Biesheuvel debug_pagealloc_enabled()); 349068a17a5SMark Rutland return; 350da141706SLaura Abbott } 351da141706SLaura Abbott 352068a17a5SMark Rutland /* 3539fdc14c5SArd Biesheuvel * This block overlaps the kernel text/rodata mappings. 354f9040773SArd Biesheuvel * Map the portion(s) which don't overlap. 355068a17a5SMark Rutland */ 356068a17a5SMark Rutland if (start < kernel_start) 357068a17a5SMark Rutland __create_pgd_mapping(pgd, start, 358068a17a5SMark Rutland __phys_to_virt(start), 359068a17a5SMark Rutland kernel_start - start, PAGE_KERNEL, 36053e1b329SArd Biesheuvel early_pgtable_alloc, 361*f14c66ceSArd Biesheuvel debug_pagealloc_enabled()); 362068a17a5SMark Rutland if (kernel_end < end) 363068a17a5SMark Rutland __create_pgd_mapping(pgd, kernel_end, 364068a17a5SMark Rutland __phys_to_virt(kernel_end), 365068a17a5SMark Rutland end - kernel_end, PAGE_KERNEL, 36653e1b329SArd Biesheuvel early_pgtable_alloc, 367*f14c66ceSArd Biesheuvel debug_pagealloc_enabled()); 368f9040773SArd Biesheuvel 369f9040773SArd Biesheuvel /* 3709fdc14c5SArd Biesheuvel * Map the linear alias of the [_text, __init_begin) interval as 371f9040773SArd Biesheuvel * read-only/non-executable. This makes the contents of the 372f9040773SArd Biesheuvel * region accessible to subsystems such as hibernate, but 373f9040773SArd Biesheuvel * protects it from inadvertent modification or execution. 374f9040773SArd Biesheuvel */ 375f9040773SArd Biesheuvel __create_pgd_mapping(pgd, kernel_start, __phys_to_virt(kernel_start), 376f9040773SArd Biesheuvel kernel_end - kernel_start, PAGE_KERNEL_RO, 377*f14c66ceSArd Biesheuvel early_pgtable_alloc, debug_pagealloc_enabled()); 378da141706SLaura Abbott } 379da141706SLaura Abbott 380068a17a5SMark Rutland static void __init map_mem(pgd_t *pgd) 381c1cc1552SCatalin Marinas { 382c1cc1552SCatalin Marinas struct memblock_region *reg; 383f6bc87c3SSteve Capper 384c1cc1552SCatalin Marinas /* map all the memory banks */ 385c1cc1552SCatalin Marinas for_each_memblock(memory, reg) { 386c1cc1552SCatalin Marinas phys_addr_t start = reg->base; 387c1cc1552SCatalin Marinas phys_addr_t end = start + reg->size; 388c1cc1552SCatalin Marinas 389c1cc1552SCatalin Marinas if (start >= end) 390c1cc1552SCatalin Marinas break; 39168709f45SArd Biesheuvel if (memblock_is_nomap(reg)) 39268709f45SArd Biesheuvel continue; 393c1cc1552SCatalin Marinas 394068a17a5SMark Rutland __map_memblock(pgd, start, end); 395c1cc1552SCatalin Marinas } 396c1cc1552SCatalin Marinas } 397c1cc1552SCatalin Marinas 398da141706SLaura Abbott void mark_rodata_ro(void) 399da141706SLaura Abbott { 4002f39b5f9SJeremy Linton unsigned long section_size; 401f9040773SArd Biesheuvel 4029fdc14c5SArd Biesheuvel section_size = (unsigned long)_etext - (unsigned long)_text; 4037eb90f2fSArd Biesheuvel create_mapping_late(__pa(_text), (unsigned long)_text, 4042f39b5f9SJeremy Linton section_size, PAGE_KERNEL_ROX); 4052f39b5f9SJeremy Linton /* 4069fdc14c5SArd Biesheuvel * mark .rodata as read only. Use __init_begin rather than __end_rodata 4079fdc14c5SArd Biesheuvel * to cover NOTES and EXCEPTION_TABLE. 4082f39b5f9SJeremy Linton */ 4099fdc14c5SArd Biesheuvel section_size = (unsigned long)__init_begin - (unsigned long)__start_rodata; 4102f39b5f9SJeremy Linton create_mapping_late(__pa(__start_rodata), (unsigned long)__start_rodata, 4112f39b5f9SJeremy Linton section_size, PAGE_KERNEL_RO); 412e98216b5SArd Biesheuvel 413e98216b5SArd Biesheuvel /* flush the TLBs after updating live kernel mappings */ 414e98216b5SArd Biesheuvel flush_tlb_all(); 415da141706SLaura Abbott } 416da141706SLaura Abbott 4172c09ec06SArd Biesheuvel static void __init map_kernel_segment(pgd_t *pgd, void *va_start, void *va_end, 418f9040773SArd Biesheuvel pgprot_t prot, struct vm_struct *vma) 419068a17a5SMark Rutland { 420068a17a5SMark Rutland phys_addr_t pa_start = __pa(va_start); 421068a17a5SMark Rutland unsigned long size = va_end - va_start; 422068a17a5SMark Rutland 423068a17a5SMark Rutland BUG_ON(!PAGE_ALIGNED(pa_start)); 424068a17a5SMark Rutland BUG_ON(!PAGE_ALIGNED(size)); 425068a17a5SMark Rutland 426068a17a5SMark Rutland __create_pgd_mapping(pgd, pa_start, (unsigned long)va_start, size, prot, 427*f14c66ceSArd Biesheuvel early_pgtable_alloc, debug_pagealloc_enabled()); 428f9040773SArd Biesheuvel 429f9040773SArd Biesheuvel vma->addr = va_start; 430f9040773SArd Biesheuvel vma->phys_addr = pa_start; 431f9040773SArd Biesheuvel vma->size = size; 432f9040773SArd Biesheuvel vma->flags = VM_MAP; 433f9040773SArd Biesheuvel vma->caller = __builtin_return_address(0); 434f9040773SArd Biesheuvel 435f9040773SArd Biesheuvel vm_area_add_early(vma); 436068a17a5SMark Rutland } 437068a17a5SMark Rutland 438068a17a5SMark Rutland /* 439068a17a5SMark Rutland * Create fine-grained mappings for the kernel. 440068a17a5SMark Rutland */ 441068a17a5SMark Rutland static void __init map_kernel(pgd_t *pgd) 442068a17a5SMark Rutland { 4432f39b5f9SJeremy Linton static struct vm_struct vmlinux_text, vmlinux_rodata, vmlinux_init, vmlinux_data; 444068a17a5SMark Rutland 4459fdc14c5SArd Biesheuvel map_kernel_segment(pgd, _text, _etext, PAGE_KERNEL_EXEC, &vmlinux_text); 4469fdc14c5SArd Biesheuvel map_kernel_segment(pgd, __start_rodata, __init_begin, PAGE_KERNEL, &vmlinux_rodata); 4472c09ec06SArd Biesheuvel map_kernel_segment(pgd, __init_begin, __init_end, PAGE_KERNEL_EXEC, 448f9040773SArd Biesheuvel &vmlinux_init); 4492c09ec06SArd Biesheuvel map_kernel_segment(pgd, _data, _end, PAGE_KERNEL, &vmlinux_data); 450068a17a5SMark Rutland 451f9040773SArd Biesheuvel if (!pgd_val(*pgd_offset_raw(pgd, FIXADDR_START))) { 452068a17a5SMark Rutland /* 453f9040773SArd Biesheuvel * The fixmap falls in a separate pgd to the kernel, and doesn't 454f9040773SArd Biesheuvel * live in the carveout for the swapper_pg_dir. We can simply 455f9040773SArd Biesheuvel * re-use the existing dir for the fixmap. 456068a17a5SMark Rutland */ 457f9040773SArd Biesheuvel set_pgd(pgd_offset_raw(pgd, FIXADDR_START), 458f9040773SArd Biesheuvel *pgd_offset_k(FIXADDR_START)); 459f9040773SArd Biesheuvel } else if (CONFIG_PGTABLE_LEVELS > 3) { 460f9040773SArd Biesheuvel /* 461f9040773SArd Biesheuvel * The fixmap shares its top level pgd entry with the kernel 462f9040773SArd Biesheuvel * mapping. This can really only occur when we are running 463f9040773SArd Biesheuvel * with 16k/4 levels, so we can simply reuse the pud level 464f9040773SArd Biesheuvel * entry instead. 465f9040773SArd Biesheuvel */ 466f9040773SArd Biesheuvel BUG_ON(!IS_ENABLED(CONFIG_ARM64_16K_PAGES)); 467f9040773SArd Biesheuvel set_pud(pud_set_fixmap_offset(pgd, FIXADDR_START), 468f9040773SArd Biesheuvel __pud(__pa(bm_pmd) | PUD_TYPE_TABLE)); 469f9040773SArd Biesheuvel pud_clear_fixmap(); 470f9040773SArd Biesheuvel } else { 471f9040773SArd Biesheuvel BUG(); 472f9040773SArd Biesheuvel } 473068a17a5SMark Rutland 474068a17a5SMark Rutland kasan_copy_shadow(pgd); 475068a17a5SMark Rutland } 476068a17a5SMark Rutland 477c1cc1552SCatalin Marinas /* 478c1cc1552SCatalin Marinas * paging_init() sets up the page tables, initialises the zone memory 479c1cc1552SCatalin Marinas * maps and sets up the zero page. 480c1cc1552SCatalin Marinas */ 481c1cc1552SCatalin Marinas void __init paging_init(void) 482c1cc1552SCatalin Marinas { 483068a17a5SMark Rutland phys_addr_t pgd_phys = early_pgtable_alloc(); 484068a17a5SMark Rutland pgd_t *pgd = pgd_set_fixmap(pgd_phys); 485068a17a5SMark Rutland 486068a17a5SMark Rutland map_kernel(pgd); 487068a17a5SMark Rutland map_mem(pgd); 488068a17a5SMark Rutland 489068a17a5SMark Rutland /* 490068a17a5SMark Rutland * We want to reuse the original swapper_pg_dir so we don't have to 491068a17a5SMark Rutland * communicate the new address to non-coherent secondaries in 492068a17a5SMark Rutland * secondary_entry, and so cpu_switch_mm can generate the address with 493068a17a5SMark Rutland * adrp+add rather than a load from some global variable. 494068a17a5SMark Rutland * 495068a17a5SMark Rutland * To do this we need to go via a temporary pgd. 496068a17a5SMark Rutland */ 497068a17a5SMark Rutland cpu_replace_ttbr1(__va(pgd_phys)); 498068a17a5SMark Rutland memcpy(swapper_pg_dir, pgd, PAGE_SIZE); 499068a17a5SMark Rutland cpu_replace_ttbr1(swapper_pg_dir); 500068a17a5SMark Rutland 501068a17a5SMark Rutland pgd_clear_fixmap(); 502068a17a5SMark Rutland memblock_free(pgd_phys, PAGE_SIZE); 503068a17a5SMark Rutland 504068a17a5SMark Rutland /* 505068a17a5SMark Rutland * We only reuse the PGD from the swapper_pg_dir, not the pud + pmd 506068a17a5SMark Rutland * allocated with it. 507068a17a5SMark Rutland */ 508068a17a5SMark Rutland memblock_free(__pa(swapper_pg_dir) + PAGE_SIZE, 509068a17a5SMark Rutland SWAPPER_DIR_SIZE - PAGE_SIZE); 510c1cc1552SCatalin Marinas } 511c1cc1552SCatalin Marinas 512c1cc1552SCatalin Marinas /* 513c1cc1552SCatalin Marinas * Check whether a kernel address is valid (derived from arch/x86/). 514c1cc1552SCatalin Marinas */ 515c1cc1552SCatalin Marinas int kern_addr_valid(unsigned long addr) 516c1cc1552SCatalin Marinas { 517c1cc1552SCatalin Marinas pgd_t *pgd; 518c1cc1552SCatalin Marinas pud_t *pud; 519c1cc1552SCatalin Marinas pmd_t *pmd; 520c1cc1552SCatalin Marinas pte_t *pte; 521c1cc1552SCatalin Marinas 522c1cc1552SCatalin Marinas if ((((long)addr) >> VA_BITS) != -1UL) 523c1cc1552SCatalin Marinas return 0; 524c1cc1552SCatalin Marinas 525c1cc1552SCatalin Marinas pgd = pgd_offset_k(addr); 526c1cc1552SCatalin Marinas if (pgd_none(*pgd)) 527c1cc1552SCatalin Marinas return 0; 528c1cc1552SCatalin Marinas 529c1cc1552SCatalin Marinas pud = pud_offset(pgd, addr); 530c1cc1552SCatalin Marinas if (pud_none(*pud)) 531c1cc1552SCatalin Marinas return 0; 532c1cc1552SCatalin Marinas 533206a2a73SSteve Capper if (pud_sect(*pud)) 534206a2a73SSteve Capper return pfn_valid(pud_pfn(*pud)); 535206a2a73SSteve Capper 536c1cc1552SCatalin Marinas pmd = pmd_offset(pud, addr); 537c1cc1552SCatalin Marinas if (pmd_none(*pmd)) 538c1cc1552SCatalin Marinas return 0; 539c1cc1552SCatalin Marinas 540da6e4cb6SDave Anderson if (pmd_sect(*pmd)) 541da6e4cb6SDave Anderson return pfn_valid(pmd_pfn(*pmd)); 542da6e4cb6SDave Anderson 543c1cc1552SCatalin Marinas pte = pte_offset_kernel(pmd, addr); 544c1cc1552SCatalin Marinas if (pte_none(*pte)) 545c1cc1552SCatalin Marinas return 0; 546c1cc1552SCatalin Marinas 547c1cc1552SCatalin Marinas return pfn_valid(pte_pfn(*pte)); 548c1cc1552SCatalin Marinas } 549c1cc1552SCatalin Marinas #ifdef CONFIG_SPARSEMEM_VMEMMAP 550b433dce0SSuzuki K. Poulose #if !ARM64_SWAPPER_USES_SECTION_MAPS 5510aad818bSJohannes Weiner int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node) 552c1cc1552SCatalin Marinas { 5530aad818bSJohannes Weiner return vmemmap_populate_basepages(start, end, node); 554c1cc1552SCatalin Marinas } 555b433dce0SSuzuki K. Poulose #else /* !ARM64_SWAPPER_USES_SECTION_MAPS */ 5560aad818bSJohannes Weiner int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node) 557c1cc1552SCatalin Marinas { 5580aad818bSJohannes Weiner unsigned long addr = start; 559c1cc1552SCatalin Marinas unsigned long next; 560c1cc1552SCatalin Marinas pgd_t *pgd; 561c1cc1552SCatalin Marinas pud_t *pud; 562c1cc1552SCatalin Marinas pmd_t *pmd; 563c1cc1552SCatalin Marinas 564c1cc1552SCatalin Marinas do { 565c1cc1552SCatalin Marinas next = pmd_addr_end(addr, end); 566c1cc1552SCatalin Marinas 567c1cc1552SCatalin Marinas pgd = vmemmap_pgd_populate(addr, node); 568c1cc1552SCatalin Marinas if (!pgd) 569c1cc1552SCatalin Marinas return -ENOMEM; 570c1cc1552SCatalin Marinas 571c1cc1552SCatalin Marinas pud = vmemmap_pud_populate(pgd, addr, node); 572c1cc1552SCatalin Marinas if (!pud) 573c1cc1552SCatalin Marinas return -ENOMEM; 574c1cc1552SCatalin Marinas 575c1cc1552SCatalin Marinas pmd = pmd_offset(pud, addr); 576c1cc1552SCatalin Marinas if (pmd_none(*pmd)) { 577c1cc1552SCatalin Marinas void *p = NULL; 578c1cc1552SCatalin Marinas 579c1cc1552SCatalin Marinas p = vmemmap_alloc_block_buf(PMD_SIZE, node); 580c1cc1552SCatalin Marinas if (!p) 581c1cc1552SCatalin Marinas return -ENOMEM; 582c1cc1552SCatalin Marinas 583a501e324SCatalin Marinas set_pmd(pmd, __pmd(__pa(p) | PROT_SECT_NORMAL)); 584c1cc1552SCatalin Marinas } else 585c1cc1552SCatalin Marinas vmemmap_verify((pte_t *)pmd, node, addr, next); 586c1cc1552SCatalin Marinas } while (addr = next, addr != end); 587c1cc1552SCatalin Marinas 588c1cc1552SCatalin Marinas return 0; 589c1cc1552SCatalin Marinas } 590c1cc1552SCatalin Marinas #endif /* CONFIG_ARM64_64K_PAGES */ 5910aad818bSJohannes Weiner void vmemmap_free(unsigned long start, unsigned long end) 5920197518cSTang Chen { 5930197518cSTang Chen } 594c1cc1552SCatalin Marinas #endif /* CONFIG_SPARSEMEM_VMEMMAP */ 595af86e597SLaura Abbott 596af86e597SLaura Abbott static inline pud_t * fixmap_pud(unsigned long addr) 597af86e597SLaura Abbott { 598af86e597SLaura Abbott pgd_t *pgd = pgd_offset_k(addr); 599af86e597SLaura Abbott 600af86e597SLaura Abbott BUG_ON(pgd_none(*pgd) || pgd_bad(*pgd)); 601af86e597SLaura Abbott 602157962f5SArd Biesheuvel return pud_offset_kimg(pgd, addr); 603af86e597SLaura Abbott } 604af86e597SLaura Abbott 605af86e597SLaura Abbott static inline pmd_t * fixmap_pmd(unsigned long addr) 606af86e597SLaura Abbott { 607af86e597SLaura Abbott pud_t *pud = fixmap_pud(addr); 608af86e597SLaura Abbott 609af86e597SLaura Abbott BUG_ON(pud_none(*pud) || pud_bad(*pud)); 610af86e597SLaura Abbott 611157962f5SArd Biesheuvel return pmd_offset_kimg(pud, addr); 612af86e597SLaura Abbott } 613af86e597SLaura Abbott 614af86e597SLaura Abbott static inline pte_t * fixmap_pte(unsigned long addr) 615af86e597SLaura Abbott { 616157962f5SArd Biesheuvel return &bm_pte[pte_index(addr)]; 617af86e597SLaura Abbott } 618af86e597SLaura Abbott 619af86e597SLaura Abbott void __init early_fixmap_init(void) 620af86e597SLaura Abbott { 621af86e597SLaura Abbott pgd_t *pgd; 622af86e597SLaura Abbott pud_t *pud; 623af86e597SLaura Abbott pmd_t *pmd; 624af86e597SLaura Abbott unsigned long addr = FIXADDR_START; 625af86e597SLaura Abbott 626af86e597SLaura Abbott pgd = pgd_offset_k(addr); 627f80fb3a3SArd Biesheuvel if (CONFIG_PGTABLE_LEVELS > 3 && 628f80fb3a3SArd Biesheuvel !(pgd_none(*pgd) || pgd_page_paddr(*pgd) == __pa(bm_pud))) { 629f9040773SArd Biesheuvel /* 630f9040773SArd Biesheuvel * We only end up here if the kernel mapping and the fixmap 631f9040773SArd Biesheuvel * share the top level pgd entry, which should only happen on 632f9040773SArd Biesheuvel * 16k/4 levels configurations. 633f9040773SArd Biesheuvel */ 634f9040773SArd Biesheuvel BUG_ON(!IS_ENABLED(CONFIG_ARM64_16K_PAGES)); 635f9040773SArd Biesheuvel pud = pud_offset_kimg(pgd, addr); 636f9040773SArd Biesheuvel } else { 637af86e597SLaura Abbott pgd_populate(&init_mm, pgd, bm_pud); 638157962f5SArd Biesheuvel pud = fixmap_pud(addr); 639f9040773SArd Biesheuvel } 640af86e597SLaura Abbott pud_populate(&init_mm, pud, bm_pmd); 641157962f5SArd Biesheuvel pmd = fixmap_pmd(addr); 642af86e597SLaura Abbott pmd_populate_kernel(&init_mm, pmd, bm_pte); 643af86e597SLaura Abbott 644af86e597SLaura Abbott /* 645af86e597SLaura Abbott * The boot-ioremap range spans multiple pmds, for which 646157962f5SArd Biesheuvel * we are not prepared: 647af86e597SLaura Abbott */ 648af86e597SLaura Abbott BUILD_BUG_ON((__fix_to_virt(FIX_BTMAP_BEGIN) >> PMD_SHIFT) 649af86e597SLaura Abbott != (__fix_to_virt(FIX_BTMAP_END) >> PMD_SHIFT)); 650af86e597SLaura Abbott 651af86e597SLaura Abbott if ((pmd != fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN))) 652af86e597SLaura Abbott || pmd != fixmap_pmd(fix_to_virt(FIX_BTMAP_END))) { 653af86e597SLaura Abbott WARN_ON(1); 654af86e597SLaura Abbott pr_warn("pmd %p != %p, %p\n", 655af86e597SLaura Abbott pmd, fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN)), 656af86e597SLaura Abbott fixmap_pmd(fix_to_virt(FIX_BTMAP_END))); 657af86e597SLaura Abbott pr_warn("fix_to_virt(FIX_BTMAP_BEGIN): %08lx\n", 658af86e597SLaura Abbott fix_to_virt(FIX_BTMAP_BEGIN)); 659af86e597SLaura Abbott pr_warn("fix_to_virt(FIX_BTMAP_END): %08lx\n", 660af86e597SLaura Abbott fix_to_virt(FIX_BTMAP_END)); 661af86e597SLaura Abbott 662af86e597SLaura Abbott pr_warn("FIX_BTMAP_END: %d\n", FIX_BTMAP_END); 663af86e597SLaura Abbott pr_warn("FIX_BTMAP_BEGIN: %d\n", FIX_BTMAP_BEGIN); 664af86e597SLaura Abbott } 665af86e597SLaura Abbott } 666af86e597SLaura Abbott 667af86e597SLaura Abbott void __set_fixmap(enum fixed_addresses idx, 668af86e597SLaura Abbott phys_addr_t phys, pgprot_t flags) 669af86e597SLaura Abbott { 670af86e597SLaura Abbott unsigned long addr = __fix_to_virt(idx); 671af86e597SLaura Abbott pte_t *pte; 672af86e597SLaura Abbott 673b63dbef9SMark Rutland BUG_ON(idx <= FIX_HOLE || idx >= __end_of_fixed_addresses); 674af86e597SLaura Abbott 675af86e597SLaura Abbott pte = fixmap_pte(addr); 676af86e597SLaura Abbott 677af86e597SLaura Abbott if (pgprot_val(flags)) { 678af86e597SLaura Abbott set_pte(pte, pfn_pte(phys >> PAGE_SHIFT, flags)); 679af86e597SLaura Abbott } else { 680af86e597SLaura Abbott pte_clear(&init_mm, addr, pte); 681af86e597SLaura Abbott flush_tlb_kernel_range(addr, addr+PAGE_SIZE); 682af86e597SLaura Abbott } 683af86e597SLaura Abbott } 68461bd93ceSArd Biesheuvel 685f80fb3a3SArd Biesheuvel void *__init __fixmap_remap_fdt(phys_addr_t dt_phys, int *size, pgprot_t prot) 68661bd93ceSArd Biesheuvel { 68761bd93ceSArd Biesheuvel const u64 dt_virt_base = __fix_to_virt(FIX_FDT); 688f80fb3a3SArd Biesheuvel int offset; 68961bd93ceSArd Biesheuvel void *dt_virt; 69061bd93ceSArd Biesheuvel 69161bd93ceSArd Biesheuvel /* 69261bd93ceSArd Biesheuvel * Check whether the physical FDT address is set and meets the minimum 69361bd93ceSArd Biesheuvel * alignment requirement. Since we are relying on MIN_FDT_ALIGN to be 69404a84810SArd Biesheuvel * at least 8 bytes so that we can always access the magic and size 69504a84810SArd Biesheuvel * fields of the FDT header after mapping the first chunk, double check 69604a84810SArd Biesheuvel * here if that is indeed the case. 69761bd93ceSArd Biesheuvel */ 69861bd93ceSArd Biesheuvel BUILD_BUG_ON(MIN_FDT_ALIGN < 8); 69961bd93ceSArd Biesheuvel if (!dt_phys || dt_phys % MIN_FDT_ALIGN) 70061bd93ceSArd Biesheuvel return NULL; 70161bd93ceSArd Biesheuvel 70261bd93ceSArd Biesheuvel /* 70361bd93ceSArd Biesheuvel * Make sure that the FDT region can be mapped without the need to 70461bd93ceSArd Biesheuvel * allocate additional translation table pages, so that it is safe 705132233a7SLaura Abbott * to call create_mapping_noalloc() this early. 70661bd93ceSArd Biesheuvel * 70761bd93ceSArd Biesheuvel * On 64k pages, the FDT will be mapped using PTEs, so we need to 70861bd93ceSArd Biesheuvel * be in the same PMD as the rest of the fixmap. 70961bd93ceSArd Biesheuvel * On 4k pages, we'll use section mappings for the FDT so we only 71061bd93ceSArd Biesheuvel * have to be in the same PUD. 71161bd93ceSArd Biesheuvel */ 71261bd93ceSArd Biesheuvel BUILD_BUG_ON(dt_virt_base % SZ_2M); 71361bd93ceSArd Biesheuvel 714b433dce0SSuzuki K. Poulose BUILD_BUG_ON(__fix_to_virt(FIX_FDT_END) >> SWAPPER_TABLE_SHIFT != 715b433dce0SSuzuki K. Poulose __fix_to_virt(FIX_BTMAP_BEGIN) >> SWAPPER_TABLE_SHIFT); 71661bd93ceSArd Biesheuvel 717b433dce0SSuzuki K. Poulose offset = dt_phys % SWAPPER_BLOCK_SIZE; 71861bd93ceSArd Biesheuvel dt_virt = (void *)dt_virt_base + offset; 71961bd93ceSArd Biesheuvel 72061bd93ceSArd Biesheuvel /* map the first chunk so we can read the size from the header */ 721132233a7SLaura Abbott create_mapping_noalloc(round_down(dt_phys, SWAPPER_BLOCK_SIZE), 722132233a7SLaura Abbott dt_virt_base, SWAPPER_BLOCK_SIZE, prot); 72361bd93ceSArd Biesheuvel 72404a84810SArd Biesheuvel if (fdt_magic(dt_virt) != FDT_MAGIC) 72561bd93ceSArd Biesheuvel return NULL; 72661bd93ceSArd Biesheuvel 727f80fb3a3SArd Biesheuvel *size = fdt_totalsize(dt_virt); 728f80fb3a3SArd Biesheuvel if (*size > MAX_FDT_SIZE) 72961bd93ceSArd Biesheuvel return NULL; 73061bd93ceSArd Biesheuvel 731f80fb3a3SArd Biesheuvel if (offset + *size > SWAPPER_BLOCK_SIZE) 732132233a7SLaura Abbott create_mapping_noalloc(round_down(dt_phys, SWAPPER_BLOCK_SIZE), dt_virt_base, 733f80fb3a3SArd Biesheuvel round_up(offset + *size, SWAPPER_BLOCK_SIZE), prot); 734f80fb3a3SArd Biesheuvel 735f80fb3a3SArd Biesheuvel return dt_virt; 736f80fb3a3SArd Biesheuvel } 737f80fb3a3SArd Biesheuvel 738f80fb3a3SArd Biesheuvel void *__init fixmap_remap_fdt(phys_addr_t dt_phys) 739f80fb3a3SArd Biesheuvel { 740f80fb3a3SArd Biesheuvel void *dt_virt; 741f80fb3a3SArd Biesheuvel int size; 742f80fb3a3SArd Biesheuvel 743f80fb3a3SArd Biesheuvel dt_virt = __fixmap_remap_fdt(dt_phys, &size, PAGE_KERNEL_RO); 744f80fb3a3SArd Biesheuvel if (!dt_virt) 745f80fb3a3SArd Biesheuvel return NULL; 74661bd93ceSArd Biesheuvel 74761bd93ceSArd Biesheuvel memblock_reserve(dt_phys, size); 74861bd93ceSArd Biesheuvel return dt_virt; 74961bd93ceSArd Biesheuvel } 750324420bfSArd Biesheuvel 751324420bfSArd Biesheuvel int __init arch_ioremap_pud_supported(void) 752324420bfSArd Biesheuvel { 753324420bfSArd Biesheuvel /* only 4k granule supports level 1 block mappings */ 754324420bfSArd Biesheuvel return IS_ENABLED(CONFIG_ARM64_4K_PAGES); 755324420bfSArd Biesheuvel } 756324420bfSArd Biesheuvel 757324420bfSArd Biesheuvel int __init arch_ioremap_pmd_supported(void) 758324420bfSArd Biesheuvel { 759324420bfSArd Biesheuvel return 1; 760324420bfSArd Biesheuvel } 761324420bfSArd Biesheuvel 762324420bfSArd Biesheuvel int pud_set_huge(pud_t *pud, phys_addr_t phys, pgprot_t prot) 763324420bfSArd Biesheuvel { 764324420bfSArd Biesheuvel BUG_ON(phys & ~PUD_MASK); 765324420bfSArd Biesheuvel set_pud(pud, __pud(phys | PUD_TYPE_SECT | pgprot_val(mk_sect_prot(prot)))); 766324420bfSArd Biesheuvel return 1; 767324420bfSArd Biesheuvel } 768324420bfSArd Biesheuvel 769324420bfSArd Biesheuvel int pmd_set_huge(pmd_t *pmd, phys_addr_t phys, pgprot_t prot) 770324420bfSArd Biesheuvel { 771324420bfSArd Biesheuvel BUG_ON(phys & ~PMD_MASK); 772324420bfSArd Biesheuvel set_pmd(pmd, __pmd(phys | PMD_TYPE_SECT | pgprot_val(mk_sect_prot(prot)))); 773324420bfSArd Biesheuvel return 1; 774324420bfSArd Biesheuvel } 775324420bfSArd Biesheuvel 776324420bfSArd Biesheuvel int pud_clear_huge(pud_t *pud) 777324420bfSArd Biesheuvel { 778324420bfSArd Biesheuvel if (!pud_sect(*pud)) 779324420bfSArd Biesheuvel return 0; 780324420bfSArd Biesheuvel pud_clear(pud); 781324420bfSArd Biesheuvel return 1; 782324420bfSArd Biesheuvel } 783324420bfSArd Biesheuvel 784324420bfSArd Biesheuvel int pmd_clear_huge(pmd_t *pmd) 785324420bfSArd Biesheuvel { 786324420bfSArd Biesheuvel if (!pmd_sect(*pmd)) 787324420bfSArd Biesheuvel return 0; 788324420bfSArd Biesheuvel pmd_clear(pmd); 789324420bfSArd Biesheuvel return 1; 790324420bfSArd Biesheuvel } 791