xref: /openbmc/linux/arch/arm64/mm/mmu.c (revision ec28bb9c9b0826d7bd36f44cccfa5295c291cadd)
1c1cc1552SCatalin Marinas /*
2c1cc1552SCatalin Marinas  * Based on arch/arm/mm/mmu.c
3c1cc1552SCatalin Marinas  *
4c1cc1552SCatalin Marinas  * Copyright (C) 1995-2005 Russell King
5c1cc1552SCatalin Marinas  * Copyright (C) 2012 ARM Ltd.
6c1cc1552SCatalin Marinas  *
7c1cc1552SCatalin Marinas  * This program is free software; you can redistribute it and/or modify
8c1cc1552SCatalin Marinas  * it under the terms of the GNU General Public License version 2 as
9c1cc1552SCatalin Marinas  * published by the Free Software Foundation.
10c1cc1552SCatalin Marinas  *
11c1cc1552SCatalin Marinas  * This program is distributed in the hope that it will be useful,
12c1cc1552SCatalin Marinas  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13c1cc1552SCatalin Marinas  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14c1cc1552SCatalin Marinas  * GNU General Public License for more details.
15c1cc1552SCatalin Marinas  *
16c1cc1552SCatalin Marinas  * You should have received a copy of the GNU General Public License
17c1cc1552SCatalin Marinas  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
18c1cc1552SCatalin Marinas  */
19c1cc1552SCatalin Marinas 
205a9e3e15SJisheng Zhang #include <linux/cache.h>
21c1cc1552SCatalin Marinas #include <linux/export.h>
22c1cc1552SCatalin Marinas #include <linux/kernel.h>
23c1cc1552SCatalin Marinas #include <linux/errno.h>
24c1cc1552SCatalin Marinas #include <linux/init.h>
2598d2e153STakahiro Akashi #include <linux/ioport.h>
2698d2e153STakahiro Akashi #include <linux/kexec.h>
2761bd93ceSArd Biesheuvel #include <linux/libfdt.h>
28c1cc1552SCatalin Marinas #include <linux/mman.h>
29c1cc1552SCatalin Marinas #include <linux/nodemask.h>
30c1cc1552SCatalin Marinas #include <linux/memblock.h>
31c1cc1552SCatalin Marinas #include <linux/fs.h>
322475ff9dSCatalin Marinas #include <linux/io.h>
332077be67SLaura Abbott #include <linux/mm.h>
346efd8499STobias Klauser #include <linux/vmalloc.h>
35c1cc1552SCatalin Marinas 
3621ab99c2SMark Rutland #include <asm/barrier.h>
37c1cc1552SCatalin Marinas #include <asm/cputype.h>
38af86e597SLaura Abbott #include <asm/fixmap.h>
39068a17a5SMark Rutland #include <asm/kasan.h>
40b433dce0SSuzuki K. Poulose #include <asm/kernel-pgtable.h>
41c1cc1552SCatalin Marinas #include <asm/sections.h>
42c1cc1552SCatalin Marinas #include <asm/setup.h>
43c1cc1552SCatalin Marinas #include <asm/sizes.h>
44c1cc1552SCatalin Marinas #include <asm/tlb.h>
45c79b954bSJungseok Lee #include <asm/memblock.h>
46c1cc1552SCatalin Marinas #include <asm/mmu_context.h>
471404d6f1SLaura Abbott #include <asm/ptdump.h>
48*ec28bb9cSChintan Pandya #include <asm/tlbflush.h>
49c1cc1552SCatalin Marinas 
50c0951366SArd Biesheuvel #define NO_BLOCK_MAPPINGS	BIT(0)
51d27cfa1fSArd Biesheuvel #define NO_CONT_MAPPINGS	BIT(1)
52c0951366SArd Biesheuvel 
53dd006da2SArd Biesheuvel u64 idmap_t0sz = TCR_T0SZ(VA_BITS);
54fa2a8445SKristina Martsenko u64 idmap_ptrs_per_pgd = PTRS_PER_PGD;
55dd006da2SArd Biesheuvel 
565a9e3e15SJisheng Zhang u64 kimage_voffset __ro_after_init;
57a7f8de16SArd Biesheuvel EXPORT_SYMBOL(kimage_voffset);
58a7f8de16SArd Biesheuvel 
59c1cc1552SCatalin Marinas /*
60c1cc1552SCatalin Marinas  * Empty_zero_page is a special page that is used for zero-initialized data
61c1cc1552SCatalin Marinas  * and COW.
62c1cc1552SCatalin Marinas  */
635227cfa7SMark Rutland unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)] __page_aligned_bss;
64c1cc1552SCatalin Marinas EXPORT_SYMBOL(empty_zero_page);
65c1cc1552SCatalin Marinas 
66f9040773SArd Biesheuvel static pte_t bm_pte[PTRS_PER_PTE] __page_aligned_bss;
67f9040773SArd Biesheuvel static pmd_t bm_pmd[PTRS_PER_PMD] __page_aligned_bss __maybe_unused;
68f9040773SArd Biesheuvel static pud_t bm_pud[PTRS_PER_PUD] __page_aligned_bss __maybe_unused;
69f9040773SArd Biesheuvel 
70c1cc1552SCatalin Marinas pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
71c1cc1552SCatalin Marinas 			      unsigned long size, pgprot_t vma_prot)
72c1cc1552SCatalin Marinas {
73c1cc1552SCatalin Marinas 	if (!pfn_valid(pfn))
74c1cc1552SCatalin Marinas 		return pgprot_noncached(vma_prot);
75c1cc1552SCatalin Marinas 	else if (file->f_flags & O_SYNC)
76c1cc1552SCatalin Marinas 		return pgprot_writecombine(vma_prot);
77c1cc1552SCatalin Marinas 	return vma_prot;
78c1cc1552SCatalin Marinas }
79c1cc1552SCatalin Marinas EXPORT_SYMBOL(phys_mem_access_prot);
80c1cc1552SCatalin Marinas 
81f4710445SMark Rutland static phys_addr_t __init early_pgtable_alloc(void)
82c1cc1552SCatalin Marinas {
837142392dSSuzuki K. Poulose 	phys_addr_t phys;
847142392dSSuzuki K. Poulose 	void *ptr;
857142392dSSuzuki K. Poulose 
8621ab99c2SMark Rutland 	phys = memblock_alloc(PAGE_SIZE, PAGE_SIZE);
87f4710445SMark Rutland 
88f4710445SMark Rutland 	/*
89f4710445SMark Rutland 	 * The FIX_{PGD,PUD,PMD} slots may be in active use, but the FIX_PTE
90f4710445SMark Rutland 	 * slot will be free, so we can (ab)use the FIX_PTE slot to initialise
91f4710445SMark Rutland 	 * any level of table.
92f4710445SMark Rutland 	 */
93f4710445SMark Rutland 	ptr = pte_set_fixmap(phys);
94f4710445SMark Rutland 
9521ab99c2SMark Rutland 	memset(ptr, 0, PAGE_SIZE);
9621ab99c2SMark Rutland 
97f4710445SMark Rutland 	/*
98f4710445SMark Rutland 	 * Implicit barriers also ensure the zeroed page is visible to the page
99f4710445SMark Rutland 	 * table walker
100f4710445SMark Rutland 	 */
101f4710445SMark Rutland 	pte_clear_fixmap();
102f4710445SMark Rutland 
103f4710445SMark Rutland 	return phys;
104c1cc1552SCatalin Marinas }
105c1cc1552SCatalin Marinas 
106e98216b5SArd Biesheuvel static bool pgattr_change_is_safe(u64 old, u64 new)
107e98216b5SArd Biesheuvel {
108e98216b5SArd Biesheuvel 	/*
109e98216b5SArd Biesheuvel 	 * The following mapping attributes may be updated in live
110e98216b5SArd Biesheuvel 	 * kernel mappings without the need for break-before-make.
111e98216b5SArd Biesheuvel 	 */
112753e8abcSArd Biesheuvel 	static const pteval_t mask = PTE_PXN | PTE_RDONLY | PTE_WRITE | PTE_NG;
113e98216b5SArd Biesheuvel 
114141d1497SArd Biesheuvel 	/* creating or taking down mappings is always safe */
115141d1497SArd Biesheuvel 	if (old == 0 || new == 0)
116141d1497SArd Biesheuvel 		return true;
117141d1497SArd Biesheuvel 
118141d1497SArd Biesheuvel 	/* live contiguous mappings may not be manipulated at all */
119141d1497SArd Biesheuvel 	if ((old | new) & PTE_CONT)
120141d1497SArd Biesheuvel 		return false;
121141d1497SArd Biesheuvel 
122753e8abcSArd Biesheuvel 	/* Transitioning from Non-Global to Global is unsafe */
123753e8abcSArd Biesheuvel 	if (old & ~new & PTE_NG)
124753e8abcSArd Biesheuvel 		return false;
1254e602056SWill Deacon 
126141d1497SArd Biesheuvel 	return ((old ^ new) & ~mask) == 0;
127e98216b5SArd Biesheuvel }
128e98216b5SArd Biesheuvel 
12920a004e7SWill Deacon static void init_pte(pmd_t *pmdp, unsigned long addr, unsigned long end,
130d27cfa1fSArd Biesheuvel 		     phys_addr_t phys, pgprot_t prot)
131c1cc1552SCatalin Marinas {
13220a004e7SWill Deacon 	pte_t *ptep;
133c1cc1552SCatalin Marinas 
13420a004e7SWill Deacon 	ptep = pte_set_fixmap_offset(pmdp, addr);
135c1cc1552SCatalin Marinas 	do {
13620a004e7SWill Deacon 		pte_t old_pte = READ_ONCE(*ptep);
137e98216b5SArd Biesheuvel 
13820a004e7SWill Deacon 		set_pte(ptep, pfn_pte(__phys_to_pfn(phys), prot));
139e98216b5SArd Biesheuvel 
140e98216b5SArd Biesheuvel 		/*
141e98216b5SArd Biesheuvel 		 * After the PTE entry has been populated once, we
142e98216b5SArd Biesheuvel 		 * only allow updates to the permission attributes.
143e98216b5SArd Biesheuvel 		 */
14420a004e7SWill Deacon 		BUG_ON(!pgattr_change_is_safe(pte_val(old_pte),
14520a004e7SWill Deacon 					      READ_ONCE(pte_val(*ptep))));
146e98216b5SArd Biesheuvel 
147e393cf40SArd Biesheuvel 		phys += PAGE_SIZE;
14820a004e7SWill Deacon 	} while (ptep++, addr += PAGE_SIZE, addr != end);
149f4710445SMark Rutland 
150f4710445SMark Rutland 	pte_clear_fixmap();
151c1cc1552SCatalin Marinas }
152c1cc1552SCatalin Marinas 
15320a004e7SWill Deacon static void alloc_init_cont_pte(pmd_t *pmdp, unsigned long addr,
154d27cfa1fSArd Biesheuvel 				unsigned long end, phys_addr_t phys,
155d27cfa1fSArd Biesheuvel 				pgprot_t prot,
15653e1b329SArd Biesheuvel 				phys_addr_t (*pgtable_alloc)(void),
157c0951366SArd Biesheuvel 				int flags)
158c1cc1552SCatalin Marinas {
159c1cc1552SCatalin Marinas 	unsigned long next;
16020a004e7SWill Deacon 	pmd_t pmd = READ_ONCE(*pmdp);
161c1cc1552SCatalin Marinas 
16220a004e7SWill Deacon 	BUG_ON(pmd_sect(pmd));
16320a004e7SWill Deacon 	if (pmd_none(pmd)) {
164d27cfa1fSArd Biesheuvel 		phys_addr_t pte_phys;
165132233a7SLaura Abbott 		BUG_ON(!pgtable_alloc);
166d27cfa1fSArd Biesheuvel 		pte_phys = pgtable_alloc();
16720a004e7SWill Deacon 		__pmd_populate(pmdp, pte_phys, PMD_TYPE_TABLE);
16820a004e7SWill Deacon 		pmd = READ_ONCE(*pmdp);
169c1cc1552SCatalin Marinas 	}
17020a004e7SWill Deacon 	BUG_ON(pmd_bad(pmd));
171d27cfa1fSArd Biesheuvel 
172d27cfa1fSArd Biesheuvel 	do {
173d27cfa1fSArd Biesheuvel 		pgprot_t __prot = prot;
174d27cfa1fSArd Biesheuvel 
175d27cfa1fSArd Biesheuvel 		next = pte_cont_addr_end(addr, end);
176d27cfa1fSArd Biesheuvel 
177d27cfa1fSArd Biesheuvel 		/* use a contiguous mapping if the range is suitably aligned */
178d27cfa1fSArd Biesheuvel 		if ((((addr | next | phys) & ~CONT_PTE_MASK) == 0) &&
179d27cfa1fSArd Biesheuvel 		    (flags & NO_CONT_MAPPINGS) == 0)
180d27cfa1fSArd Biesheuvel 			__prot = __pgprot(pgprot_val(prot) | PTE_CONT);
181d27cfa1fSArd Biesheuvel 
18220a004e7SWill Deacon 		init_pte(pmdp, addr, next, phys, __prot);
183d27cfa1fSArd Biesheuvel 
184d27cfa1fSArd Biesheuvel 		phys += next - addr;
185d27cfa1fSArd Biesheuvel 	} while (addr = next, addr != end);
186d27cfa1fSArd Biesheuvel }
187d27cfa1fSArd Biesheuvel 
18820a004e7SWill Deacon static void init_pmd(pud_t *pudp, unsigned long addr, unsigned long end,
189d27cfa1fSArd Biesheuvel 		     phys_addr_t phys, pgprot_t prot,
190d27cfa1fSArd Biesheuvel 		     phys_addr_t (*pgtable_alloc)(void), int flags)
191d27cfa1fSArd Biesheuvel {
192d27cfa1fSArd Biesheuvel 	unsigned long next;
19320a004e7SWill Deacon 	pmd_t *pmdp;
194c1cc1552SCatalin Marinas 
19520a004e7SWill Deacon 	pmdp = pmd_set_fixmap_offset(pudp, addr);
196c1cc1552SCatalin Marinas 	do {
19720a004e7SWill Deacon 		pmd_t old_pmd = READ_ONCE(*pmdp);
198e98216b5SArd Biesheuvel 
199c1cc1552SCatalin Marinas 		next = pmd_addr_end(addr, end);
200e98216b5SArd Biesheuvel 
201c1cc1552SCatalin Marinas 		/* try section mapping first */
20283863f25SLaura Abbott 		if (((addr | next | phys) & ~SECTION_MASK) == 0 &&
203c0951366SArd Biesheuvel 		    (flags & NO_BLOCK_MAPPINGS) == 0) {
20420a004e7SWill Deacon 			pmd_set_huge(pmdp, phys, prot);
205e98216b5SArd Biesheuvel 
206a55f9929SCatalin Marinas 			/*
207e98216b5SArd Biesheuvel 			 * After the PMD entry has been populated once, we
208e98216b5SArd Biesheuvel 			 * only allow updates to the permission attributes.
209a55f9929SCatalin Marinas 			 */
210e98216b5SArd Biesheuvel 			BUG_ON(!pgattr_change_is_safe(pmd_val(old_pmd),
21120a004e7SWill Deacon 						      READ_ONCE(pmd_val(*pmdp))));
212a55f9929SCatalin Marinas 		} else {
21320a004e7SWill Deacon 			alloc_init_cont_pte(pmdp, addr, next, phys, prot,
214d27cfa1fSArd Biesheuvel 					    pgtable_alloc, flags);
215e98216b5SArd Biesheuvel 
216e98216b5SArd Biesheuvel 			BUG_ON(pmd_val(old_pmd) != 0 &&
21720a004e7SWill Deacon 			       pmd_val(old_pmd) != READ_ONCE(pmd_val(*pmdp)));
218a55f9929SCatalin Marinas 		}
219c1cc1552SCatalin Marinas 		phys += next - addr;
22020a004e7SWill Deacon 	} while (pmdp++, addr = next, addr != end);
221f4710445SMark Rutland 
222f4710445SMark Rutland 	pmd_clear_fixmap();
223c1cc1552SCatalin Marinas }
224c1cc1552SCatalin Marinas 
22520a004e7SWill Deacon static void alloc_init_cont_pmd(pud_t *pudp, unsigned long addr,
226d27cfa1fSArd Biesheuvel 				unsigned long end, phys_addr_t phys,
227d27cfa1fSArd Biesheuvel 				pgprot_t prot,
228d27cfa1fSArd Biesheuvel 				phys_addr_t (*pgtable_alloc)(void), int flags)
229d27cfa1fSArd Biesheuvel {
230d27cfa1fSArd Biesheuvel 	unsigned long next;
23120a004e7SWill Deacon 	pud_t pud = READ_ONCE(*pudp);
232d27cfa1fSArd Biesheuvel 
233d27cfa1fSArd Biesheuvel 	/*
234d27cfa1fSArd Biesheuvel 	 * Check for initial section mappings in the pgd/pud.
235d27cfa1fSArd Biesheuvel 	 */
23620a004e7SWill Deacon 	BUG_ON(pud_sect(pud));
23720a004e7SWill Deacon 	if (pud_none(pud)) {
238d27cfa1fSArd Biesheuvel 		phys_addr_t pmd_phys;
239d27cfa1fSArd Biesheuvel 		BUG_ON(!pgtable_alloc);
240d27cfa1fSArd Biesheuvel 		pmd_phys = pgtable_alloc();
24120a004e7SWill Deacon 		__pud_populate(pudp, pmd_phys, PUD_TYPE_TABLE);
24220a004e7SWill Deacon 		pud = READ_ONCE(*pudp);
243d27cfa1fSArd Biesheuvel 	}
24420a004e7SWill Deacon 	BUG_ON(pud_bad(pud));
245d27cfa1fSArd Biesheuvel 
246d27cfa1fSArd Biesheuvel 	do {
247d27cfa1fSArd Biesheuvel 		pgprot_t __prot = prot;
248d27cfa1fSArd Biesheuvel 
249d27cfa1fSArd Biesheuvel 		next = pmd_cont_addr_end(addr, end);
250d27cfa1fSArd Biesheuvel 
251d27cfa1fSArd Biesheuvel 		/* use a contiguous mapping if the range is suitably aligned */
252d27cfa1fSArd Biesheuvel 		if ((((addr | next | phys) & ~CONT_PMD_MASK) == 0) &&
253d27cfa1fSArd Biesheuvel 		    (flags & NO_CONT_MAPPINGS) == 0)
254d27cfa1fSArd Biesheuvel 			__prot = __pgprot(pgprot_val(prot) | PTE_CONT);
255d27cfa1fSArd Biesheuvel 
25620a004e7SWill Deacon 		init_pmd(pudp, addr, next, phys, __prot, pgtable_alloc, flags);
257d27cfa1fSArd Biesheuvel 
258d27cfa1fSArd Biesheuvel 		phys += next - addr;
259d27cfa1fSArd Biesheuvel 	} while (addr = next, addr != end);
260d27cfa1fSArd Biesheuvel }
261d27cfa1fSArd Biesheuvel 
262da141706SLaura Abbott static inline bool use_1G_block(unsigned long addr, unsigned long next,
263da141706SLaura Abbott 			unsigned long phys)
264da141706SLaura Abbott {
265da141706SLaura Abbott 	if (PAGE_SHIFT != 12)
266da141706SLaura Abbott 		return false;
267da141706SLaura Abbott 
268da141706SLaura Abbott 	if (((addr | next | phys) & ~PUD_MASK) != 0)
269da141706SLaura Abbott 		return false;
270da141706SLaura Abbott 
271da141706SLaura Abbott 	return true;
272da141706SLaura Abbott }
273da141706SLaura Abbott 
27420a004e7SWill Deacon static void alloc_init_pud(pgd_t *pgdp, unsigned long addr, unsigned long end,
275da141706SLaura Abbott 			   phys_addr_t phys, pgprot_t prot,
27653e1b329SArd Biesheuvel 			   phys_addr_t (*pgtable_alloc)(void),
277c0951366SArd Biesheuvel 			   int flags)
278c1cc1552SCatalin Marinas {
279c1cc1552SCatalin Marinas 	unsigned long next;
28020a004e7SWill Deacon 	pud_t *pudp;
28120a004e7SWill Deacon 	pgd_t pgd = READ_ONCE(*pgdp);
282c1cc1552SCatalin Marinas 
28320a004e7SWill Deacon 	if (pgd_none(pgd)) {
284132233a7SLaura Abbott 		phys_addr_t pud_phys;
285132233a7SLaura Abbott 		BUG_ON(!pgtable_alloc);
286132233a7SLaura Abbott 		pud_phys = pgtable_alloc();
28720a004e7SWill Deacon 		__pgd_populate(pgdp, pud_phys, PUD_TYPE_TABLE);
28820a004e7SWill Deacon 		pgd = READ_ONCE(*pgdp);
289c79b954bSJungseok Lee 	}
29020a004e7SWill Deacon 	BUG_ON(pgd_bad(pgd));
291c79b954bSJungseok Lee 
29220a004e7SWill Deacon 	pudp = pud_set_fixmap_offset(pgdp, addr);
293c1cc1552SCatalin Marinas 	do {
29420a004e7SWill Deacon 		pud_t old_pud = READ_ONCE(*pudp);
295e98216b5SArd Biesheuvel 
296c1cc1552SCatalin Marinas 		next = pud_addr_end(addr, end);
297206a2a73SSteve Capper 
298206a2a73SSteve Capper 		/*
299206a2a73SSteve Capper 		 * For 4K granule only, attempt to put down a 1GB block
300206a2a73SSteve Capper 		 */
301c0951366SArd Biesheuvel 		if (use_1G_block(addr, next, phys) &&
302c0951366SArd Biesheuvel 		    (flags & NO_BLOCK_MAPPINGS) == 0) {
30320a004e7SWill Deacon 			pud_set_huge(pudp, phys, prot);
304206a2a73SSteve Capper 
305206a2a73SSteve Capper 			/*
306e98216b5SArd Biesheuvel 			 * After the PUD entry has been populated once, we
307e98216b5SArd Biesheuvel 			 * only allow updates to the permission attributes.
308206a2a73SSteve Capper 			 */
309e98216b5SArd Biesheuvel 			BUG_ON(!pgattr_change_is_safe(pud_val(old_pud),
31020a004e7SWill Deacon 						      READ_ONCE(pud_val(*pudp))));
311206a2a73SSteve Capper 		} else {
31220a004e7SWill Deacon 			alloc_init_cont_pmd(pudp, addr, next, phys, prot,
313c0951366SArd Biesheuvel 					    pgtable_alloc, flags);
314e98216b5SArd Biesheuvel 
315e98216b5SArd Biesheuvel 			BUG_ON(pud_val(old_pud) != 0 &&
31620a004e7SWill Deacon 			       pud_val(old_pud) != READ_ONCE(pud_val(*pudp)));
317206a2a73SSteve Capper 		}
318c1cc1552SCatalin Marinas 		phys += next - addr;
31920a004e7SWill Deacon 	} while (pudp++, addr = next, addr != end);
320f4710445SMark Rutland 
321f4710445SMark Rutland 	pud_clear_fixmap();
322c1cc1552SCatalin Marinas }
323c1cc1552SCatalin Marinas 
32440f87d31SArd Biesheuvel static void __create_pgd_mapping(pgd_t *pgdir, phys_addr_t phys,
32540f87d31SArd Biesheuvel 				 unsigned long virt, phys_addr_t size,
32640f87d31SArd Biesheuvel 				 pgprot_t prot,
32753e1b329SArd Biesheuvel 				 phys_addr_t (*pgtable_alloc)(void),
328c0951366SArd Biesheuvel 				 int flags)
329c1cc1552SCatalin Marinas {
330c1cc1552SCatalin Marinas 	unsigned long addr, length, end, next;
33120a004e7SWill Deacon 	pgd_t *pgdp = pgd_offset_raw(pgdir, virt);
332c1cc1552SCatalin Marinas 
333cc5d2b3bSMark Rutland 	/*
334cc5d2b3bSMark Rutland 	 * If the virtual and physical address don't have the same offset
335cc5d2b3bSMark Rutland 	 * within a page, we cannot map the region as the caller expects.
336cc5d2b3bSMark Rutland 	 */
337cc5d2b3bSMark Rutland 	if (WARN_ON((phys ^ virt) & ~PAGE_MASK))
338cc5d2b3bSMark Rutland 		return;
339cc5d2b3bSMark Rutland 
3409c4e08a3SMark Rutland 	phys &= PAGE_MASK;
341c1cc1552SCatalin Marinas 	addr = virt & PAGE_MASK;
342c1cc1552SCatalin Marinas 	length = PAGE_ALIGN(size + (virt & ~PAGE_MASK));
343c1cc1552SCatalin Marinas 
344c1cc1552SCatalin Marinas 	end = addr + length;
345c1cc1552SCatalin Marinas 	do {
346c1cc1552SCatalin Marinas 		next = pgd_addr_end(addr, end);
34720a004e7SWill Deacon 		alloc_init_pud(pgdp, addr, next, phys, prot, pgtable_alloc,
348c0951366SArd Biesheuvel 			       flags);
349c1cc1552SCatalin Marinas 		phys += next - addr;
35020a004e7SWill Deacon 	} while (pgdp++, addr = next, addr != end);
351c1cc1552SCatalin Marinas }
352c1cc1552SCatalin Marinas 
3531378dc3dSArd Biesheuvel static phys_addr_t pgd_pgtable_alloc(void)
354da141706SLaura Abbott {
35521ab99c2SMark Rutland 	void *ptr = (void *)__get_free_page(PGALLOC_GFP);
3561378dc3dSArd Biesheuvel 	if (!ptr || !pgtable_page_ctor(virt_to_page(ptr)))
3571378dc3dSArd Biesheuvel 		BUG();
35821ab99c2SMark Rutland 
35921ab99c2SMark Rutland 	/* Ensure the zeroed page is visible to the page table walker */
36021ab99c2SMark Rutland 	dsb(ishst);
361f4710445SMark Rutland 	return __pa(ptr);
362da141706SLaura Abbott }
363da141706SLaura Abbott 
364132233a7SLaura Abbott /*
365132233a7SLaura Abbott  * This function can only be used to modify existing table entries,
366132233a7SLaura Abbott  * without allocating new levels of table. Note that this permits the
367132233a7SLaura Abbott  * creation of new section or page entries.
368132233a7SLaura Abbott  */
369132233a7SLaura Abbott static void __init create_mapping_noalloc(phys_addr_t phys, unsigned long virt,
370da141706SLaura Abbott 				  phys_addr_t size, pgprot_t prot)
371d7ecbddfSMark Salter {
372d7ecbddfSMark Salter 	if (virt < VMALLOC_START) {
373d7ecbddfSMark Salter 		pr_warn("BUG: not creating mapping for %pa at 0x%016lx - outside kernel range\n",
374d7ecbddfSMark Salter 			&phys, virt);
375d7ecbddfSMark Salter 		return;
376d7ecbddfSMark Salter 	}
377d27cfa1fSArd Biesheuvel 	__create_pgd_mapping(init_mm.pgd, phys, virt, size, prot, NULL,
378d27cfa1fSArd Biesheuvel 			     NO_CONT_MAPPINGS);
379d7ecbddfSMark Salter }
380d7ecbddfSMark Salter 
3818ce837ceSArd Biesheuvel void __init create_pgd_mapping(struct mm_struct *mm, phys_addr_t phys,
3828ce837ceSArd Biesheuvel 			       unsigned long virt, phys_addr_t size,
383f14c66ceSArd Biesheuvel 			       pgprot_t prot, bool page_mappings_only)
3848ce837ceSArd Biesheuvel {
385c0951366SArd Biesheuvel 	int flags = 0;
386c0951366SArd Biesheuvel 
3871378dc3dSArd Biesheuvel 	BUG_ON(mm == &init_mm);
3881378dc3dSArd Biesheuvel 
389c0951366SArd Biesheuvel 	if (page_mappings_only)
390d27cfa1fSArd Biesheuvel 		flags = NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS;
391c0951366SArd Biesheuvel 
39211509a30SMark Rutland 	__create_pgd_mapping(mm->pgd, phys, virt, size, prot,
393c0951366SArd Biesheuvel 			     pgd_pgtable_alloc, flags);
394d7ecbddfSMark Salter }
395d7ecbddfSMark Salter 
396aa8c09beSArd Biesheuvel static void update_mapping_prot(phys_addr_t phys, unsigned long virt,
397da141706SLaura Abbott 				phys_addr_t size, pgprot_t prot)
398da141706SLaura Abbott {
399da141706SLaura Abbott 	if (virt < VMALLOC_START) {
400aa8c09beSArd Biesheuvel 		pr_warn("BUG: not updating mapping for %pa at 0x%016lx - outside kernel range\n",
401da141706SLaura Abbott 			&phys, virt);
402da141706SLaura Abbott 		return;
403da141706SLaura Abbott 	}
404da141706SLaura Abbott 
405d27cfa1fSArd Biesheuvel 	__create_pgd_mapping(init_mm.pgd, phys, virt, size, prot, NULL,
406d27cfa1fSArd Biesheuvel 			     NO_CONT_MAPPINGS);
407aa8c09beSArd Biesheuvel 
408aa8c09beSArd Biesheuvel 	/* flush the TLBs after updating live kernel mappings */
409aa8c09beSArd Biesheuvel 	flush_tlb_kernel_range(virt, virt + size);
410da141706SLaura Abbott }
411da141706SLaura Abbott 
41220a004e7SWill Deacon static void __init __map_memblock(pgd_t *pgdp, phys_addr_t start,
41398d2e153STakahiro Akashi 				  phys_addr_t end, pgprot_t prot, int flags)
414da141706SLaura Abbott {
41520a004e7SWill Deacon 	__create_pgd_mapping(pgdp, start, __phys_to_virt(start), end - start,
41698d2e153STakahiro Akashi 			     prot, early_pgtable_alloc, flags);
417da141706SLaura Abbott }
418da141706SLaura Abbott 
4195ea5306cSArd Biesheuvel void __init mark_linear_text_alias_ro(void)
4205ea5306cSArd Biesheuvel {
4215ea5306cSArd Biesheuvel 	/*
4225ea5306cSArd Biesheuvel 	 * Remove the write permissions from the linear alias of .text/.rodata
4235ea5306cSArd Biesheuvel 	 */
4245ea5306cSArd Biesheuvel 	update_mapping_prot(__pa_symbol(_text), (unsigned long)lm_alias(_text),
4255ea5306cSArd Biesheuvel 			    (unsigned long)__init_begin - (unsigned long)_text,
4265ea5306cSArd Biesheuvel 			    PAGE_KERNEL_RO);
4275ea5306cSArd Biesheuvel }
4285ea5306cSArd Biesheuvel 
42920a004e7SWill Deacon static void __init map_mem(pgd_t *pgdp)
430c1cc1552SCatalin Marinas {
43198d2e153STakahiro Akashi 	phys_addr_t kernel_start = __pa_symbol(_text);
43298d2e153STakahiro Akashi 	phys_addr_t kernel_end = __pa_symbol(__init_begin);
433c1cc1552SCatalin Marinas 	struct memblock_region *reg;
43498d2e153STakahiro Akashi 	int flags = 0;
43598d2e153STakahiro Akashi 
43698d2e153STakahiro Akashi 	if (debug_pagealloc_enabled())
43798d2e153STakahiro Akashi 		flags = NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS;
43898d2e153STakahiro Akashi 
43998d2e153STakahiro Akashi 	/*
44098d2e153STakahiro Akashi 	 * Take care not to create a writable alias for the
44198d2e153STakahiro Akashi 	 * read-only text and rodata sections of the kernel image.
44298d2e153STakahiro Akashi 	 * So temporarily mark them as NOMAP to skip mappings in
44398d2e153STakahiro Akashi 	 * the following for-loop
44498d2e153STakahiro Akashi 	 */
44598d2e153STakahiro Akashi 	memblock_mark_nomap(kernel_start, kernel_end - kernel_start);
44698d2e153STakahiro Akashi #ifdef CONFIG_KEXEC_CORE
44798d2e153STakahiro Akashi 	if (crashk_res.end)
44898d2e153STakahiro Akashi 		memblock_mark_nomap(crashk_res.start,
44998d2e153STakahiro Akashi 				    resource_size(&crashk_res));
45098d2e153STakahiro Akashi #endif
451f6bc87c3SSteve Capper 
452c1cc1552SCatalin Marinas 	/* map all the memory banks */
453c1cc1552SCatalin Marinas 	for_each_memblock(memory, reg) {
454c1cc1552SCatalin Marinas 		phys_addr_t start = reg->base;
455c1cc1552SCatalin Marinas 		phys_addr_t end = start + reg->size;
456c1cc1552SCatalin Marinas 
457c1cc1552SCatalin Marinas 		if (start >= end)
458c1cc1552SCatalin Marinas 			break;
45968709f45SArd Biesheuvel 		if (memblock_is_nomap(reg))
46068709f45SArd Biesheuvel 			continue;
461c1cc1552SCatalin Marinas 
46220a004e7SWill Deacon 		__map_memblock(pgdp, start, end, PAGE_KERNEL, flags);
463c1cc1552SCatalin Marinas 	}
46498d2e153STakahiro Akashi 
46598d2e153STakahiro Akashi 	/*
46698d2e153STakahiro Akashi 	 * Map the linear alias of the [_text, __init_begin) interval
46798d2e153STakahiro Akashi 	 * as non-executable now, and remove the write permission in
46898d2e153STakahiro Akashi 	 * mark_linear_text_alias_ro() below (which will be called after
46998d2e153STakahiro Akashi 	 * alternative patching has completed). This makes the contents
47098d2e153STakahiro Akashi 	 * of the region accessible to subsystems such as hibernate,
47198d2e153STakahiro Akashi 	 * but protects it from inadvertent modification or execution.
47298d2e153STakahiro Akashi 	 * Note that contiguous mappings cannot be remapped in this way,
47398d2e153STakahiro Akashi 	 * so we should avoid them here.
47498d2e153STakahiro Akashi 	 */
47520a004e7SWill Deacon 	__map_memblock(pgdp, kernel_start, kernel_end,
47698d2e153STakahiro Akashi 		       PAGE_KERNEL, NO_CONT_MAPPINGS);
47798d2e153STakahiro Akashi 	memblock_clear_nomap(kernel_start, kernel_end - kernel_start);
47898d2e153STakahiro Akashi 
47998d2e153STakahiro Akashi #ifdef CONFIG_KEXEC_CORE
48098d2e153STakahiro Akashi 	/*
48198d2e153STakahiro Akashi 	 * Use page-level mappings here so that we can shrink the region
48298d2e153STakahiro Akashi 	 * in page granularity and put back unused memory to buddy system
48398d2e153STakahiro Akashi 	 * through /sys/kernel/kexec_crash_size interface.
48498d2e153STakahiro Akashi 	 */
48598d2e153STakahiro Akashi 	if (crashk_res.end) {
48620a004e7SWill Deacon 		__map_memblock(pgdp, crashk_res.start, crashk_res.end + 1,
48798d2e153STakahiro Akashi 			       PAGE_KERNEL,
48898d2e153STakahiro Akashi 			       NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS);
48998d2e153STakahiro Akashi 		memblock_clear_nomap(crashk_res.start,
49098d2e153STakahiro Akashi 				     resource_size(&crashk_res));
49198d2e153STakahiro Akashi 	}
49298d2e153STakahiro Akashi #endif
493c1cc1552SCatalin Marinas }
494c1cc1552SCatalin Marinas 
495da141706SLaura Abbott void mark_rodata_ro(void)
496da141706SLaura Abbott {
4972f39b5f9SJeremy Linton 	unsigned long section_size;
498f9040773SArd Biesheuvel 
4992f39b5f9SJeremy Linton 	/*
5009fdc14c5SArd Biesheuvel 	 * mark .rodata as read only. Use __init_begin rather than __end_rodata
5019fdc14c5SArd Biesheuvel 	 * to cover NOTES and EXCEPTION_TABLE.
5022f39b5f9SJeremy Linton 	 */
5039fdc14c5SArd Biesheuvel 	section_size = (unsigned long)__init_begin - (unsigned long)__start_rodata;
504aa8c09beSArd Biesheuvel 	update_mapping_prot(__pa_symbol(__start_rodata), (unsigned long)__start_rodata,
5052f39b5f9SJeremy Linton 			    section_size, PAGE_KERNEL_RO);
506e98216b5SArd Biesheuvel 
5071404d6f1SLaura Abbott 	debug_checkwx();
508da141706SLaura Abbott }
509da141706SLaura Abbott 
51020a004e7SWill Deacon static void __init map_kernel_segment(pgd_t *pgdp, void *va_start, void *va_end,
511d27cfa1fSArd Biesheuvel 				      pgprot_t prot, struct vm_struct *vma,
51292bbd16eSWill Deacon 				      int flags, unsigned long vm_flags)
513068a17a5SMark Rutland {
5142077be67SLaura Abbott 	phys_addr_t pa_start = __pa_symbol(va_start);
515068a17a5SMark Rutland 	unsigned long size = va_end - va_start;
516068a17a5SMark Rutland 
517068a17a5SMark Rutland 	BUG_ON(!PAGE_ALIGNED(pa_start));
518068a17a5SMark Rutland 	BUG_ON(!PAGE_ALIGNED(size));
519068a17a5SMark Rutland 
52020a004e7SWill Deacon 	__create_pgd_mapping(pgdp, pa_start, (unsigned long)va_start, size, prot,
521d27cfa1fSArd Biesheuvel 			     early_pgtable_alloc, flags);
522f9040773SArd Biesheuvel 
52392bbd16eSWill Deacon 	if (!(vm_flags & VM_NO_GUARD))
52492bbd16eSWill Deacon 		size += PAGE_SIZE;
52592bbd16eSWill Deacon 
526f9040773SArd Biesheuvel 	vma->addr	= va_start;
527f9040773SArd Biesheuvel 	vma->phys_addr	= pa_start;
528f9040773SArd Biesheuvel 	vma->size	= size;
52992bbd16eSWill Deacon 	vma->flags	= VM_MAP | vm_flags;
530f9040773SArd Biesheuvel 	vma->caller	= __builtin_return_address(0);
531f9040773SArd Biesheuvel 
532f9040773SArd Biesheuvel 	vm_area_add_early(vma);
533068a17a5SMark Rutland }
534068a17a5SMark Rutland 
53528b066daSArd Biesheuvel static int __init parse_rodata(char *arg)
53628b066daSArd Biesheuvel {
53728b066daSArd Biesheuvel 	return strtobool(arg, &rodata_enabled);
53828b066daSArd Biesheuvel }
53928b066daSArd Biesheuvel early_param("rodata", parse_rodata);
54028b066daSArd Biesheuvel 
54151a0048bSWill Deacon #ifdef CONFIG_UNMAP_KERNEL_AT_EL0
54251a0048bSWill Deacon static int __init map_entry_trampoline(void)
54351a0048bSWill Deacon {
54451a0048bSWill Deacon 	pgprot_t prot = rodata_enabled ? PAGE_KERNEL_ROX : PAGE_KERNEL_EXEC;
54551a0048bSWill Deacon 	phys_addr_t pa_start = __pa_symbol(__entry_tramp_text_start);
54651a0048bSWill Deacon 
54751a0048bSWill Deacon 	/* The trampoline is always mapped and can therefore be global */
54851a0048bSWill Deacon 	pgprot_val(prot) &= ~PTE_NG;
54951a0048bSWill Deacon 
55051a0048bSWill Deacon 	/* Map only the text into the trampoline page table */
55151a0048bSWill Deacon 	memset(tramp_pg_dir, 0, PGD_SIZE);
55251a0048bSWill Deacon 	__create_pgd_mapping(tramp_pg_dir, pa_start, TRAMP_VALIAS, PAGE_SIZE,
55351a0048bSWill Deacon 			     prot, pgd_pgtable_alloc, 0);
55451a0048bSWill Deacon 
5556c27c408SWill Deacon 	/* Map both the text and data into the kernel page table */
55651a0048bSWill Deacon 	__set_fixmap(FIX_ENTRY_TRAMP_TEXT, pa_start, prot);
5576c27c408SWill Deacon 	if (IS_ENABLED(CONFIG_RANDOMIZE_BASE)) {
5586c27c408SWill Deacon 		extern char __entry_tramp_data_start[];
5596c27c408SWill Deacon 
5606c27c408SWill Deacon 		__set_fixmap(FIX_ENTRY_TRAMP_DATA,
5616c27c408SWill Deacon 			     __pa_symbol(__entry_tramp_data_start),
5626c27c408SWill Deacon 			     PAGE_KERNEL_RO);
5636c27c408SWill Deacon 	}
5646c27c408SWill Deacon 
56551a0048bSWill Deacon 	return 0;
56651a0048bSWill Deacon }
56751a0048bSWill Deacon core_initcall(map_entry_trampoline);
56851a0048bSWill Deacon #endif
56951a0048bSWill Deacon 
570068a17a5SMark Rutland /*
571068a17a5SMark Rutland  * Create fine-grained mappings for the kernel.
572068a17a5SMark Rutland  */
57320a004e7SWill Deacon static void __init map_kernel(pgd_t *pgdp)
574068a17a5SMark Rutland {
5752ebe088bSArd Biesheuvel 	static struct vm_struct vmlinux_text, vmlinux_rodata, vmlinux_inittext,
5762ebe088bSArd Biesheuvel 				vmlinux_initdata, vmlinux_data;
577068a17a5SMark Rutland 
57828b066daSArd Biesheuvel 	/*
57928b066daSArd Biesheuvel 	 * External debuggers may need to write directly to the text
58028b066daSArd Biesheuvel 	 * mapping to install SW breakpoints. Allow this (only) when
58128b066daSArd Biesheuvel 	 * explicitly requested with rodata=off.
58228b066daSArd Biesheuvel 	 */
58328b066daSArd Biesheuvel 	pgprot_t text_prot = rodata_enabled ? PAGE_KERNEL_ROX : PAGE_KERNEL_EXEC;
58428b066daSArd Biesheuvel 
585d27cfa1fSArd Biesheuvel 	/*
586d27cfa1fSArd Biesheuvel 	 * Only rodata will be remapped with different permissions later on,
587d27cfa1fSArd Biesheuvel 	 * all other segments are allowed to use contiguous mappings.
588d27cfa1fSArd Biesheuvel 	 */
58920a004e7SWill Deacon 	map_kernel_segment(pgdp, _text, _etext, text_prot, &vmlinux_text, 0,
59092bbd16eSWill Deacon 			   VM_NO_GUARD);
59120a004e7SWill Deacon 	map_kernel_segment(pgdp, __start_rodata, __inittext_begin, PAGE_KERNEL,
59292bbd16eSWill Deacon 			   &vmlinux_rodata, NO_CONT_MAPPINGS, VM_NO_GUARD);
59320a004e7SWill Deacon 	map_kernel_segment(pgdp, __inittext_begin, __inittext_end, text_prot,
59492bbd16eSWill Deacon 			   &vmlinux_inittext, 0, VM_NO_GUARD);
59520a004e7SWill Deacon 	map_kernel_segment(pgdp, __initdata_begin, __initdata_end, PAGE_KERNEL,
59692bbd16eSWill Deacon 			   &vmlinux_initdata, 0, VM_NO_GUARD);
59720a004e7SWill Deacon 	map_kernel_segment(pgdp, _data, _end, PAGE_KERNEL, &vmlinux_data, 0, 0);
598068a17a5SMark Rutland 
59920a004e7SWill Deacon 	if (!READ_ONCE(pgd_val(*pgd_offset_raw(pgdp, FIXADDR_START)))) {
600068a17a5SMark Rutland 		/*
601f9040773SArd Biesheuvel 		 * The fixmap falls in a separate pgd to the kernel, and doesn't
602f9040773SArd Biesheuvel 		 * live in the carveout for the swapper_pg_dir. We can simply
603f9040773SArd Biesheuvel 		 * re-use the existing dir for the fixmap.
604068a17a5SMark Rutland 		 */
60520a004e7SWill Deacon 		set_pgd(pgd_offset_raw(pgdp, FIXADDR_START),
60620a004e7SWill Deacon 			READ_ONCE(*pgd_offset_k(FIXADDR_START)));
607f9040773SArd Biesheuvel 	} else if (CONFIG_PGTABLE_LEVELS > 3) {
608f9040773SArd Biesheuvel 		/*
609f9040773SArd Biesheuvel 		 * The fixmap shares its top level pgd entry with the kernel
610f9040773SArd Biesheuvel 		 * mapping. This can really only occur when we are running
611f9040773SArd Biesheuvel 		 * with 16k/4 levels, so we can simply reuse the pud level
612f9040773SArd Biesheuvel 		 * entry instead.
613f9040773SArd Biesheuvel 		 */
614f9040773SArd Biesheuvel 		BUG_ON(!IS_ENABLED(CONFIG_ARM64_16K_PAGES));
61520a004e7SWill Deacon 		pud_populate(&init_mm,
61620a004e7SWill Deacon 			     pud_set_fixmap_offset(pgdp, FIXADDR_START),
61719338304SKristina Martsenko 			     lm_alias(bm_pmd));
618f9040773SArd Biesheuvel 		pud_clear_fixmap();
619f9040773SArd Biesheuvel 	} else {
620f9040773SArd Biesheuvel 		BUG();
621f9040773SArd Biesheuvel 	}
622068a17a5SMark Rutland 
62320a004e7SWill Deacon 	kasan_copy_shadow(pgdp);
624068a17a5SMark Rutland }
625068a17a5SMark Rutland 
626c1cc1552SCatalin Marinas /*
627c1cc1552SCatalin Marinas  * paging_init() sets up the page tables, initialises the zone memory
628c1cc1552SCatalin Marinas  * maps and sets up the zero page.
629c1cc1552SCatalin Marinas  */
630c1cc1552SCatalin Marinas void __init paging_init(void)
631c1cc1552SCatalin Marinas {
632068a17a5SMark Rutland 	phys_addr_t pgd_phys = early_pgtable_alloc();
63320a004e7SWill Deacon 	pgd_t *pgdp = pgd_set_fixmap(pgd_phys);
634068a17a5SMark Rutland 
63520a004e7SWill Deacon 	map_kernel(pgdp);
63620a004e7SWill Deacon 	map_mem(pgdp);
637068a17a5SMark Rutland 
638068a17a5SMark Rutland 	/*
639068a17a5SMark Rutland 	 * We want to reuse the original swapper_pg_dir so we don't have to
640068a17a5SMark Rutland 	 * communicate the new address to non-coherent secondaries in
641068a17a5SMark Rutland 	 * secondary_entry, and so cpu_switch_mm can generate the address with
642068a17a5SMark Rutland 	 * adrp+add rather than a load from some global variable.
643068a17a5SMark Rutland 	 *
644068a17a5SMark Rutland 	 * To do this we need to go via a temporary pgd.
645068a17a5SMark Rutland 	 */
646068a17a5SMark Rutland 	cpu_replace_ttbr1(__va(pgd_phys));
64720a004e7SWill Deacon 	memcpy(swapper_pg_dir, pgdp, PGD_SIZE);
6482077be67SLaura Abbott 	cpu_replace_ttbr1(lm_alias(swapper_pg_dir));
649068a17a5SMark Rutland 
650068a17a5SMark Rutland 	pgd_clear_fixmap();
651068a17a5SMark Rutland 	memblock_free(pgd_phys, PAGE_SIZE);
652068a17a5SMark Rutland 
653068a17a5SMark Rutland 	/*
654068a17a5SMark Rutland 	 * We only reuse the PGD from the swapper_pg_dir, not the pud + pmd
655068a17a5SMark Rutland 	 * allocated with it.
656068a17a5SMark Rutland 	 */
6572077be67SLaura Abbott 	memblock_free(__pa_symbol(swapper_pg_dir) + PAGE_SIZE,
6580370b31eSSteve Capper 		      __pa_symbol(swapper_pg_end) - __pa_symbol(swapper_pg_dir)
6590370b31eSSteve Capper 		      - PAGE_SIZE);
660c1cc1552SCatalin Marinas }
661c1cc1552SCatalin Marinas 
662c1cc1552SCatalin Marinas /*
663c1cc1552SCatalin Marinas  * Check whether a kernel address is valid (derived from arch/x86/).
664c1cc1552SCatalin Marinas  */
665c1cc1552SCatalin Marinas int kern_addr_valid(unsigned long addr)
666c1cc1552SCatalin Marinas {
66720a004e7SWill Deacon 	pgd_t *pgdp;
66820a004e7SWill Deacon 	pud_t *pudp, pud;
66920a004e7SWill Deacon 	pmd_t *pmdp, pmd;
67020a004e7SWill Deacon 	pte_t *ptep, pte;
671c1cc1552SCatalin Marinas 
672c1cc1552SCatalin Marinas 	if ((((long)addr) >> VA_BITS) != -1UL)
673c1cc1552SCatalin Marinas 		return 0;
674c1cc1552SCatalin Marinas 
67520a004e7SWill Deacon 	pgdp = pgd_offset_k(addr);
67620a004e7SWill Deacon 	if (pgd_none(READ_ONCE(*pgdp)))
677c1cc1552SCatalin Marinas 		return 0;
678c1cc1552SCatalin Marinas 
67920a004e7SWill Deacon 	pudp = pud_offset(pgdp, addr);
68020a004e7SWill Deacon 	pud = READ_ONCE(*pudp);
68120a004e7SWill Deacon 	if (pud_none(pud))
682c1cc1552SCatalin Marinas 		return 0;
683c1cc1552SCatalin Marinas 
68420a004e7SWill Deacon 	if (pud_sect(pud))
68520a004e7SWill Deacon 		return pfn_valid(pud_pfn(pud));
686206a2a73SSteve Capper 
68720a004e7SWill Deacon 	pmdp = pmd_offset(pudp, addr);
68820a004e7SWill Deacon 	pmd = READ_ONCE(*pmdp);
68920a004e7SWill Deacon 	if (pmd_none(pmd))
690c1cc1552SCatalin Marinas 		return 0;
691c1cc1552SCatalin Marinas 
69220a004e7SWill Deacon 	if (pmd_sect(pmd))
69320a004e7SWill Deacon 		return pfn_valid(pmd_pfn(pmd));
694da6e4cb6SDave Anderson 
69520a004e7SWill Deacon 	ptep = pte_offset_kernel(pmdp, addr);
69620a004e7SWill Deacon 	pte = READ_ONCE(*ptep);
69720a004e7SWill Deacon 	if (pte_none(pte))
698c1cc1552SCatalin Marinas 		return 0;
699c1cc1552SCatalin Marinas 
70020a004e7SWill Deacon 	return pfn_valid(pte_pfn(pte));
701c1cc1552SCatalin Marinas }
702c1cc1552SCatalin Marinas #ifdef CONFIG_SPARSEMEM_VMEMMAP
703b433dce0SSuzuki K. Poulose #if !ARM64_SWAPPER_USES_SECTION_MAPS
7047b73d978SChristoph Hellwig int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node,
7057b73d978SChristoph Hellwig 		struct vmem_altmap *altmap)
706c1cc1552SCatalin Marinas {
7070aad818bSJohannes Weiner 	return vmemmap_populate_basepages(start, end, node);
708c1cc1552SCatalin Marinas }
709b433dce0SSuzuki K. Poulose #else	/* !ARM64_SWAPPER_USES_SECTION_MAPS */
7107b73d978SChristoph Hellwig int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node,
7117b73d978SChristoph Hellwig 		struct vmem_altmap *altmap)
712c1cc1552SCatalin Marinas {
7130aad818bSJohannes Weiner 	unsigned long addr = start;
714c1cc1552SCatalin Marinas 	unsigned long next;
71520a004e7SWill Deacon 	pgd_t *pgdp;
71620a004e7SWill Deacon 	pud_t *pudp;
71720a004e7SWill Deacon 	pmd_t *pmdp;
718c1cc1552SCatalin Marinas 
719c1cc1552SCatalin Marinas 	do {
720c1cc1552SCatalin Marinas 		next = pmd_addr_end(addr, end);
721c1cc1552SCatalin Marinas 
72220a004e7SWill Deacon 		pgdp = vmemmap_pgd_populate(addr, node);
72320a004e7SWill Deacon 		if (!pgdp)
724c1cc1552SCatalin Marinas 			return -ENOMEM;
725c1cc1552SCatalin Marinas 
72620a004e7SWill Deacon 		pudp = vmemmap_pud_populate(pgdp, addr, node);
72720a004e7SWill Deacon 		if (!pudp)
728c1cc1552SCatalin Marinas 			return -ENOMEM;
729c1cc1552SCatalin Marinas 
73020a004e7SWill Deacon 		pmdp = pmd_offset(pudp, addr);
73120a004e7SWill Deacon 		if (pmd_none(READ_ONCE(*pmdp))) {
732c1cc1552SCatalin Marinas 			void *p = NULL;
733c1cc1552SCatalin Marinas 
734c1cc1552SCatalin Marinas 			p = vmemmap_alloc_block_buf(PMD_SIZE, node);
735c1cc1552SCatalin Marinas 			if (!p)
736c1cc1552SCatalin Marinas 				return -ENOMEM;
737c1cc1552SCatalin Marinas 
73820a004e7SWill Deacon 			pmd_set_huge(pmdp, __pa(p), __pgprot(PROT_SECT_NORMAL));
739c1cc1552SCatalin Marinas 		} else
74020a004e7SWill Deacon 			vmemmap_verify((pte_t *)pmdp, node, addr, next);
741c1cc1552SCatalin Marinas 	} while (addr = next, addr != end);
742c1cc1552SCatalin Marinas 
743c1cc1552SCatalin Marinas 	return 0;
744c1cc1552SCatalin Marinas }
745c1cc1552SCatalin Marinas #endif	/* CONFIG_ARM64_64K_PAGES */
74624b6d416SChristoph Hellwig void vmemmap_free(unsigned long start, unsigned long end,
74724b6d416SChristoph Hellwig 		struct vmem_altmap *altmap)
7480197518cSTang Chen {
7490197518cSTang Chen }
750c1cc1552SCatalin Marinas #endif	/* CONFIG_SPARSEMEM_VMEMMAP */
751af86e597SLaura Abbott 
752af86e597SLaura Abbott static inline pud_t * fixmap_pud(unsigned long addr)
753af86e597SLaura Abbott {
75420a004e7SWill Deacon 	pgd_t *pgdp = pgd_offset_k(addr);
75520a004e7SWill Deacon 	pgd_t pgd = READ_ONCE(*pgdp);
756af86e597SLaura Abbott 
75720a004e7SWill Deacon 	BUG_ON(pgd_none(pgd) || pgd_bad(pgd));
758af86e597SLaura Abbott 
75920a004e7SWill Deacon 	return pud_offset_kimg(pgdp, addr);
760af86e597SLaura Abbott }
761af86e597SLaura Abbott 
762af86e597SLaura Abbott static inline pmd_t * fixmap_pmd(unsigned long addr)
763af86e597SLaura Abbott {
76420a004e7SWill Deacon 	pud_t *pudp = fixmap_pud(addr);
76520a004e7SWill Deacon 	pud_t pud = READ_ONCE(*pudp);
766af86e597SLaura Abbott 
76720a004e7SWill Deacon 	BUG_ON(pud_none(pud) || pud_bad(pud));
768af86e597SLaura Abbott 
76920a004e7SWill Deacon 	return pmd_offset_kimg(pudp, addr);
770af86e597SLaura Abbott }
771af86e597SLaura Abbott 
772af86e597SLaura Abbott static inline pte_t * fixmap_pte(unsigned long addr)
773af86e597SLaura Abbott {
774157962f5SArd Biesheuvel 	return &bm_pte[pte_index(addr)];
775af86e597SLaura Abbott }
776af86e597SLaura Abbott 
7772077be67SLaura Abbott /*
7782077be67SLaura Abbott  * The p*d_populate functions call virt_to_phys implicitly so they can't be used
7792077be67SLaura Abbott  * directly on kernel symbols (bm_p*d). This function is called too early to use
7802077be67SLaura Abbott  * lm_alias so __p*d_populate functions must be used to populate with the
7812077be67SLaura Abbott  * physical address from __pa_symbol.
7822077be67SLaura Abbott  */
783af86e597SLaura Abbott void __init early_fixmap_init(void)
784af86e597SLaura Abbott {
78520a004e7SWill Deacon 	pgd_t *pgdp, pgd;
78620a004e7SWill Deacon 	pud_t *pudp;
78720a004e7SWill Deacon 	pmd_t *pmdp;
788af86e597SLaura Abbott 	unsigned long addr = FIXADDR_START;
789af86e597SLaura Abbott 
79020a004e7SWill Deacon 	pgdp = pgd_offset_k(addr);
79120a004e7SWill Deacon 	pgd = READ_ONCE(*pgdp);
792f80fb3a3SArd Biesheuvel 	if (CONFIG_PGTABLE_LEVELS > 3 &&
79320a004e7SWill Deacon 	    !(pgd_none(pgd) || pgd_page_paddr(pgd) == __pa_symbol(bm_pud))) {
794f9040773SArd Biesheuvel 		/*
795f9040773SArd Biesheuvel 		 * We only end up here if the kernel mapping and the fixmap
796f9040773SArd Biesheuvel 		 * share the top level pgd entry, which should only happen on
797f9040773SArd Biesheuvel 		 * 16k/4 levels configurations.
798f9040773SArd Biesheuvel 		 */
799f9040773SArd Biesheuvel 		BUG_ON(!IS_ENABLED(CONFIG_ARM64_16K_PAGES));
80020a004e7SWill Deacon 		pudp = pud_offset_kimg(pgdp, addr);
801f9040773SArd Biesheuvel 	} else {
80220a004e7SWill Deacon 		if (pgd_none(pgd))
80320a004e7SWill Deacon 			__pgd_populate(pgdp, __pa_symbol(bm_pud), PUD_TYPE_TABLE);
80420a004e7SWill Deacon 		pudp = fixmap_pud(addr);
805f9040773SArd Biesheuvel 	}
80620a004e7SWill Deacon 	if (pud_none(READ_ONCE(*pudp)))
80720a004e7SWill Deacon 		__pud_populate(pudp, __pa_symbol(bm_pmd), PMD_TYPE_TABLE);
80820a004e7SWill Deacon 	pmdp = fixmap_pmd(addr);
80920a004e7SWill Deacon 	__pmd_populate(pmdp, __pa_symbol(bm_pte), PMD_TYPE_TABLE);
810af86e597SLaura Abbott 
811af86e597SLaura Abbott 	/*
812af86e597SLaura Abbott 	 * The boot-ioremap range spans multiple pmds, for which
813157962f5SArd Biesheuvel 	 * we are not prepared:
814af86e597SLaura Abbott 	 */
815af86e597SLaura Abbott 	BUILD_BUG_ON((__fix_to_virt(FIX_BTMAP_BEGIN) >> PMD_SHIFT)
816af86e597SLaura Abbott 		     != (__fix_to_virt(FIX_BTMAP_END) >> PMD_SHIFT));
817af86e597SLaura Abbott 
81820a004e7SWill Deacon 	if ((pmdp != fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN)))
81920a004e7SWill Deacon 	     || pmdp != fixmap_pmd(fix_to_virt(FIX_BTMAP_END))) {
820af86e597SLaura Abbott 		WARN_ON(1);
82120a004e7SWill Deacon 		pr_warn("pmdp %p != %p, %p\n",
82220a004e7SWill Deacon 			pmdp, fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN)),
823af86e597SLaura Abbott 			fixmap_pmd(fix_to_virt(FIX_BTMAP_END)));
824af86e597SLaura Abbott 		pr_warn("fix_to_virt(FIX_BTMAP_BEGIN): %08lx\n",
825af86e597SLaura Abbott 			fix_to_virt(FIX_BTMAP_BEGIN));
826af86e597SLaura Abbott 		pr_warn("fix_to_virt(FIX_BTMAP_END):   %08lx\n",
827af86e597SLaura Abbott 			fix_to_virt(FIX_BTMAP_END));
828af86e597SLaura Abbott 
829af86e597SLaura Abbott 		pr_warn("FIX_BTMAP_END:       %d\n", FIX_BTMAP_END);
830af86e597SLaura Abbott 		pr_warn("FIX_BTMAP_BEGIN:     %d\n", FIX_BTMAP_BEGIN);
831af86e597SLaura Abbott 	}
832af86e597SLaura Abbott }
833af86e597SLaura Abbott 
83418b4b276SJames Morse /*
83518b4b276SJames Morse  * Unusually, this is also called in IRQ context (ghes_iounmap_irq) so if we
83618b4b276SJames Morse  * ever need to use IPIs for TLB broadcasting, then we're in trouble here.
83718b4b276SJames Morse  */
838af86e597SLaura Abbott void __set_fixmap(enum fixed_addresses idx,
839af86e597SLaura Abbott 			       phys_addr_t phys, pgprot_t flags)
840af86e597SLaura Abbott {
841af86e597SLaura Abbott 	unsigned long addr = __fix_to_virt(idx);
84220a004e7SWill Deacon 	pte_t *ptep;
843af86e597SLaura Abbott 
844b63dbef9SMark Rutland 	BUG_ON(idx <= FIX_HOLE || idx >= __end_of_fixed_addresses);
845af86e597SLaura Abbott 
84620a004e7SWill Deacon 	ptep = fixmap_pte(addr);
847af86e597SLaura Abbott 
848af86e597SLaura Abbott 	if (pgprot_val(flags)) {
84920a004e7SWill Deacon 		set_pte(ptep, pfn_pte(phys >> PAGE_SHIFT, flags));
850af86e597SLaura Abbott 	} else {
85120a004e7SWill Deacon 		pte_clear(&init_mm, addr, ptep);
852af86e597SLaura Abbott 		flush_tlb_kernel_range(addr, addr+PAGE_SIZE);
853af86e597SLaura Abbott 	}
854af86e597SLaura Abbott }
85561bd93ceSArd Biesheuvel 
856f80fb3a3SArd Biesheuvel void *__init __fixmap_remap_fdt(phys_addr_t dt_phys, int *size, pgprot_t prot)
85761bd93ceSArd Biesheuvel {
85861bd93ceSArd Biesheuvel 	const u64 dt_virt_base = __fix_to_virt(FIX_FDT);
859f80fb3a3SArd Biesheuvel 	int offset;
86061bd93ceSArd Biesheuvel 	void *dt_virt;
86161bd93ceSArd Biesheuvel 
86261bd93ceSArd Biesheuvel 	/*
86361bd93ceSArd Biesheuvel 	 * Check whether the physical FDT address is set and meets the minimum
86461bd93ceSArd Biesheuvel 	 * alignment requirement. Since we are relying on MIN_FDT_ALIGN to be
86504a84810SArd Biesheuvel 	 * at least 8 bytes so that we can always access the magic and size
86604a84810SArd Biesheuvel 	 * fields of the FDT header after mapping the first chunk, double check
86704a84810SArd Biesheuvel 	 * here if that is indeed the case.
86861bd93ceSArd Biesheuvel 	 */
86961bd93ceSArd Biesheuvel 	BUILD_BUG_ON(MIN_FDT_ALIGN < 8);
87061bd93ceSArd Biesheuvel 	if (!dt_phys || dt_phys % MIN_FDT_ALIGN)
87161bd93ceSArd Biesheuvel 		return NULL;
87261bd93ceSArd Biesheuvel 
87361bd93ceSArd Biesheuvel 	/*
87461bd93ceSArd Biesheuvel 	 * Make sure that the FDT region can be mapped without the need to
87561bd93ceSArd Biesheuvel 	 * allocate additional translation table pages, so that it is safe
876132233a7SLaura Abbott 	 * to call create_mapping_noalloc() this early.
87761bd93ceSArd Biesheuvel 	 *
87861bd93ceSArd Biesheuvel 	 * On 64k pages, the FDT will be mapped using PTEs, so we need to
87961bd93ceSArd Biesheuvel 	 * be in the same PMD as the rest of the fixmap.
88061bd93ceSArd Biesheuvel 	 * On 4k pages, we'll use section mappings for the FDT so we only
88161bd93ceSArd Biesheuvel 	 * have to be in the same PUD.
88261bd93ceSArd Biesheuvel 	 */
88361bd93ceSArd Biesheuvel 	BUILD_BUG_ON(dt_virt_base % SZ_2M);
88461bd93ceSArd Biesheuvel 
885b433dce0SSuzuki K. Poulose 	BUILD_BUG_ON(__fix_to_virt(FIX_FDT_END) >> SWAPPER_TABLE_SHIFT !=
886b433dce0SSuzuki K. Poulose 		     __fix_to_virt(FIX_BTMAP_BEGIN) >> SWAPPER_TABLE_SHIFT);
88761bd93ceSArd Biesheuvel 
888b433dce0SSuzuki K. Poulose 	offset = dt_phys % SWAPPER_BLOCK_SIZE;
88961bd93ceSArd Biesheuvel 	dt_virt = (void *)dt_virt_base + offset;
89061bd93ceSArd Biesheuvel 
89161bd93ceSArd Biesheuvel 	/* map the first chunk so we can read the size from the header */
892132233a7SLaura Abbott 	create_mapping_noalloc(round_down(dt_phys, SWAPPER_BLOCK_SIZE),
893132233a7SLaura Abbott 			dt_virt_base, SWAPPER_BLOCK_SIZE, prot);
89461bd93ceSArd Biesheuvel 
89504a84810SArd Biesheuvel 	if (fdt_magic(dt_virt) != FDT_MAGIC)
89661bd93ceSArd Biesheuvel 		return NULL;
89761bd93ceSArd Biesheuvel 
898f80fb3a3SArd Biesheuvel 	*size = fdt_totalsize(dt_virt);
899f80fb3a3SArd Biesheuvel 	if (*size > MAX_FDT_SIZE)
90061bd93ceSArd Biesheuvel 		return NULL;
90161bd93ceSArd Biesheuvel 
902f80fb3a3SArd Biesheuvel 	if (offset + *size > SWAPPER_BLOCK_SIZE)
903132233a7SLaura Abbott 		create_mapping_noalloc(round_down(dt_phys, SWAPPER_BLOCK_SIZE), dt_virt_base,
904f80fb3a3SArd Biesheuvel 			       round_up(offset + *size, SWAPPER_BLOCK_SIZE), prot);
905f80fb3a3SArd Biesheuvel 
906f80fb3a3SArd Biesheuvel 	return dt_virt;
907f80fb3a3SArd Biesheuvel }
908f80fb3a3SArd Biesheuvel 
909f80fb3a3SArd Biesheuvel void *__init fixmap_remap_fdt(phys_addr_t dt_phys)
910f80fb3a3SArd Biesheuvel {
911f80fb3a3SArd Biesheuvel 	void *dt_virt;
912f80fb3a3SArd Biesheuvel 	int size;
913f80fb3a3SArd Biesheuvel 
914f80fb3a3SArd Biesheuvel 	dt_virt = __fixmap_remap_fdt(dt_phys, &size, PAGE_KERNEL_RO);
915f80fb3a3SArd Biesheuvel 	if (!dt_virt)
916f80fb3a3SArd Biesheuvel 		return NULL;
91761bd93ceSArd Biesheuvel 
91861bd93ceSArd Biesheuvel 	memblock_reserve(dt_phys, size);
91961bd93ceSArd Biesheuvel 	return dt_virt;
92061bd93ceSArd Biesheuvel }
921324420bfSArd Biesheuvel 
922324420bfSArd Biesheuvel int __init arch_ioremap_pud_supported(void)
923324420bfSArd Biesheuvel {
924324420bfSArd Biesheuvel 	/* only 4k granule supports level 1 block mappings */
925324420bfSArd Biesheuvel 	return IS_ENABLED(CONFIG_ARM64_4K_PAGES);
926324420bfSArd Biesheuvel }
927324420bfSArd Biesheuvel 
928324420bfSArd Biesheuvel int __init arch_ioremap_pmd_supported(void)
929324420bfSArd Biesheuvel {
930324420bfSArd Biesheuvel 	return 1;
931324420bfSArd Biesheuvel }
932324420bfSArd Biesheuvel 
93320a004e7SWill Deacon int pud_set_huge(pud_t *pudp, phys_addr_t phys, pgprot_t prot)
934324420bfSArd Biesheuvel {
93519338304SKristina Martsenko 	pgprot_t sect_prot = __pgprot(PUD_TYPE_SECT |
93619338304SKristina Martsenko 					pgprot_val(mk_sect_prot(prot)));
93782034c23SLaura Abbott 	pud_t new_pud = pfn_pud(__phys_to_pfn(phys), sect_prot);
93815122ee2SWill Deacon 
93982034c23SLaura Abbott 	/* Only allow permission changes for now */
94082034c23SLaura Abbott 	if (!pgattr_change_is_safe(READ_ONCE(pud_val(*pudp)),
94182034c23SLaura Abbott 				   pud_val(new_pud)))
94215122ee2SWill Deacon 		return 0;
94315122ee2SWill Deacon 
944324420bfSArd Biesheuvel 	BUG_ON(phys & ~PUD_MASK);
94582034c23SLaura Abbott 	set_pud(pudp, new_pud);
946324420bfSArd Biesheuvel 	return 1;
947324420bfSArd Biesheuvel }
948324420bfSArd Biesheuvel 
94920a004e7SWill Deacon int pmd_set_huge(pmd_t *pmdp, phys_addr_t phys, pgprot_t prot)
950324420bfSArd Biesheuvel {
95119338304SKristina Martsenko 	pgprot_t sect_prot = __pgprot(PMD_TYPE_SECT |
95219338304SKristina Martsenko 					pgprot_val(mk_sect_prot(prot)));
95382034c23SLaura Abbott 	pmd_t new_pmd = pfn_pmd(__phys_to_pfn(phys), sect_prot);
95415122ee2SWill Deacon 
95582034c23SLaura Abbott 	/* Only allow permission changes for now */
95682034c23SLaura Abbott 	if (!pgattr_change_is_safe(READ_ONCE(pmd_val(*pmdp)),
95782034c23SLaura Abbott 				   pmd_val(new_pmd)))
95815122ee2SWill Deacon 		return 0;
95915122ee2SWill Deacon 
960324420bfSArd Biesheuvel 	BUG_ON(phys & ~PMD_MASK);
96182034c23SLaura Abbott 	set_pmd(pmdp, new_pmd);
962324420bfSArd Biesheuvel 	return 1;
963324420bfSArd Biesheuvel }
964324420bfSArd Biesheuvel 
96520a004e7SWill Deacon int pud_clear_huge(pud_t *pudp)
966324420bfSArd Biesheuvel {
96720a004e7SWill Deacon 	if (!pud_sect(READ_ONCE(*pudp)))
968324420bfSArd Biesheuvel 		return 0;
96920a004e7SWill Deacon 	pud_clear(pudp);
970324420bfSArd Biesheuvel 	return 1;
971324420bfSArd Biesheuvel }
972324420bfSArd Biesheuvel 
97320a004e7SWill Deacon int pmd_clear_huge(pmd_t *pmdp)
974324420bfSArd Biesheuvel {
97520a004e7SWill Deacon 	if (!pmd_sect(READ_ONCE(*pmdp)))
976324420bfSArd Biesheuvel 		return 0;
97720a004e7SWill Deacon 	pmd_clear(pmdp);
978324420bfSArd Biesheuvel 	return 1;
979324420bfSArd Biesheuvel }
980b6bdb751SToshi Kani 
981*ec28bb9cSChintan Pandya int pmd_free_pte_page(pmd_t *pmdp, unsigned long addr)
982b6bdb751SToshi Kani {
983*ec28bb9cSChintan Pandya 	pte_t *table;
984*ec28bb9cSChintan Pandya 	pmd_t pmd;
985*ec28bb9cSChintan Pandya 
986*ec28bb9cSChintan Pandya 	pmd = READ_ONCE(*pmdp);
987*ec28bb9cSChintan Pandya 
988*ec28bb9cSChintan Pandya 	/* No-op for empty entry and WARN_ON for valid entry */
989*ec28bb9cSChintan Pandya 	if (!pmd_present(pmd) || !pmd_table(pmd)) {
990*ec28bb9cSChintan Pandya 		VM_WARN_ON(!pmd_table(pmd));
991*ec28bb9cSChintan Pandya 		return 1;
992b6bdb751SToshi Kani 	}
993b6bdb751SToshi Kani 
994*ec28bb9cSChintan Pandya 	table = pte_offset_kernel(pmdp, addr);
995*ec28bb9cSChintan Pandya 	pmd_clear(pmdp);
996*ec28bb9cSChintan Pandya 	__flush_tlb_kernel_pgtable(addr);
997*ec28bb9cSChintan Pandya 	pte_free_kernel(NULL, table);
998*ec28bb9cSChintan Pandya 	return 1;
999*ec28bb9cSChintan Pandya }
1000*ec28bb9cSChintan Pandya 
1001*ec28bb9cSChintan Pandya int pud_free_pmd_page(pud_t *pudp, unsigned long addr)
1002b6bdb751SToshi Kani {
1003*ec28bb9cSChintan Pandya 	pmd_t *table;
1004*ec28bb9cSChintan Pandya 	pmd_t *pmdp;
1005*ec28bb9cSChintan Pandya 	pud_t pud;
1006*ec28bb9cSChintan Pandya 	unsigned long next, end;
1007*ec28bb9cSChintan Pandya 
1008*ec28bb9cSChintan Pandya 	pud = READ_ONCE(*pudp);
1009*ec28bb9cSChintan Pandya 
1010*ec28bb9cSChintan Pandya 	/* No-op for empty entry and WARN_ON for valid entry */
1011*ec28bb9cSChintan Pandya 	if (!pud_present(pud) || !pud_table(pud)) {
1012*ec28bb9cSChintan Pandya 		VM_WARN_ON(!pud_table(pud));
1013*ec28bb9cSChintan Pandya 		return 1;
1014*ec28bb9cSChintan Pandya 	}
1015*ec28bb9cSChintan Pandya 
1016*ec28bb9cSChintan Pandya 	table = pmd_offset(pudp, addr);
1017*ec28bb9cSChintan Pandya 	pmdp = table;
1018*ec28bb9cSChintan Pandya 	next = addr;
1019*ec28bb9cSChintan Pandya 	end = addr + PUD_SIZE;
1020*ec28bb9cSChintan Pandya 	do {
1021*ec28bb9cSChintan Pandya 		pmd_free_pte_page(pmdp, next);
1022*ec28bb9cSChintan Pandya 	} while (pmdp++, next += PMD_SIZE, next != end);
1023*ec28bb9cSChintan Pandya 
1024*ec28bb9cSChintan Pandya 	pud_clear(pudp);
1025*ec28bb9cSChintan Pandya 	__flush_tlb_kernel_pgtable(addr);
1026*ec28bb9cSChintan Pandya 	pmd_free(NULL, table);
1027*ec28bb9cSChintan Pandya 	return 1;
1028b6bdb751SToshi Kani }
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