1c1cc1552SCatalin Marinas /* 2c1cc1552SCatalin Marinas * Based on arch/arm/mm/mmu.c 3c1cc1552SCatalin Marinas * 4c1cc1552SCatalin Marinas * Copyright (C) 1995-2005 Russell King 5c1cc1552SCatalin Marinas * Copyright (C) 2012 ARM Ltd. 6c1cc1552SCatalin Marinas * 7c1cc1552SCatalin Marinas * This program is free software; you can redistribute it and/or modify 8c1cc1552SCatalin Marinas * it under the terms of the GNU General Public License version 2 as 9c1cc1552SCatalin Marinas * published by the Free Software Foundation. 10c1cc1552SCatalin Marinas * 11c1cc1552SCatalin Marinas * This program is distributed in the hope that it will be useful, 12c1cc1552SCatalin Marinas * but WITHOUT ANY WARRANTY; without even the implied warranty of 13c1cc1552SCatalin Marinas * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14c1cc1552SCatalin Marinas * GNU General Public License for more details. 15c1cc1552SCatalin Marinas * 16c1cc1552SCatalin Marinas * You should have received a copy of the GNU General Public License 17c1cc1552SCatalin Marinas * along with this program. If not, see <http://www.gnu.org/licenses/>. 18c1cc1552SCatalin Marinas */ 19c1cc1552SCatalin Marinas 20c1cc1552SCatalin Marinas #include <linux/export.h> 21c1cc1552SCatalin Marinas #include <linux/kernel.h> 22c1cc1552SCatalin Marinas #include <linux/errno.h> 23c1cc1552SCatalin Marinas #include <linux/init.h> 24c1cc1552SCatalin Marinas #include <linux/mman.h> 25c1cc1552SCatalin Marinas #include <linux/nodemask.h> 26c1cc1552SCatalin Marinas #include <linux/memblock.h> 27c1cc1552SCatalin Marinas #include <linux/fs.h> 282475ff9dSCatalin Marinas #include <linux/io.h> 2941089357SCatalin Marinas #include <linux/slab.h> 30da141706SLaura Abbott #include <linux/stop_machine.h> 31c1cc1552SCatalin Marinas 32c1cc1552SCatalin Marinas #include <asm/cputype.h> 33af86e597SLaura Abbott #include <asm/fixmap.h> 34c1cc1552SCatalin Marinas #include <asm/sections.h> 35c1cc1552SCatalin Marinas #include <asm/setup.h> 36c1cc1552SCatalin Marinas #include <asm/sizes.h> 37c1cc1552SCatalin Marinas #include <asm/tlb.h> 38c79b954bSJungseok Lee #include <asm/memblock.h> 39c1cc1552SCatalin Marinas #include <asm/mmu_context.h> 40c1cc1552SCatalin Marinas 41c1cc1552SCatalin Marinas #include "mm.h" 42c1cc1552SCatalin Marinas 43*dd006da2SArd Biesheuvel u64 idmap_t0sz = TCR_T0SZ(VA_BITS); 44*dd006da2SArd Biesheuvel 45c1cc1552SCatalin Marinas /* 46c1cc1552SCatalin Marinas * Empty_zero_page is a special page that is used for zero-initialized data 47c1cc1552SCatalin Marinas * and COW. 48c1cc1552SCatalin Marinas */ 49c1cc1552SCatalin Marinas struct page *empty_zero_page; 50c1cc1552SCatalin Marinas EXPORT_SYMBOL(empty_zero_page); 51c1cc1552SCatalin Marinas 52c1cc1552SCatalin Marinas pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, 53c1cc1552SCatalin Marinas unsigned long size, pgprot_t vma_prot) 54c1cc1552SCatalin Marinas { 55c1cc1552SCatalin Marinas if (!pfn_valid(pfn)) 56c1cc1552SCatalin Marinas return pgprot_noncached(vma_prot); 57c1cc1552SCatalin Marinas else if (file->f_flags & O_SYNC) 58c1cc1552SCatalin Marinas return pgprot_writecombine(vma_prot); 59c1cc1552SCatalin Marinas return vma_prot; 60c1cc1552SCatalin Marinas } 61c1cc1552SCatalin Marinas EXPORT_SYMBOL(phys_mem_access_prot); 62c1cc1552SCatalin Marinas 63c1cc1552SCatalin Marinas static void __init *early_alloc(unsigned long sz) 64c1cc1552SCatalin Marinas { 65c1cc1552SCatalin Marinas void *ptr = __va(memblock_alloc(sz, sz)); 66da141706SLaura Abbott BUG_ON(!ptr); 67c1cc1552SCatalin Marinas memset(ptr, 0, sz); 68c1cc1552SCatalin Marinas return ptr; 69c1cc1552SCatalin Marinas } 70c1cc1552SCatalin Marinas 71da141706SLaura Abbott /* 72da141706SLaura Abbott * remap a PMD into pages 73da141706SLaura Abbott */ 74da141706SLaura Abbott static void split_pmd(pmd_t *pmd, pte_t *pte) 75da141706SLaura Abbott { 76da141706SLaura Abbott unsigned long pfn = pmd_pfn(*pmd); 77da141706SLaura Abbott int i = 0; 78da141706SLaura Abbott 79da141706SLaura Abbott do { 80da141706SLaura Abbott /* 81da141706SLaura Abbott * Need to have the least restrictive permissions available 82da141706SLaura Abbott * permissions will be fixed up later 83da141706SLaura Abbott */ 84da141706SLaura Abbott set_pte(pte, pfn_pte(pfn, PAGE_KERNEL_EXEC)); 85da141706SLaura Abbott pfn++; 86da141706SLaura Abbott } while (pte++, i++, i < PTRS_PER_PTE); 87da141706SLaura Abbott } 88da141706SLaura Abbott 89da141706SLaura Abbott static void alloc_init_pte(pmd_t *pmd, unsigned long addr, 90d7ecbddfSMark Salter unsigned long end, unsigned long pfn, 91da141706SLaura Abbott pgprot_t prot, 92da141706SLaura Abbott void *(*alloc)(unsigned long size)) 93c1cc1552SCatalin Marinas { 94c1cc1552SCatalin Marinas pte_t *pte; 95c1cc1552SCatalin Marinas 96a1c76574SMark Rutland if (pmd_none(*pmd) || pmd_sect(*pmd)) { 97da141706SLaura Abbott pte = alloc(PTRS_PER_PTE * sizeof(pte_t)); 98da141706SLaura Abbott if (pmd_sect(*pmd)) 99da141706SLaura Abbott split_pmd(pmd, pte); 100c1cc1552SCatalin Marinas __pmd_populate(pmd, __pa(pte), PMD_TYPE_TABLE); 101da141706SLaura Abbott flush_tlb_all(); 102c1cc1552SCatalin Marinas } 103a1c76574SMark Rutland BUG_ON(pmd_bad(*pmd)); 104c1cc1552SCatalin Marinas 105c1cc1552SCatalin Marinas pte = pte_offset_kernel(pmd, addr); 106c1cc1552SCatalin Marinas do { 107d7ecbddfSMark Salter set_pte(pte, pfn_pte(pfn, prot)); 108c1cc1552SCatalin Marinas pfn++; 109c1cc1552SCatalin Marinas } while (pte++, addr += PAGE_SIZE, addr != end); 110c1cc1552SCatalin Marinas } 111c1cc1552SCatalin Marinas 112da141706SLaura Abbott void split_pud(pud_t *old_pud, pmd_t *pmd) 113da141706SLaura Abbott { 114da141706SLaura Abbott unsigned long addr = pud_pfn(*old_pud) << PAGE_SHIFT; 115da141706SLaura Abbott pgprot_t prot = __pgprot(pud_val(*old_pud) ^ addr); 116da141706SLaura Abbott int i = 0; 117da141706SLaura Abbott 118da141706SLaura Abbott do { 119da141706SLaura Abbott set_pmd(pmd, __pmd(addr | prot)); 120da141706SLaura Abbott addr += PMD_SIZE; 121da141706SLaura Abbott } while (pmd++, i++, i < PTRS_PER_PMD); 122da141706SLaura Abbott } 123da141706SLaura Abbott 124da141706SLaura Abbott static void alloc_init_pmd(struct mm_struct *mm, pud_t *pud, 125e1e1fddaSArd Biesheuvel unsigned long addr, unsigned long end, 126da141706SLaura Abbott phys_addr_t phys, pgprot_t prot, 127da141706SLaura Abbott void *(*alloc)(unsigned long size)) 128c1cc1552SCatalin Marinas { 129c1cc1552SCatalin Marinas pmd_t *pmd; 130c1cc1552SCatalin Marinas unsigned long next; 131c1cc1552SCatalin Marinas 132c1cc1552SCatalin Marinas /* 133c1cc1552SCatalin Marinas * Check for initial section mappings in the pgd/pud and remove them. 134c1cc1552SCatalin Marinas */ 135a1c76574SMark Rutland if (pud_none(*pud) || pud_sect(*pud)) { 136da141706SLaura Abbott pmd = alloc(PTRS_PER_PMD * sizeof(pmd_t)); 137da141706SLaura Abbott if (pud_sect(*pud)) { 138da141706SLaura Abbott /* 139da141706SLaura Abbott * need to have the 1G of mappings continue to be 140da141706SLaura Abbott * present 141da141706SLaura Abbott */ 142da141706SLaura Abbott split_pud(pud, pmd); 143da141706SLaura Abbott } 144e1e1fddaSArd Biesheuvel pud_populate(mm, pud, pmd); 145da141706SLaura Abbott flush_tlb_all(); 146c1cc1552SCatalin Marinas } 147a1c76574SMark Rutland BUG_ON(pud_bad(*pud)); 148c1cc1552SCatalin Marinas 149c1cc1552SCatalin Marinas pmd = pmd_offset(pud, addr); 150c1cc1552SCatalin Marinas do { 151c1cc1552SCatalin Marinas next = pmd_addr_end(addr, end); 152c1cc1552SCatalin Marinas /* try section mapping first */ 153a55f9929SCatalin Marinas if (((addr | next | phys) & ~SECTION_MASK) == 0) { 154a55f9929SCatalin Marinas pmd_t old_pmd =*pmd; 1558ce837ceSArd Biesheuvel set_pmd(pmd, __pmd(phys | 1568ce837ceSArd Biesheuvel pgprot_val(mk_sect_prot(prot)))); 157a55f9929SCatalin Marinas /* 158a55f9929SCatalin Marinas * Check for previous table entries created during 159a55f9929SCatalin Marinas * boot (__create_page_tables) and flush them. 160a55f9929SCatalin Marinas */ 161523d6e9fSzhichang.yuan if (!pmd_none(old_pmd)) { 162a55f9929SCatalin Marinas flush_tlb_all(); 163523d6e9fSzhichang.yuan if (pmd_table(old_pmd)) { 164523d6e9fSzhichang.yuan phys_addr_t table = __pa(pte_offset_map(&old_pmd, 0)); 16541089357SCatalin Marinas if (!WARN_ON_ONCE(slab_is_available())) 166523d6e9fSzhichang.yuan memblock_free(table, PAGE_SIZE); 167523d6e9fSzhichang.yuan } 168523d6e9fSzhichang.yuan } 169a55f9929SCatalin Marinas } else { 170d7ecbddfSMark Salter alloc_init_pte(pmd, addr, next, __phys_to_pfn(phys), 171da141706SLaura Abbott prot, alloc); 172a55f9929SCatalin Marinas } 173c1cc1552SCatalin Marinas phys += next - addr; 174c1cc1552SCatalin Marinas } while (pmd++, addr = next, addr != end); 175c1cc1552SCatalin Marinas } 176c1cc1552SCatalin Marinas 177da141706SLaura Abbott static inline bool use_1G_block(unsigned long addr, unsigned long next, 178da141706SLaura Abbott unsigned long phys) 179da141706SLaura Abbott { 180da141706SLaura Abbott if (PAGE_SHIFT != 12) 181da141706SLaura Abbott return false; 182da141706SLaura Abbott 183da141706SLaura Abbott if (((addr | next | phys) & ~PUD_MASK) != 0) 184da141706SLaura Abbott return false; 185da141706SLaura Abbott 186da141706SLaura Abbott return true; 187da141706SLaura Abbott } 188da141706SLaura Abbott 189da141706SLaura Abbott static void alloc_init_pud(struct mm_struct *mm, pgd_t *pgd, 190e1e1fddaSArd Biesheuvel unsigned long addr, unsigned long end, 191da141706SLaura Abbott phys_addr_t phys, pgprot_t prot, 192da141706SLaura Abbott void *(*alloc)(unsigned long size)) 193c1cc1552SCatalin Marinas { 194c79b954bSJungseok Lee pud_t *pud; 195c1cc1552SCatalin Marinas unsigned long next; 196c1cc1552SCatalin Marinas 197c79b954bSJungseok Lee if (pgd_none(*pgd)) { 198da141706SLaura Abbott pud = alloc(PTRS_PER_PUD * sizeof(pud_t)); 199e1e1fddaSArd Biesheuvel pgd_populate(mm, pgd, pud); 200c79b954bSJungseok Lee } 201c79b954bSJungseok Lee BUG_ON(pgd_bad(*pgd)); 202c79b954bSJungseok Lee 203c79b954bSJungseok Lee pud = pud_offset(pgd, addr); 204c1cc1552SCatalin Marinas do { 205c1cc1552SCatalin Marinas next = pud_addr_end(addr, end); 206206a2a73SSteve Capper 207206a2a73SSteve Capper /* 208206a2a73SSteve Capper * For 4K granule only, attempt to put down a 1GB block 209206a2a73SSteve Capper */ 210da141706SLaura Abbott if (use_1G_block(addr, next, phys)) { 211206a2a73SSteve Capper pud_t old_pud = *pud; 2128ce837ceSArd Biesheuvel set_pud(pud, __pud(phys | 2138ce837ceSArd Biesheuvel pgprot_val(mk_sect_prot(prot)))); 214206a2a73SSteve Capper 215206a2a73SSteve Capper /* 216206a2a73SSteve Capper * If we have an old value for a pud, it will 217206a2a73SSteve Capper * be pointing to a pmd table that we no longer 218206a2a73SSteve Capper * need (from swapper_pg_dir). 219206a2a73SSteve Capper * 220206a2a73SSteve Capper * Look up the old pmd table and free it. 221206a2a73SSteve Capper */ 222206a2a73SSteve Capper if (!pud_none(old_pud)) { 223206a2a73SSteve Capper flush_tlb_all(); 224523d6e9fSzhichang.yuan if (pud_table(old_pud)) { 225523d6e9fSzhichang.yuan phys_addr_t table = __pa(pmd_offset(&old_pud, 0)); 22641089357SCatalin Marinas if (!WARN_ON_ONCE(slab_is_available())) 227523d6e9fSzhichang.yuan memblock_free(table, PAGE_SIZE); 228523d6e9fSzhichang.yuan } 229206a2a73SSteve Capper } 230206a2a73SSteve Capper } else { 231da141706SLaura Abbott alloc_init_pmd(mm, pud, addr, next, phys, prot, alloc); 232206a2a73SSteve Capper } 233c1cc1552SCatalin Marinas phys += next - addr; 234c1cc1552SCatalin Marinas } while (pud++, addr = next, addr != end); 235c1cc1552SCatalin Marinas } 236c1cc1552SCatalin Marinas 237c1cc1552SCatalin Marinas /* 238c1cc1552SCatalin Marinas * Create the page directory entries and any necessary page tables for the 239c1cc1552SCatalin Marinas * mapping specified by 'md'. 240c1cc1552SCatalin Marinas */ 241da141706SLaura Abbott static void __create_mapping(struct mm_struct *mm, pgd_t *pgd, 242e1e1fddaSArd Biesheuvel phys_addr_t phys, unsigned long virt, 243da141706SLaura Abbott phys_addr_t size, pgprot_t prot, 244da141706SLaura Abbott void *(*alloc)(unsigned long size)) 245c1cc1552SCatalin Marinas { 246c1cc1552SCatalin Marinas unsigned long addr, length, end, next; 247c1cc1552SCatalin Marinas 248c1cc1552SCatalin Marinas addr = virt & PAGE_MASK; 249c1cc1552SCatalin Marinas length = PAGE_ALIGN(size + (virt & ~PAGE_MASK)); 250c1cc1552SCatalin Marinas 251c1cc1552SCatalin Marinas end = addr + length; 252c1cc1552SCatalin Marinas do { 253c1cc1552SCatalin Marinas next = pgd_addr_end(addr, end); 254da141706SLaura Abbott alloc_init_pud(mm, pgd, addr, next, phys, prot, alloc); 255c1cc1552SCatalin Marinas phys += next - addr; 256c1cc1552SCatalin Marinas } while (pgd++, addr = next, addr != end); 257c1cc1552SCatalin Marinas } 258c1cc1552SCatalin Marinas 259da141706SLaura Abbott static void *late_alloc(unsigned long size) 260da141706SLaura Abbott { 261da141706SLaura Abbott void *ptr; 262da141706SLaura Abbott 263da141706SLaura Abbott BUG_ON(size > PAGE_SIZE); 264da141706SLaura Abbott ptr = (void *)__get_free_page(PGALLOC_GFP); 265da141706SLaura Abbott BUG_ON(!ptr); 266da141706SLaura Abbott return ptr; 267da141706SLaura Abbott } 268da141706SLaura Abbott 269da141706SLaura Abbott static void __ref create_mapping(phys_addr_t phys, unsigned long virt, 270da141706SLaura Abbott phys_addr_t size, pgprot_t prot) 271d7ecbddfSMark Salter { 272d7ecbddfSMark Salter if (virt < VMALLOC_START) { 273d7ecbddfSMark Salter pr_warn("BUG: not creating mapping for %pa at 0x%016lx - outside kernel range\n", 274d7ecbddfSMark Salter &phys, virt); 275d7ecbddfSMark Salter return; 276d7ecbddfSMark Salter } 277e1e1fddaSArd Biesheuvel __create_mapping(&init_mm, pgd_offset_k(virt & PAGE_MASK), phys, virt, 278da141706SLaura Abbott size, prot, early_alloc); 279d7ecbddfSMark Salter } 280d7ecbddfSMark Salter 2818ce837ceSArd Biesheuvel void __init create_pgd_mapping(struct mm_struct *mm, phys_addr_t phys, 2828ce837ceSArd Biesheuvel unsigned long virt, phys_addr_t size, 2838ce837ceSArd Biesheuvel pgprot_t prot) 2848ce837ceSArd Biesheuvel { 285da141706SLaura Abbott __create_mapping(mm, pgd_offset(mm, virt), phys, virt, size, prot, 28660305db9SArd Biesheuvel late_alloc); 287d7ecbddfSMark Salter } 288d7ecbddfSMark Salter 289da141706SLaura Abbott static void create_mapping_late(phys_addr_t phys, unsigned long virt, 290da141706SLaura Abbott phys_addr_t size, pgprot_t prot) 291da141706SLaura Abbott { 292da141706SLaura Abbott if (virt < VMALLOC_START) { 293da141706SLaura Abbott pr_warn("BUG: not creating mapping for %pa at 0x%016lx - outside kernel range\n", 294da141706SLaura Abbott &phys, virt); 295da141706SLaura Abbott return; 296da141706SLaura Abbott } 297da141706SLaura Abbott 298da141706SLaura Abbott return __create_mapping(&init_mm, pgd_offset_k(virt & PAGE_MASK), 299da141706SLaura Abbott phys, virt, size, prot, late_alloc); 300da141706SLaura Abbott } 301da141706SLaura Abbott 302da141706SLaura Abbott #ifdef CONFIG_DEBUG_RODATA 303da141706SLaura Abbott static void __init __map_memblock(phys_addr_t start, phys_addr_t end) 304da141706SLaura Abbott { 305da141706SLaura Abbott /* 306da141706SLaura Abbott * Set up the executable regions using the existing section mappings 307da141706SLaura Abbott * for now. This will get more fine grained later once all memory 308da141706SLaura Abbott * is mapped 309da141706SLaura Abbott */ 310da141706SLaura Abbott unsigned long kernel_x_start = round_down(__pa(_stext), SECTION_SIZE); 311da141706SLaura Abbott unsigned long kernel_x_end = round_up(__pa(__init_end), SECTION_SIZE); 312da141706SLaura Abbott 313da141706SLaura Abbott if (end < kernel_x_start) { 314da141706SLaura Abbott create_mapping(start, __phys_to_virt(start), 315da141706SLaura Abbott end - start, PAGE_KERNEL); 316da141706SLaura Abbott } else if (start >= kernel_x_end) { 317da141706SLaura Abbott create_mapping(start, __phys_to_virt(start), 318da141706SLaura Abbott end - start, PAGE_KERNEL); 319da141706SLaura Abbott } else { 320da141706SLaura Abbott if (start < kernel_x_start) 321da141706SLaura Abbott create_mapping(start, __phys_to_virt(start), 322da141706SLaura Abbott kernel_x_start - start, 323da141706SLaura Abbott PAGE_KERNEL); 324da141706SLaura Abbott create_mapping(kernel_x_start, 325da141706SLaura Abbott __phys_to_virt(kernel_x_start), 326da141706SLaura Abbott kernel_x_end - kernel_x_start, 327da141706SLaura Abbott PAGE_KERNEL_EXEC); 328da141706SLaura Abbott if (kernel_x_end < end) 329da141706SLaura Abbott create_mapping(kernel_x_end, 330da141706SLaura Abbott __phys_to_virt(kernel_x_end), 331da141706SLaura Abbott end - kernel_x_end, 332da141706SLaura Abbott PAGE_KERNEL); 333da141706SLaura Abbott } 334da141706SLaura Abbott 335da141706SLaura Abbott } 336da141706SLaura Abbott #else 337da141706SLaura Abbott static void __init __map_memblock(phys_addr_t start, phys_addr_t end) 338da141706SLaura Abbott { 339da141706SLaura Abbott create_mapping(start, __phys_to_virt(start), end - start, 340da141706SLaura Abbott PAGE_KERNEL_EXEC); 341da141706SLaura Abbott } 342da141706SLaura Abbott #endif 343da141706SLaura Abbott 344c1cc1552SCatalin Marinas static void __init map_mem(void) 345c1cc1552SCatalin Marinas { 346c1cc1552SCatalin Marinas struct memblock_region *reg; 347e25208f7SCatalin Marinas phys_addr_t limit; 348c1cc1552SCatalin Marinas 349f6bc87c3SSteve Capper /* 350f6bc87c3SSteve Capper * Temporarily limit the memblock range. We need to do this as 351f6bc87c3SSteve Capper * create_mapping requires puds, pmds and ptes to be allocated from 352f6bc87c3SSteve Capper * memory addressable from the initial direct kernel mapping. 353f6bc87c3SSteve Capper * 3543dec0fe4SCatalin Marinas * The initial direct kernel mapping, located at swapper_pg_dir, gives 3553dec0fe4SCatalin Marinas * us PUD_SIZE (4K pages) or PMD_SIZE (64K pages) memory starting from 3563dec0fe4SCatalin Marinas * PHYS_OFFSET (which must be aligned to 2MB as per 3573dec0fe4SCatalin Marinas * Documentation/arm64/booting.txt). 358f6bc87c3SSteve Capper */ 3593dec0fe4SCatalin Marinas if (IS_ENABLED(CONFIG_ARM64_64K_PAGES)) 3603dec0fe4SCatalin Marinas limit = PHYS_OFFSET + PMD_SIZE; 3613dec0fe4SCatalin Marinas else 362c79b954bSJungseok Lee limit = PHYS_OFFSET + PUD_SIZE; 363e25208f7SCatalin Marinas memblock_set_current_limit(limit); 364f6bc87c3SSteve Capper 365c1cc1552SCatalin Marinas /* map all the memory banks */ 366c1cc1552SCatalin Marinas for_each_memblock(memory, reg) { 367c1cc1552SCatalin Marinas phys_addr_t start = reg->base; 368c1cc1552SCatalin Marinas phys_addr_t end = start + reg->size; 369c1cc1552SCatalin Marinas 370c1cc1552SCatalin Marinas if (start >= end) 371c1cc1552SCatalin Marinas break; 372c1cc1552SCatalin Marinas 373e25208f7SCatalin Marinas #ifndef CONFIG_ARM64_64K_PAGES 374e25208f7SCatalin Marinas /* 375e25208f7SCatalin Marinas * For the first memory bank align the start address and 376e25208f7SCatalin Marinas * current memblock limit to prevent create_mapping() from 377e25208f7SCatalin Marinas * allocating pte page tables from unmapped memory. 378e25208f7SCatalin Marinas * When 64K pages are enabled, the pte page table for the 379e25208f7SCatalin Marinas * first PGDIR_SIZE is already present in swapper_pg_dir. 380e25208f7SCatalin Marinas */ 381e25208f7SCatalin Marinas if (start < limit) 382e25208f7SCatalin Marinas start = ALIGN(start, PMD_SIZE); 383e25208f7SCatalin Marinas if (end < limit) { 384e25208f7SCatalin Marinas limit = end & PMD_MASK; 385e25208f7SCatalin Marinas memblock_set_current_limit(limit); 386e25208f7SCatalin Marinas } 387e25208f7SCatalin Marinas #endif 388da141706SLaura Abbott __map_memblock(start, end); 389c1cc1552SCatalin Marinas } 390f6bc87c3SSteve Capper 391f6bc87c3SSteve Capper /* Limit no longer required. */ 392f6bc87c3SSteve Capper memblock_set_current_limit(MEMBLOCK_ALLOC_ANYWHERE); 393c1cc1552SCatalin Marinas } 394c1cc1552SCatalin Marinas 395da141706SLaura Abbott void __init fixup_executable(void) 396da141706SLaura Abbott { 397da141706SLaura Abbott #ifdef CONFIG_DEBUG_RODATA 398da141706SLaura Abbott /* now that we are actually fully mapped, make the start/end more fine grained */ 399da141706SLaura Abbott if (!IS_ALIGNED((unsigned long)_stext, SECTION_SIZE)) { 400da141706SLaura Abbott unsigned long aligned_start = round_down(__pa(_stext), 401da141706SLaura Abbott SECTION_SIZE); 402da141706SLaura Abbott 403da141706SLaura Abbott create_mapping(aligned_start, __phys_to_virt(aligned_start), 404da141706SLaura Abbott __pa(_stext) - aligned_start, 405da141706SLaura Abbott PAGE_KERNEL); 406da141706SLaura Abbott } 407da141706SLaura Abbott 408da141706SLaura Abbott if (!IS_ALIGNED((unsigned long)__init_end, SECTION_SIZE)) { 409da141706SLaura Abbott unsigned long aligned_end = round_up(__pa(__init_end), 410da141706SLaura Abbott SECTION_SIZE); 411da141706SLaura Abbott create_mapping(__pa(__init_end), (unsigned long)__init_end, 412da141706SLaura Abbott aligned_end - __pa(__init_end), 413da141706SLaura Abbott PAGE_KERNEL); 414da141706SLaura Abbott } 415da141706SLaura Abbott #endif 416da141706SLaura Abbott } 417da141706SLaura Abbott 418da141706SLaura Abbott #ifdef CONFIG_DEBUG_RODATA 419da141706SLaura Abbott void mark_rodata_ro(void) 420da141706SLaura Abbott { 421da141706SLaura Abbott create_mapping_late(__pa(_stext), (unsigned long)_stext, 422da141706SLaura Abbott (unsigned long)_etext - (unsigned long)_stext, 423da141706SLaura Abbott PAGE_KERNEL_EXEC | PTE_RDONLY); 424da141706SLaura Abbott 425da141706SLaura Abbott } 426da141706SLaura Abbott #endif 427da141706SLaura Abbott 428da141706SLaura Abbott void fixup_init(void) 429da141706SLaura Abbott { 430da141706SLaura Abbott create_mapping_late(__pa(__init_begin), (unsigned long)__init_begin, 431da141706SLaura Abbott (unsigned long)__init_end - (unsigned long)__init_begin, 432da141706SLaura Abbott PAGE_KERNEL); 433da141706SLaura Abbott } 434da141706SLaura Abbott 435c1cc1552SCatalin Marinas /* 436c1cc1552SCatalin Marinas * paging_init() sets up the page tables, initialises the zone memory 437c1cc1552SCatalin Marinas * maps and sets up the zero page. 438c1cc1552SCatalin Marinas */ 439c1cc1552SCatalin Marinas void __init paging_init(void) 440c1cc1552SCatalin Marinas { 441c1cc1552SCatalin Marinas void *zero_page; 442c1cc1552SCatalin Marinas 443c1cc1552SCatalin Marinas map_mem(); 444da141706SLaura Abbott fixup_executable(); 445c1cc1552SCatalin Marinas 446c1cc1552SCatalin Marinas /* allocate the zero page. */ 447c1cc1552SCatalin Marinas zero_page = early_alloc(PAGE_SIZE); 448c1cc1552SCatalin Marinas 449c1cc1552SCatalin Marinas bootmem_init(); 450c1cc1552SCatalin Marinas 451c1cc1552SCatalin Marinas empty_zero_page = virt_to_page(zero_page); 452c1cc1552SCatalin Marinas 453c1cc1552SCatalin Marinas /* 454c1cc1552SCatalin Marinas * TTBR0 is only used for the identity mapping at this stage. Make it 455c1cc1552SCatalin Marinas * point to zero page to avoid speculatively fetching new entries. 456c1cc1552SCatalin Marinas */ 457c1cc1552SCatalin Marinas cpu_set_reserved_ttbr0(); 458c1cc1552SCatalin Marinas flush_tlb_all(); 459*dd006da2SArd Biesheuvel cpu_set_default_tcr_t0sz(); 460c1cc1552SCatalin Marinas } 461c1cc1552SCatalin Marinas 462c1cc1552SCatalin Marinas /* 463c1cc1552SCatalin Marinas * Enable the identity mapping to allow the MMU disabling. 464c1cc1552SCatalin Marinas */ 465c1cc1552SCatalin Marinas void setup_mm_for_reboot(void) 466c1cc1552SCatalin Marinas { 467*dd006da2SArd Biesheuvel cpu_set_reserved_ttbr0(); 468c1cc1552SCatalin Marinas flush_tlb_all(); 469*dd006da2SArd Biesheuvel cpu_set_idmap_tcr_t0sz(); 470*dd006da2SArd Biesheuvel cpu_switch_mm(idmap_pg_dir, &init_mm); 471c1cc1552SCatalin Marinas } 472c1cc1552SCatalin Marinas 473c1cc1552SCatalin Marinas /* 474c1cc1552SCatalin Marinas * Check whether a kernel address is valid (derived from arch/x86/). 475c1cc1552SCatalin Marinas */ 476c1cc1552SCatalin Marinas int kern_addr_valid(unsigned long addr) 477c1cc1552SCatalin Marinas { 478c1cc1552SCatalin Marinas pgd_t *pgd; 479c1cc1552SCatalin Marinas pud_t *pud; 480c1cc1552SCatalin Marinas pmd_t *pmd; 481c1cc1552SCatalin Marinas pte_t *pte; 482c1cc1552SCatalin Marinas 483c1cc1552SCatalin Marinas if ((((long)addr) >> VA_BITS) != -1UL) 484c1cc1552SCatalin Marinas return 0; 485c1cc1552SCatalin Marinas 486c1cc1552SCatalin Marinas pgd = pgd_offset_k(addr); 487c1cc1552SCatalin Marinas if (pgd_none(*pgd)) 488c1cc1552SCatalin Marinas return 0; 489c1cc1552SCatalin Marinas 490c1cc1552SCatalin Marinas pud = pud_offset(pgd, addr); 491c1cc1552SCatalin Marinas if (pud_none(*pud)) 492c1cc1552SCatalin Marinas return 0; 493c1cc1552SCatalin Marinas 494206a2a73SSteve Capper if (pud_sect(*pud)) 495206a2a73SSteve Capper return pfn_valid(pud_pfn(*pud)); 496206a2a73SSteve Capper 497c1cc1552SCatalin Marinas pmd = pmd_offset(pud, addr); 498c1cc1552SCatalin Marinas if (pmd_none(*pmd)) 499c1cc1552SCatalin Marinas return 0; 500c1cc1552SCatalin Marinas 501da6e4cb6SDave Anderson if (pmd_sect(*pmd)) 502da6e4cb6SDave Anderson return pfn_valid(pmd_pfn(*pmd)); 503da6e4cb6SDave Anderson 504c1cc1552SCatalin Marinas pte = pte_offset_kernel(pmd, addr); 505c1cc1552SCatalin Marinas if (pte_none(*pte)) 506c1cc1552SCatalin Marinas return 0; 507c1cc1552SCatalin Marinas 508c1cc1552SCatalin Marinas return pfn_valid(pte_pfn(*pte)); 509c1cc1552SCatalin Marinas } 510c1cc1552SCatalin Marinas #ifdef CONFIG_SPARSEMEM_VMEMMAP 511c1cc1552SCatalin Marinas #ifdef CONFIG_ARM64_64K_PAGES 5120aad818bSJohannes Weiner int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node) 513c1cc1552SCatalin Marinas { 5140aad818bSJohannes Weiner return vmemmap_populate_basepages(start, end, node); 515c1cc1552SCatalin Marinas } 516c1cc1552SCatalin Marinas #else /* !CONFIG_ARM64_64K_PAGES */ 5170aad818bSJohannes Weiner int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node) 518c1cc1552SCatalin Marinas { 5190aad818bSJohannes Weiner unsigned long addr = start; 520c1cc1552SCatalin Marinas unsigned long next; 521c1cc1552SCatalin Marinas pgd_t *pgd; 522c1cc1552SCatalin Marinas pud_t *pud; 523c1cc1552SCatalin Marinas pmd_t *pmd; 524c1cc1552SCatalin Marinas 525c1cc1552SCatalin Marinas do { 526c1cc1552SCatalin Marinas next = pmd_addr_end(addr, end); 527c1cc1552SCatalin Marinas 528c1cc1552SCatalin Marinas pgd = vmemmap_pgd_populate(addr, node); 529c1cc1552SCatalin Marinas if (!pgd) 530c1cc1552SCatalin Marinas return -ENOMEM; 531c1cc1552SCatalin Marinas 532c1cc1552SCatalin Marinas pud = vmemmap_pud_populate(pgd, addr, node); 533c1cc1552SCatalin Marinas if (!pud) 534c1cc1552SCatalin Marinas return -ENOMEM; 535c1cc1552SCatalin Marinas 536c1cc1552SCatalin Marinas pmd = pmd_offset(pud, addr); 537c1cc1552SCatalin Marinas if (pmd_none(*pmd)) { 538c1cc1552SCatalin Marinas void *p = NULL; 539c1cc1552SCatalin Marinas 540c1cc1552SCatalin Marinas p = vmemmap_alloc_block_buf(PMD_SIZE, node); 541c1cc1552SCatalin Marinas if (!p) 542c1cc1552SCatalin Marinas return -ENOMEM; 543c1cc1552SCatalin Marinas 544a501e324SCatalin Marinas set_pmd(pmd, __pmd(__pa(p) | PROT_SECT_NORMAL)); 545c1cc1552SCatalin Marinas } else 546c1cc1552SCatalin Marinas vmemmap_verify((pte_t *)pmd, node, addr, next); 547c1cc1552SCatalin Marinas } while (addr = next, addr != end); 548c1cc1552SCatalin Marinas 549c1cc1552SCatalin Marinas return 0; 550c1cc1552SCatalin Marinas } 551c1cc1552SCatalin Marinas #endif /* CONFIG_ARM64_64K_PAGES */ 5520aad818bSJohannes Weiner void vmemmap_free(unsigned long start, unsigned long end) 5530197518cSTang Chen { 5540197518cSTang Chen } 555c1cc1552SCatalin Marinas #endif /* CONFIG_SPARSEMEM_VMEMMAP */ 556af86e597SLaura Abbott 557af86e597SLaura Abbott static pte_t bm_pte[PTRS_PER_PTE] __page_aligned_bss; 558af86e597SLaura Abbott #if CONFIG_ARM64_PGTABLE_LEVELS > 2 559af86e597SLaura Abbott static pmd_t bm_pmd[PTRS_PER_PMD] __page_aligned_bss; 560af86e597SLaura Abbott #endif 561af86e597SLaura Abbott #if CONFIG_ARM64_PGTABLE_LEVELS > 3 562af86e597SLaura Abbott static pud_t bm_pud[PTRS_PER_PUD] __page_aligned_bss; 563af86e597SLaura Abbott #endif 564af86e597SLaura Abbott 565af86e597SLaura Abbott static inline pud_t * fixmap_pud(unsigned long addr) 566af86e597SLaura Abbott { 567af86e597SLaura Abbott pgd_t *pgd = pgd_offset_k(addr); 568af86e597SLaura Abbott 569af86e597SLaura Abbott BUG_ON(pgd_none(*pgd) || pgd_bad(*pgd)); 570af86e597SLaura Abbott 571af86e597SLaura Abbott return pud_offset(pgd, addr); 572af86e597SLaura Abbott } 573af86e597SLaura Abbott 574af86e597SLaura Abbott static inline pmd_t * fixmap_pmd(unsigned long addr) 575af86e597SLaura Abbott { 576af86e597SLaura Abbott pud_t *pud = fixmap_pud(addr); 577af86e597SLaura Abbott 578af86e597SLaura Abbott BUG_ON(pud_none(*pud) || pud_bad(*pud)); 579af86e597SLaura Abbott 580af86e597SLaura Abbott return pmd_offset(pud, addr); 581af86e597SLaura Abbott } 582af86e597SLaura Abbott 583af86e597SLaura Abbott static inline pte_t * fixmap_pte(unsigned long addr) 584af86e597SLaura Abbott { 585af86e597SLaura Abbott pmd_t *pmd = fixmap_pmd(addr); 586af86e597SLaura Abbott 587af86e597SLaura Abbott BUG_ON(pmd_none(*pmd) || pmd_bad(*pmd)); 588af86e597SLaura Abbott 589af86e597SLaura Abbott return pte_offset_kernel(pmd, addr); 590af86e597SLaura Abbott } 591af86e597SLaura Abbott 592af86e597SLaura Abbott void __init early_fixmap_init(void) 593af86e597SLaura Abbott { 594af86e597SLaura Abbott pgd_t *pgd; 595af86e597SLaura Abbott pud_t *pud; 596af86e597SLaura Abbott pmd_t *pmd; 597af86e597SLaura Abbott unsigned long addr = FIXADDR_START; 598af86e597SLaura Abbott 599af86e597SLaura Abbott pgd = pgd_offset_k(addr); 600af86e597SLaura Abbott pgd_populate(&init_mm, pgd, bm_pud); 601af86e597SLaura Abbott pud = pud_offset(pgd, addr); 602af86e597SLaura Abbott pud_populate(&init_mm, pud, bm_pmd); 603af86e597SLaura Abbott pmd = pmd_offset(pud, addr); 604af86e597SLaura Abbott pmd_populate_kernel(&init_mm, pmd, bm_pte); 605af86e597SLaura Abbott 606af86e597SLaura Abbott /* 607af86e597SLaura Abbott * The boot-ioremap range spans multiple pmds, for which 608af86e597SLaura Abbott * we are not preparted: 609af86e597SLaura Abbott */ 610af86e597SLaura Abbott BUILD_BUG_ON((__fix_to_virt(FIX_BTMAP_BEGIN) >> PMD_SHIFT) 611af86e597SLaura Abbott != (__fix_to_virt(FIX_BTMAP_END) >> PMD_SHIFT)); 612af86e597SLaura Abbott 613af86e597SLaura Abbott if ((pmd != fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN))) 614af86e597SLaura Abbott || pmd != fixmap_pmd(fix_to_virt(FIX_BTMAP_END))) { 615af86e597SLaura Abbott WARN_ON(1); 616af86e597SLaura Abbott pr_warn("pmd %p != %p, %p\n", 617af86e597SLaura Abbott pmd, fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN)), 618af86e597SLaura Abbott fixmap_pmd(fix_to_virt(FIX_BTMAP_END))); 619af86e597SLaura Abbott pr_warn("fix_to_virt(FIX_BTMAP_BEGIN): %08lx\n", 620af86e597SLaura Abbott fix_to_virt(FIX_BTMAP_BEGIN)); 621af86e597SLaura Abbott pr_warn("fix_to_virt(FIX_BTMAP_END): %08lx\n", 622af86e597SLaura Abbott fix_to_virt(FIX_BTMAP_END)); 623af86e597SLaura Abbott 624af86e597SLaura Abbott pr_warn("FIX_BTMAP_END: %d\n", FIX_BTMAP_END); 625af86e597SLaura Abbott pr_warn("FIX_BTMAP_BEGIN: %d\n", FIX_BTMAP_BEGIN); 626af86e597SLaura Abbott } 627af86e597SLaura Abbott } 628af86e597SLaura Abbott 629af86e597SLaura Abbott void __set_fixmap(enum fixed_addresses idx, 630af86e597SLaura Abbott phys_addr_t phys, pgprot_t flags) 631af86e597SLaura Abbott { 632af86e597SLaura Abbott unsigned long addr = __fix_to_virt(idx); 633af86e597SLaura Abbott pte_t *pte; 634af86e597SLaura Abbott 635b63dbef9SMark Rutland BUG_ON(idx <= FIX_HOLE || idx >= __end_of_fixed_addresses); 636af86e597SLaura Abbott 637af86e597SLaura Abbott pte = fixmap_pte(addr); 638af86e597SLaura Abbott 639af86e597SLaura Abbott if (pgprot_val(flags)) { 640af86e597SLaura Abbott set_pte(pte, pfn_pte(phys >> PAGE_SHIFT, flags)); 641af86e597SLaura Abbott } else { 642af86e597SLaura Abbott pte_clear(&init_mm, addr, pte); 643af86e597SLaura Abbott flush_tlb_kernel_range(addr, addr+PAGE_SIZE); 644af86e597SLaura Abbott } 645af86e597SLaura Abbott } 646