1*caab277bSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only 2c1cc1552SCatalin Marinas /* 3c1cc1552SCatalin Marinas * Based on arch/arm/mm/mmu.c 4c1cc1552SCatalin Marinas * 5c1cc1552SCatalin Marinas * Copyright (C) 1995-2005 Russell King 6c1cc1552SCatalin Marinas * Copyright (C) 2012 ARM Ltd. 7c1cc1552SCatalin Marinas */ 8c1cc1552SCatalin Marinas 95a9e3e15SJisheng Zhang #include <linux/cache.h> 10c1cc1552SCatalin Marinas #include <linux/export.h> 11c1cc1552SCatalin Marinas #include <linux/kernel.h> 12c1cc1552SCatalin Marinas #include <linux/errno.h> 13c1cc1552SCatalin Marinas #include <linux/init.h> 1498d2e153STakahiro Akashi #include <linux/ioport.h> 1598d2e153STakahiro Akashi #include <linux/kexec.h> 1661bd93ceSArd Biesheuvel #include <linux/libfdt.h> 17c1cc1552SCatalin Marinas #include <linux/mman.h> 18c1cc1552SCatalin Marinas #include <linux/nodemask.h> 19c1cc1552SCatalin Marinas #include <linux/memblock.h> 20c1cc1552SCatalin Marinas #include <linux/fs.h> 212475ff9dSCatalin Marinas #include <linux/io.h> 222077be67SLaura Abbott #include <linux/mm.h> 236efd8499STobias Klauser #include <linux/vmalloc.h> 24c1cc1552SCatalin Marinas 2521ab99c2SMark Rutland #include <asm/barrier.h> 26c1cc1552SCatalin Marinas #include <asm/cputype.h> 27af86e597SLaura Abbott #include <asm/fixmap.h> 28068a17a5SMark Rutland #include <asm/kasan.h> 29b433dce0SSuzuki K. Poulose #include <asm/kernel-pgtable.h> 30c1cc1552SCatalin Marinas #include <asm/sections.h> 31c1cc1552SCatalin Marinas #include <asm/setup.h> 3287dfb311SMasahiro Yamada #include <linux/sizes.h> 33c1cc1552SCatalin Marinas #include <asm/tlb.h> 34c1cc1552SCatalin Marinas #include <asm/mmu_context.h> 351404d6f1SLaura Abbott #include <asm/ptdump.h> 36ec28bb9cSChintan Pandya #include <asm/tlbflush.h> 37c1cc1552SCatalin Marinas 38c0951366SArd Biesheuvel #define NO_BLOCK_MAPPINGS BIT(0) 39d27cfa1fSArd Biesheuvel #define NO_CONT_MAPPINGS BIT(1) 40c0951366SArd Biesheuvel 41dd006da2SArd Biesheuvel u64 idmap_t0sz = TCR_T0SZ(VA_BITS); 42fa2a8445SKristina Martsenko u64 idmap_ptrs_per_pgd = PTRS_PER_PGD; 4367e7fdfcSSteve Capper u64 vabits_user __ro_after_init; 444a1daf29SWill Deacon EXPORT_SYMBOL(vabits_user); 45dd006da2SArd Biesheuvel 465a9e3e15SJisheng Zhang u64 kimage_voffset __ro_after_init; 47a7f8de16SArd Biesheuvel EXPORT_SYMBOL(kimage_voffset); 48a7f8de16SArd Biesheuvel 49c1cc1552SCatalin Marinas /* 50c1cc1552SCatalin Marinas * Empty_zero_page is a special page that is used for zero-initialized data 51c1cc1552SCatalin Marinas * and COW. 52c1cc1552SCatalin Marinas */ 535227cfa7SMark Rutland unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)] __page_aligned_bss; 54c1cc1552SCatalin Marinas EXPORT_SYMBOL(empty_zero_page); 55c1cc1552SCatalin Marinas 56f9040773SArd Biesheuvel static pte_t bm_pte[PTRS_PER_PTE] __page_aligned_bss; 57f9040773SArd Biesheuvel static pmd_t bm_pmd[PTRS_PER_PMD] __page_aligned_bss __maybe_unused; 58f9040773SArd Biesheuvel static pud_t bm_pud[PTRS_PER_PUD] __page_aligned_bss __maybe_unused; 59f9040773SArd Biesheuvel 602330b7caSJun Yao static DEFINE_SPINLOCK(swapper_pgdir_lock); 612330b7caSJun Yao 622330b7caSJun Yao void set_swapper_pgd(pgd_t *pgdp, pgd_t pgd) 632330b7caSJun Yao { 642330b7caSJun Yao pgd_t *fixmap_pgdp; 652330b7caSJun Yao 662330b7caSJun Yao spin_lock(&swapper_pgdir_lock); 6726a6f87eSJames Morse fixmap_pgdp = pgd_set_fixmap(__pa_symbol(pgdp)); 682330b7caSJun Yao WRITE_ONCE(*fixmap_pgdp, pgd); 692330b7caSJun Yao /* 702330b7caSJun Yao * We need dsb(ishst) here to ensure the page-table-walker sees 712330b7caSJun Yao * our new entry before set_p?d() returns. The fixmap's 722330b7caSJun Yao * flush_tlb_kernel_range() via clear_fixmap() does this for us. 732330b7caSJun Yao */ 742330b7caSJun Yao pgd_clear_fixmap(); 752330b7caSJun Yao spin_unlock(&swapper_pgdir_lock); 762330b7caSJun Yao } 772330b7caSJun Yao 78c1cc1552SCatalin Marinas pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, 79c1cc1552SCatalin Marinas unsigned long size, pgprot_t vma_prot) 80c1cc1552SCatalin Marinas { 81c1cc1552SCatalin Marinas if (!pfn_valid(pfn)) 82c1cc1552SCatalin Marinas return pgprot_noncached(vma_prot); 83c1cc1552SCatalin Marinas else if (file->f_flags & O_SYNC) 84c1cc1552SCatalin Marinas return pgprot_writecombine(vma_prot); 85c1cc1552SCatalin Marinas return vma_prot; 86c1cc1552SCatalin Marinas } 87c1cc1552SCatalin Marinas EXPORT_SYMBOL(phys_mem_access_prot); 88c1cc1552SCatalin Marinas 8990292acaSYu Zhao static phys_addr_t __init early_pgtable_alloc(int shift) 90c1cc1552SCatalin Marinas { 917142392dSSuzuki K. Poulose phys_addr_t phys; 927142392dSSuzuki K. Poulose void *ptr; 937142392dSSuzuki K. Poulose 949a8dd708SMike Rapoport phys = memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE); 95ecc3e771SMike Rapoport if (!phys) 96ecc3e771SMike Rapoport panic("Failed to allocate page table page\n"); 97f4710445SMark Rutland 98f4710445SMark Rutland /* 99f4710445SMark Rutland * The FIX_{PGD,PUD,PMD} slots may be in active use, but the FIX_PTE 100f4710445SMark Rutland * slot will be free, so we can (ab)use the FIX_PTE slot to initialise 101f4710445SMark Rutland * any level of table. 102f4710445SMark Rutland */ 103f4710445SMark Rutland ptr = pte_set_fixmap(phys); 104f4710445SMark Rutland 10521ab99c2SMark Rutland memset(ptr, 0, PAGE_SIZE); 10621ab99c2SMark Rutland 107f4710445SMark Rutland /* 108f4710445SMark Rutland * Implicit barriers also ensure the zeroed page is visible to the page 109f4710445SMark Rutland * table walker 110f4710445SMark Rutland */ 111f4710445SMark Rutland pte_clear_fixmap(); 112f4710445SMark Rutland 113f4710445SMark Rutland return phys; 114c1cc1552SCatalin Marinas } 115c1cc1552SCatalin Marinas 116e98216b5SArd Biesheuvel static bool pgattr_change_is_safe(u64 old, u64 new) 117e98216b5SArd Biesheuvel { 118e98216b5SArd Biesheuvel /* 119e98216b5SArd Biesheuvel * The following mapping attributes may be updated in live 120e98216b5SArd Biesheuvel * kernel mappings without the need for break-before-make. 121e98216b5SArd Biesheuvel */ 122753e8abcSArd Biesheuvel static const pteval_t mask = PTE_PXN | PTE_RDONLY | PTE_WRITE | PTE_NG; 123e98216b5SArd Biesheuvel 124141d1497SArd Biesheuvel /* creating or taking down mappings is always safe */ 125141d1497SArd Biesheuvel if (old == 0 || new == 0) 126141d1497SArd Biesheuvel return true; 127141d1497SArd Biesheuvel 128141d1497SArd Biesheuvel /* live contiguous mappings may not be manipulated at all */ 129141d1497SArd Biesheuvel if ((old | new) & PTE_CONT) 130141d1497SArd Biesheuvel return false; 131141d1497SArd Biesheuvel 132753e8abcSArd Biesheuvel /* Transitioning from Non-Global to Global is unsafe */ 133753e8abcSArd Biesheuvel if (old & ~new & PTE_NG) 134753e8abcSArd Biesheuvel return false; 1354e602056SWill Deacon 136141d1497SArd Biesheuvel return ((old ^ new) & ~mask) == 0; 137e98216b5SArd Biesheuvel } 138e98216b5SArd Biesheuvel 13920a004e7SWill Deacon static void init_pte(pmd_t *pmdp, unsigned long addr, unsigned long end, 140d27cfa1fSArd Biesheuvel phys_addr_t phys, pgprot_t prot) 141c1cc1552SCatalin Marinas { 14220a004e7SWill Deacon pte_t *ptep; 143c1cc1552SCatalin Marinas 14420a004e7SWill Deacon ptep = pte_set_fixmap_offset(pmdp, addr); 145c1cc1552SCatalin Marinas do { 14620a004e7SWill Deacon pte_t old_pte = READ_ONCE(*ptep); 147e98216b5SArd Biesheuvel 14820a004e7SWill Deacon set_pte(ptep, pfn_pte(__phys_to_pfn(phys), prot)); 149e98216b5SArd Biesheuvel 150e98216b5SArd Biesheuvel /* 151e98216b5SArd Biesheuvel * After the PTE entry has been populated once, we 152e98216b5SArd Biesheuvel * only allow updates to the permission attributes. 153e98216b5SArd Biesheuvel */ 15420a004e7SWill Deacon BUG_ON(!pgattr_change_is_safe(pte_val(old_pte), 15520a004e7SWill Deacon READ_ONCE(pte_val(*ptep)))); 156e98216b5SArd Biesheuvel 157e393cf40SArd Biesheuvel phys += PAGE_SIZE; 15820a004e7SWill Deacon } while (ptep++, addr += PAGE_SIZE, addr != end); 159f4710445SMark Rutland 160f4710445SMark Rutland pte_clear_fixmap(); 161c1cc1552SCatalin Marinas } 162c1cc1552SCatalin Marinas 16320a004e7SWill Deacon static void alloc_init_cont_pte(pmd_t *pmdp, unsigned long addr, 164d27cfa1fSArd Biesheuvel unsigned long end, phys_addr_t phys, 165d27cfa1fSArd Biesheuvel pgprot_t prot, 16690292acaSYu Zhao phys_addr_t (*pgtable_alloc)(int), 167c0951366SArd Biesheuvel int flags) 168c1cc1552SCatalin Marinas { 169c1cc1552SCatalin Marinas unsigned long next; 17020a004e7SWill Deacon pmd_t pmd = READ_ONCE(*pmdp); 171c1cc1552SCatalin Marinas 17220a004e7SWill Deacon BUG_ON(pmd_sect(pmd)); 17320a004e7SWill Deacon if (pmd_none(pmd)) { 174d27cfa1fSArd Biesheuvel phys_addr_t pte_phys; 175132233a7SLaura Abbott BUG_ON(!pgtable_alloc); 17690292acaSYu Zhao pte_phys = pgtable_alloc(PAGE_SHIFT); 17720a004e7SWill Deacon __pmd_populate(pmdp, pte_phys, PMD_TYPE_TABLE); 17820a004e7SWill Deacon pmd = READ_ONCE(*pmdp); 179c1cc1552SCatalin Marinas } 18020a004e7SWill Deacon BUG_ON(pmd_bad(pmd)); 181d27cfa1fSArd Biesheuvel 182d27cfa1fSArd Biesheuvel do { 183d27cfa1fSArd Biesheuvel pgprot_t __prot = prot; 184d27cfa1fSArd Biesheuvel 185d27cfa1fSArd Biesheuvel next = pte_cont_addr_end(addr, end); 186d27cfa1fSArd Biesheuvel 187d27cfa1fSArd Biesheuvel /* use a contiguous mapping if the range is suitably aligned */ 188d27cfa1fSArd Biesheuvel if ((((addr | next | phys) & ~CONT_PTE_MASK) == 0) && 189d27cfa1fSArd Biesheuvel (flags & NO_CONT_MAPPINGS) == 0) 190d27cfa1fSArd Biesheuvel __prot = __pgprot(pgprot_val(prot) | PTE_CONT); 191d27cfa1fSArd Biesheuvel 19220a004e7SWill Deacon init_pte(pmdp, addr, next, phys, __prot); 193d27cfa1fSArd Biesheuvel 194d27cfa1fSArd Biesheuvel phys += next - addr; 195d27cfa1fSArd Biesheuvel } while (addr = next, addr != end); 196d27cfa1fSArd Biesheuvel } 197d27cfa1fSArd Biesheuvel 19820a004e7SWill Deacon static void init_pmd(pud_t *pudp, unsigned long addr, unsigned long end, 199d27cfa1fSArd Biesheuvel phys_addr_t phys, pgprot_t prot, 20090292acaSYu Zhao phys_addr_t (*pgtable_alloc)(int), int flags) 201d27cfa1fSArd Biesheuvel { 202d27cfa1fSArd Biesheuvel unsigned long next; 20320a004e7SWill Deacon pmd_t *pmdp; 204c1cc1552SCatalin Marinas 20520a004e7SWill Deacon pmdp = pmd_set_fixmap_offset(pudp, addr); 206c1cc1552SCatalin Marinas do { 20720a004e7SWill Deacon pmd_t old_pmd = READ_ONCE(*pmdp); 208e98216b5SArd Biesheuvel 209c1cc1552SCatalin Marinas next = pmd_addr_end(addr, end); 210e98216b5SArd Biesheuvel 211c1cc1552SCatalin Marinas /* try section mapping first */ 21283863f25SLaura Abbott if (((addr | next | phys) & ~SECTION_MASK) == 0 && 213c0951366SArd Biesheuvel (flags & NO_BLOCK_MAPPINGS) == 0) { 21420a004e7SWill Deacon pmd_set_huge(pmdp, phys, prot); 215e98216b5SArd Biesheuvel 216a55f9929SCatalin Marinas /* 217e98216b5SArd Biesheuvel * After the PMD entry has been populated once, we 218e98216b5SArd Biesheuvel * only allow updates to the permission attributes. 219a55f9929SCatalin Marinas */ 220e98216b5SArd Biesheuvel BUG_ON(!pgattr_change_is_safe(pmd_val(old_pmd), 22120a004e7SWill Deacon READ_ONCE(pmd_val(*pmdp)))); 222a55f9929SCatalin Marinas } else { 22320a004e7SWill Deacon alloc_init_cont_pte(pmdp, addr, next, phys, prot, 224d27cfa1fSArd Biesheuvel pgtable_alloc, flags); 225e98216b5SArd Biesheuvel 226e98216b5SArd Biesheuvel BUG_ON(pmd_val(old_pmd) != 0 && 22720a004e7SWill Deacon pmd_val(old_pmd) != READ_ONCE(pmd_val(*pmdp))); 228a55f9929SCatalin Marinas } 229c1cc1552SCatalin Marinas phys += next - addr; 23020a004e7SWill Deacon } while (pmdp++, addr = next, addr != end); 231f4710445SMark Rutland 232f4710445SMark Rutland pmd_clear_fixmap(); 233c1cc1552SCatalin Marinas } 234c1cc1552SCatalin Marinas 23520a004e7SWill Deacon static void alloc_init_cont_pmd(pud_t *pudp, unsigned long addr, 236d27cfa1fSArd Biesheuvel unsigned long end, phys_addr_t phys, 237d27cfa1fSArd Biesheuvel pgprot_t prot, 23890292acaSYu Zhao phys_addr_t (*pgtable_alloc)(int), int flags) 239d27cfa1fSArd Biesheuvel { 240d27cfa1fSArd Biesheuvel unsigned long next; 24120a004e7SWill Deacon pud_t pud = READ_ONCE(*pudp); 242d27cfa1fSArd Biesheuvel 243d27cfa1fSArd Biesheuvel /* 244d27cfa1fSArd Biesheuvel * Check for initial section mappings in the pgd/pud. 245d27cfa1fSArd Biesheuvel */ 24620a004e7SWill Deacon BUG_ON(pud_sect(pud)); 24720a004e7SWill Deacon if (pud_none(pud)) { 248d27cfa1fSArd Biesheuvel phys_addr_t pmd_phys; 249d27cfa1fSArd Biesheuvel BUG_ON(!pgtable_alloc); 25090292acaSYu Zhao pmd_phys = pgtable_alloc(PMD_SHIFT); 25120a004e7SWill Deacon __pud_populate(pudp, pmd_phys, PUD_TYPE_TABLE); 25220a004e7SWill Deacon pud = READ_ONCE(*pudp); 253d27cfa1fSArd Biesheuvel } 25420a004e7SWill Deacon BUG_ON(pud_bad(pud)); 255d27cfa1fSArd Biesheuvel 256d27cfa1fSArd Biesheuvel do { 257d27cfa1fSArd Biesheuvel pgprot_t __prot = prot; 258d27cfa1fSArd Biesheuvel 259d27cfa1fSArd Biesheuvel next = pmd_cont_addr_end(addr, end); 260d27cfa1fSArd Biesheuvel 261d27cfa1fSArd Biesheuvel /* use a contiguous mapping if the range is suitably aligned */ 262d27cfa1fSArd Biesheuvel if ((((addr | next | phys) & ~CONT_PMD_MASK) == 0) && 263d27cfa1fSArd Biesheuvel (flags & NO_CONT_MAPPINGS) == 0) 264d27cfa1fSArd Biesheuvel __prot = __pgprot(pgprot_val(prot) | PTE_CONT); 265d27cfa1fSArd Biesheuvel 26620a004e7SWill Deacon init_pmd(pudp, addr, next, phys, __prot, pgtable_alloc, flags); 267d27cfa1fSArd Biesheuvel 268d27cfa1fSArd Biesheuvel phys += next - addr; 269d27cfa1fSArd Biesheuvel } while (addr = next, addr != end); 270d27cfa1fSArd Biesheuvel } 271d27cfa1fSArd Biesheuvel 272da141706SLaura Abbott static inline bool use_1G_block(unsigned long addr, unsigned long next, 273da141706SLaura Abbott unsigned long phys) 274da141706SLaura Abbott { 275da141706SLaura Abbott if (PAGE_SHIFT != 12) 276da141706SLaura Abbott return false; 277da141706SLaura Abbott 278da141706SLaura Abbott if (((addr | next | phys) & ~PUD_MASK) != 0) 279da141706SLaura Abbott return false; 280da141706SLaura Abbott 281da141706SLaura Abbott return true; 282da141706SLaura Abbott } 283da141706SLaura Abbott 28420a004e7SWill Deacon static void alloc_init_pud(pgd_t *pgdp, unsigned long addr, unsigned long end, 285da141706SLaura Abbott phys_addr_t phys, pgprot_t prot, 28690292acaSYu Zhao phys_addr_t (*pgtable_alloc)(int), 287c0951366SArd Biesheuvel int flags) 288c1cc1552SCatalin Marinas { 289c1cc1552SCatalin Marinas unsigned long next; 29020a004e7SWill Deacon pud_t *pudp; 29120a004e7SWill Deacon pgd_t pgd = READ_ONCE(*pgdp); 292c1cc1552SCatalin Marinas 29320a004e7SWill Deacon if (pgd_none(pgd)) { 294132233a7SLaura Abbott phys_addr_t pud_phys; 295132233a7SLaura Abbott BUG_ON(!pgtable_alloc); 29690292acaSYu Zhao pud_phys = pgtable_alloc(PUD_SHIFT); 29720a004e7SWill Deacon __pgd_populate(pgdp, pud_phys, PUD_TYPE_TABLE); 29820a004e7SWill Deacon pgd = READ_ONCE(*pgdp); 299c79b954bSJungseok Lee } 30020a004e7SWill Deacon BUG_ON(pgd_bad(pgd)); 301c79b954bSJungseok Lee 30220a004e7SWill Deacon pudp = pud_set_fixmap_offset(pgdp, addr); 303c1cc1552SCatalin Marinas do { 30420a004e7SWill Deacon pud_t old_pud = READ_ONCE(*pudp); 305e98216b5SArd Biesheuvel 306c1cc1552SCatalin Marinas next = pud_addr_end(addr, end); 307206a2a73SSteve Capper 308206a2a73SSteve Capper /* 309206a2a73SSteve Capper * For 4K granule only, attempt to put down a 1GB block 310206a2a73SSteve Capper */ 311c0951366SArd Biesheuvel if (use_1G_block(addr, next, phys) && 312c0951366SArd Biesheuvel (flags & NO_BLOCK_MAPPINGS) == 0) { 31320a004e7SWill Deacon pud_set_huge(pudp, phys, prot); 314206a2a73SSteve Capper 315206a2a73SSteve Capper /* 316e98216b5SArd Biesheuvel * After the PUD entry has been populated once, we 317e98216b5SArd Biesheuvel * only allow updates to the permission attributes. 318206a2a73SSteve Capper */ 319e98216b5SArd Biesheuvel BUG_ON(!pgattr_change_is_safe(pud_val(old_pud), 32020a004e7SWill Deacon READ_ONCE(pud_val(*pudp)))); 321206a2a73SSteve Capper } else { 32220a004e7SWill Deacon alloc_init_cont_pmd(pudp, addr, next, phys, prot, 323c0951366SArd Biesheuvel pgtable_alloc, flags); 324e98216b5SArd Biesheuvel 325e98216b5SArd Biesheuvel BUG_ON(pud_val(old_pud) != 0 && 32620a004e7SWill Deacon pud_val(old_pud) != READ_ONCE(pud_val(*pudp))); 327206a2a73SSteve Capper } 328c1cc1552SCatalin Marinas phys += next - addr; 32920a004e7SWill Deacon } while (pudp++, addr = next, addr != end); 330f4710445SMark Rutland 331f4710445SMark Rutland pud_clear_fixmap(); 332c1cc1552SCatalin Marinas } 333c1cc1552SCatalin Marinas 33440f87d31SArd Biesheuvel static void __create_pgd_mapping(pgd_t *pgdir, phys_addr_t phys, 33540f87d31SArd Biesheuvel unsigned long virt, phys_addr_t size, 33640f87d31SArd Biesheuvel pgprot_t prot, 33790292acaSYu Zhao phys_addr_t (*pgtable_alloc)(int), 338c0951366SArd Biesheuvel int flags) 339c1cc1552SCatalin Marinas { 340c1cc1552SCatalin Marinas unsigned long addr, length, end, next; 34120a004e7SWill Deacon pgd_t *pgdp = pgd_offset_raw(pgdir, virt); 342c1cc1552SCatalin Marinas 343cc5d2b3bSMark Rutland /* 344cc5d2b3bSMark Rutland * If the virtual and physical address don't have the same offset 345cc5d2b3bSMark Rutland * within a page, we cannot map the region as the caller expects. 346cc5d2b3bSMark Rutland */ 347cc5d2b3bSMark Rutland if (WARN_ON((phys ^ virt) & ~PAGE_MASK)) 348cc5d2b3bSMark Rutland return; 349cc5d2b3bSMark Rutland 3509c4e08a3SMark Rutland phys &= PAGE_MASK; 351c1cc1552SCatalin Marinas addr = virt & PAGE_MASK; 352c1cc1552SCatalin Marinas length = PAGE_ALIGN(size + (virt & ~PAGE_MASK)); 353c1cc1552SCatalin Marinas 354c1cc1552SCatalin Marinas end = addr + length; 355c1cc1552SCatalin Marinas do { 356c1cc1552SCatalin Marinas next = pgd_addr_end(addr, end); 35720a004e7SWill Deacon alloc_init_pud(pgdp, addr, next, phys, prot, pgtable_alloc, 358c0951366SArd Biesheuvel flags); 359c1cc1552SCatalin Marinas phys += next - addr; 36020a004e7SWill Deacon } while (pgdp++, addr = next, addr != end); 361c1cc1552SCatalin Marinas } 362c1cc1552SCatalin Marinas 363475ba3fcSWill Deacon static phys_addr_t __pgd_pgtable_alloc(int shift) 364369aaab8SYu Zhao { 365369aaab8SYu Zhao void *ptr = (void *)__get_free_page(PGALLOC_GFP); 366369aaab8SYu Zhao BUG_ON(!ptr); 367369aaab8SYu Zhao 368369aaab8SYu Zhao /* Ensure the zeroed page is visible to the page table walker */ 369369aaab8SYu Zhao dsb(ishst); 370369aaab8SYu Zhao return __pa(ptr); 371369aaab8SYu Zhao } 372369aaab8SYu Zhao 37390292acaSYu Zhao static phys_addr_t pgd_pgtable_alloc(int shift) 374da141706SLaura Abbott { 375475ba3fcSWill Deacon phys_addr_t pa = __pgd_pgtable_alloc(shift); 37690292acaSYu Zhao 37790292acaSYu Zhao /* 37890292acaSYu Zhao * Call proper page table ctor in case later we need to 37990292acaSYu Zhao * call core mm functions like apply_to_page_range() on 38090292acaSYu Zhao * this pre-allocated page table. 38190292acaSYu Zhao * 38290292acaSYu Zhao * We don't select ARCH_ENABLE_SPLIT_PMD_PTLOCK if pmd is 38390292acaSYu Zhao * folded, and if so pgtable_pmd_page_ctor() becomes nop. 38490292acaSYu Zhao */ 38590292acaSYu Zhao if (shift == PAGE_SHIFT) 386475ba3fcSWill Deacon BUG_ON(!pgtable_page_ctor(phys_to_page(pa))); 38790292acaSYu Zhao else if (shift == PMD_SHIFT) 388475ba3fcSWill Deacon BUG_ON(!pgtable_pmd_page_ctor(phys_to_page(pa))); 38921ab99c2SMark Rutland 390475ba3fcSWill Deacon return pa; 391da141706SLaura Abbott } 392da141706SLaura Abbott 393132233a7SLaura Abbott /* 394132233a7SLaura Abbott * This function can only be used to modify existing table entries, 395132233a7SLaura Abbott * without allocating new levels of table. Note that this permits the 396132233a7SLaura Abbott * creation of new section or page entries. 397132233a7SLaura Abbott */ 398132233a7SLaura Abbott static void __init create_mapping_noalloc(phys_addr_t phys, unsigned long virt, 399da141706SLaura Abbott phys_addr_t size, pgprot_t prot) 400d7ecbddfSMark Salter { 401d7ecbddfSMark Salter if (virt < VMALLOC_START) { 402d7ecbddfSMark Salter pr_warn("BUG: not creating mapping for %pa at 0x%016lx - outside kernel range\n", 403d7ecbddfSMark Salter &phys, virt); 404d7ecbddfSMark Salter return; 405d7ecbddfSMark Salter } 406d27cfa1fSArd Biesheuvel __create_pgd_mapping(init_mm.pgd, phys, virt, size, prot, NULL, 407d27cfa1fSArd Biesheuvel NO_CONT_MAPPINGS); 408d7ecbddfSMark Salter } 409d7ecbddfSMark Salter 4108ce837ceSArd Biesheuvel void __init create_pgd_mapping(struct mm_struct *mm, phys_addr_t phys, 4118ce837ceSArd Biesheuvel unsigned long virt, phys_addr_t size, 412f14c66ceSArd Biesheuvel pgprot_t prot, bool page_mappings_only) 4138ce837ceSArd Biesheuvel { 414c0951366SArd Biesheuvel int flags = 0; 415c0951366SArd Biesheuvel 4161378dc3dSArd Biesheuvel BUG_ON(mm == &init_mm); 4171378dc3dSArd Biesheuvel 418c0951366SArd Biesheuvel if (page_mappings_only) 419d27cfa1fSArd Biesheuvel flags = NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS; 420c0951366SArd Biesheuvel 42111509a30SMark Rutland __create_pgd_mapping(mm->pgd, phys, virt, size, prot, 422c0951366SArd Biesheuvel pgd_pgtable_alloc, flags); 423d7ecbddfSMark Salter } 424d7ecbddfSMark Salter 425aa8c09beSArd Biesheuvel static void update_mapping_prot(phys_addr_t phys, unsigned long virt, 426da141706SLaura Abbott phys_addr_t size, pgprot_t prot) 427da141706SLaura Abbott { 428da141706SLaura Abbott if (virt < VMALLOC_START) { 429aa8c09beSArd Biesheuvel pr_warn("BUG: not updating mapping for %pa at 0x%016lx - outside kernel range\n", 430da141706SLaura Abbott &phys, virt); 431da141706SLaura Abbott return; 432da141706SLaura Abbott } 433da141706SLaura Abbott 434d27cfa1fSArd Biesheuvel __create_pgd_mapping(init_mm.pgd, phys, virt, size, prot, NULL, 435d27cfa1fSArd Biesheuvel NO_CONT_MAPPINGS); 436aa8c09beSArd Biesheuvel 437aa8c09beSArd Biesheuvel /* flush the TLBs after updating live kernel mappings */ 438aa8c09beSArd Biesheuvel flush_tlb_kernel_range(virt, virt + size); 439da141706SLaura Abbott } 440da141706SLaura Abbott 44120a004e7SWill Deacon static void __init __map_memblock(pgd_t *pgdp, phys_addr_t start, 44298d2e153STakahiro Akashi phys_addr_t end, pgprot_t prot, int flags) 443da141706SLaura Abbott { 44420a004e7SWill Deacon __create_pgd_mapping(pgdp, start, __phys_to_virt(start), end - start, 44598d2e153STakahiro Akashi prot, early_pgtable_alloc, flags); 446da141706SLaura Abbott } 447da141706SLaura Abbott 4485ea5306cSArd Biesheuvel void __init mark_linear_text_alias_ro(void) 4495ea5306cSArd Biesheuvel { 4505ea5306cSArd Biesheuvel /* 4515ea5306cSArd Biesheuvel * Remove the write permissions from the linear alias of .text/.rodata 4525ea5306cSArd Biesheuvel */ 4535ea5306cSArd Biesheuvel update_mapping_prot(__pa_symbol(_text), (unsigned long)lm_alias(_text), 4545ea5306cSArd Biesheuvel (unsigned long)__init_begin - (unsigned long)_text, 4555ea5306cSArd Biesheuvel PAGE_KERNEL_RO); 4565ea5306cSArd Biesheuvel } 4575ea5306cSArd Biesheuvel 45820a004e7SWill Deacon static void __init map_mem(pgd_t *pgdp) 459c1cc1552SCatalin Marinas { 46098d2e153STakahiro Akashi phys_addr_t kernel_start = __pa_symbol(_text); 46198d2e153STakahiro Akashi phys_addr_t kernel_end = __pa_symbol(__init_begin); 462c1cc1552SCatalin Marinas struct memblock_region *reg; 46398d2e153STakahiro Akashi int flags = 0; 46498d2e153STakahiro Akashi 465c55191e9SArd Biesheuvel if (rodata_full || debug_pagealloc_enabled()) 46698d2e153STakahiro Akashi flags = NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS; 46798d2e153STakahiro Akashi 46898d2e153STakahiro Akashi /* 46998d2e153STakahiro Akashi * Take care not to create a writable alias for the 47098d2e153STakahiro Akashi * read-only text and rodata sections of the kernel image. 47198d2e153STakahiro Akashi * So temporarily mark them as NOMAP to skip mappings in 47298d2e153STakahiro Akashi * the following for-loop 47398d2e153STakahiro Akashi */ 47498d2e153STakahiro Akashi memblock_mark_nomap(kernel_start, kernel_end - kernel_start); 47598d2e153STakahiro Akashi #ifdef CONFIG_KEXEC_CORE 47698d2e153STakahiro Akashi if (crashk_res.end) 47798d2e153STakahiro Akashi memblock_mark_nomap(crashk_res.start, 47898d2e153STakahiro Akashi resource_size(&crashk_res)); 47998d2e153STakahiro Akashi #endif 480f6bc87c3SSteve Capper 481c1cc1552SCatalin Marinas /* map all the memory banks */ 482c1cc1552SCatalin Marinas for_each_memblock(memory, reg) { 483c1cc1552SCatalin Marinas phys_addr_t start = reg->base; 484c1cc1552SCatalin Marinas phys_addr_t end = start + reg->size; 485c1cc1552SCatalin Marinas 486c1cc1552SCatalin Marinas if (start >= end) 487c1cc1552SCatalin Marinas break; 48868709f45SArd Biesheuvel if (memblock_is_nomap(reg)) 48968709f45SArd Biesheuvel continue; 490c1cc1552SCatalin Marinas 49120a004e7SWill Deacon __map_memblock(pgdp, start, end, PAGE_KERNEL, flags); 492c1cc1552SCatalin Marinas } 49398d2e153STakahiro Akashi 49498d2e153STakahiro Akashi /* 49598d2e153STakahiro Akashi * Map the linear alias of the [_text, __init_begin) interval 49698d2e153STakahiro Akashi * as non-executable now, and remove the write permission in 49798d2e153STakahiro Akashi * mark_linear_text_alias_ro() below (which will be called after 49898d2e153STakahiro Akashi * alternative patching has completed). This makes the contents 49998d2e153STakahiro Akashi * of the region accessible to subsystems such as hibernate, 50098d2e153STakahiro Akashi * but protects it from inadvertent modification or execution. 50198d2e153STakahiro Akashi * Note that contiguous mappings cannot be remapped in this way, 50298d2e153STakahiro Akashi * so we should avoid them here. 50398d2e153STakahiro Akashi */ 50420a004e7SWill Deacon __map_memblock(pgdp, kernel_start, kernel_end, 50598d2e153STakahiro Akashi PAGE_KERNEL, NO_CONT_MAPPINGS); 50698d2e153STakahiro Akashi memblock_clear_nomap(kernel_start, kernel_end - kernel_start); 50798d2e153STakahiro Akashi 50898d2e153STakahiro Akashi #ifdef CONFIG_KEXEC_CORE 50998d2e153STakahiro Akashi /* 51098d2e153STakahiro Akashi * Use page-level mappings here so that we can shrink the region 51198d2e153STakahiro Akashi * in page granularity and put back unused memory to buddy system 51298d2e153STakahiro Akashi * through /sys/kernel/kexec_crash_size interface. 51398d2e153STakahiro Akashi */ 51498d2e153STakahiro Akashi if (crashk_res.end) { 51520a004e7SWill Deacon __map_memblock(pgdp, crashk_res.start, crashk_res.end + 1, 51698d2e153STakahiro Akashi PAGE_KERNEL, 51798d2e153STakahiro Akashi NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS); 51898d2e153STakahiro Akashi memblock_clear_nomap(crashk_res.start, 51998d2e153STakahiro Akashi resource_size(&crashk_res)); 52098d2e153STakahiro Akashi } 52198d2e153STakahiro Akashi #endif 522c1cc1552SCatalin Marinas } 523c1cc1552SCatalin Marinas 524da141706SLaura Abbott void mark_rodata_ro(void) 525da141706SLaura Abbott { 5262f39b5f9SJeremy Linton unsigned long section_size; 527f9040773SArd Biesheuvel 5282f39b5f9SJeremy Linton /* 5299fdc14c5SArd Biesheuvel * mark .rodata as read only. Use __init_begin rather than __end_rodata 5309fdc14c5SArd Biesheuvel * to cover NOTES and EXCEPTION_TABLE. 5312f39b5f9SJeremy Linton */ 5329fdc14c5SArd Biesheuvel section_size = (unsigned long)__init_begin - (unsigned long)__start_rodata; 533aa8c09beSArd Biesheuvel update_mapping_prot(__pa_symbol(__start_rodata), (unsigned long)__start_rodata, 5342f39b5f9SJeremy Linton section_size, PAGE_KERNEL_RO); 535e98216b5SArd Biesheuvel 5361404d6f1SLaura Abbott debug_checkwx(); 537da141706SLaura Abbott } 538da141706SLaura Abbott 53920a004e7SWill Deacon static void __init map_kernel_segment(pgd_t *pgdp, void *va_start, void *va_end, 540d27cfa1fSArd Biesheuvel pgprot_t prot, struct vm_struct *vma, 54192bbd16eSWill Deacon int flags, unsigned long vm_flags) 542068a17a5SMark Rutland { 5432077be67SLaura Abbott phys_addr_t pa_start = __pa_symbol(va_start); 544068a17a5SMark Rutland unsigned long size = va_end - va_start; 545068a17a5SMark Rutland 546068a17a5SMark Rutland BUG_ON(!PAGE_ALIGNED(pa_start)); 547068a17a5SMark Rutland BUG_ON(!PAGE_ALIGNED(size)); 548068a17a5SMark Rutland 54920a004e7SWill Deacon __create_pgd_mapping(pgdp, pa_start, (unsigned long)va_start, size, prot, 550d27cfa1fSArd Biesheuvel early_pgtable_alloc, flags); 551f9040773SArd Biesheuvel 55292bbd16eSWill Deacon if (!(vm_flags & VM_NO_GUARD)) 55392bbd16eSWill Deacon size += PAGE_SIZE; 55492bbd16eSWill Deacon 555f9040773SArd Biesheuvel vma->addr = va_start; 556f9040773SArd Biesheuvel vma->phys_addr = pa_start; 557f9040773SArd Biesheuvel vma->size = size; 55892bbd16eSWill Deacon vma->flags = VM_MAP | vm_flags; 559f9040773SArd Biesheuvel vma->caller = __builtin_return_address(0); 560f9040773SArd Biesheuvel 561f9040773SArd Biesheuvel vm_area_add_early(vma); 562068a17a5SMark Rutland } 563068a17a5SMark Rutland 56428b066daSArd Biesheuvel static int __init parse_rodata(char *arg) 56528b066daSArd Biesheuvel { 566c55191e9SArd Biesheuvel int ret = strtobool(arg, &rodata_enabled); 567c55191e9SArd Biesheuvel if (!ret) { 568c55191e9SArd Biesheuvel rodata_full = false; 569c55191e9SArd Biesheuvel return 0; 570c55191e9SArd Biesheuvel } 571c55191e9SArd Biesheuvel 572c55191e9SArd Biesheuvel /* permit 'full' in addition to boolean options */ 573c55191e9SArd Biesheuvel if (strcmp(arg, "full")) 574c55191e9SArd Biesheuvel return -EINVAL; 575c55191e9SArd Biesheuvel 576c55191e9SArd Biesheuvel rodata_enabled = true; 577c55191e9SArd Biesheuvel rodata_full = true; 578c55191e9SArd Biesheuvel return 0; 57928b066daSArd Biesheuvel } 58028b066daSArd Biesheuvel early_param("rodata", parse_rodata); 58128b066daSArd Biesheuvel 58251a0048bSWill Deacon #ifdef CONFIG_UNMAP_KERNEL_AT_EL0 58351a0048bSWill Deacon static int __init map_entry_trampoline(void) 58451a0048bSWill Deacon { 58551a0048bSWill Deacon pgprot_t prot = rodata_enabled ? PAGE_KERNEL_ROX : PAGE_KERNEL_EXEC; 58651a0048bSWill Deacon phys_addr_t pa_start = __pa_symbol(__entry_tramp_text_start); 58751a0048bSWill Deacon 58851a0048bSWill Deacon /* The trampoline is always mapped and can therefore be global */ 58951a0048bSWill Deacon pgprot_val(prot) &= ~PTE_NG; 59051a0048bSWill Deacon 59151a0048bSWill Deacon /* Map only the text into the trampoline page table */ 59251a0048bSWill Deacon memset(tramp_pg_dir, 0, PGD_SIZE); 59351a0048bSWill Deacon __create_pgd_mapping(tramp_pg_dir, pa_start, TRAMP_VALIAS, PAGE_SIZE, 594475ba3fcSWill Deacon prot, __pgd_pgtable_alloc, 0); 59551a0048bSWill Deacon 5966c27c408SWill Deacon /* Map both the text and data into the kernel page table */ 59751a0048bSWill Deacon __set_fixmap(FIX_ENTRY_TRAMP_TEXT, pa_start, prot); 5986c27c408SWill Deacon if (IS_ENABLED(CONFIG_RANDOMIZE_BASE)) { 5996c27c408SWill Deacon extern char __entry_tramp_data_start[]; 6006c27c408SWill Deacon 6016c27c408SWill Deacon __set_fixmap(FIX_ENTRY_TRAMP_DATA, 6026c27c408SWill Deacon __pa_symbol(__entry_tramp_data_start), 6036c27c408SWill Deacon PAGE_KERNEL_RO); 6046c27c408SWill Deacon } 6056c27c408SWill Deacon 60651a0048bSWill Deacon return 0; 60751a0048bSWill Deacon } 60851a0048bSWill Deacon core_initcall(map_entry_trampoline); 60951a0048bSWill Deacon #endif 61051a0048bSWill Deacon 611068a17a5SMark Rutland /* 612068a17a5SMark Rutland * Create fine-grained mappings for the kernel. 613068a17a5SMark Rutland */ 61420a004e7SWill Deacon static void __init map_kernel(pgd_t *pgdp) 615068a17a5SMark Rutland { 6162ebe088bSArd Biesheuvel static struct vm_struct vmlinux_text, vmlinux_rodata, vmlinux_inittext, 6172ebe088bSArd Biesheuvel vmlinux_initdata, vmlinux_data; 618068a17a5SMark Rutland 61928b066daSArd Biesheuvel /* 62028b066daSArd Biesheuvel * External debuggers may need to write directly to the text 62128b066daSArd Biesheuvel * mapping to install SW breakpoints. Allow this (only) when 62228b066daSArd Biesheuvel * explicitly requested with rodata=off. 62328b066daSArd Biesheuvel */ 62428b066daSArd Biesheuvel pgprot_t text_prot = rodata_enabled ? PAGE_KERNEL_ROX : PAGE_KERNEL_EXEC; 62528b066daSArd Biesheuvel 626d27cfa1fSArd Biesheuvel /* 627d27cfa1fSArd Biesheuvel * Only rodata will be remapped with different permissions later on, 628d27cfa1fSArd Biesheuvel * all other segments are allowed to use contiguous mappings. 629d27cfa1fSArd Biesheuvel */ 63020a004e7SWill Deacon map_kernel_segment(pgdp, _text, _etext, text_prot, &vmlinux_text, 0, 63192bbd16eSWill Deacon VM_NO_GUARD); 63220a004e7SWill Deacon map_kernel_segment(pgdp, __start_rodata, __inittext_begin, PAGE_KERNEL, 63392bbd16eSWill Deacon &vmlinux_rodata, NO_CONT_MAPPINGS, VM_NO_GUARD); 63420a004e7SWill Deacon map_kernel_segment(pgdp, __inittext_begin, __inittext_end, text_prot, 63592bbd16eSWill Deacon &vmlinux_inittext, 0, VM_NO_GUARD); 63620a004e7SWill Deacon map_kernel_segment(pgdp, __initdata_begin, __initdata_end, PAGE_KERNEL, 63792bbd16eSWill Deacon &vmlinux_initdata, 0, VM_NO_GUARD); 63820a004e7SWill Deacon map_kernel_segment(pgdp, _data, _end, PAGE_KERNEL, &vmlinux_data, 0, 0); 639068a17a5SMark Rutland 64020a004e7SWill Deacon if (!READ_ONCE(pgd_val(*pgd_offset_raw(pgdp, FIXADDR_START)))) { 641068a17a5SMark Rutland /* 642f9040773SArd Biesheuvel * The fixmap falls in a separate pgd to the kernel, and doesn't 643f9040773SArd Biesheuvel * live in the carveout for the swapper_pg_dir. We can simply 644f9040773SArd Biesheuvel * re-use the existing dir for the fixmap. 645068a17a5SMark Rutland */ 64620a004e7SWill Deacon set_pgd(pgd_offset_raw(pgdp, FIXADDR_START), 64720a004e7SWill Deacon READ_ONCE(*pgd_offset_k(FIXADDR_START))); 648f9040773SArd Biesheuvel } else if (CONFIG_PGTABLE_LEVELS > 3) { 649f9040773SArd Biesheuvel /* 650f9040773SArd Biesheuvel * The fixmap shares its top level pgd entry with the kernel 651f9040773SArd Biesheuvel * mapping. This can really only occur when we are running 652f9040773SArd Biesheuvel * with 16k/4 levels, so we can simply reuse the pud level 653f9040773SArd Biesheuvel * entry instead. 654f9040773SArd Biesheuvel */ 655f9040773SArd Biesheuvel BUG_ON(!IS_ENABLED(CONFIG_ARM64_16K_PAGES)); 65620a004e7SWill Deacon pud_populate(&init_mm, 65720a004e7SWill Deacon pud_set_fixmap_offset(pgdp, FIXADDR_START), 65819338304SKristina Martsenko lm_alias(bm_pmd)); 659f9040773SArd Biesheuvel pud_clear_fixmap(); 660f9040773SArd Biesheuvel } else { 661f9040773SArd Biesheuvel BUG(); 662f9040773SArd Biesheuvel } 663068a17a5SMark Rutland 66420a004e7SWill Deacon kasan_copy_shadow(pgdp); 665068a17a5SMark Rutland } 666068a17a5SMark Rutland 667c1cc1552SCatalin Marinas void __init paging_init(void) 668c1cc1552SCatalin Marinas { 6692330b7caSJun Yao pgd_t *pgdp = pgd_set_fixmap(__pa_symbol(swapper_pg_dir)); 670068a17a5SMark Rutland 67120a004e7SWill Deacon map_kernel(pgdp); 67220a004e7SWill Deacon map_mem(pgdp); 673068a17a5SMark Rutland 674068a17a5SMark Rutland pgd_clear_fixmap(); 675068a17a5SMark Rutland 676068a17a5SMark Rutland cpu_replace_ttbr1(lm_alias(swapper_pg_dir)); 6772b5548b6SJun Yao init_mm.pgd = swapper_pg_dir; 678068a17a5SMark Rutland 6792b5548b6SJun Yao memblock_free(__pa_symbol(init_pg_dir), 6802b5548b6SJun Yao __pa_symbol(init_pg_end) - __pa_symbol(init_pg_dir)); 68124cc61d8SArd Biesheuvel 68224cc61d8SArd Biesheuvel memblock_allow_resize(); 683c1cc1552SCatalin Marinas } 684c1cc1552SCatalin Marinas 685c1cc1552SCatalin Marinas /* 686c1cc1552SCatalin Marinas * Check whether a kernel address is valid (derived from arch/x86/). 687c1cc1552SCatalin Marinas */ 688c1cc1552SCatalin Marinas int kern_addr_valid(unsigned long addr) 689c1cc1552SCatalin Marinas { 69020a004e7SWill Deacon pgd_t *pgdp; 69120a004e7SWill Deacon pud_t *pudp, pud; 69220a004e7SWill Deacon pmd_t *pmdp, pmd; 69320a004e7SWill Deacon pte_t *ptep, pte; 694c1cc1552SCatalin Marinas 695c1cc1552SCatalin Marinas if ((((long)addr) >> VA_BITS) != -1UL) 696c1cc1552SCatalin Marinas return 0; 697c1cc1552SCatalin Marinas 69820a004e7SWill Deacon pgdp = pgd_offset_k(addr); 69920a004e7SWill Deacon if (pgd_none(READ_ONCE(*pgdp))) 700c1cc1552SCatalin Marinas return 0; 701c1cc1552SCatalin Marinas 70220a004e7SWill Deacon pudp = pud_offset(pgdp, addr); 70320a004e7SWill Deacon pud = READ_ONCE(*pudp); 70420a004e7SWill Deacon if (pud_none(pud)) 705c1cc1552SCatalin Marinas return 0; 706c1cc1552SCatalin Marinas 70720a004e7SWill Deacon if (pud_sect(pud)) 70820a004e7SWill Deacon return pfn_valid(pud_pfn(pud)); 709206a2a73SSteve Capper 71020a004e7SWill Deacon pmdp = pmd_offset(pudp, addr); 71120a004e7SWill Deacon pmd = READ_ONCE(*pmdp); 71220a004e7SWill Deacon if (pmd_none(pmd)) 713c1cc1552SCatalin Marinas return 0; 714c1cc1552SCatalin Marinas 71520a004e7SWill Deacon if (pmd_sect(pmd)) 71620a004e7SWill Deacon return pfn_valid(pmd_pfn(pmd)); 717da6e4cb6SDave Anderson 71820a004e7SWill Deacon ptep = pte_offset_kernel(pmdp, addr); 71920a004e7SWill Deacon pte = READ_ONCE(*ptep); 72020a004e7SWill Deacon if (pte_none(pte)) 721c1cc1552SCatalin Marinas return 0; 722c1cc1552SCatalin Marinas 72320a004e7SWill Deacon return pfn_valid(pte_pfn(pte)); 724c1cc1552SCatalin Marinas } 725c1cc1552SCatalin Marinas #ifdef CONFIG_SPARSEMEM_VMEMMAP 726b433dce0SSuzuki K. Poulose #if !ARM64_SWAPPER_USES_SECTION_MAPS 7277b73d978SChristoph Hellwig int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node, 7287b73d978SChristoph Hellwig struct vmem_altmap *altmap) 729c1cc1552SCatalin Marinas { 7300aad818bSJohannes Weiner return vmemmap_populate_basepages(start, end, node); 731c1cc1552SCatalin Marinas } 732b433dce0SSuzuki K. Poulose #else /* !ARM64_SWAPPER_USES_SECTION_MAPS */ 7337b73d978SChristoph Hellwig int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node, 7347b73d978SChristoph Hellwig struct vmem_altmap *altmap) 735c1cc1552SCatalin Marinas { 7360aad818bSJohannes Weiner unsigned long addr = start; 737c1cc1552SCatalin Marinas unsigned long next; 73820a004e7SWill Deacon pgd_t *pgdp; 73920a004e7SWill Deacon pud_t *pudp; 74020a004e7SWill Deacon pmd_t *pmdp; 741c1cc1552SCatalin Marinas 742c1cc1552SCatalin Marinas do { 743c1cc1552SCatalin Marinas next = pmd_addr_end(addr, end); 744c1cc1552SCatalin Marinas 74520a004e7SWill Deacon pgdp = vmemmap_pgd_populate(addr, node); 74620a004e7SWill Deacon if (!pgdp) 747c1cc1552SCatalin Marinas return -ENOMEM; 748c1cc1552SCatalin Marinas 74920a004e7SWill Deacon pudp = vmemmap_pud_populate(pgdp, addr, node); 75020a004e7SWill Deacon if (!pudp) 751c1cc1552SCatalin Marinas return -ENOMEM; 752c1cc1552SCatalin Marinas 75320a004e7SWill Deacon pmdp = pmd_offset(pudp, addr); 75420a004e7SWill Deacon if (pmd_none(READ_ONCE(*pmdp))) { 755c1cc1552SCatalin Marinas void *p = NULL; 756c1cc1552SCatalin Marinas 757c1cc1552SCatalin Marinas p = vmemmap_alloc_block_buf(PMD_SIZE, node); 758c1cc1552SCatalin Marinas if (!p) 759c1cc1552SCatalin Marinas return -ENOMEM; 760c1cc1552SCatalin Marinas 76120a004e7SWill Deacon pmd_set_huge(pmdp, __pa(p), __pgprot(PROT_SECT_NORMAL)); 762c1cc1552SCatalin Marinas } else 76320a004e7SWill Deacon vmemmap_verify((pte_t *)pmdp, node, addr, next); 764c1cc1552SCatalin Marinas } while (addr = next, addr != end); 765c1cc1552SCatalin Marinas 766c1cc1552SCatalin Marinas return 0; 767c1cc1552SCatalin Marinas } 768c1cc1552SCatalin Marinas #endif /* CONFIG_ARM64_64K_PAGES */ 76924b6d416SChristoph Hellwig void vmemmap_free(unsigned long start, unsigned long end, 77024b6d416SChristoph Hellwig struct vmem_altmap *altmap) 7710197518cSTang Chen { 7720197518cSTang Chen } 773c1cc1552SCatalin Marinas #endif /* CONFIG_SPARSEMEM_VMEMMAP */ 774af86e597SLaura Abbott 775af86e597SLaura Abbott static inline pud_t * fixmap_pud(unsigned long addr) 776af86e597SLaura Abbott { 77720a004e7SWill Deacon pgd_t *pgdp = pgd_offset_k(addr); 77820a004e7SWill Deacon pgd_t pgd = READ_ONCE(*pgdp); 779af86e597SLaura Abbott 78020a004e7SWill Deacon BUG_ON(pgd_none(pgd) || pgd_bad(pgd)); 781af86e597SLaura Abbott 78220a004e7SWill Deacon return pud_offset_kimg(pgdp, addr); 783af86e597SLaura Abbott } 784af86e597SLaura Abbott 785af86e597SLaura Abbott static inline pmd_t * fixmap_pmd(unsigned long addr) 786af86e597SLaura Abbott { 78720a004e7SWill Deacon pud_t *pudp = fixmap_pud(addr); 78820a004e7SWill Deacon pud_t pud = READ_ONCE(*pudp); 789af86e597SLaura Abbott 79020a004e7SWill Deacon BUG_ON(pud_none(pud) || pud_bad(pud)); 791af86e597SLaura Abbott 79220a004e7SWill Deacon return pmd_offset_kimg(pudp, addr); 793af86e597SLaura Abbott } 794af86e597SLaura Abbott 795af86e597SLaura Abbott static inline pte_t * fixmap_pte(unsigned long addr) 796af86e597SLaura Abbott { 797157962f5SArd Biesheuvel return &bm_pte[pte_index(addr)]; 798af86e597SLaura Abbott } 799af86e597SLaura Abbott 8002077be67SLaura Abbott /* 8012077be67SLaura Abbott * The p*d_populate functions call virt_to_phys implicitly so they can't be used 8022077be67SLaura Abbott * directly on kernel symbols (bm_p*d). This function is called too early to use 8032077be67SLaura Abbott * lm_alias so __p*d_populate functions must be used to populate with the 8042077be67SLaura Abbott * physical address from __pa_symbol. 8052077be67SLaura Abbott */ 806af86e597SLaura Abbott void __init early_fixmap_init(void) 807af86e597SLaura Abbott { 80820a004e7SWill Deacon pgd_t *pgdp, pgd; 80920a004e7SWill Deacon pud_t *pudp; 81020a004e7SWill Deacon pmd_t *pmdp; 811af86e597SLaura Abbott unsigned long addr = FIXADDR_START; 812af86e597SLaura Abbott 81320a004e7SWill Deacon pgdp = pgd_offset_k(addr); 81420a004e7SWill Deacon pgd = READ_ONCE(*pgdp); 815f80fb3a3SArd Biesheuvel if (CONFIG_PGTABLE_LEVELS > 3 && 81620a004e7SWill Deacon !(pgd_none(pgd) || pgd_page_paddr(pgd) == __pa_symbol(bm_pud))) { 817f9040773SArd Biesheuvel /* 818f9040773SArd Biesheuvel * We only end up here if the kernel mapping and the fixmap 819f9040773SArd Biesheuvel * share the top level pgd entry, which should only happen on 820f9040773SArd Biesheuvel * 16k/4 levels configurations. 821f9040773SArd Biesheuvel */ 822f9040773SArd Biesheuvel BUG_ON(!IS_ENABLED(CONFIG_ARM64_16K_PAGES)); 82320a004e7SWill Deacon pudp = pud_offset_kimg(pgdp, addr); 824f9040773SArd Biesheuvel } else { 82520a004e7SWill Deacon if (pgd_none(pgd)) 82620a004e7SWill Deacon __pgd_populate(pgdp, __pa_symbol(bm_pud), PUD_TYPE_TABLE); 82720a004e7SWill Deacon pudp = fixmap_pud(addr); 828f9040773SArd Biesheuvel } 82920a004e7SWill Deacon if (pud_none(READ_ONCE(*pudp))) 83020a004e7SWill Deacon __pud_populate(pudp, __pa_symbol(bm_pmd), PMD_TYPE_TABLE); 83120a004e7SWill Deacon pmdp = fixmap_pmd(addr); 83220a004e7SWill Deacon __pmd_populate(pmdp, __pa_symbol(bm_pte), PMD_TYPE_TABLE); 833af86e597SLaura Abbott 834af86e597SLaura Abbott /* 835af86e597SLaura Abbott * The boot-ioremap range spans multiple pmds, for which 836157962f5SArd Biesheuvel * we are not prepared: 837af86e597SLaura Abbott */ 838af86e597SLaura Abbott BUILD_BUG_ON((__fix_to_virt(FIX_BTMAP_BEGIN) >> PMD_SHIFT) 839af86e597SLaura Abbott != (__fix_to_virt(FIX_BTMAP_END) >> PMD_SHIFT)); 840af86e597SLaura Abbott 84120a004e7SWill Deacon if ((pmdp != fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN))) 84220a004e7SWill Deacon || pmdp != fixmap_pmd(fix_to_virt(FIX_BTMAP_END))) { 843af86e597SLaura Abbott WARN_ON(1); 84420a004e7SWill Deacon pr_warn("pmdp %p != %p, %p\n", 84520a004e7SWill Deacon pmdp, fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN)), 846af86e597SLaura Abbott fixmap_pmd(fix_to_virt(FIX_BTMAP_END))); 847af86e597SLaura Abbott pr_warn("fix_to_virt(FIX_BTMAP_BEGIN): %08lx\n", 848af86e597SLaura Abbott fix_to_virt(FIX_BTMAP_BEGIN)); 849af86e597SLaura Abbott pr_warn("fix_to_virt(FIX_BTMAP_END): %08lx\n", 850af86e597SLaura Abbott fix_to_virt(FIX_BTMAP_END)); 851af86e597SLaura Abbott 852af86e597SLaura Abbott pr_warn("FIX_BTMAP_END: %d\n", FIX_BTMAP_END); 853af86e597SLaura Abbott pr_warn("FIX_BTMAP_BEGIN: %d\n", FIX_BTMAP_BEGIN); 854af86e597SLaura Abbott } 855af86e597SLaura Abbott } 856af86e597SLaura Abbott 85718b4b276SJames Morse /* 85818b4b276SJames Morse * Unusually, this is also called in IRQ context (ghes_iounmap_irq) so if we 85918b4b276SJames Morse * ever need to use IPIs for TLB broadcasting, then we're in trouble here. 86018b4b276SJames Morse */ 861af86e597SLaura Abbott void __set_fixmap(enum fixed_addresses idx, 862af86e597SLaura Abbott phys_addr_t phys, pgprot_t flags) 863af86e597SLaura Abbott { 864af86e597SLaura Abbott unsigned long addr = __fix_to_virt(idx); 86520a004e7SWill Deacon pte_t *ptep; 866af86e597SLaura Abbott 867b63dbef9SMark Rutland BUG_ON(idx <= FIX_HOLE || idx >= __end_of_fixed_addresses); 868af86e597SLaura Abbott 86920a004e7SWill Deacon ptep = fixmap_pte(addr); 870af86e597SLaura Abbott 871af86e597SLaura Abbott if (pgprot_val(flags)) { 87220a004e7SWill Deacon set_pte(ptep, pfn_pte(phys >> PAGE_SHIFT, flags)); 873af86e597SLaura Abbott } else { 87420a004e7SWill Deacon pte_clear(&init_mm, addr, ptep); 875af86e597SLaura Abbott flush_tlb_kernel_range(addr, addr+PAGE_SIZE); 876af86e597SLaura Abbott } 877af86e597SLaura Abbott } 87861bd93ceSArd Biesheuvel 879f80fb3a3SArd Biesheuvel void *__init __fixmap_remap_fdt(phys_addr_t dt_phys, int *size, pgprot_t prot) 88061bd93ceSArd Biesheuvel { 88161bd93ceSArd Biesheuvel const u64 dt_virt_base = __fix_to_virt(FIX_FDT); 882f80fb3a3SArd Biesheuvel int offset; 88361bd93ceSArd Biesheuvel void *dt_virt; 88461bd93ceSArd Biesheuvel 88561bd93ceSArd Biesheuvel /* 88661bd93ceSArd Biesheuvel * Check whether the physical FDT address is set and meets the minimum 88761bd93ceSArd Biesheuvel * alignment requirement. Since we are relying on MIN_FDT_ALIGN to be 88804a84810SArd Biesheuvel * at least 8 bytes so that we can always access the magic and size 88904a84810SArd Biesheuvel * fields of the FDT header after mapping the first chunk, double check 89004a84810SArd Biesheuvel * here if that is indeed the case. 89161bd93ceSArd Biesheuvel */ 89261bd93ceSArd Biesheuvel BUILD_BUG_ON(MIN_FDT_ALIGN < 8); 89361bd93ceSArd Biesheuvel if (!dt_phys || dt_phys % MIN_FDT_ALIGN) 89461bd93ceSArd Biesheuvel return NULL; 89561bd93ceSArd Biesheuvel 89661bd93ceSArd Biesheuvel /* 89761bd93ceSArd Biesheuvel * Make sure that the FDT region can be mapped without the need to 89861bd93ceSArd Biesheuvel * allocate additional translation table pages, so that it is safe 899132233a7SLaura Abbott * to call create_mapping_noalloc() this early. 90061bd93ceSArd Biesheuvel * 90161bd93ceSArd Biesheuvel * On 64k pages, the FDT will be mapped using PTEs, so we need to 90261bd93ceSArd Biesheuvel * be in the same PMD as the rest of the fixmap. 90361bd93ceSArd Biesheuvel * On 4k pages, we'll use section mappings for the FDT so we only 90461bd93ceSArd Biesheuvel * have to be in the same PUD. 90561bd93ceSArd Biesheuvel */ 90661bd93ceSArd Biesheuvel BUILD_BUG_ON(dt_virt_base % SZ_2M); 90761bd93ceSArd Biesheuvel 908b433dce0SSuzuki K. Poulose BUILD_BUG_ON(__fix_to_virt(FIX_FDT_END) >> SWAPPER_TABLE_SHIFT != 909b433dce0SSuzuki K. Poulose __fix_to_virt(FIX_BTMAP_BEGIN) >> SWAPPER_TABLE_SHIFT); 91061bd93ceSArd Biesheuvel 911b433dce0SSuzuki K. Poulose offset = dt_phys % SWAPPER_BLOCK_SIZE; 91261bd93ceSArd Biesheuvel dt_virt = (void *)dt_virt_base + offset; 91361bd93ceSArd Biesheuvel 91461bd93ceSArd Biesheuvel /* map the first chunk so we can read the size from the header */ 915132233a7SLaura Abbott create_mapping_noalloc(round_down(dt_phys, SWAPPER_BLOCK_SIZE), 916132233a7SLaura Abbott dt_virt_base, SWAPPER_BLOCK_SIZE, prot); 91761bd93ceSArd Biesheuvel 91804a84810SArd Biesheuvel if (fdt_magic(dt_virt) != FDT_MAGIC) 91961bd93ceSArd Biesheuvel return NULL; 92061bd93ceSArd Biesheuvel 921f80fb3a3SArd Biesheuvel *size = fdt_totalsize(dt_virt); 922f80fb3a3SArd Biesheuvel if (*size > MAX_FDT_SIZE) 92361bd93ceSArd Biesheuvel return NULL; 92461bd93ceSArd Biesheuvel 925f80fb3a3SArd Biesheuvel if (offset + *size > SWAPPER_BLOCK_SIZE) 926132233a7SLaura Abbott create_mapping_noalloc(round_down(dt_phys, SWAPPER_BLOCK_SIZE), dt_virt_base, 927f80fb3a3SArd Biesheuvel round_up(offset + *size, SWAPPER_BLOCK_SIZE), prot); 928f80fb3a3SArd Biesheuvel 929f80fb3a3SArd Biesheuvel return dt_virt; 930f80fb3a3SArd Biesheuvel } 931f80fb3a3SArd Biesheuvel 932f80fb3a3SArd Biesheuvel void *__init fixmap_remap_fdt(phys_addr_t dt_phys) 933f80fb3a3SArd Biesheuvel { 934f80fb3a3SArd Biesheuvel void *dt_virt; 935f80fb3a3SArd Biesheuvel int size; 936f80fb3a3SArd Biesheuvel 937f80fb3a3SArd Biesheuvel dt_virt = __fixmap_remap_fdt(dt_phys, &size, PAGE_KERNEL_RO); 938f80fb3a3SArd Biesheuvel if (!dt_virt) 939f80fb3a3SArd Biesheuvel return NULL; 94061bd93ceSArd Biesheuvel 94161bd93ceSArd Biesheuvel memblock_reserve(dt_phys, size); 94261bd93ceSArd Biesheuvel return dt_virt; 94361bd93ceSArd Biesheuvel } 944324420bfSArd Biesheuvel 945324420bfSArd Biesheuvel int __init arch_ioremap_pud_supported(void) 946324420bfSArd Biesheuvel { 9477ba36eccSMark Rutland /* 9487ba36eccSMark Rutland * Only 4k granule supports level 1 block mappings. 9497ba36eccSMark Rutland * SW table walks can't handle removal of intermediate entries. 9507ba36eccSMark Rutland */ 9517ba36eccSMark Rutland return IS_ENABLED(CONFIG_ARM64_4K_PAGES) && 9527ba36eccSMark Rutland !IS_ENABLED(CONFIG_ARM64_PTDUMP_DEBUGFS); 953324420bfSArd Biesheuvel } 954324420bfSArd Biesheuvel 955324420bfSArd Biesheuvel int __init arch_ioremap_pmd_supported(void) 956324420bfSArd Biesheuvel { 9577ba36eccSMark Rutland /* See arch_ioremap_pud_supported() */ 9587ba36eccSMark Rutland return !IS_ENABLED(CONFIG_ARM64_PTDUMP_DEBUGFS); 959324420bfSArd Biesheuvel } 960324420bfSArd Biesheuvel 96120a004e7SWill Deacon int pud_set_huge(pud_t *pudp, phys_addr_t phys, pgprot_t prot) 962324420bfSArd Biesheuvel { 96319338304SKristina Martsenko pgprot_t sect_prot = __pgprot(PUD_TYPE_SECT | 96419338304SKristina Martsenko pgprot_val(mk_sect_prot(prot))); 96582034c23SLaura Abbott pud_t new_pud = pfn_pud(__phys_to_pfn(phys), sect_prot); 96615122ee2SWill Deacon 96782034c23SLaura Abbott /* Only allow permission changes for now */ 96882034c23SLaura Abbott if (!pgattr_change_is_safe(READ_ONCE(pud_val(*pudp)), 96982034c23SLaura Abbott pud_val(new_pud))) 97015122ee2SWill Deacon return 0; 97115122ee2SWill Deacon 972324420bfSArd Biesheuvel BUG_ON(phys & ~PUD_MASK); 97382034c23SLaura Abbott set_pud(pudp, new_pud); 974324420bfSArd Biesheuvel return 1; 975324420bfSArd Biesheuvel } 976324420bfSArd Biesheuvel 97720a004e7SWill Deacon int pmd_set_huge(pmd_t *pmdp, phys_addr_t phys, pgprot_t prot) 978324420bfSArd Biesheuvel { 97919338304SKristina Martsenko pgprot_t sect_prot = __pgprot(PMD_TYPE_SECT | 98019338304SKristina Martsenko pgprot_val(mk_sect_prot(prot))); 98182034c23SLaura Abbott pmd_t new_pmd = pfn_pmd(__phys_to_pfn(phys), sect_prot); 98215122ee2SWill Deacon 98382034c23SLaura Abbott /* Only allow permission changes for now */ 98482034c23SLaura Abbott if (!pgattr_change_is_safe(READ_ONCE(pmd_val(*pmdp)), 98582034c23SLaura Abbott pmd_val(new_pmd))) 98615122ee2SWill Deacon return 0; 98715122ee2SWill Deacon 988324420bfSArd Biesheuvel BUG_ON(phys & ~PMD_MASK); 98982034c23SLaura Abbott set_pmd(pmdp, new_pmd); 990324420bfSArd Biesheuvel return 1; 991324420bfSArd Biesheuvel } 992324420bfSArd Biesheuvel 99320a004e7SWill Deacon int pud_clear_huge(pud_t *pudp) 994324420bfSArd Biesheuvel { 99520a004e7SWill Deacon if (!pud_sect(READ_ONCE(*pudp))) 996324420bfSArd Biesheuvel return 0; 99720a004e7SWill Deacon pud_clear(pudp); 998324420bfSArd Biesheuvel return 1; 999324420bfSArd Biesheuvel } 1000324420bfSArd Biesheuvel 100120a004e7SWill Deacon int pmd_clear_huge(pmd_t *pmdp) 1002324420bfSArd Biesheuvel { 100320a004e7SWill Deacon if (!pmd_sect(READ_ONCE(*pmdp))) 1004324420bfSArd Biesheuvel return 0; 100520a004e7SWill Deacon pmd_clear(pmdp); 1006324420bfSArd Biesheuvel return 1; 1007324420bfSArd Biesheuvel } 1008b6bdb751SToshi Kani 1009ec28bb9cSChintan Pandya int pmd_free_pte_page(pmd_t *pmdp, unsigned long addr) 1010b6bdb751SToshi Kani { 1011ec28bb9cSChintan Pandya pte_t *table; 1012ec28bb9cSChintan Pandya pmd_t pmd; 1013ec28bb9cSChintan Pandya 1014ec28bb9cSChintan Pandya pmd = READ_ONCE(*pmdp); 1015ec28bb9cSChintan Pandya 1016fac880c7SMark Rutland if (!pmd_table(pmd)) { 10179c006972SWill Deacon VM_WARN_ON(1); 1018ec28bb9cSChintan Pandya return 1; 1019b6bdb751SToshi Kani } 1020b6bdb751SToshi Kani 1021ec28bb9cSChintan Pandya table = pte_offset_kernel(pmdp, addr); 1022ec28bb9cSChintan Pandya pmd_clear(pmdp); 1023ec28bb9cSChintan Pandya __flush_tlb_kernel_pgtable(addr); 1024ec28bb9cSChintan Pandya pte_free_kernel(NULL, table); 1025ec28bb9cSChintan Pandya return 1; 1026ec28bb9cSChintan Pandya } 1027ec28bb9cSChintan Pandya 1028ec28bb9cSChintan Pandya int pud_free_pmd_page(pud_t *pudp, unsigned long addr) 1029b6bdb751SToshi Kani { 1030ec28bb9cSChintan Pandya pmd_t *table; 1031ec28bb9cSChintan Pandya pmd_t *pmdp; 1032ec28bb9cSChintan Pandya pud_t pud; 1033ec28bb9cSChintan Pandya unsigned long next, end; 1034ec28bb9cSChintan Pandya 1035ec28bb9cSChintan Pandya pud = READ_ONCE(*pudp); 1036ec28bb9cSChintan Pandya 1037fac880c7SMark Rutland if (!pud_table(pud)) { 10389c006972SWill Deacon VM_WARN_ON(1); 1039ec28bb9cSChintan Pandya return 1; 1040ec28bb9cSChintan Pandya } 1041ec28bb9cSChintan Pandya 1042ec28bb9cSChintan Pandya table = pmd_offset(pudp, addr); 1043ec28bb9cSChintan Pandya pmdp = table; 1044ec28bb9cSChintan Pandya next = addr; 1045ec28bb9cSChintan Pandya end = addr + PUD_SIZE; 1046ec28bb9cSChintan Pandya do { 1047ec28bb9cSChintan Pandya pmd_free_pte_page(pmdp, next); 1048ec28bb9cSChintan Pandya } while (pmdp++, next += PMD_SIZE, next != end); 1049ec28bb9cSChintan Pandya 1050ec28bb9cSChintan Pandya pud_clear(pudp); 1051ec28bb9cSChintan Pandya __flush_tlb_kernel_pgtable(addr); 1052ec28bb9cSChintan Pandya pmd_free(NULL, table); 1053ec28bb9cSChintan Pandya return 1; 1054b6bdb751SToshi Kani } 10554ab21506SRobin Murphy 10568e2d4340SWill Deacon int p4d_free_pud_page(p4d_t *p4d, unsigned long addr) 10578e2d4340SWill Deacon { 10588e2d4340SWill Deacon return 0; /* Don't attempt a block mapping */ 10598e2d4340SWill Deacon } 10608e2d4340SWill Deacon 10614ab21506SRobin Murphy #ifdef CONFIG_MEMORY_HOTPLUG 1062940519f0SMichal Hocko int arch_add_memory(int nid, u64 start, u64 size, 1063940519f0SMichal Hocko struct mhp_restrictions *restrictions) 10644ab21506SRobin Murphy { 10654ab21506SRobin Murphy int flags = 0; 10664ab21506SRobin Murphy 10674ab21506SRobin Murphy if (rodata_full || debug_pagealloc_enabled()) 10684ab21506SRobin Murphy flags = NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS; 10694ab21506SRobin Murphy 10704ab21506SRobin Murphy __create_pgd_mapping(swapper_pg_dir, start, __phys_to_virt(start), 1071475ba3fcSWill Deacon size, PAGE_KERNEL, __pgd_pgtable_alloc, flags); 10724ab21506SRobin Murphy 10734ab21506SRobin Murphy return __add_pages(nid, start >> PAGE_SHIFT, size >> PAGE_SHIFT, 1074940519f0SMichal Hocko restrictions); 10754ab21506SRobin Murphy } 10764ab21506SRobin Murphy #endif 1077