1c1cc1552SCatalin Marinas /* 2c1cc1552SCatalin Marinas * Based on arch/arm/mm/mmu.c 3c1cc1552SCatalin Marinas * 4c1cc1552SCatalin Marinas * Copyright (C) 1995-2005 Russell King 5c1cc1552SCatalin Marinas * Copyright (C) 2012 ARM Ltd. 6c1cc1552SCatalin Marinas * 7c1cc1552SCatalin Marinas * This program is free software; you can redistribute it and/or modify 8c1cc1552SCatalin Marinas * it under the terms of the GNU General Public License version 2 as 9c1cc1552SCatalin Marinas * published by the Free Software Foundation. 10c1cc1552SCatalin Marinas * 11c1cc1552SCatalin Marinas * This program is distributed in the hope that it will be useful, 12c1cc1552SCatalin Marinas * but WITHOUT ANY WARRANTY; without even the implied warranty of 13c1cc1552SCatalin Marinas * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14c1cc1552SCatalin Marinas * GNU General Public License for more details. 15c1cc1552SCatalin Marinas * 16c1cc1552SCatalin Marinas * You should have received a copy of the GNU General Public License 17c1cc1552SCatalin Marinas * along with this program. If not, see <http://www.gnu.org/licenses/>. 18c1cc1552SCatalin Marinas */ 19c1cc1552SCatalin Marinas 20c1cc1552SCatalin Marinas #include <linux/export.h> 21c1cc1552SCatalin Marinas #include <linux/kernel.h> 22c1cc1552SCatalin Marinas #include <linux/errno.h> 23c1cc1552SCatalin Marinas #include <linux/init.h> 24c1cc1552SCatalin Marinas #include <linux/mman.h> 25c1cc1552SCatalin Marinas #include <linux/nodemask.h> 26c1cc1552SCatalin Marinas #include <linux/memblock.h> 27c1cc1552SCatalin Marinas #include <linux/fs.h> 282475ff9dSCatalin Marinas #include <linux/io.h> 2941089357SCatalin Marinas #include <linux/slab.h> 30da141706SLaura Abbott #include <linux/stop_machine.h> 31c1cc1552SCatalin Marinas 32c1cc1552SCatalin Marinas #include <asm/cputype.h> 33af86e597SLaura Abbott #include <asm/fixmap.h> 34c1cc1552SCatalin Marinas #include <asm/sections.h> 35c1cc1552SCatalin Marinas #include <asm/setup.h> 36c1cc1552SCatalin Marinas #include <asm/sizes.h> 37c1cc1552SCatalin Marinas #include <asm/tlb.h> 38c79b954bSJungseok Lee #include <asm/memblock.h> 39c1cc1552SCatalin Marinas #include <asm/mmu_context.h> 40c1cc1552SCatalin Marinas 41c1cc1552SCatalin Marinas #include "mm.h" 42c1cc1552SCatalin Marinas 43c1cc1552SCatalin Marinas /* 44c1cc1552SCatalin Marinas * Empty_zero_page is a special page that is used for zero-initialized data 45c1cc1552SCatalin Marinas * and COW. 46c1cc1552SCatalin Marinas */ 47c1cc1552SCatalin Marinas struct page *empty_zero_page; 48c1cc1552SCatalin Marinas EXPORT_SYMBOL(empty_zero_page); 49c1cc1552SCatalin Marinas 50c1cc1552SCatalin Marinas pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, 51c1cc1552SCatalin Marinas unsigned long size, pgprot_t vma_prot) 52c1cc1552SCatalin Marinas { 53c1cc1552SCatalin Marinas if (!pfn_valid(pfn)) 54c1cc1552SCatalin Marinas return pgprot_noncached(vma_prot); 55c1cc1552SCatalin Marinas else if (file->f_flags & O_SYNC) 56c1cc1552SCatalin Marinas return pgprot_writecombine(vma_prot); 57c1cc1552SCatalin Marinas return vma_prot; 58c1cc1552SCatalin Marinas } 59c1cc1552SCatalin Marinas EXPORT_SYMBOL(phys_mem_access_prot); 60c1cc1552SCatalin Marinas 61c1cc1552SCatalin Marinas static void __init *early_alloc(unsigned long sz) 62c1cc1552SCatalin Marinas { 63c1cc1552SCatalin Marinas void *ptr = __va(memblock_alloc(sz, sz)); 64da141706SLaura Abbott BUG_ON(!ptr); 65c1cc1552SCatalin Marinas memset(ptr, 0, sz); 66c1cc1552SCatalin Marinas return ptr; 67c1cc1552SCatalin Marinas } 68c1cc1552SCatalin Marinas 69da141706SLaura Abbott /* 70da141706SLaura Abbott * remap a PMD into pages 71da141706SLaura Abbott */ 72da141706SLaura Abbott static void split_pmd(pmd_t *pmd, pte_t *pte) 73da141706SLaura Abbott { 74da141706SLaura Abbott unsigned long pfn = pmd_pfn(*pmd); 75da141706SLaura Abbott int i = 0; 76da141706SLaura Abbott 77da141706SLaura Abbott do { 78da141706SLaura Abbott /* 79da141706SLaura Abbott * Need to have the least restrictive permissions available 80da141706SLaura Abbott * permissions will be fixed up later 81da141706SLaura Abbott */ 82da141706SLaura Abbott set_pte(pte, pfn_pte(pfn, PAGE_KERNEL_EXEC)); 83da141706SLaura Abbott pfn++; 84da141706SLaura Abbott } while (pte++, i++, i < PTRS_PER_PTE); 85da141706SLaura Abbott } 86da141706SLaura Abbott 87da141706SLaura Abbott static void alloc_init_pte(pmd_t *pmd, unsigned long addr, 88d7ecbddfSMark Salter unsigned long end, unsigned long pfn, 89da141706SLaura Abbott pgprot_t prot, 90da141706SLaura Abbott void *(*alloc)(unsigned long size)) 91c1cc1552SCatalin Marinas { 92c1cc1552SCatalin Marinas pte_t *pte; 93c1cc1552SCatalin Marinas 94a1c76574SMark Rutland if (pmd_none(*pmd) || pmd_sect(*pmd)) { 95da141706SLaura Abbott pte = alloc(PTRS_PER_PTE * sizeof(pte_t)); 96da141706SLaura Abbott if (pmd_sect(*pmd)) 97da141706SLaura Abbott split_pmd(pmd, pte); 98c1cc1552SCatalin Marinas __pmd_populate(pmd, __pa(pte), PMD_TYPE_TABLE); 99da141706SLaura Abbott flush_tlb_all(); 100c1cc1552SCatalin Marinas } 101a1c76574SMark Rutland BUG_ON(pmd_bad(*pmd)); 102c1cc1552SCatalin Marinas 103c1cc1552SCatalin Marinas pte = pte_offset_kernel(pmd, addr); 104c1cc1552SCatalin Marinas do { 105d7ecbddfSMark Salter set_pte(pte, pfn_pte(pfn, prot)); 106c1cc1552SCatalin Marinas pfn++; 107c1cc1552SCatalin Marinas } while (pte++, addr += PAGE_SIZE, addr != end); 108c1cc1552SCatalin Marinas } 109c1cc1552SCatalin Marinas 110da141706SLaura Abbott void split_pud(pud_t *old_pud, pmd_t *pmd) 111da141706SLaura Abbott { 112da141706SLaura Abbott unsigned long addr = pud_pfn(*old_pud) << PAGE_SHIFT; 113da141706SLaura Abbott pgprot_t prot = __pgprot(pud_val(*old_pud) ^ addr); 114da141706SLaura Abbott int i = 0; 115da141706SLaura Abbott 116da141706SLaura Abbott do { 117da141706SLaura Abbott set_pmd(pmd, __pmd(addr | prot)); 118da141706SLaura Abbott addr += PMD_SIZE; 119da141706SLaura Abbott } while (pmd++, i++, i < PTRS_PER_PMD); 120da141706SLaura Abbott } 121da141706SLaura Abbott 122da141706SLaura Abbott static void alloc_init_pmd(struct mm_struct *mm, pud_t *pud, 123e1e1fddaSArd Biesheuvel unsigned long addr, unsigned long end, 124da141706SLaura Abbott phys_addr_t phys, pgprot_t prot, 125da141706SLaura Abbott void *(*alloc)(unsigned long size)) 126c1cc1552SCatalin Marinas { 127c1cc1552SCatalin Marinas pmd_t *pmd; 128c1cc1552SCatalin Marinas unsigned long next; 129c1cc1552SCatalin Marinas 130c1cc1552SCatalin Marinas /* 131c1cc1552SCatalin Marinas * Check for initial section mappings in the pgd/pud and remove them. 132c1cc1552SCatalin Marinas */ 133a1c76574SMark Rutland if (pud_none(*pud) || pud_sect(*pud)) { 134da141706SLaura Abbott pmd = alloc(PTRS_PER_PMD * sizeof(pmd_t)); 135da141706SLaura Abbott if (pud_sect(*pud)) { 136da141706SLaura Abbott /* 137da141706SLaura Abbott * need to have the 1G of mappings continue to be 138da141706SLaura Abbott * present 139da141706SLaura Abbott */ 140da141706SLaura Abbott split_pud(pud, pmd); 141da141706SLaura Abbott } 142e1e1fddaSArd Biesheuvel pud_populate(mm, pud, pmd); 143da141706SLaura Abbott flush_tlb_all(); 144c1cc1552SCatalin Marinas } 145a1c76574SMark Rutland BUG_ON(pud_bad(*pud)); 146c1cc1552SCatalin Marinas 147c1cc1552SCatalin Marinas pmd = pmd_offset(pud, addr); 148c1cc1552SCatalin Marinas do { 149c1cc1552SCatalin Marinas next = pmd_addr_end(addr, end); 150c1cc1552SCatalin Marinas /* try section mapping first */ 151a55f9929SCatalin Marinas if (((addr | next | phys) & ~SECTION_MASK) == 0) { 152a55f9929SCatalin Marinas pmd_t old_pmd =*pmd; 1538ce837ceSArd Biesheuvel set_pmd(pmd, __pmd(phys | 1548ce837ceSArd Biesheuvel pgprot_val(mk_sect_prot(prot)))); 155a55f9929SCatalin Marinas /* 156a55f9929SCatalin Marinas * Check for previous table entries created during 157a55f9929SCatalin Marinas * boot (__create_page_tables) and flush them. 158a55f9929SCatalin Marinas */ 159523d6e9fSzhichang.yuan if (!pmd_none(old_pmd)) { 160a55f9929SCatalin Marinas flush_tlb_all(); 161523d6e9fSzhichang.yuan if (pmd_table(old_pmd)) { 162523d6e9fSzhichang.yuan phys_addr_t table = __pa(pte_offset_map(&old_pmd, 0)); 16341089357SCatalin Marinas if (!WARN_ON_ONCE(slab_is_available())) 164523d6e9fSzhichang.yuan memblock_free(table, PAGE_SIZE); 165523d6e9fSzhichang.yuan } 166523d6e9fSzhichang.yuan } 167a55f9929SCatalin Marinas } else { 168d7ecbddfSMark Salter alloc_init_pte(pmd, addr, next, __phys_to_pfn(phys), 169da141706SLaura Abbott prot, alloc); 170a55f9929SCatalin Marinas } 171c1cc1552SCatalin Marinas phys += next - addr; 172c1cc1552SCatalin Marinas } while (pmd++, addr = next, addr != end); 173c1cc1552SCatalin Marinas } 174c1cc1552SCatalin Marinas 175da141706SLaura Abbott static inline bool use_1G_block(unsigned long addr, unsigned long next, 176da141706SLaura Abbott unsigned long phys) 177da141706SLaura Abbott { 178da141706SLaura Abbott if (PAGE_SHIFT != 12) 179da141706SLaura Abbott return false; 180da141706SLaura Abbott 181da141706SLaura Abbott if (((addr | next | phys) & ~PUD_MASK) != 0) 182da141706SLaura Abbott return false; 183da141706SLaura Abbott 184da141706SLaura Abbott return true; 185da141706SLaura Abbott } 186da141706SLaura Abbott 187da141706SLaura Abbott static void alloc_init_pud(struct mm_struct *mm, pgd_t *pgd, 188e1e1fddaSArd Biesheuvel unsigned long addr, unsigned long end, 189da141706SLaura Abbott phys_addr_t phys, pgprot_t prot, 190da141706SLaura Abbott void *(*alloc)(unsigned long size)) 191c1cc1552SCatalin Marinas { 192c79b954bSJungseok Lee pud_t *pud; 193c1cc1552SCatalin Marinas unsigned long next; 194c1cc1552SCatalin Marinas 195c79b954bSJungseok Lee if (pgd_none(*pgd)) { 196da141706SLaura Abbott pud = alloc(PTRS_PER_PUD * sizeof(pud_t)); 197e1e1fddaSArd Biesheuvel pgd_populate(mm, pgd, pud); 198c79b954bSJungseok Lee } 199c79b954bSJungseok Lee BUG_ON(pgd_bad(*pgd)); 200c79b954bSJungseok Lee 201c79b954bSJungseok Lee pud = pud_offset(pgd, addr); 202c1cc1552SCatalin Marinas do { 203c1cc1552SCatalin Marinas next = pud_addr_end(addr, end); 204206a2a73SSteve Capper 205206a2a73SSteve Capper /* 206206a2a73SSteve Capper * For 4K granule only, attempt to put down a 1GB block 207206a2a73SSteve Capper */ 208da141706SLaura Abbott if (use_1G_block(addr, next, phys)) { 209206a2a73SSteve Capper pud_t old_pud = *pud; 2108ce837ceSArd Biesheuvel set_pud(pud, __pud(phys | 2118ce837ceSArd Biesheuvel pgprot_val(mk_sect_prot(prot)))); 212206a2a73SSteve Capper 213206a2a73SSteve Capper /* 214206a2a73SSteve Capper * If we have an old value for a pud, it will 215206a2a73SSteve Capper * be pointing to a pmd table that we no longer 216206a2a73SSteve Capper * need (from swapper_pg_dir). 217206a2a73SSteve Capper * 218206a2a73SSteve Capper * Look up the old pmd table and free it. 219206a2a73SSteve Capper */ 220206a2a73SSteve Capper if (!pud_none(old_pud)) { 221206a2a73SSteve Capper flush_tlb_all(); 222523d6e9fSzhichang.yuan if (pud_table(old_pud)) { 223523d6e9fSzhichang.yuan phys_addr_t table = __pa(pmd_offset(&old_pud, 0)); 22441089357SCatalin Marinas if (!WARN_ON_ONCE(slab_is_available())) 225523d6e9fSzhichang.yuan memblock_free(table, PAGE_SIZE); 226523d6e9fSzhichang.yuan } 227206a2a73SSteve Capper } 228206a2a73SSteve Capper } else { 229da141706SLaura Abbott alloc_init_pmd(mm, pud, addr, next, phys, prot, alloc); 230206a2a73SSteve Capper } 231c1cc1552SCatalin Marinas phys += next - addr; 232c1cc1552SCatalin Marinas } while (pud++, addr = next, addr != end); 233c1cc1552SCatalin Marinas } 234c1cc1552SCatalin Marinas 235c1cc1552SCatalin Marinas /* 236c1cc1552SCatalin Marinas * Create the page directory entries and any necessary page tables for the 237c1cc1552SCatalin Marinas * mapping specified by 'md'. 238c1cc1552SCatalin Marinas */ 239da141706SLaura Abbott static void __create_mapping(struct mm_struct *mm, pgd_t *pgd, 240e1e1fddaSArd Biesheuvel phys_addr_t phys, unsigned long virt, 241da141706SLaura Abbott phys_addr_t size, pgprot_t prot, 242da141706SLaura Abbott void *(*alloc)(unsigned long size)) 243c1cc1552SCatalin Marinas { 244c1cc1552SCatalin Marinas unsigned long addr, length, end, next; 245c1cc1552SCatalin Marinas 246c1cc1552SCatalin Marinas addr = virt & PAGE_MASK; 247c1cc1552SCatalin Marinas length = PAGE_ALIGN(size + (virt & ~PAGE_MASK)); 248c1cc1552SCatalin Marinas 249c1cc1552SCatalin Marinas end = addr + length; 250c1cc1552SCatalin Marinas do { 251c1cc1552SCatalin Marinas next = pgd_addr_end(addr, end); 252da141706SLaura Abbott alloc_init_pud(mm, pgd, addr, next, phys, prot, alloc); 253c1cc1552SCatalin Marinas phys += next - addr; 254c1cc1552SCatalin Marinas } while (pgd++, addr = next, addr != end); 255c1cc1552SCatalin Marinas } 256c1cc1552SCatalin Marinas 257da141706SLaura Abbott static void *late_alloc(unsigned long size) 258da141706SLaura Abbott { 259da141706SLaura Abbott void *ptr; 260da141706SLaura Abbott 261da141706SLaura Abbott BUG_ON(size > PAGE_SIZE); 262da141706SLaura Abbott ptr = (void *)__get_free_page(PGALLOC_GFP); 263da141706SLaura Abbott BUG_ON(!ptr); 264da141706SLaura Abbott return ptr; 265da141706SLaura Abbott } 266da141706SLaura Abbott 267da141706SLaura Abbott static void __ref create_mapping(phys_addr_t phys, unsigned long virt, 268da141706SLaura Abbott phys_addr_t size, pgprot_t prot) 269d7ecbddfSMark Salter { 270d7ecbddfSMark Salter if (virt < VMALLOC_START) { 271d7ecbddfSMark Salter pr_warn("BUG: not creating mapping for %pa at 0x%016lx - outside kernel range\n", 272d7ecbddfSMark Salter &phys, virt); 273d7ecbddfSMark Salter return; 274d7ecbddfSMark Salter } 275e1e1fddaSArd Biesheuvel __create_mapping(&init_mm, pgd_offset_k(virt & PAGE_MASK), phys, virt, 276da141706SLaura Abbott size, prot, early_alloc); 277d7ecbddfSMark Salter } 278d7ecbddfSMark Salter 2798ce837ceSArd Biesheuvel void __init create_pgd_mapping(struct mm_struct *mm, phys_addr_t phys, 2808ce837ceSArd Biesheuvel unsigned long virt, phys_addr_t size, 2818ce837ceSArd Biesheuvel pgprot_t prot) 2828ce837ceSArd Biesheuvel { 283da141706SLaura Abbott __create_mapping(mm, pgd_offset(mm, virt), phys, virt, size, prot, 28460305db9SArd Biesheuvel late_alloc); 285d7ecbddfSMark Salter } 286d7ecbddfSMark Salter 287da141706SLaura Abbott static void create_mapping_late(phys_addr_t phys, unsigned long virt, 288da141706SLaura Abbott phys_addr_t size, pgprot_t prot) 289da141706SLaura Abbott { 290da141706SLaura Abbott if (virt < VMALLOC_START) { 291da141706SLaura Abbott pr_warn("BUG: not creating mapping for %pa at 0x%016lx - outside kernel range\n", 292da141706SLaura Abbott &phys, virt); 293da141706SLaura Abbott return; 294da141706SLaura Abbott } 295da141706SLaura Abbott 296da141706SLaura Abbott return __create_mapping(&init_mm, pgd_offset_k(virt & PAGE_MASK), 297da141706SLaura Abbott phys, virt, size, prot, late_alloc); 298da141706SLaura Abbott } 299da141706SLaura Abbott 300da141706SLaura Abbott #ifdef CONFIG_DEBUG_RODATA 301da141706SLaura Abbott static void __init __map_memblock(phys_addr_t start, phys_addr_t end) 302da141706SLaura Abbott { 303da141706SLaura Abbott /* 304da141706SLaura Abbott * Set up the executable regions using the existing section mappings 305da141706SLaura Abbott * for now. This will get more fine grained later once all memory 306da141706SLaura Abbott * is mapped 307da141706SLaura Abbott */ 308da141706SLaura Abbott unsigned long kernel_x_start = round_down(__pa(_stext), SECTION_SIZE); 309da141706SLaura Abbott unsigned long kernel_x_end = round_up(__pa(__init_end), SECTION_SIZE); 310da141706SLaura Abbott 311da141706SLaura Abbott if (end < kernel_x_start) { 312da141706SLaura Abbott create_mapping(start, __phys_to_virt(start), 313da141706SLaura Abbott end - start, PAGE_KERNEL); 314da141706SLaura Abbott } else if (start >= kernel_x_end) { 315da141706SLaura Abbott create_mapping(start, __phys_to_virt(start), 316da141706SLaura Abbott end - start, PAGE_KERNEL); 317da141706SLaura Abbott } else { 318da141706SLaura Abbott if (start < kernel_x_start) 319da141706SLaura Abbott create_mapping(start, __phys_to_virt(start), 320da141706SLaura Abbott kernel_x_start - start, 321da141706SLaura Abbott PAGE_KERNEL); 322da141706SLaura Abbott create_mapping(kernel_x_start, 323da141706SLaura Abbott __phys_to_virt(kernel_x_start), 324da141706SLaura Abbott kernel_x_end - kernel_x_start, 325da141706SLaura Abbott PAGE_KERNEL_EXEC); 326da141706SLaura Abbott if (kernel_x_end < end) 327da141706SLaura Abbott create_mapping(kernel_x_end, 328da141706SLaura Abbott __phys_to_virt(kernel_x_end), 329da141706SLaura Abbott end - kernel_x_end, 330da141706SLaura Abbott PAGE_KERNEL); 331da141706SLaura Abbott } 332da141706SLaura Abbott 333da141706SLaura Abbott } 334da141706SLaura Abbott #else 335da141706SLaura Abbott static void __init __map_memblock(phys_addr_t start, phys_addr_t end) 336da141706SLaura Abbott { 337da141706SLaura Abbott create_mapping(start, __phys_to_virt(start), end - start, 338da141706SLaura Abbott PAGE_KERNEL_EXEC); 339da141706SLaura Abbott } 340da141706SLaura Abbott #endif 341da141706SLaura Abbott 342c1cc1552SCatalin Marinas static void __init map_mem(void) 343c1cc1552SCatalin Marinas { 344c1cc1552SCatalin Marinas struct memblock_region *reg; 345e25208f7SCatalin Marinas phys_addr_t limit; 346c1cc1552SCatalin Marinas 347f6bc87c3SSteve Capper /* 348f6bc87c3SSteve Capper * Temporarily limit the memblock range. We need to do this as 349f6bc87c3SSteve Capper * create_mapping requires puds, pmds and ptes to be allocated from 350f6bc87c3SSteve Capper * memory addressable from the initial direct kernel mapping. 351f6bc87c3SSteve Capper * 3523dec0fe4SCatalin Marinas * The initial direct kernel mapping, located at swapper_pg_dir, gives 3533dec0fe4SCatalin Marinas * us PUD_SIZE (4K pages) or PMD_SIZE (64K pages) memory starting from 3543dec0fe4SCatalin Marinas * PHYS_OFFSET (which must be aligned to 2MB as per 3553dec0fe4SCatalin Marinas * Documentation/arm64/booting.txt). 356f6bc87c3SSteve Capper */ 3573dec0fe4SCatalin Marinas if (IS_ENABLED(CONFIG_ARM64_64K_PAGES)) 3583dec0fe4SCatalin Marinas limit = PHYS_OFFSET + PMD_SIZE; 3593dec0fe4SCatalin Marinas else 360c79b954bSJungseok Lee limit = PHYS_OFFSET + PUD_SIZE; 361e25208f7SCatalin Marinas memblock_set_current_limit(limit); 362f6bc87c3SSteve Capper 363c1cc1552SCatalin Marinas /* map all the memory banks */ 364c1cc1552SCatalin Marinas for_each_memblock(memory, reg) { 365c1cc1552SCatalin Marinas phys_addr_t start = reg->base; 366c1cc1552SCatalin Marinas phys_addr_t end = start + reg->size; 367c1cc1552SCatalin Marinas 368c1cc1552SCatalin Marinas if (start >= end) 369c1cc1552SCatalin Marinas break; 370c1cc1552SCatalin Marinas 371e25208f7SCatalin Marinas #ifndef CONFIG_ARM64_64K_PAGES 372e25208f7SCatalin Marinas /* 373e25208f7SCatalin Marinas * For the first memory bank align the start address and 374e25208f7SCatalin Marinas * current memblock limit to prevent create_mapping() from 375e25208f7SCatalin Marinas * allocating pte page tables from unmapped memory. 376e25208f7SCatalin Marinas * When 64K pages are enabled, the pte page table for the 377e25208f7SCatalin Marinas * first PGDIR_SIZE is already present in swapper_pg_dir. 378e25208f7SCatalin Marinas */ 379e25208f7SCatalin Marinas if (start < limit) 380e25208f7SCatalin Marinas start = ALIGN(start, PMD_SIZE); 381e25208f7SCatalin Marinas if (end < limit) { 382e25208f7SCatalin Marinas limit = end & PMD_MASK; 383e25208f7SCatalin Marinas memblock_set_current_limit(limit); 384e25208f7SCatalin Marinas } 385e25208f7SCatalin Marinas #endif 386da141706SLaura Abbott __map_memblock(start, end); 387c1cc1552SCatalin Marinas } 388f6bc87c3SSteve Capper 389f6bc87c3SSteve Capper /* Limit no longer required. */ 390f6bc87c3SSteve Capper memblock_set_current_limit(MEMBLOCK_ALLOC_ANYWHERE); 391c1cc1552SCatalin Marinas } 392c1cc1552SCatalin Marinas 393da141706SLaura Abbott void __init fixup_executable(void) 394da141706SLaura Abbott { 395da141706SLaura Abbott #ifdef CONFIG_DEBUG_RODATA 396da141706SLaura Abbott /* now that we are actually fully mapped, make the start/end more fine grained */ 397da141706SLaura Abbott if (!IS_ALIGNED((unsigned long)_stext, SECTION_SIZE)) { 398da141706SLaura Abbott unsigned long aligned_start = round_down(__pa(_stext), 399da141706SLaura Abbott SECTION_SIZE); 400da141706SLaura Abbott 401da141706SLaura Abbott create_mapping(aligned_start, __phys_to_virt(aligned_start), 402da141706SLaura Abbott __pa(_stext) - aligned_start, 403da141706SLaura Abbott PAGE_KERNEL); 404da141706SLaura Abbott } 405da141706SLaura Abbott 406da141706SLaura Abbott if (!IS_ALIGNED((unsigned long)__init_end, SECTION_SIZE)) { 407da141706SLaura Abbott unsigned long aligned_end = round_up(__pa(__init_end), 408da141706SLaura Abbott SECTION_SIZE); 409da141706SLaura Abbott create_mapping(__pa(__init_end), (unsigned long)__init_end, 410da141706SLaura Abbott aligned_end - __pa(__init_end), 411da141706SLaura Abbott PAGE_KERNEL); 412da141706SLaura Abbott } 413da141706SLaura Abbott #endif 414da141706SLaura Abbott } 415da141706SLaura Abbott 416da141706SLaura Abbott #ifdef CONFIG_DEBUG_RODATA 417da141706SLaura Abbott void mark_rodata_ro(void) 418da141706SLaura Abbott { 419da141706SLaura Abbott create_mapping_late(__pa(_stext), (unsigned long)_stext, 420da141706SLaura Abbott (unsigned long)_etext - (unsigned long)_stext, 421da141706SLaura Abbott PAGE_KERNEL_EXEC | PTE_RDONLY); 422da141706SLaura Abbott 423da141706SLaura Abbott } 424da141706SLaura Abbott #endif 425da141706SLaura Abbott 426da141706SLaura Abbott void fixup_init(void) 427da141706SLaura Abbott { 428da141706SLaura Abbott create_mapping_late(__pa(__init_begin), (unsigned long)__init_begin, 429da141706SLaura Abbott (unsigned long)__init_end - (unsigned long)__init_begin, 430da141706SLaura Abbott PAGE_KERNEL); 431da141706SLaura Abbott } 432da141706SLaura Abbott 433c1cc1552SCatalin Marinas /* 434c1cc1552SCatalin Marinas * paging_init() sets up the page tables, initialises the zone memory 435c1cc1552SCatalin Marinas * maps and sets up the zero page. 436c1cc1552SCatalin Marinas */ 437c1cc1552SCatalin Marinas void __init paging_init(void) 438c1cc1552SCatalin Marinas { 439c1cc1552SCatalin Marinas void *zero_page; 440c1cc1552SCatalin Marinas 441c1cc1552SCatalin Marinas map_mem(); 442da141706SLaura Abbott fixup_executable(); 443c1cc1552SCatalin Marinas 444c1cc1552SCatalin Marinas /* allocate the zero page. */ 445c1cc1552SCatalin Marinas zero_page = early_alloc(PAGE_SIZE); 446c1cc1552SCatalin Marinas 447c1cc1552SCatalin Marinas bootmem_init(); 448c1cc1552SCatalin Marinas 449c1cc1552SCatalin Marinas empty_zero_page = virt_to_page(zero_page); 450c1cc1552SCatalin Marinas 451c1cc1552SCatalin Marinas /* 452c1cc1552SCatalin Marinas * TTBR0 is only used for the identity mapping at this stage. Make it 453c1cc1552SCatalin Marinas * point to zero page to avoid speculatively fetching new entries. 454c1cc1552SCatalin Marinas */ 455c1cc1552SCatalin Marinas cpu_set_reserved_ttbr0(); 456c1cc1552SCatalin Marinas flush_tlb_all(); 457c1cc1552SCatalin Marinas } 458c1cc1552SCatalin Marinas 459c1cc1552SCatalin Marinas /* 460c1cc1552SCatalin Marinas * Enable the identity mapping to allow the MMU disabling. 461c1cc1552SCatalin Marinas */ 462c1cc1552SCatalin Marinas void setup_mm_for_reboot(void) 463c1cc1552SCatalin Marinas { 464c1cc1552SCatalin Marinas cpu_switch_mm(idmap_pg_dir, &init_mm); 465c1cc1552SCatalin Marinas flush_tlb_all(); 466c1cc1552SCatalin Marinas } 467c1cc1552SCatalin Marinas 468c1cc1552SCatalin Marinas /* 469c1cc1552SCatalin Marinas * Check whether a kernel address is valid (derived from arch/x86/). 470c1cc1552SCatalin Marinas */ 471c1cc1552SCatalin Marinas int kern_addr_valid(unsigned long addr) 472c1cc1552SCatalin Marinas { 473c1cc1552SCatalin Marinas pgd_t *pgd; 474c1cc1552SCatalin Marinas pud_t *pud; 475c1cc1552SCatalin Marinas pmd_t *pmd; 476c1cc1552SCatalin Marinas pte_t *pte; 477c1cc1552SCatalin Marinas 478c1cc1552SCatalin Marinas if ((((long)addr) >> VA_BITS) != -1UL) 479c1cc1552SCatalin Marinas return 0; 480c1cc1552SCatalin Marinas 481c1cc1552SCatalin Marinas pgd = pgd_offset_k(addr); 482c1cc1552SCatalin Marinas if (pgd_none(*pgd)) 483c1cc1552SCatalin Marinas return 0; 484c1cc1552SCatalin Marinas 485c1cc1552SCatalin Marinas pud = pud_offset(pgd, addr); 486c1cc1552SCatalin Marinas if (pud_none(*pud)) 487c1cc1552SCatalin Marinas return 0; 488c1cc1552SCatalin Marinas 489206a2a73SSteve Capper if (pud_sect(*pud)) 490206a2a73SSteve Capper return pfn_valid(pud_pfn(*pud)); 491206a2a73SSteve Capper 492c1cc1552SCatalin Marinas pmd = pmd_offset(pud, addr); 493c1cc1552SCatalin Marinas if (pmd_none(*pmd)) 494c1cc1552SCatalin Marinas return 0; 495c1cc1552SCatalin Marinas 496da6e4cb6SDave Anderson if (pmd_sect(*pmd)) 497da6e4cb6SDave Anderson return pfn_valid(pmd_pfn(*pmd)); 498da6e4cb6SDave Anderson 499c1cc1552SCatalin Marinas pte = pte_offset_kernel(pmd, addr); 500c1cc1552SCatalin Marinas if (pte_none(*pte)) 501c1cc1552SCatalin Marinas return 0; 502c1cc1552SCatalin Marinas 503c1cc1552SCatalin Marinas return pfn_valid(pte_pfn(*pte)); 504c1cc1552SCatalin Marinas } 505c1cc1552SCatalin Marinas #ifdef CONFIG_SPARSEMEM_VMEMMAP 506c1cc1552SCatalin Marinas #ifdef CONFIG_ARM64_64K_PAGES 5070aad818bSJohannes Weiner int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node) 508c1cc1552SCatalin Marinas { 5090aad818bSJohannes Weiner return vmemmap_populate_basepages(start, end, node); 510c1cc1552SCatalin Marinas } 511c1cc1552SCatalin Marinas #else /* !CONFIG_ARM64_64K_PAGES */ 5120aad818bSJohannes Weiner int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node) 513c1cc1552SCatalin Marinas { 5140aad818bSJohannes Weiner unsigned long addr = start; 515c1cc1552SCatalin Marinas unsigned long next; 516c1cc1552SCatalin Marinas pgd_t *pgd; 517c1cc1552SCatalin Marinas pud_t *pud; 518c1cc1552SCatalin Marinas pmd_t *pmd; 519c1cc1552SCatalin Marinas 520c1cc1552SCatalin Marinas do { 521c1cc1552SCatalin Marinas next = pmd_addr_end(addr, end); 522c1cc1552SCatalin Marinas 523c1cc1552SCatalin Marinas pgd = vmemmap_pgd_populate(addr, node); 524c1cc1552SCatalin Marinas if (!pgd) 525c1cc1552SCatalin Marinas return -ENOMEM; 526c1cc1552SCatalin Marinas 527c1cc1552SCatalin Marinas pud = vmemmap_pud_populate(pgd, addr, node); 528c1cc1552SCatalin Marinas if (!pud) 529c1cc1552SCatalin Marinas return -ENOMEM; 530c1cc1552SCatalin Marinas 531c1cc1552SCatalin Marinas pmd = pmd_offset(pud, addr); 532c1cc1552SCatalin Marinas if (pmd_none(*pmd)) { 533c1cc1552SCatalin Marinas void *p = NULL; 534c1cc1552SCatalin Marinas 535c1cc1552SCatalin Marinas p = vmemmap_alloc_block_buf(PMD_SIZE, node); 536c1cc1552SCatalin Marinas if (!p) 537c1cc1552SCatalin Marinas return -ENOMEM; 538c1cc1552SCatalin Marinas 539a501e324SCatalin Marinas set_pmd(pmd, __pmd(__pa(p) | PROT_SECT_NORMAL)); 540c1cc1552SCatalin Marinas } else 541c1cc1552SCatalin Marinas vmemmap_verify((pte_t *)pmd, node, addr, next); 542c1cc1552SCatalin Marinas } while (addr = next, addr != end); 543c1cc1552SCatalin Marinas 544c1cc1552SCatalin Marinas return 0; 545c1cc1552SCatalin Marinas } 546c1cc1552SCatalin Marinas #endif /* CONFIG_ARM64_64K_PAGES */ 5470aad818bSJohannes Weiner void vmemmap_free(unsigned long start, unsigned long end) 5480197518cSTang Chen { 5490197518cSTang Chen } 550c1cc1552SCatalin Marinas #endif /* CONFIG_SPARSEMEM_VMEMMAP */ 551af86e597SLaura Abbott 552af86e597SLaura Abbott static pte_t bm_pte[PTRS_PER_PTE] __page_aligned_bss; 553af86e597SLaura Abbott #if CONFIG_ARM64_PGTABLE_LEVELS > 2 554af86e597SLaura Abbott static pmd_t bm_pmd[PTRS_PER_PMD] __page_aligned_bss; 555af86e597SLaura Abbott #endif 556af86e597SLaura Abbott #if CONFIG_ARM64_PGTABLE_LEVELS > 3 557af86e597SLaura Abbott static pud_t bm_pud[PTRS_PER_PUD] __page_aligned_bss; 558af86e597SLaura Abbott #endif 559af86e597SLaura Abbott 560af86e597SLaura Abbott static inline pud_t * fixmap_pud(unsigned long addr) 561af86e597SLaura Abbott { 562af86e597SLaura Abbott pgd_t *pgd = pgd_offset_k(addr); 563af86e597SLaura Abbott 564af86e597SLaura Abbott BUG_ON(pgd_none(*pgd) || pgd_bad(*pgd)); 565af86e597SLaura Abbott 566af86e597SLaura Abbott return pud_offset(pgd, addr); 567af86e597SLaura Abbott } 568af86e597SLaura Abbott 569af86e597SLaura Abbott static inline pmd_t * fixmap_pmd(unsigned long addr) 570af86e597SLaura Abbott { 571af86e597SLaura Abbott pud_t *pud = fixmap_pud(addr); 572af86e597SLaura Abbott 573af86e597SLaura Abbott BUG_ON(pud_none(*pud) || pud_bad(*pud)); 574af86e597SLaura Abbott 575af86e597SLaura Abbott return pmd_offset(pud, addr); 576af86e597SLaura Abbott } 577af86e597SLaura Abbott 578af86e597SLaura Abbott static inline pte_t * fixmap_pte(unsigned long addr) 579af86e597SLaura Abbott { 580af86e597SLaura Abbott pmd_t *pmd = fixmap_pmd(addr); 581af86e597SLaura Abbott 582af86e597SLaura Abbott BUG_ON(pmd_none(*pmd) || pmd_bad(*pmd)); 583af86e597SLaura Abbott 584af86e597SLaura Abbott return pte_offset_kernel(pmd, addr); 585af86e597SLaura Abbott } 586af86e597SLaura Abbott 587af86e597SLaura Abbott void __init early_fixmap_init(void) 588af86e597SLaura Abbott { 589af86e597SLaura Abbott pgd_t *pgd; 590af86e597SLaura Abbott pud_t *pud; 591af86e597SLaura Abbott pmd_t *pmd; 592af86e597SLaura Abbott unsigned long addr = FIXADDR_START; 593af86e597SLaura Abbott 594af86e597SLaura Abbott pgd = pgd_offset_k(addr); 595af86e597SLaura Abbott pgd_populate(&init_mm, pgd, bm_pud); 596af86e597SLaura Abbott pud = pud_offset(pgd, addr); 597af86e597SLaura Abbott pud_populate(&init_mm, pud, bm_pmd); 598af86e597SLaura Abbott pmd = pmd_offset(pud, addr); 599af86e597SLaura Abbott pmd_populate_kernel(&init_mm, pmd, bm_pte); 600af86e597SLaura Abbott 601af86e597SLaura Abbott /* 602af86e597SLaura Abbott * The boot-ioremap range spans multiple pmds, for which 603af86e597SLaura Abbott * we are not preparted: 604af86e597SLaura Abbott */ 605af86e597SLaura Abbott BUILD_BUG_ON((__fix_to_virt(FIX_BTMAP_BEGIN) >> PMD_SHIFT) 606af86e597SLaura Abbott != (__fix_to_virt(FIX_BTMAP_END) >> PMD_SHIFT)); 607af86e597SLaura Abbott 608af86e597SLaura Abbott if ((pmd != fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN))) 609af86e597SLaura Abbott || pmd != fixmap_pmd(fix_to_virt(FIX_BTMAP_END))) { 610af86e597SLaura Abbott WARN_ON(1); 611af86e597SLaura Abbott pr_warn("pmd %p != %p, %p\n", 612af86e597SLaura Abbott pmd, fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN)), 613af86e597SLaura Abbott fixmap_pmd(fix_to_virt(FIX_BTMAP_END))); 614af86e597SLaura Abbott pr_warn("fix_to_virt(FIX_BTMAP_BEGIN): %08lx\n", 615af86e597SLaura Abbott fix_to_virt(FIX_BTMAP_BEGIN)); 616af86e597SLaura Abbott pr_warn("fix_to_virt(FIX_BTMAP_END): %08lx\n", 617af86e597SLaura Abbott fix_to_virt(FIX_BTMAP_END)); 618af86e597SLaura Abbott 619af86e597SLaura Abbott pr_warn("FIX_BTMAP_END: %d\n", FIX_BTMAP_END); 620af86e597SLaura Abbott pr_warn("FIX_BTMAP_BEGIN: %d\n", FIX_BTMAP_BEGIN); 621af86e597SLaura Abbott } 622af86e597SLaura Abbott } 623af86e597SLaura Abbott 624af86e597SLaura Abbott void __set_fixmap(enum fixed_addresses idx, 625af86e597SLaura Abbott phys_addr_t phys, pgprot_t flags) 626af86e597SLaura Abbott { 627af86e597SLaura Abbott unsigned long addr = __fix_to_virt(idx); 628af86e597SLaura Abbott pte_t *pte; 629af86e597SLaura Abbott 630*b63dbef9SMark Rutland BUG_ON(idx <= FIX_HOLE || idx >= __end_of_fixed_addresses); 631af86e597SLaura Abbott 632af86e597SLaura Abbott pte = fixmap_pte(addr); 633af86e597SLaura Abbott 634af86e597SLaura Abbott if (pgprot_val(flags)) { 635af86e597SLaura Abbott set_pte(pte, pfn_pte(phys >> PAGE_SHIFT, flags)); 636af86e597SLaura Abbott } else { 637af86e597SLaura Abbott pte_clear(&init_mm, addr, pte); 638af86e597SLaura Abbott flush_tlb_kernel_range(addr, addr+PAGE_SIZE); 639af86e597SLaura Abbott } 640af86e597SLaura Abbott } 641