1c1cc1552SCatalin Marinas /* 2c1cc1552SCatalin Marinas * Based on arch/arm/mm/mmu.c 3c1cc1552SCatalin Marinas * 4c1cc1552SCatalin Marinas * Copyright (C) 1995-2005 Russell King 5c1cc1552SCatalin Marinas * Copyright (C) 2012 ARM Ltd. 6c1cc1552SCatalin Marinas * 7c1cc1552SCatalin Marinas * This program is free software; you can redistribute it and/or modify 8c1cc1552SCatalin Marinas * it under the terms of the GNU General Public License version 2 as 9c1cc1552SCatalin Marinas * published by the Free Software Foundation. 10c1cc1552SCatalin Marinas * 11c1cc1552SCatalin Marinas * This program is distributed in the hope that it will be useful, 12c1cc1552SCatalin Marinas * but WITHOUT ANY WARRANTY; without even the implied warranty of 13c1cc1552SCatalin Marinas * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14c1cc1552SCatalin Marinas * GNU General Public License for more details. 15c1cc1552SCatalin Marinas * 16c1cc1552SCatalin Marinas * You should have received a copy of the GNU General Public License 17c1cc1552SCatalin Marinas * along with this program. If not, see <http://www.gnu.org/licenses/>. 18c1cc1552SCatalin Marinas */ 19c1cc1552SCatalin Marinas 205a9e3e15SJisheng Zhang #include <linux/cache.h> 21c1cc1552SCatalin Marinas #include <linux/export.h> 22c1cc1552SCatalin Marinas #include <linux/kernel.h> 23c1cc1552SCatalin Marinas #include <linux/errno.h> 24c1cc1552SCatalin Marinas #include <linux/init.h> 2598d2e153STakahiro Akashi #include <linux/ioport.h> 2698d2e153STakahiro Akashi #include <linux/kexec.h> 2761bd93ceSArd Biesheuvel #include <linux/libfdt.h> 28c1cc1552SCatalin Marinas #include <linux/mman.h> 29c1cc1552SCatalin Marinas #include <linux/nodemask.h> 30c1cc1552SCatalin Marinas #include <linux/memblock.h> 31c1cc1552SCatalin Marinas #include <linux/fs.h> 322475ff9dSCatalin Marinas #include <linux/io.h> 332077be67SLaura Abbott #include <linux/mm.h> 346efd8499STobias Klauser #include <linux/vmalloc.h> 35c1cc1552SCatalin Marinas 3621ab99c2SMark Rutland #include <asm/barrier.h> 37c1cc1552SCatalin Marinas #include <asm/cputype.h> 38af86e597SLaura Abbott #include <asm/fixmap.h> 39068a17a5SMark Rutland #include <asm/kasan.h> 40b433dce0SSuzuki K. Poulose #include <asm/kernel-pgtable.h> 41c1cc1552SCatalin Marinas #include <asm/sections.h> 42c1cc1552SCatalin Marinas #include <asm/setup.h> 4387dfb311SMasahiro Yamada #include <linux/sizes.h> 44c1cc1552SCatalin Marinas #include <asm/tlb.h> 45c1cc1552SCatalin Marinas #include <asm/mmu_context.h> 461404d6f1SLaura Abbott #include <asm/ptdump.h> 47ec28bb9cSChintan Pandya #include <asm/tlbflush.h> 48c1cc1552SCatalin Marinas 49c0951366SArd Biesheuvel #define NO_BLOCK_MAPPINGS BIT(0) 50d27cfa1fSArd Biesheuvel #define NO_CONT_MAPPINGS BIT(1) 51c0951366SArd Biesheuvel 52dd006da2SArd Biesheuvel u64 idmap_t0sz = TCR_T0SZ(VA_BITS); 53fa2a8445SKristina Martsenko u64 idmap_ptrs_per_pgd = PTRS_PER_PGD; 5467e7fdfcSSteve Capper u64 vabits_user __ro_after_init; 554a1daf29SWill Deacon EXPORT_SYMBOL(vabits_user); 56dd006da2SArd Biesheuvel 575a9e3e15SJisheng Zhang u64 kimage_voffset __ro_after_init; 58a7f8de16SArd Biesheuvel EXPORT_SYMBOL(kimage_voffset); 59a7f8de16SArd Biesheuvel 60c1cc1552SCatalin Marinas /* 61c1cc1552SCatalin Marinas * Empty_zero_page is a special page that is used for zero-initialized data 62c1cc1552SCatalin Marinas * and COW. 63c1cc1552SCatalin Marinas */ 645227cfa7SMark Rutland unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)] __page_aligned_bss; 65c1cc1552SCatalin Marinas EXPORT_SYMBOL(empty_zero_page); 66c1cc1552SCatalin Marinas 67f9040773SArd Biesheuvel static pte_t bm_pte[PTRS_PER_PTE] __page_aligned_bss; 68f9040773SArd Biesheuvel static pmd_t bm_pmd[PTRS_PER_PMD] __page_aligned_bss __maybe_unused; 69f9040773SArd Biesheuvel static pud_t bm_pud[PTRS_PER_PUD] __page_aligned_bss __maybe_unused; 70f9040773SArd Biesheuvel 712330b7caSJun Yao static DEFINE_SPINLOCK(swapper_pgdir_lock); 722330b7caSJun Yao 732330b7caSJun Yao void set_swapper_pgd(pgd_t *pgdp, pgd_t pgd) 742330b7caSJun Yao { 752330b7caSJun Yao pgd_t *fixmap_pgdp; 762330b7caSJun Yao 772330b7caSJun Yao spin_lock(&swapper_pgdir_lock); 7826a6f87eSJames Morse fixmap_pgdp = pgd_set_fixmap(__pa_symbol(pgdp)); 792330b7caSJun Yao WRITE_ONCE(*fixmap_pgdp, pgd); 802330b7caSJun Yao /* 812330b7caSJun Yao * We need dsb(ishst) here to ensure the page-table-walker sees 822330b7caSJun Yao * our new entry before set_p?d() returns. The fixmap's 832330b7caSJun Yao * flush_tlb_kernel_range() via clear_fixmap() does this for us. 842330b7caSJun Yao */ 852330b7caSJun Yao pgd_clear_fixmap(); 862330b7caSJun Yao spin_unlock(&swapper_pgdir_lock); 872330b7caSJun Yao } 882330b7caSJun Yao 89c1cc1552SCatalin Marinas pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, 90c1cc1552SCatalin Marinas unsigned long size, pgprot_t vma_prot) 91c1cc1552SCatalin Marinas { 92c1cc1552SCatalin Marinas if (!pfn_valid(pfn)) 93c1cc1552SCatalin Marinas return pgprot_noncached(vma_prot); 94c1cc1552SCatalin Marinas else if (file->f_flags & O_SYNC) 95c1cc1552SCatalin Marinas return pgprot_writecombine(vma_prot); 96c1cc1552SCatalin Marinas return vma_prot; 97c1cc1552SCatalin Marinas } 98c1cc1552SCatalin Marinas EXPORT_SYMBOL(phys_mem_access_prot); 99c1cc1552SCatalin Marinas 10090292acaSYu Zhao static phys_addr_t __init early_pgtable_alloc(int shift) 101c1cc1552SCatalin Marinas { 1027142392dSSuzuki K. Poulose phys_addr_t phys; 1037142392dSSuzuki K. Poulose void *ptr; 1047142392dSSuzuki K. Poulose 1059a8dd708SMike Rapoport phys = memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE); 106ecc3e771SMike Rapoport if (!phys) 107ecc3e771SMike Rapoport panic("Failed to allocate page table page\n"); 108f4710445SMark Rutland 109f4710445SMark Rutland /* 110f4710445SMark Rutland * The FIX_{PGD,PUD,PMD} slots may be in active use, but the FIX_PTE 111f4710445SMark Rutland * slot will be free, so we can (ab)use the FIX_PTE slot to initialise 112f4710445SMark Rutland * any level of table. 113f4710445SMark Rutland */ 114f4710445SMark Rutland ptr = pte_set_fixmap(phys); 115f4710445SMark Rutland 11621ab99c2SMark Rutland memset(ptr, 0, PAGE_SIZE); 11721ab99c2SMark Rutland 118f4710445SMark Rutland /* 119f4710445SMark Rutland * Implicit barriers also ensure the zeroed page is visible to the page 120f4710445SMark Rutland * table walker 121f4710445SMark Rutland */ 122f4710445SMark Rutland pte_clear_fixmap(); 123f4710445SMark Rutland 124f4710445SMark Rutland return phys; 125c1cc1552SCatalin Marinas } 126c1cc1552SCatalin Marinas 127e98216b5SArd Biesheuvel static bool pgattr_change_is_safe(u64 old, u64 new) 128e98216b5SArd Biesheuvel { 129e98216b5SArd Biesheuvel /* 130e98216b5SArd Biesheuvel * The following mapping attributes may be updated in live 131e98216b5SArd Biesheuvel * kernel mappings without the need for break-before-make. 132e98216b5SArd Biesheuvel */ 133753e8abcSArd Biesheuvel static const pteval_t mask = PTE_PXN | PTE_RDONLY | PTE_WRITE | PTE_NG; 134e98216b5SArd Biesheuvel 135141d1497SArd Biesheuvel /* creating or taking down mappings is always safe */ 136141d1497SArd Biesheuvel if (old == 0 || new == 0) 137141d1497SArd Biesheuvel return true; 138141d1497SArd Biesheuvel 139141d1497SArd Biesheuvel /* live contiguous mappings may not be manipulated at all */ 140141d1497SArd Biesheuvel if ((old | new) & PTE_CONT) 141141d1497SArd Biesheuvel return false; 142141d1497SArd Biesheuvel 143753e8abcSArd Biesheuvel /* Transitioning from Non-Global to Global is unsafe */ 144753e8abcSArd Biesheuvel if (old & ~new & PTE_NG) 145753e8abcSArd Biesheuvel return false; 1464e602056SWill Deacon 147141d1497SArd Biesheuvel return ((old ^ new) & ~mask) == 0; 148e98216b5SArd Biesheuvel } 149e98216b5SArd Biesheuvel 15020a004e7SWill Deacon static void init_pte(pmd_t *pmdp, unsigned long addr, unsigned long end, 151d27cfa1fSArd Biesheuvel phys_addr_t phys, pgprot_t prot) 152c1cc1552SCatalin Marinas { 15320a004e7SWill Deacon pte_t *ptep; 154c1cc1552SCatalin Marinas 15520a004e7SWill Deacon ptep = pte_set_fixmap_offset(pmdp, addr); 156c1cc1552SCatalin Marinas do { 15720a004e7SWill Deacon pte_t old_pte = READ_ONCE(*ptep); 158e98216b5SArd Biesheuvel 15920a004e7SWill Deacon set_pte(ptep, pfn_pte(__phys_to_pfn(phys), prot)); 160e98216b5SArd Biesheuvel 161e98216b5SArd Biesheuvel /* 162e98216b5SArd Biesheuvel * After the PTE entry has been populated once, we 163e98216b5SArd Biesheuvel * only allow updates to the permission attributes. 164e98216b5SArd Biesheuvel */ 16520a004e7SWill Deacon BUG_ON(!pgattr_change_is_safe(pte_val(old_pte), 16620a004e7SWill Deacon READ_ONCE(pte_val(*ptep)))); 167e98216b5SArd Biesheuvel 168e393cf40SArd Biesheuvel phys += PAGE_SIZE; 16920a004e7SWill Deacon } while (ptep++, addr += PAGE_SIZE, addr != end); 170f4710445SMark Rutland 171f4710445SMark Rutland pte_clear_fixmap(); 172c1cc1552SCatalin Marinas } 173c1cc1552SCatalin Marinas 17420a004e7SWill Deacon static void alloc_init_cont_pte(pmd_t *pmdp, unsigned long addr, 175d27cfa1fSArd Biesheuvel unsigned long end, phys_addr_t phys, 176d27cfa1fSArd Biesheuvel pgprot_t prot, 17790292acaSYu Zhao phys_addr_t (*pgtable_alloc)(int), 178c0951366SArd Biesheuvel int flags) 179c1cc1552SCatalin Marinas { 180c1cc1552SCatalin Marinas unsigned long next; 18120a004e7SWill Deacon pmd_t pmd = READ_ONCE(*pmdp); 182c1cc1552SCatalin Marinas 18320a004e7SWill Deacon BUG_ON(pmd_sect(pmd)); 18420a004e7SWill Deacon if (pmd_none(pmd)) { 185d27cfa1fSArd Biesheuvel phys_addr_t pte_phys; 186132233a7SLaura Abbott BUG_ON(!pgtable_alloc); 18790292acaSYu Zhao pte_phys = pgtable_alloc(PAGE_SHIFT); 18820a004e7SWill Deacon __pmd_populate(pmdp, pte_phys, PMD_TYPE_TABLE); 18920a004e7SWill Deacon pmd = READ_ONCE(*pmdp); 190c1cc1552SCatalin Marinas } 19120a004e7SWill Deacon BUG_ON(pmd_bad(pmd)); 192d27cfa1fSArd Biesheuvel 193d27cfa1fSArd Biesheuvel do { 194d27cfa1fSArd Biesheuvel pgprot_t __prot = prot; 195d27cfa1fSArd Biesheuvel 196d27cfa1fSArd Biesheuvel next = pte_cont_addr_end(addr, end); 197d27cfa1fSArd Biesheuvel 198d27cfa1fSArd Biesheuvel /* use a contiguous mapping if the range is suitably aligned */ 199d27cfa1fSArd Biesheuvel if ((((addr | next | phys) & ~CONT_PTE_MASK) == 0) && 200d27cfa1fSArd Biesheuvel (flags & NO_CONT_MAPPINGS) == 0) 201d27cfa1fSArd Biesheuvel __prot = __pgprot(pgprot_val(prot) | PTE_CONT); 202d27cfa1fSArd Biesheuvel 20320a004e7SWill Deacon init_pte(pmdp, addr, next, phys, __prot); 204d27cfa1fSArd Biesheuvel 205d27cfa1fSArd Biesheuvel phys += next - addr; 206d27cfa1fSArd Biesheuvel } while (addr = next, addr != end); 207d27cfa1fSArd Biesheuvel } 208d27cfa1fSArd Biesheuvel 20920a004e7SWill Deacon static void init_pmd(pud_t *pudp, unsigned long addr, unsigned long end, 210d27cfa1fSArd Biesheuvel phys_addr_t phys, pgprot_t prot, 21190292acaSYu Zhao phys_addr_t (*pgtable_alloc)(int), int flags) 212d27cfa1fSArd Biesheuvel { 213d27cfa1fSArd Biesheuvel unsigned long next; 21420a004e7SWill Deacon pmd_t *pmdp; 215c1cc1552SCatalin Marinas 21620a004e7SWill Deacon pmdp = pmd_set_fixmap_offset(pudp, addr); 217c1cc1552SCatalin Marinas do { 21820a004e7SWill Deacon pmd_t old_pmd = READ_ONCE(*pmdp); 219e98216b5SArd Biesheuvel 220c1cc1552SCatalin Marinas next = pmd_addr_end(addr, end); 221e98216b5SArd Biesheuvel 222c1cc1552SCatalin Marinas /* try section mapping first */ 22383863f25SLaura Abbott if (((addr | next | phys) & ~SECTION_MASK) == 0 && 224c0951366SArd Biesheuvel (flags & NO_BLOCK_MAPPINGS) == 0) { 22520a004e7SWill Deacon pmd_set_huge(pmdp, phys, prot); 226e98216b5SArd Biesheuvel 227a55f9929SCatalin Marinas /* 228e98216b5SArd Biesheuvel * After the PMD entry has been populated once, we 229e98216b5SArd Biesheuvel * only allow updates to the permission attributes. 230a55f9929SCatalin Marinas */ 231e98216b5SArd Biesheuvel BUG_ON(!pgattr_change_is_safe(pmd_val(old_pmd), 23220a004e7SWill Deacon READ_ONCE(pmd_val(*pmdp)))); 233a55f9929SCatalin Marinas } else { 23420a004e7SWill Deacon alloc_init_cont_pte(pmdp, addr, next, phys, prot, 235d27cfa1fSArd Biesheuvel pgtable_alloc, flags); 236e98216b5SArd Biesheuvel 237e98216b5SArd Biesheuvel BUG_ON(pmd_val(old_pmd) != 0 && 23820a004e7SWill Deacon pmd_val(old_pmd) != READ_ONCE(pmd_val(*pmdp))); 239a55f9929SCatalin Marinas } 240c1cc1552SCatalin Marinas phys += next - addr; 24120a004e7SWill Deacon } while (pmdp++, addr = next, addr != end); 242f4710445SMark Rutland 243f4710445SMark Rutland pmd_clear_fixmap(); 244c1cc1552SCatalin Marinas } 245c1cc1552SCatalin Marinas 24620a004e7SWill Deacon static void alloc_init_cont_pmd(pud_t *pudp, unsigned long addr, 247d27cfa1fSArd Biesheuvel unsigned long end, phys_addr_t phys, 248d27cfa1fSArd Biesheuvel pgprot_t prot, 24990292acaSYu Zhao phys_addr_t (*pgtable_alloc)(int), int flags) 250d27cfa1fSArd Biesheuvel { 251d27cfa1fSArd Biesheuvel unsigned long next; 25220a004e7SWill Deacon pud_t pud = READ_ONCE(*pudp); 253d27cfa1fSArd Biesheuvel 254d27cfa1fSArd Biesheuvel /* 255d27cfa1fSArd Biesheuvel * Check for initial section mappings in the pgd/pud. 256d27cfa1fSArd Biesheuvel */ 25720a004e7SWill Deacon BUG_ON(pud_sect(pud)); 25820a004e7SWill Deacon if (pud_none(pud)) { 259d27cfa1fSArd Biesheuvel phys_addr_t pmd_phys; 260d27cfa1fSArd Biesheuvel BUG_ON(!pgtable_alloc); 26190292acaSYu Zhao pmd_phys = pgtable_alloc(PMD_SHIFT); 26220a004e7SWill Deacon __pud_populate(pudp, pmd_phys, PUD_TYPE_TABLE); 26320a004e7SWill Deacon pud = READ_ONCE(*pudp); 264d27cfa1fSArd Biesheuvel } 26520a004e7SWill Deacon BUG_ON(pud_bad(pud)); 266d27cfa1fSArd Biesheuvel 267d27cfa1fSArd Biesheuvel do { 268d27cfa1fSArd Biesheuvel pgprot_t __prot = prot; 269d27cfa1fSArd Biesheuvel 270d27cfa1fSArd Biesheuvel next = pmd_cont_addr_end(addr, end); 271d27cfa1fSArd Biesheuvel 272d27cfa1fSArd Biesheuvel /* use a contiguous mapping if the range is suitably aligned */ 273d27cfa1fSArd Biesheuvel if ((((addr | next | phys) & ~CONT_PMD_MASK) == 0) && 274d27cfa1fSArd Biesheuvel (flags & NO_CONT_MAPPINGS) == 0) 275d27cfa1fSArd Biesheuvel __prot = __pgprot(pgprot_val(prot) | PTE_CONT); 276d27cfa1fSArd Biesheuvel 27720a004e7SWill Deacon init_pmd(pudp, addr, next, phys, __prot, pgtable_alloc, flags); 278d27cfa1fSArd Biesheuvel 279d27cfa1fSArd Biesheuvel phys += next - addr; 280d27cfa1fSArd Biesheuvel } while (addr = next, addr != end); 281d27cfa1fSArd Biesheuvel } 282d27cfa1fSArd Biesheuvel 283da141706SLaura Abbott static inline bool use_1G_block(unsigned long addr, unsigned long next, 284da141706SLaura Abbott unsigned long phys) 285da141706SLaura Abbott { 286da141706SLaura Abbott if (PAGE_SHIFT != 12) 287da141706SLaura Abbott return false; 288da141706SLaura Abbott 289da141706SLaura Abbott if (((addr | next | phys) & ~PUD_MASK) != 0) 290da141706SLaura Abbott return false; 291da141706SLaura Abbott 292da141706SLaura Abbott return true; 293da141706SLaura Abbott } 294da141706SLaura Abbott 29520a004e7SWill Deacon static void alloc_init_pud(pgd_t *pgdp, unsigned long addr, unsigned long end, 296da141706SLaura Abbott phys_addr_t phys, pgprot_t prot, 29790292acaSYu Zhao phys_addr_t (*pgtable_alloc)(int), 298c0951366SArd Biesheuvel int flags) 299c1cc1552SCatalin Marinas { 300c1cc1552SCatalin Marinas unsigned long next; 30120a004e7SWill Deacon pud_t *pudp; 30220a004e7SWill Deacon pgd_t pgd = READ_ONCE(*pgdp); 303c1cc1552SCatalin Marinas 30420a004e7SWill Deacon if (pgd_none(pgd)) { 305132233a7SLaura Abbott phys_addr_t pud_phys; 306132233a7SLaura Abbott BUG_ON(!pgtable_alloc); 30790292acaSYu Zhao pud_phys = pgtable_alloc(PUD_SHIFT); 30820a004e7SWill Deacon __pgd_populate(pgdp, pud_phys, PUD_TYPE_TABLE); 30920a004e7SWill Deacon pgd = READ_ONCE(*pgdp); 310c79b954bSJungseok Lee } 31120a004e7SWill Deacon BUG_ON(pgd_bad(pgd)); 312c79b954bSJungseok Lee 31320a004e7SWill Deacon pudp = pud_set_fixmap_offset(pgdp, addr); 314c1cc1552SCatalin Marinas do { 31520a004e7SWill Deacon pud_t old_pud = READ_ONCE(*pudp); 316e98216b5SArd Biesheuvel 317c1cc1552SCatalin Marinas next = pud_addr_end(addr, end); 318206a2a73SSteve Capper 319206a2a73SSteve Capper /* 320206a2a73SSteve Capper * For 4K granule only, attempt to put down a 1GB block 321206a2a73SSteve Capper */ 322c0951366SArd Biesheuvel if (use_1G_block(addr, next, phys) && 323c0951366SArd Biesheuvel (flags & NO_BLOCK_MAPPINGS) == 0) { 32420a004e7SWill Deacon pud_set_huge(pudp, phys, prot); 325206a2a73SSteve Capper 326206a2a73SSteve Capper /* 327e98216b5SArd Biesheuvel * After the PUD entry has been populated once, we 328e98216b5SArd Biesheuvel * only allow updates to the permission attributes. 329206a2a73SSteve Capper */ 330e98216b5SArd Biesheuvel BUG_ON(!pgattr_change_is_safe(pud_val(old_pud), 33120a004e7SWill Deacon READ_ONCE(pud_val(*pudp)))); 332206a2a73SSteve Capper } else { 33320a004e7SWill Deacon alloc_init_cont_pmd(pudp, addr, next, phys, prot, 334c0951366SArd Biesheuvel pgtable_alloc, flags); 335e98216b5SArd Biesheuvel 336e98216b5SArd Biesheuvel BUG_ON(pud_val(old_pud) != 0 && 33720a004e7SWill Deacon pud_val(old_pud) != READ_ONCE(pud_val(*pudp))); 338206a2a73SSteve Capper } 339c1cc1552SCatalin Marinas phys += next - addr; 34020a004e7SWill Deacon } while (pudp++, addr = next, addr != end); 341f4710445SMark Rutland 342f4710445SMark Rutland pud_clear_fixmap(); 343c1cc1552SCatalin Marinas } 344c1cc1552SCatalin Marinas 34540f87d31SArd Biesheuvel static void __create_pgd_mapping(pgd_t *pgdir, phys_addr_t phys, 34640f87d31SArd Biesheuvel unsigned long virt, phys_addr_t size, 34740f87d31SArd Biesheuvel pgprot_t prot, 34890292acaSYu Zhao phys_addr_t (*pgtable_alloc)(int), 349c0951366SArd Biesheuvel int flags) 350c1cc1552SCatalin Marinas { 351c1cc1552SCatalin Marinas unsigned long addr, length, end, next; 35220a004e7SWill Deacon pgd_t *pgdp = pgd_offset_raw(pgdir, virt); 353c1cc1552SCatalin Marinas 354cc5d2b3bSMark Rutland /* 355cc5d2b3bSMark Rutland * If the virtual and physical address don't have the same offset 356cc5d2b3bSMark Rutland * within a page, we cannot map the region as the caller expects. 357cc5d2b3bSMark Rutland */ 358cc5d2b3bSMark Rutland if (WARN_ON((phys ^ virt) & ~PAGE_MASK)) 359cc5d2b3bSMark Rutland return; 360cc5d2b3bSMark Rutland 3619c4e08a3SMark Rutland phys &= PAGE_MASK; 362c1cc1552SCatalin Marinas addr = virt & PAGE_MASK; 363c1cc1552SCatalin Marinas length = PAGE_ALIGN(size + (virt & ~PAGE_MASK)); 364c1cc1552SCatalin Marinas 365c1cc1552SCatalin Marinas end = addr + length; 366c1cc1552SCatalin Marinas do { 367c1cc1552SCatalin Marinas next = pgd_addr_end(addr, end); 36820a004e7SWill Deacon alloc_init_pud(pgdp, addr, next, phys, prot, pgtable_alloc, 369c0951366SArd Biesheuvel flags); 370c1cc1552SCatalin Marinas phys += next - addr; 37120a004e7SWill Deacon } while (pgdp++, addr = next, addr != end); 372c1cc1552SCatalin Marinas } 373c1cc1552SCatalin Marinas 374475ba3fcSWill Deacon static phys_addr_t __pgd_pgtable_alloc(int shift) 375369aaab8SYu Zhao { 376369aaab8SYu Zhao void *ptr = (void *)__get_free_page(PGALLOC_GFP); 377369aaab8SYu Zhao BUG_ON(!ptr); 378369aaab8SYu Zhao 379369aaab8SYu Zhao /* Ensure the zeroed page is visible to the page table walker */ 380369aaab8SYu Zhao dsb(ishst); 381369aaab8SYu Zhao return __pa(ptr); 382369aaab8SYu Zhao } 383369aaab8SYu Zhao 38490292acaSYu Zhao static phys_addr_t pgd_pgtable_alloc(int shift) 385da141706SLaura Abbott { 386475ba3fcSWill Deacon phys_addr_t pa = __pgd_pgtable_alloc(shift); 38790292acaSYu Zhao 38890292acaSYu Zhao /* 38990292acaSYu Zhao * Call proper page table ctor in case later we need to 39090292acaSYu Zhao * call core mm functions like apply_to_page_range() on 39190292acaSYu Zhao * this pre-allocated page table. 39290292acaSYu Zhao * 39390292acaSYu Zhao * We don't select ARCH_ENABLE_SPLIT_PMD_PTLOCK if pmd is 39490292acaSYu Zhao * folded, and if so pgtable_pmd_page_ctor() becomes nop. 39590292acaSYu Zhao */ 39690292acaSYu Zhao if (shift == PAGE_SHIFT) 397475ba3fcSWill Deacon BUG_ON(!pgtable_page_ctor(phys_to_page(pa))); 39890292acaSYu Zhao else if (shift == PMD_SHIFT) 399475ba3fcSWill Deacon BUG_ON(!pgtable_pmd_page_ctor(phys_to_page(pa))); 40021ab99c2SMark Rutland 401475ba3fcSWill Deacon return pa; 402da141706SLaura Abbott } 403da141706SLaura Abbott 404132233a7SLaura Abbott /* 405132233a7SLaura Abbott * This function can only be used to modify existing table entries, 406132233a7SLaura Abbott * without allocating new levels of table. Note that this permits the 407132233a7SLaura Abbott * creation of new section or page entries. 408132233a7SLaura Abbott */ 409132233a7SLaura Abbott static void __init create_mapping_noalloc(phys_addr_t phys, unsigned long virt, 410da141706SLaura Abbott phys_addr_t size, pgprot_t prot) 411d7ecbddfSMark Salter { 412d7ecbddfSMark Salter if (virt < VMALLOC_START) { 413d7ecbddfSMark Salter pr_warn("BUG: not creating mapping for %pa at 0x%016lx - outside kernel range\n", 414d7ecbddfSMark Salter &phys, virt); 415d7ecbddfSMark Salter return; 416d7ecbddfSMark Salter } 417d27cfa1fSArd Biesheuvel __create_pgd_mapping(init_mm.pgd, phys, virt, size, prot, NULL, 418d27cfa1fSArd Biesheuvel NO_CONT_MAPPINGS); 419d7ecbddfSMark Salter } 420d7ecbddfSMark Salter 4218ce837ceSArd Biesheuvel void __init create_pgd_mapping(struct mm_struct *mm, phys_addr_t phys, 4228ce837ceSArd Biesheuvel unsigned long virt, phys_addr_t size, 423f14c66ceSArd Biesheuvel pgprot_t prot, bool page_mappings_only) 4248ce837ceSArd Biesheuvel { 425c0951366SArd Biesheuvel int flags = 0; 426c0951366SArd Biesheuvel 4271378dc3dSArd Biesheuvel BUG_ON(mm == &init_mm); 4281378dc3dSArd Biesheuvel 429c0951366SArd Biesheuvel if (page_mappings_only) 430d27cfa1fSArd Biesheuvel flags = NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS; 431c0951366SArd Biesheuvel 43211509a30SMark Rutland __create_pgd_mapping(mm->pgd, phys, virt, size, prot, 433c0951366SArd Biesheuvel pgd_pgtable_alloc, flags); 434d7ecbddfSMark Salter } 435d7ecbddfSMark Salter 436aa8c09beSArd Biesheuvel static void update_mapping_prot(phys_addr_t phys, unsigned long virt, 437da141706SLaura Abbott phys_addr_t size, pgprot_t prot) 438da141706SLaura Abbott { 439da141706SLaura Abbott if (virt < VMALLOC_START) { 440aa8c09beSArd Biesheuvel pr_warn("BUG: not updating mapping for %pa at 0x%016lx - outside kernel range\n", 441da141706SLaura Abbott &phys, virt); 442da141706SLaura Abbott return; 443da141706SLaura Abbott } 444da141706SLaura Abbott 445d27cfa1fSArd Biesheuvel __create_pgd_mapping(init_mm.pgd, phys, virt, size, prot, NULL, 446d27cfa1fSArd Biesheuvel NO_CONT_MAPPINGS); 447aa8c09beSArd Biesheuvel 448aa8c09beSArd Biesheuvel /* flush the TLBs after updating live kernel mappings */ 449aa8c09beSArd Biesheuvel flush_tlb_kernel_range(virt, virt + size); 450da141706SLaura Abbott } 451da141706SLaura Abbott 45220a004e7SWill Deacon static void __init __map_memblock(pgd_t *pgdp, phys_addr_t start, 45398d2e153STakahiro Akashi phys_addr_t end, pgprot_t prot, int flags) 454da141706SLaura Abbott { 45520a004e7SWill Deacon __create_pgd_mapping(pgdp, start, __phys_to_virt(start), end - start, 45698d2e153STakahiro Akashi prot, early_pgtable_alloc, flags); 457da141706SLaura Abbott } 458da141706SLaura Abbott 4595ea5306cSArd Biesheuvel void __init mark_linear_text_alias_ro(void) 4605ea5306cSArd Biesheuvel { 4615ea5306cSArd Biesheuvel /* 4625ea5306cSArd Biesheuvel * Remove the write permissions from the linear alias of .text/.rodata 4635ea5306cSArd Biesheuvel */ 4645ea5306cSArd Biesheuvel update_mapping_prot(__pa_symbol(_text), (unsigned long)lm_alias(_text), 4655ea5306cSArd Biesheuvel (unsigned long)__init_begin - (unsigned long)_text, 4665ea5306cSArd Biesheuvel PAGE_KERNEL_RO); 4675ea5306cSArd Biesheuvel } 4685ea5306cSArd Biesheuvel 46920a004e7SWill Deacon static void __init map_mem(pgd_t *pgdp) 470c1cc1552SCatalin Marinas { 47198d2e153STakahiro Akashi phys_addr_t kernel_start = __pa_symbol(_text); 47298d2e153STakahiro Akashi phys_addr_t kernel_end = __pa_symbol(__init_begin); 473c1cc1552SCatalin Marinas struct memblock_region *reg; 47498d2e153STakahiro Akashi int flags = 0; 47598d2e153STakahiro Akashi 476c55191e9SArd Biesheuvel if (rodata_full || debug_pagealloc_enabled()) 47798d2e153STakahiro Akashi flags = NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS; 47898d2e153STakahiro Akashi 47998d2e153STakahiro Akashi /* 48098d2e153STakahiro Akashi * Take care not to create a writable alias for the 48198d2e153STakahiro Akashi * read-only text and rodata sections of the kernel image. 48298d2e153STakahiro Akashi * So temporarily mark them as NOMAP to skip mappings in 48398d2e153STakahiro Akashi * the following for-loop 48498d2e153STakahiro Akashi */ 48598d2e153STakahiro Akashi memblock_mark_nomap(kernel_start, kernel_end - kernel_start); 48698d2e153STakahiro Akashi #ifdef CONFIG_KEXEC_CORE 48798d2e153STakahiro Akashi if (crashk_res.end) 48898d2e153STakahiro Akashi memblock_mark_nomap(crashk_res.start, 48998d2e153STakahiro Akashi resource_size(&crashk_res)); 49098d2e153STakahiro Akashi #endif 491f6bc87c3SSteve Capper 492c1cc1552SCatalin Marinas /* map all the memory banks */ 493c1cc1552SCatalin Marinas for_each_memblock(memory, reg) { 494c1cc1552SCatalin Marinas phys_addr_t start = reg->base; 495c1cc1552SCatalin Marinas phys_addr_t end = start + reg->size; 496c1cc1552SCatalin Marinas 497c1cc1552SCatalin Marinas if (start >= end) 498c1cc1552SCatalin Marinas break; 49968709f45SArd Biesheuvel if (memblock_is_nomap(reg)) 50068709f45SArd Biesheuvel continue; 501c1cc1552SCatalin Marinas 50220a004e7SWill Deacon __map_memblock(pgdp, start, end, PAGE_KERNEL, flags); 503c1cc1552SCatalin Marinas } 50498d2e153STakahiro Akashi 50598d2e153STakahiro Akashi /* 50698d2e153STakahiro Akashi * Map the linear alias of the [_text, __init_begin) interval 50798d2e153STakahiro Akashi * as non-executable now, and remove the write permission in 50898d2e153STakahiro Akashi * mark_linear_text_alias_ro() below (which will be called after 50998d2e153STakahiro Akashi * alternative patching has completed). This makes the contents 51098d2e153STakahiro Akashi * of the region accessible to subsystems such as hibernate, 51198d2e153STakahiro Akashi * but protects it from inadvertent modification or execution. 51298d2e153STakahiro Akashi * Note that contiguous mappings cannot be remapped in this way, 51398d2e153STakahiro Akashi * so we should avoid them here. 51498d2e153STakahiro Akashi */ 51520a004e7SWill Deacon __map_memblock(pgdp, kernel_start, kernel_end, 51698d2e153STakahiro Akashi PAGE_KERNEL, NO_CONT_MAPPINGS); 51798d2e153STakahiro Akashi memblock_clear_nomap(kernel_start, kernel_end - kernel_start); 51898d2e153STakahiro Akashi 51998d2e153STakahiro Akashi #ifdef CONFIG_KEXEC_CORE 52098d2e153STakahiro Akashi /* 52198d2e153STakahiro Akashi * Use page-level mappings here so that we can shrink the region 52298d2e153STakahiro Akashi * in page granularity and put back unused memory to buddy system 52398d2e153STakahiro Akashi * through /sys/kernel/kexec_crash_size interface. 52498d2e153STakahiro Akashi */ 52598d2e153STakahiro Akashi if (crashk_res.end) { 52620a004e7SWill Deacon __map_memblock(pgdp, crashk_res.start, crashk_res.end + 1, 52798d2e153STakahiro Akashi PAGE_KERNEL, 52898d2e153STakahiro Akashi NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS); 52998d2e153STakahiro Akashi memblock_clear_nomap(crashk_res.start, 53098d2e153STakahiro Akashi resource_size(&crashk_res)); 53198d2e153STakahiro Akashi } 53298d2e153STakahiro Akashi #endif 533c1cc1552SCatalin Marinas } 534c1cc1552SCatalin Marinas 535da141706SLaura Abbott void mark_rodata_ro(void) 536da141706SLaura Abbott { 5372f39b5f9SJeremy Linton unsigned long section_size; 538f9040773SArd Biesheuvel 5392f39b5f9SJeremy Linton /* 5409fdc14c5SArd Biesheuvel * mark .rodata as read only. Use __init_begin rather than __end_rodata 5419fdc14c5SArd Biesheuvel * to cover NOTES and EXCEPTION_TABLE. 5422f39b5f9SJeremy Linton */ 5439fdc14c5SArd Biesheuvel section_size = (unsigned long)__init_begin - (unsigned long)__start_rodata; 544aa8c09beSArd Biesheuvel update_mapping_prot(__pa_symbol(__start_rodata), (unsigned long)__start_rodata, 5452f39b5f9SJeremy Linton section_size, PAGE_KERNEL_RO); 546e98216b5SArd Biesheuvel 5471404d6f1SLaura Abbott debug_checkwx(); 548da141706SLaura Abbott } 549da141706SLaura Abbott 55020a004e7SWill Deacon static void __init map_kernel_segment(pgd_t *pgdp, void *va_start, void *va_end, 551d27cfa1fSArd Biesheuvel pgprot_t prot, struct vm_struct *vma, 55292bbd16eSWill Deacon int flags, unsigned long vm_flags) 553068a17a5SMark Rutland { 5542077be67SLaura Abbott phys_addr_t pa_start = __pa_symbol(va_start); 555068a17a5SMark Rutland unsigned long size = va_end - va_start; 556068a17a5SMark Rutland 557068a17a5SMark Rutland BUG_ON(!PAGE_ALIGNED(pa_start)); 558068a17a5SMark Rutland BUG_ON(!PAGE_ALIGNED(size)); 559068a17a5SMark Rutland 56020a004e7SWill Deacon __create_pgd_mapping(pgdp, pa_start, (unsigned long)va_start, size, prot, 561d27cfa1fSArd Biesheuvel early_pgtable_alloc, flags); 562f9040773SArd Biesheuvel 56392bbd16eSWill Deacon if (!(vm_flags & VM_NO_GUARD)) 56492bbd16eSWill Deacon size += PAGE_SIZE; 56592bbd16eSWill Deacon 566f9040773SArd Biesheuvel vma->addr = va_start; 567f9040773SArd Biesheuvel vma->phys_addr = pa_start; 568f9040773SArd Biesheuvel vma->size = size; 56992bbd16eSWill Deacon vma->flags = VM_MAP | vm_flags; 570f9040773SArd Biesheuvel vma->caller = __builtin_return_address(0); 571f9040773SArd Biesheuvel 572f9040773SArd Biesheuvel vm_area_add_early(vma); 573068a17a5SMark Rutland } 574068a17a5SMark Rutland 57528b066daSArd Biesheuvel static int __init parse_rodata(char *arg) 57628b066daSArd Biesheuvel { 577c55191e9SArd Biesheuvel int ret = strtobool(arg, &rodata_enabled); 578c55191e9SArd Biesheuvel if (!ret) { 579c55191e9SArd Biesheuvel rodata_full = false; 580c55191e9SArd Biesheuvel return 0; 581c55191e9SArd Biesheuvel } 582c55191e9SArd Biesheuvel 583c55191e9SArd Biesheuvel /* permit 'full' in addition to boolean options */ 584c55191e9SArd Biesheuvel if (strcmp(arg, "full")) 585c55191e9SArd Biesheuvel return -EINVAL; 586c55191e9SArd Biesheuvel 587c55191e9SArd Biesheuvel rodata_enabled = true; 588c55191e9SArd Biesheuvel rodata_full = true; 589c55191e9SArd Biesheuvel return 0; 59028b066daSArd Biesheuvel } 59128b066daSArd Biesheuvel early_param("rodata", parse_rodata); 59228b066daSArd Biesheuvel 59351a0048bSWill Deacon #ifdef CONFIG_UNMAP_KERNEL_AT_EL0 59451a0048bSWill Deacon static int __init map_entry_trampoline(void) 59551a0048bSWill Deacon { 59651a0048bSWill Deacon pgprot_t prot = rodata_enabled ? PAGE_KERNEL_ROX : PAGE_KERNEL_EXEC; 59751a0048bSWill Deacon phys_addr_t pa_start = __pa_symbol(__entry_tramp_text_start); 59851a0048bSWill Deacon 59951a0048bSWill Deacon /* The trampoline is always mapped and can therefore be global */ 60051a0048bSWill Deacon pgprot_val(prot) &= ~PTE_NG; 60151a0048bSWill Deacon 60251a0048bSWill Deacon /* Map only the text into the trampoline page table */ 60351a0048bSWill Deacon memset(tramp_pg_dir, 0, PGD_SIZE); 60451a0048bSWill Deacon __create_pgd_mapping(tramp_pg_dir, pa_start, TRAMP_VALIAS, PAGE_SIZE, 605475ba3fcSWill Deacon prot, __pgd_pgtable_alloc, 0); 60651a0048bSWill Deacon 6076c27c408SWill Deacon /* Map both the text and data into the kernel page table */ 60851a0048bSWill Deacon __set_fixmap(FIX_ENTRY_TRAMP_TEXT, pa_start, prot); 6096c27c408SWill Deacon if (IS_ENABLED(CONFIG_RANDOMIZE_BASE)) { 6106c27c408SWill Deacon extern char __entry_tramp_data_start[]; 6116c27c408SWill Deacon 6126c27c408SWill Deacon __set_fixmap(FIX_ENTRY_TRAMP_DATA, 6136c27c408SWill Deacon __pa_symbol(__entry_tramp_data_start), 6146c27c408SWill Deacon PAGE_KERNEL_RO); 6156c27c408SWill Deacon } 6166c27c408SWill Deacon 61751a0048bSWill Deacon return 0; 61851a0048bSWill Deacon } 61951a0048bSWill Deacon core_initcall(map_entry_trampoline); 62051a0048bSWill Deacon #endif 62151a0048bSWill Deacon 622068a17a5SMark Rutland /* 623068a17a5SMark Rutland * Create fine-grained mappings for the kernel. 624068a17a5SMark Rutland */ 62520a004e7SWill Deacon static void __init map_kernel(pgd_t *pgdp) 626068a17a5SMark Rutland { 6272ebe088bSArd Biesheuvel static struct vm_struct vmlinux_text, vmlinux_rodata, vmlinux_inittext, 6282ebe088bSArd Biesheuvel vmlinux_initdata, vmlinux_data; 629068a17a5SMark Rutland 63028b066daSArd Biesheuvel /* 63128b066daSArd Biesheuvel * External debuggers may need to write directly to the text 63228b066daSArd Biesheuvel * mapping to install SW breakpoints. Allow this (only) when 63328b066daSArd Biesheuvel * explicitly requested with rodata=off. 63428b066daSArd Biesheuvel */ 63528b066daSArd Biesheuvel pgprot_t text_prot = rodata_enabled ? PAGE_KERNEL_ROX : PAGE_KERNEL_EXEC; 63628b066daSArd Biesheuvel 637d27cfa1fSArd Biesheuvel /* 638d27cfa1fSArd Biesheuvel * Only rodata will be remapped with different permissions later on, 639d27cfa1fSArd Biesheuvel * all other segments are allowed to use contiguous mappings. 640d27cfa1fSArd Biesheuvel */ 64120a004e7SWill Deacon map_kernel_segment(pgdp, _text, _etext, text_prot, &vmlinux_text, 0, 64292bbd16eSWill Deacon VM_NO_GUARD); 64320a004e7SWill Deacon map_kernel_segment(pgdp, __start_rodata, __inittext_begin, PAGE_KERNEL, 64492bbd16eSWill Deacon &vmlinux_rodata, NO_CONT_MAPPINGS, VM_NO_GUARD); 64520a004e7SWill Deacon map_kernel_segment(pgdp, __inittext_begin, __inittext_end, text_prot, 64692bbd16eSWill Deacon &vmlinux_inittext, 0, VM_NO_GUARD); 64720a004e7SWill Deacon map_kernel_segment(pgdp, __initdata_begin, __initdata_end, PAGE_KERNEL, 64892bbd16eSWill Deacon &vmlinux_initdata, 0, VM_NO_GUARD); 64920a004e7SWill Deacon map_kernel_segment(pgdp, _data, _end, PAGE_KERNEL, &vmlinux_data, 0, 0); 650068a17a5SMark Rutland 65120a004e7SWill Deacon if (!READ_ONCE(pgd_val(*pgd_offset_raw(pgdp, FIXADDR_START)))) { 652068a17a5SMark Rutland /* 653f9040773SArd Biesheuvel * The fixmap falls in a separate pgd to the kernel, and doesn't 654f9040773SArd Biesheuvel * live in the carveout for the swapper_pg_dir. We can simply 655f9040773SArd Biesheuvel * re-use the existing dir for the fixmap. 656068a17a5SMark Rutland */ 65720a004e7SWill Deacon set_pgd(pgd_offset_raw(pgdp, FIXADDR_START), 65820a004e7SWill Deacon READ_ONCE(*pgd_offset_k(FIXADDR_START))); 659f9040773SArd Biesheuvel } else if (CONFIG_PGTABLE_LEVELS > 3) { 660f9040773SArd Biesheuvel /* 661f9040773SArd Biesheuvel * The fixmap shares its top level pgd entry with the kernel 662f9040773SArd Biesheuvel * mapping. This can really only occur when we are running 663f9040773SArd Biesheuvel * with 16k/4 levels, so we can simply reuse the pud level 664f9040773SArd Biesheuvel * entry instead. 665f9040773SArd Biesheuvel */ 666f9040773SArd Biesheuvel BUG_ON(!IS_ENABLED(CONFIG_ARM64_16K_PAGES)); 66720a004e7SWill Deacon pud_populate(&init_mm, 66820a004e7SWill Deacon pud_set_fixmap_offset(pgdp, FIXADDR_START), 66919338304SKristina Martsenko lm_alias(bm_pmd)); 670f9040773SArd Biesheuvel pud_clear_fixmap(); 671f9040773SArd Biesheuvel } else { 672f9040773SArd Biesheuvel BUG(); 673f9040773SArd Biesheuvel } 674068a17a5SMark Rutland 67520a004e7SWill Deacon kasan_copy_shadow(pgdp); 676068a17a5SMark Rutland } 677068a17a5SMark Rutland 678c1cc1552SCatalin Marinas void __init paging_init(void) 679c1cc1552SCatalin Marinas { 6802330b7caSJun Yao pgd_t *pgdp = pgd_set_fixmap(__pa_symbol(swapper_pg_dir)); 681068a17a5SMark Rutland 68220a004e7SWill Deacon map_kernel(pgdp); 68320a004e7SWill Deacon map_mem(pgdp); 684068a17a5SMark Rutland 685068a17a5SMark Rutland pgd_clear_fixmap(); 686068a17a5SMark Rutland 687068a17a5SMark Rutland cpu_replace_ttbr1(lm_alias(swapper_pg_dir)); 6882b5548b6SJun Yao init_mm.pgd = swapper_pg_dir; 689068a17a5SMark Rutland 6902b5548b6SJun Yao memblock_free(__pa_symbol(init_pg_dir), 6912b5548b6SJun Yao __pa_symbol(init_pg_end) - __pa_symbol(init_pg_dir)); 69224cc61d8SArd Biesheuvel 69324cc61d8SArd Biesheuvel memblock_allow_resize(); 694c1cc1552SCatalin Marinas } 695c1cc1552SCatalin Marinas 696c1cc1552SCatalin Marinas /* 697c1cc1552SCatalin Marinas * Check whether a kernel address is valid (derived from arch/x86/). 698c1cc1552SCatalin Marinas */ 699c1cc1552SCatalin Marinas int kern_addr_valid(unsigned long addr) 700c1cc1552SCatalin Marinas { 70120a004e7SWill Deacon pgd_t *pgdp; 70220a004e7SWill Deacon pud_t *pudp, pud; 70320a004e7SWill Deacon pmd_t *pmdp, pmd; 70420a004e7SWill Deacon pte_t *ptep, pte; 705c1cc1552SCatalin Marinas 706c1cc1552SCatalin Marinas if ((((long)addr) >> VA_BITS) != -1UL) 707c1cc1552SCatalin Marinas return 0; 708c1cc1552SCatalin Marinas 70920a004e7SWill Deacon pgdp = pgd_offset_k(addr); 71020a004e7SWill Deacon if (pgd_none(READ_ONCE(*pgdp))) 711c1cc1552SCatalin Marinas return 0; 712c1cc1552SCatalin Marinas 71320a004e7SWill Deacon pudp = pud_offset(pgdp, addr); 71420a004e7SWill Deacon pud = READ_ONCE(*pudp); 71520a004e7SWill Deacon if (pud_none(pud)) 716c1cc1552SCatalin Marinas return 0; 717c1cc1552SCatalin Marinas 71820a004e7SWill Deacon if (pud_sect(pud)) 71920a004e7SWill Deacon return pfn_valid(pud_pfn(pud)); 720206a2a73SSteve Capper 72120a004e7SWill Deacon pmdp = pmd_offset(pudp, addr); 72220a004e7SWill Deacon pmd = READ_ONCE(*pmdp); 72320a004e7SWill Deacon if (pmd_none(pmd)) 724c1cc1552SCatalin Marinas return 0; 725c1cc1552SCatalin Marinas 72620a004e7SWill Deacon if (pmd_sect(pmd)) 72720a004e7SWill Deacon return pfn_valid(pmd_pfn(pmd)); 728da6e4cb6SDave Anderson 72920a004e7SWill Deacon ptep = pte_offset_kernel(pmdp, addr); 73020a004e7SWill Deacon pte = READ_ONCE(*ptep); 73120a004e7SWill Deacon if (pte_none(pte)) 732c1cc1552SCatalin Marinas return 0; 733c1cc1552SCatalin Marinas 73420a004e7SWill Deacon return pfn_valid(pte_pfn(pte)); 735c1cc1552SCatalin Marinas } 736c1cc1552SCatalin Marinas #ifdef CONFIG_SPARSEMEM_VMEMMAP 737b433dce0SSuzuki K. Poulose #if !ARM64_SWAPPER_USES_SECTION_MAPS 7387b73d978SChristoph Hellwig int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node, 7397b73d978SChristoph Hellwig struct vmem_altmap *altmap) 740c1cc1552SCatalin Marinas { 7410aad818bSJohannes Weiner return vmemmap_populate_basepages(start, end, node); 742c1cc1552SCatalin Marinas } 743b433dce0SSuzuki K. Poulose #else /* !ARM64_SWAPPER_USES_SECTION_MAPS */ 7447b73d978SChristoph Hellwig int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node, 7457b73d978SChristoph Hellwig struct vmem_altmap *altmap) 746c1cc1552SCatalin Marinas { 7470aad818bSJohannes Weiner unsigned long addr = start; 748c1cc1552SCatalin Marinas unsigned long next; 74920a004e7SWill Deacon pgd_t *pgdp; 75020a004e7SWill Deacon pud_t *pudp; 75120a004e7SWill Deacon pmd_t *pmdp; 752c1cc1552SCatalin Marinas 753c1cc1552SCatalin Marinas do { 754c1cc1552SCatalin Marinas next = pmd_addr_end(addr, end); 755c1cc1552SCatalin Marinas 75620a004e7SWill Deacon pgdp = vmemmap_pgd_populate(addr, node); 75720a004e7SWill Deacon if (!pgdp) 758c1cc1552SCatalin Marinas return -ENOMEM; 759c1cc1552SCatalin Marinas 76020a004e7SWill Deacon pudp = vmemmap_pud_populate(pgdp, addr, node); 76120a004e7SWill Deacon if (!pudp) 762c1cc1552SCatalin Marinas return -ENOMEM; 763c1cc1552SCatalin Marinas 76420a004e7SWill Deacon pmdp = pmd_offset(pudp, addr); 76520a004e7SWill Deacon if (pmd_none(READ_ONCE(*pmdp))) { 766c1cc1552SCatalin Marinas void *p = NULL; 767c1cc1552SCatalin Marinas 768c1cc1552SCatalin Marinas p = vmemmap_alloc_block_buf(PMD_SIZE, node); 769c1cc1552SCatalin Marinas if (!p) 770c1cc1552SCatalin Marinas return -ENOMEM; 771c1cc1552SCatalin Marinas 77220a004e7SWill Deacon pmd_set_huge(pmdp, __pa(p), __pgprot(PROT_SECT_NORMAL)); 773c1cc1552SCatalin Marinas } else 77420a004e7SWill Deacon vmemmap_verify((pte_t *)pmdp, node, addr, next); 775c1cc1552SCatalin Marinas } while (addr = next, addr != end); 776c1cc1552SCatalin Marinas 777c1cc1552SCatalin Marinas return 0; 778c1cc1552SCatalin Marinas } 779c1cc1552SCatalin Marinas #endif /* CONFIG_ARM64_64K_PAGES */ 78024b6d416SChristoph Hellwig void vmemmap_free(unsigned long start, unsigned long end, 78124b6d416SChristoph Hellwig struct vmem_altmap *altmap) 7820197518cSTang Chen { 7830197518cSTang Chen } 784c1cc1552SCatalin Marinas #endif /* CONFIG_SPARSEMEM_VMEMMAP */ 785af86e597SLaura Abbott 786af86e597SLaura Abbott static inline pud_t * fixmap_pud(unsigned long addr) 787af86e597SLaura Abbott { 78820a004e7SWill Deacon pgd_t *pgdp = pgd_offset_k(addr); 78920a004e7SWill Deacon pgd_t pgd = READ_ONCE(*pgdp); 790af86e597SLaura Abbott 79120a004e7SWill Deacon BUG_ON(pgd_none(pgd) || pgd_bad(pgd)); 792af86e597SLaura Abbott 79320a004e7SWill Deacon return pud_offset_kimg(pgdp, addr); 794af86e597SLaura Abbott } 795af86e597SLaura Abbott 796af86e597SLaura Abbott static inline pmd_t * fixmap_pmd(unsigned long addr) 797af86e597SLaura Abbott { 79820a004e7SWill Deacon pud_t *pudp = fixmap_pud(addr); 79920a004e7SWill Deacon pud_t pud = READ_ONCE(*pudp); 800af86e597SLaura Abbott 80120a004e7SWill Deacon BUG_ON(pud_none(pud) || pud_bad(pud)); 802af86e597SLaura Abbott 80320a004e7SWill Deacon return pmd_offset_kimg(pudp, addr); 804af86e597SLaura Abbott } 805af86e597SLaura Abbott 806af86e597SLaura Abbott static inline pte_t * fixmap_pte(unsigned long addr) 807af86e597SLaura Abbott { 808157962f5SArd Biesheuvel return &bm_pte[pte_index(addr)]; 809af86e597SLaura Abbott } 810af86e597SLaura Abbott 8112077be67SLaura Abbott /* 8122077be67SLaura Abbott * The p*d_populate functions call virt_to_phys implicitly so they can't be used 8132077be67SLaura Abbott * directly on kernel symbols (bm_p*d). This function is called too early to use 8142077be67SLaura Abbott * lm_alias so __p*d_populate functions must be used to populate with the 8152077be67SLaura Abbott * physical address from __pa_symbol. 8162077be67SLaura Abbott */ 817af86e597SLaura Abbott void __init early_fixmap_init(void) 818af86e597SLaura Abbott { 81920a004e7SWill Deacon pgd_t *pgdp, pgd; 82020a004e7SWill Deacon pud_t *pudp; 82120a004e7SWill Deacon pmd_t *pmdp; 822af86e597SLaura Abbott unsigned long addr = FIXADDR_START; 823af86e597SLaura Abbott 82420a004e7SWill Deacon pgdp = pgd_offset_k(addr); 82520a004e7SWill Deacon pgd = READ_ONCE(*pgdp); 826f80fb3a3SArd Biesheuvel if (CONFIG_PGTABLE_LEVELS > 3 && 82720a004e7SWill Deacon !(pgd_none(pgd) || pgd_page_paddr(pgd) == __pa_symbol(bm_pud))) { 828f9040773SArd Biesheuvel /* 829f9040773SArd Biesheuvel * We only end up here if the kernel mapping and the fixmap 830f9040773SArd Biesheuvel * share the top level pgd entry, which should only happen on 831f9040773SArd Biesheuvel * 16k/4 levels configurations. 832f9040773SArd Biesheuvel */ 833f9040773SArd Biesheuvel BUG_ON(!IS_ENABLED(CONFIG_ARM64_16K_PAGES)); 83420a004e7SWill Deacon pudp = pud_offset_kimg(pgdp, addr); 835f9040773SArd Biesheuvel } else { 83620a004e7SWill Deacon if (pgd_none(pgd)) 83720a004e7SWill Deacon __pgd_populate(pgdp, __pa_symbol(bm_pud), PUD_TYPE_TABLE); 83820a004e7SWill Deacon pudp = fixmap_pud(addr); 839f9040773SArd Biesheuvel } 84020a004e7SWill Deacon if (pud_none(READ_ONCE(*pudp))) 84120a004e7SWill Deacon __pud_populate(pudp, __pa_symbol(bm_pmd), PMD_TYPE_TABLE); 84220a004e7SWill Deacon pmdp = fixmap_pmd(addr); 84320a004e7SWill Deacon __pmd_populate(pmdp, __pa_symbol(bm_pte), PMD_TYPE_TABLE); 844af86e597SLaura Abbott 845af86e597SLaura Abbott /* 846af86e597SLaura Abbott * The boot-ioremap range spans multiple pmds, for which 847157962f5SArd Biesheuvel * we are not prepared: 848af86e597SLaura Abbott */ 849af86e597SLaura Abbott BUILD_BUG_ON((__fix_to_virt(FIX_BTMAP_BEGIN) >> PMD_SHIFT) 850af86e597SLaura Abbott != (__fix_to_virt(FIX_BTMAP_END) >> PMD_SHIFT)); 851af86e597SLaura Abbott 85220a004e7SWill Deacon if ((pmdp != fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN))) 85320a004e7SWill Deacon || pmdp != fixmap_pmd(fix_to_virt(FIX_BTMAP_END))) { 854af86e597SLaura Abbott WARN_ON(1); 85520a004e7SWill Deacon pr_warn("pmdp %p != %p, %p\n", 85620a004e7SWill Deacon pmdp, fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN)), 857af86e597SLaura Abbott fixmap_pmd(fix_to_virt(FIX_BTMAP_END))); 858af86e597SLaura Abbott pr_warn("fix_to_virt(FIX_BTMAP_BEGIN): %08lx\n", 859af86e597SLaura Abbott fix_to_virt(FIX_BTMAP_BEGIN)); 860af86e597SLaura Abbott pr_warn("fix_to_virt(FIX_BTMAP_END): %08lx\n", 861af86e597SLaura Abbott fix_to_virt(FIX_BTMAP_END)); 862af86e597SLaura Abbott 863af86e597SLaura Abbott pr_warn("FIX_BTMAP_END: %d\n", FIX_BTMAP_END); 864af86e597SLaura Abbott pr_warn("FIX_BTMAP_BEGIN: %d\n", FIX_BTMAP_BEGIN); 865af86e597SLaura Abbott } 866af86e597SLaura Abbott } 867af86e597SLaura Abbott 86818b4b276SJames Morse /* 86918b4b276SJames Morse * Unusually, this is also called in IRQ context (ghes_iounmap_irq) so if we 87018b4b276SJames Morse * ever need to use IPIs for TLB broadcasting, then we're in trouble here. 87118b4b276SJames Morse */ 872af86e597SLaura Abbott void __set_fixmap(enum fixed_addresses idx, 873af86e597SLaura Abbott phys_addr_t phys, pgprot_t flags) 874af86e597SLaura Abbott { 875af86e597SLaura Abbott unsigned long addr = __fix_to_virt(idx); 87620a004e7SWill Deacon pte_t *ptep; 877af86e597SLaura Abbott 878b63dbef9SMark Rutland BUG_ON(idx <= FIX_HOLE || idx >= __end_of_fixed_addresses); 879af86e597SLaura Abbott 88020a004e7SWill Deacon ptep = fixmap_pte(addr); 881af86e597SLaura Abbott 882af86e597SLaura Abbott if (pgprot_val(flags)) { 88320a004e7SWill Deacon set_pte(ptep, pfn_pte(phys >> PAGE_SHIFT, flags)); 884af86e597SLaura Abbott } else { 88520a004e7SWill Deacon pte_clear(&init_mm, addr, ptep); 886af86e597SLaura Abbott flush_tlb_kernel_range(addr, addr+PAGE_SIZE); 887af86e597SLaura Abbott } 888af86e597SLaura Abbott } 88961bd93ceSArd Biesheuvel 890f80fb3a3SArd Biesheuvel void *__init __fixmap_remap_fdt(phys_addr_t dt_phys, int *size, pgprot_t prot) 89161bd93ceSArd Biesheuvel { 89261bd93ceSArd Biesheuvel const u64 dt_virt_base = __fix_to_virt(FIX_FDT); 893f80fb3a3SArd Biesheuvel int offset; 89461bd93ceSArd Biesheuvel void *dt_virt; 89561bd93ceSArd Biesheuvel 89661bd93ceSArd Biesheuvel /* 89761bd93ceSArd Biesheuvel * Check whether the physical FDT address is set and meets the minimum 89861bd93ceSArd Biesheuvel * alignment requirement. Since we are relying on MIN_FDT_ALIGN to be 89904a84810SArd Biesheuvel * at least 8 bytes so that we can always access the magic and size 90004a84810SArd Biesheuvel * fields of the FDT header after mapping the first chunk, double check 90104a84810SArd Biesheuvel * here if that is indeed the case. 90261bd93ceSArd Biesheuvel */ 90361bd93ceSArd Biesheuvel BUILD_BUG_ON(MIN_FDT_ALIGN < 8); 90461bd93ceSArd Biesheuvel if (!dt_phys || dt_phys % MIN_FDT_ALIGN) 90561bd93ceSArd Biesheuvel return NULL; 90661bd93ceSArd Biesheuvel 90761bd93ceSArd Biesheuvel /* 90861bd93ceSArd Biesheuvel * Make sure that the FDT region can be mapped without the need to 90961bd93ceSArd Biesheuvel * allocate additional translation table pages, so that it is safe 910132233a7SLaura Abbott * to call create_mapping_noalloc() this early. 91161bd93ceSArd Biesheuvel * 91261bd93ceSArd Biesheuvel * On 64k pages, the FDT will be mapped using PTEs, so we need to 91361bd93ceSArd Biesheuvel * be in the same PMD as the rest of the fixmap. 91461bd93ceSArd Biesheuvel * On 4k pages, we'll use section mappings for the FDT so we only 91561bd93ceSArd Biesheuvel * have to be in the same PUD. 91661bd93ceSArd Biesheuvel */ 91761bd93ceSArd Biesheuvel BUILD_BUG_ON(dt_virt_base % SZ_2M); 91861bd93ceSArd Biesheuvel 919b433dce0SSuzuki K. Poulose BUILD_BUG_ON(__fix_to_virt(FIX_FDT_END) >> SWAPPER_TABLE_SHIFT != 920b433dce0SSuzuki K. Poulose __fix_to_virt(FIX_BTMAP_BEGIN) >> SWAPPER_TABLE_SHIFT); 92161bd93ceSArd Biesheuvel 922b433dce0SSuzuki K. Poulose offset = dt_phys % SWAPPER_BLOCK_SIZE; 92361bd93ceSArd Biesheuvel dt_virt = (void *)dt_virt_base + offset; 92461bd93ceSArd Biesheuvel 92561bd93ceSArd Biesheuvel /* map the first chunk so we can read the size from the header */ 926132233a7SLaura Abbott create_mapping_noalloc(round_down(dt_phys, SWAPPER_BLOCK_SIZE), 927132233a7SLaura Abbott dt_virt_base, SWAPPER_BLOCK_SIZE, prot); 92861bd93ceSArd Biesheuvel 92904a84810SArd Biesheuvel if (fdt_magic(dt_virt) != FDT_MAGIC) 93061bd93ceSArd Biesheuvel return NULL; 93161bd93ceSArd Biesheuvel 932f80fb3a3SArd Biesheuvel *size = fdt_totalsize(dt_virt); 933f80fb3a3SArd Biesheuvel if (*size > MAX_FDT_SIZE) 93461bd93ceSArd Biesheuvel return NULL; 93561bd93ceSArd Biesheuvel 936f80fb3a3SArd Biesheuvel if (offset + *size > SWAPPER_BLOCK_SIZE) 937132233a7SLaura Abbott create_mapping_noalloc(round_down(dt_phys, SWAPPER_BLOCK_SIZE), dt_virt_base, 938f80fb3a3SArd Biesheuvel round_up(offset + *size, SWAPPER_BLOCK_SIZE), prot); 939f80fb3a3SArd Biesheuvel 940f80fb3a3SArd Biesheuvel return dt_virt; 941f80fb3a3SArd Biesheuvel } 942f80fb3a3SArd Biesheuvel 943f80fb3a3SArd Biesheuvel void *__init fixmap_remap_fdt(phys_addr_t dt_phys) 944f80fb3a3SArd Biesheuvel { 945f80fb3a3SArd Biesheuvel void *dt_virt; 946f80fb3a3SArd Biesheuvel int size; 947f80fb3a3SArd Biesheuvel 948f80fb3a3SArd Biesheuvel dt_virt = __fixmap_remap_fdt(dt_phys, &size, PAGE_KERNEL_RO); 949f80fb3a3SArd Biesheuvel if (!dt_virt) 950f80fb3a3SArd Biesheuvel return NULL; 95161bd93ceSArd Biesheuvel 95261bd93ceSArd Biesheuvel memblock_reserve(dt_phys, size); 95361bd93ceSArd Biesheuvel return dt_virt; 95461bd93ceSArd Biesheuvel } 955324420bfSArd Biesheuvel 956324420bfSArd Biesheuvel int __init arch_ioremap_pud_supported(void) 957324420bfSArd Biesheuvel { 9587ba36eccSMark Rutland /* 9597ba36eccSMark Rutland * Only 4k granule supports level 1 block mappings. 9607ba36eccSMark Rutland * SW table walks can't handle removal of intermediate entries. 9617ba36eccSMark Rutland */ 9627ba36eccSMark Rutland return IS_ENABLED(CONFIG_ARM64_4K_PAGES) && 9637ba36eccSMark Rutland !IS_ENABLED(CONFIG_ARM64_PTDUMP_DEBUGFS); 964324420bfSArd Biesheuvel } 965324420bfSArd Biesheuvel 966324420bfSArd Biesheuvel int __init arch_ioremap_pmd_supported(void) 967324420bfSArd Biesheuvel { 9687ba36eccSMark Rutland /* See arch_ioremap_pud_supported() */ 9697ba36eccSMark Rutland return !IS_ENABLED(CONFIG_ARM64_PTDUMP_DEBUGFS); 970324420bfSArd Biesheuvel } 971324420bfSArd Biesheuvel 97220a004e7SWill Deacon int pud_set_huge(pud_t *pudp, phys_addr_t phys, pgprot_t prot) 973324420bfSArd Biesheuvel { 974f7f0097aSAnshuman Khandual pud_t new_pud = pfn_pud(__phys_to_pfn(phys), mk_pud_sect_prot(prot)); 97515122ee2SWill Deacon 97682034c23SLaura Abbott /* Only allow permission changes for now */ 97782034c23SLaura Abbott if (!pgattr_change_is_safe(READ_ONCE(pud_val(*pudp)), 97882034c23SLaura Abbott pud_val(new_pud))) 97915122ee2SWill Deacon return 0; 98015122ee2SWill Deacon 981*87dedf7cSAnshuman Khandual VM_BUG_ON(phys & ~PUD_MASK); 98282034c23SLaura Abbott set_pud(pudp, new_pud); 983324420bfSArd Biesheuvel return 1; 984324420bfSArd Biesheuvel } 985324420bfSArd Biesheuvel 98620a004e7SWill Deacon int pmd_set_huge(pmd_t *pmdp, phys_addr_t phys, pgprot_t prot) 987324420bfSArd Biesheuvel { 988f7f0097aSAnshuman Khandual pmd_t new_pmd = pfn_pmd(__phys_to_pfn(phys), mk_pmd_sect_prot(prot)); 98915122ee2SWill Deacon 99082034c23SLaura Abbott /* Only allow permission changes for now */ 99182034c23SLaura Abbott if (!pgattr_change_is_safe(READ_ONCE(pmd_val(*pmdp)), 99282034c23SLaura Abbott pmd_val(new_pmd))) 99315122ee2SWill Deacon return 0; 99415122ee2SWill Deacon 995*87dedf7cSAnshuman Khandual VM_BUG_ON(phys & ~PMD_MASK); 99682034c23SLaura Abbott set_pmd(pmdp, new_pmd); 997324420bfSArd Biesheuvel return 1; 998324420bfSArd Biesheuvel } 999324420bfSArd Biesheuvel 100020a004e7SWill Deacon int pud_clear_huge(pud_t *pudp) 1001324420bfSArd Biesheuvel { 100220a004e7SWill Deacon if (!pud_sect(READ_ONCE(*pudp))) 1003324420bfSArd Biesheuvel return 0; 100420a004e7SWill Deacon pud_clear(pudp); 1005324420bfSArd Biesheuvel return 1; 1006324420bfSArd Biesheuvel } 1007324420bfSArd Biesheuvel 100820a004e7SWill Deacon int pmd_clear_huge(pmd_t *pmdp) 1009324420bfSArd Biesheuvel { 101020a004e7SWill Deacon if (!pmd_sect(READ_ONCE(*pmdp))) 1011324420bfSArd Biesheuvel return 0; 101220a004e7SWill Deacon pmd_clear(pmdp); 1013324420bfSArd Biesheuvel return 1; 1014324420bfSArd Biesheuvel } 1015b6bdb751SToshi Kani 1016ec28bb9cSChintan Pandya int pmd_free_pte_page(pmd_t *pmdp, unsigned long addr) 1017b6bdb751SToshi Kani { 1018ec28bb9cSChintan Pandya pte_t *table; 1019ec28bb9cSChintan Pandya pmd_t pmd; 1020ec28bb9cSChintan Pandya 1021ec28bb9cSChintan Pandya pmd = READ_ONCE(*pmdp); 1022ec28bb9cSChintan Pandya 1023fac880c7SMark Rutland if (!pmd_table(pmd)) { 10249c006972SWill Deacon VM_WARN_ON(1); 1025ec28bb9cSChintan Pandya return 1; 1026b6bdb751SToshi Kani } 1027b6bdb751SToshi Kani 1028ec28bb9cSChintan Pandya table = pte_offset_kernel(pmdp, addr); 1029ec28bb9cSChintan Pandya pmd_clear(pmdp); 1030ec28bb9cSChintan Pandya __flush_tlb_kernel_pgtable(addr); 1031ec28bb9cSChintan Pandya pte_free_kernel(NULL, table); 1032ec28bb9cSChintan Pandya return 1; 1033ec28bb9cSChintan Pandya } 1034ec28bb9cSChintan Pandya 1035ec28bb9cSChintan Pandya int pud_free_pmd_page(pud_t *pudp, unsigned long addr) 1036b6bdb751SToshi Kani { 1037ec28bb9cSChintan Pandya pmd_t *table; 1038ec28bb9cSChintan Pandya pmd_t *pmdp; 1039ec28bb9cSChintan Pandya pud_t pud; 1040ec28bb9cSChintan Pandya unsigned long next, end; 1041ec28bb9cSChintan Pandya 1042ec28bb9cSChintan Pandya pud = READ_ONCE(*pudp); 1043ec28bb9cSChintan Pandya 1044fac880c7SMark Rutland if (!pud_table(pud)) { 10459c006972SWill Deacon VM_WARN_ON(1); 1046ec28bb9cSChintan Pandya return 1; 1047ec28bb9cSChintan Pandya } 1048ec28bb9cSChintan Pandya 1049ec28bb9cSChintan Pandya table = pmd_offset(pudp, addr); 1050ec28bb9cSChintan Pandya pmdp = table; 1051ec28bb9cSChintan Pandya next = addr; 1052ec28bb9cSChintan Pandya end = addr + PUD_SIZE; 1053ec28bb9cSChintan Pandya do { 1054ec28bb9cSChintan Pandya pmd_free_pte_page(pmdp, next); 1055ec28bb9cSChintan Pandya } while (pmdp++, next += PMD_SIZE, next != end); 1056ec28bb9cSChintan Pandya 1057ec28bb9cSChintan Pandya pud_clear(pudp); 1058ec28bb9cSChintan Pandya __flush_tlb_kernel_pgtable(addr); 1059ec28bb9cSChintan Pandya pmd_free(NULL, table); 1060ec28bb9cSChintan Pandya return 1; 1061b6bdb751SToshi Kani } 10624ab21506SRobin Murphy 10638e2d4340SWill Deacon int p4d_free_pud_page(p4d_t *p4d, unsigned long addr) 10648e2d4340SWill Deacon { 10658e2d4340SWill Deacon return 0; /* Don't attempt a block mapping */ 10668e2d4340SWill Deacon } 10678e2d4340SWill Deacon 10684ab21506SRobin Murphy #ifdef CONFIG_MEMORY_HOTPLUG 1069940519f0SMichal Hocko int arch_add_memory(int nid, u64 start, u64 size, 1070940519f0SMichal Hocko struct mhp_restrictions *restrictions) 10714ab21506SRobin Murphy { 10724ab21506SRobin Murphy int flags = 0; 10734ab21506SRobin Murphy 10744ab21506SRobin Murphy if (rodata_full || debug_pagealloc_enabled()) 10754ab21506SRobin Murphy flags = NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS; 10764ab21506SRobin Murphy 10774ab21506SRobin Murphy __create_pgd_mapping(swapper_pg_dir, start, __phys_to_virt(start), 1078475ba3fcSWill Deacon size, PAGE_KERNEL, __pgd_pgtable_alloc, flags); 10794ab21506SRobin Murphy 10804ab21506SRobin Murphy return __add_pages(nid, start >> PAGE_SHIFT, size >> PAGE_SHIFT, 1081940519f0SMichal Hocko restrictions); 10824ab21506SRobin Murphy } 10834ab21506SRobin Murphy #endif 1084