1c1cc1552SCatalin Marinas /* 2c1cc1552SCatalin Marinas * Based on arch/arm/mm/mmu.c 3c1cc1552SCatalin Marinas * 4c1cc1552SCatalin Marinas * Copyright (C) 1995-2005 Russell King 5c1cc1552SCatalin Marinas * Copyright (C) 2012 ARM Ltd. 6c1cc1552SCatalin Marinas * 7c1cc1552SCatalin Marinas * This program is free software; you can redistribute it and/or modify 8c1cc1552SCatalin Marinas * it under the terms of the GNU General Public License version 2 as 9c1cc1552SCatalin Marinas * published by the Free Software Foundation. 10c1cc1552SCatalin Marinas * 11c1cc1552SCatalin Marinas * This program is distributed in the hope that it will be useful, 12c1cc1552SCatalin Marinas * but WITHOUT ANY WARRANTY; without even the implied warranty of 13c1cc1552SCatalin Marinas * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14c1cc1552SCatalin Marinas * GNU General Public License for more details. 15c1cc1552SCatalin Marinas * 16c1cc1552SCatalin Marinas * You should have received a copy of the GNU General Public License 17c1cc1552SCatalin Marinas * along with this program. If not, see <http://www.gnu.org/licenses/>. 18c1cc1552SCatalin Marinas */ 19c1cc1552SCatalin Marinas 205a9e3e15SJisheng Zhang #include <linux/cache.h> 21c1cc1552SCatalin Marinas #include <linux/export.h> 22c1cc1552SCatalin Marinas #include <linux/kernel.h> 23c1cc1552SCatalin Marinas #include <linux/errno.h> 24c1cc1552SCatalin Marinas #include <linux/init.h> 2598d2e153STakahiro Akashi #include <linux/ioport.h> 2698d2e153STakahiro Akashi #include <linux/kexec.h> 2761bd93ceSArd Biesheuvel #include <linux/libfdt.h> 28c1cc1552SCatalin Marinas #include <linux/mman.h> 29c1cc1552SCatalin Marinas #include <linux/nodemask.h> 30c1cc1552SCatalin Marinas #include <linux/memblock.h> 31c1cc1552SCatalin Marinas #include <linux/fs.h> 322475ff9dSCatalin Marinas #include <linux/io.h> 332077be67SLaura Abbott #include <linux/mm.h> 346efd8499STobias Klauser #include <linux/vmalloc.h> 35c1cc1552SCatalin Marinas 3621ab99c2SMark Rutland #include <asm/barrier.h> 37c1cc1552SCatalin Marinas #include <asm/cputype.h> 38af86e597SLaura Abbott #include <asm/fixmap.h> 39068a17a5SMark Rutland #include <asm/kasan.h> 40b433dce0SSuzuki K. Poulose #include <asm/kernel-pgtable.h> 41c1cc1552SCatalin Marinas #include <asm/sections.h> 42c1cc1552SCatalin Marinas #include <asm/setup.h> 43c1cc1552SCatalin Marinas #include <asm/sizes.h> 44c1cc1552SCatalin Marinas #include <asm/tlb.h> 45c79b954bSJungseok Lee #include <asm/memblock.h> 46c1cc1552SCatalin Marinas #include <asm/mmu_context.h> 471404d6f1SLaura Abbott #include <asm/ptdump.h> 48c1cc1552SCatalin Marinas 49c0951366SArd Biesheuvel #define NO_BLOCK_MAPPINGS BIT(0) 50d27cfa1fSArd Biesheuvel #define NO_CONT_MAPPINGS BIT(1) 51c0951366SArd Biesheuvel 52dd006da2SArd Biesheuvel u64 idmap_t0sz = TCR_T0SZ(VA_BITS); 53fa2a8445SKristina Martsenko u64 idmap_ptrs_per_pgd = PTRS_PER_PGD; 54dd006da2SArd Biesheuvel 555a9e3e15SJisheng Zhang u64 kimage_voffset __ro_after_init; 56a7f8de16SArd Biesheuvel EXPORT_SYMBOL(kimage_voffset); 57a7f8de16SArd Biesheuvel 58c1cc1552SCatalin Marinas /* 59c1cc1552SCatalin Marinas * Empty_zero_page is a special page that is used for zero-initialized data 60c1cc1552SCatalin Marinas * and COW. 61c1cc1552SCatalin Marinas */ 625227cfa7SMark Rutland unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)] __page_aligned_bss; 63c1cc1552SCatalin Marinas EXPORT_SYMBOL(empty_zero_page); 64c1cc1552SCatalin Marinas 65f9040773SArd Biesheuvel static pte_t bm_pte[PTRS_PER_PTE] __page_aligned_bss; 66f9040773SArd Biesheuvel static pmd_t bm_pmd[PTRS_PER_PMD] __page_aligned_bss __maybe_unused; 67f9040773SArd Biesheuvel static pud_t bm_pud[PTRS_PER_PUD] __page_aligned_bss __maybe_unused; 68f9040773SArd Biesheuvel 69c1cc1552SCatalin Marinas pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, 70c1cc1552SCatalin Marinas unsigned long size, pgprot_t vma_prot) 71c1cc1552SCatalin Marinas { 72c1cc1552SCatalin Marinas if (!pfn_valid(pfn)) 73c1cc1552SCatalin Marinas return pgprot_noncached(vma_prot); 74c1cc1552SCatalin Marinas else if (file->f_flags & O_SYNC) 75c1cc1552SCatalin Marinas return pgprot_writecombine(vma_prot); 76c1cc1552SCatalin Marinas return vma_prot; 77c1cc1552SCatalin Marinas } 78c1cc1552SCatalin Marinas EXPORT_SYMBOL(phys_mem_access_prot); 79c1cc1552SCatalin Marinas 80f4710445SMark Rutland static phys_addr_t __init early_pgtable_alloc(void) 81c1cc1552SCatalin Marinas { 827142392dSSuzuki K. Poulose phys_addr_t phys; 837142392dSSuzuki K. Poulose void *ptr; 847142392dSSuzuki K. Poulose 8521ab99c2SMark Rutland phys = memblock_alloc(PAGE_SIZE, PAGE_SIZE); 86f4710445SMark Rutland 87f4710445SMark Rutland /* 88f4710445SMark Rutland * The FIX_{PGD,PUD,PMD} slots may be in active use, but the FIX_PTE 89f4710445SMark Rutland * slot will be free, so we can (ab)use the FIX_PTE slot to initialise 90f4710445SMark Rutland * any level of table. 91f4710445SMark Rutland */ 92f4710445SMark Rutland ptr = pte_set_fixmap(phys); 93f4710445SMark Rutland 9421ab99c2SMark Rutland memset(ptr, 0, PAGE_SIZE); 9521ab99c2SMark Rutland 96f4710445SMark Rutland /* 97f4710445SMark Rutland * Implicit barriers also ensure the zeroed page is visible to the page 98f4710445SMark Rutland * table walker 99f4710445SMark Rutland */ 100f4710445SMark Rutland pte_clear_fixmap(); 101f4710445SMark Rutland 102f4710445SMark Rutland return phys; 103c1cc1552SCatalin Marinas } 104c1cc1552SCatalin Marinas 105e98216b5SArd Biesheuvel static bool pgattr_change_is_safe(u64 old, u64 new) 106e98216b5SArd Biesheuvel { 107e98216b5SArd Biesheuvel /* 108e98216b5SArd Biesheuvel * The following mapping attributes may be updated in live 109e98216b5SArd Biesheuvel * kernel mappings without the need for break-before-make. 110e98216b5SArd Biesheuvel */ 111*753e8abcSArd Biesheuvel static const pteval_t mask = PTE_PXN | PTE_RDONLY | PTE_WRITE | PTE_NG; 112e98216b5SArd Biesheuvel 113141d1497SArd Biesheuvel /* creating or taking down mappings is always safe */ 114141d1497SArd Biesheuvel if (old == 0 || new == 0) 115141d1497SArd Biesheuvel return true; 116141d1497SArd Biesheuvel 117141d1497SArd Biesheuvel /* live contiguous mappings may not be manipulated at all */ 118141d1497SArd Biesheuvel if ((old | new) & PTE_CONT) 119141d1497SArd Biesheuvel return false; 120141d1497SArd Biesheuvel 121*753e8abcSArd Biesheuvel /* Transitioning from Non-Global to Global is unsafe */ 122*753e8abcSArd Biesheuvel if (old & ~new & PTE_NG) 123*753e8abcSArd Biesheuvel return false; 1244e602056SWill Deacon 125141d1497SArd Biesheuvel return ((old ^ new) & ~mask) == 0; 126e98216b5SArd Biesheuvel } 127e98216b5SArd Biesheuvel 12820a004e7SWill Deacon static void init_pte(pmd_t *pmdp, unsigned long addr, unsigned long end, 129d27cfa1fSArd Biesheuvel phys_addr_t phys, pgprot_t prot) 130c1cc1552SCatalin Marinas { 13120a004e7SWill Deacon pte_t *ptep; 132c1cc1552SCatalin Marinas 13320a004e7SWill Deacon ptep = pte_set_fixmap_offset(pmdp, addr); 134c1cc1552SCatalin Marinas do { 13520a004e7SWill Deacon pte_t old_pte = READ_ONCE(*ptep); 136e98216b5SArd Biesheuvel 13720a004e7SWill Deacon set_pte(ptep, pfn_pte(__phys_to_pfn(phys), prot)); 138e98216b5SArd Biesheuvel 139e98216b5SArd Biesheuvel /* 140e98216b5SArd Biesheuvel * After the PTE entry has been populated once, we 141e98216b5SArd Biesheuvel * only allow updates to the permission attributes. 142e98216b5SArd Biesheuvel */ 14320a004e7SWill Deacon BUG_ON(!pgattr_change_is_safe(pte_val(old_pte), 14420a004e7SWill Deacon READ_ONCE(pte_val(*ptep)))); 145e98216b5SArd Biesheuvel 146e393cf40SArd Biesheuvel phys += PAGE_SIZE; 14720a004e7SWill Deacon } while (ptep++, addr += PAGE_SIZE, addr != end); 148f4710445SMark Rutland 149f4710445SMark Rutland pte_clear_fixmap(); 150c1cc1552SCatalin Marinas } 151c1cc1552SCatalin Marinas 15220a004e7SWill Deacon static void alloc_init_cont_pte(pmd_t *pmdp, unsigned long addr, 153d27cfa1fSArd Biesheuvel unsigned long end, phys_addr_t phys, 154d27cfa1fSArd Biesheuvel pgprot_t prot, 15553e1b329SArd Biesheuvel phys_addr_t (*pgtable_alloc)(void), 156c0951366SArd Biesheuvel int flags) 157c1cc1552SCatalin Marinas { 158c1cc1552SCatalin Marinas unsigned long next; 15920a004e7SWill Deacon pmd_t pmd = READ_ONCE(*pmdp); 160c1cc1552SCatalin Marinas 16120a004e7SWill Deacon BUG_ON(pmd_sect(pmd)); 16220a004e7SWill Deacon if (pmd_none(pmd)) { 163d27cfa1fSArd Biesheuvel phys_addr_t pte_phys; 164132233a7SLaura Abbott BUG_ON(!pgtable_alloc); 165d27cfa1fSArd Biesheuvel pte_phys = pgtable_alloc(); 16620a004e7SWill Deacon __pmd_populate(pmdp, pte_phys, PMD_TYPE_TABLE); 16720a004e7SWill Deacon pmd = READ_ONCE(*pmdp); 168c1cc1552SCatalin Marinas } 16920a004e7SWill Deacon BUG_ON(pmd_bad(pmd)); 170d27cfa1fSArd Biesheuvel 171d27cfa1fSArd Biesheuvel do { 172d27cfa1fSArd Biesheuvel pgprot_t __prot = prot; 173d27cfa1fSArd Biesheuvel 174d27cfa1fSArd Biesheuvel next = pte_cont_addr_end(addr, end); 175d27cfa1fSArd Biesheuvel 176d27cfa1fSArd Biesheuvel /* use a contiguous mapping if the range is suitably aligned */ 177d27cfa1fSArd Biesheuvel if ((((addr | next | phys) & ~CONT_PTE_MASK) == 0) && 178d27cfa1fSArd Biesheuvel (flags & NO_CONT_MAPPINGS) == 0) 179d27cfa1fSArd Biesheuvel __prot = __pgprot(pgprot_val(prot) | PTE_CONT); 180d27cfa1fSArd Biesheuvel 18120a004e7SWill Deacon init_pte(pmdp, addr, next, phys, __prot); 182d27cfa1fSArd Biesheuvel 183d27cfa1fSArd Biesheuvel phys += next - addr; 184d27cfa1fSArd Biesheuvel } while (addr = next, addr != end); 185d27cfa1fSArd Biesheuvel } 186d27cfa1fSArd Biesheuvel 18720a004e7SWill Deacon static void init_pmd(pud_t *pudp, unsigned long addr, unsigned long end, 188d27cfa1fSArd Biesheuvel phys_addr_t phys, pgprot_t prot, 189d27cfa1fSArd Biesheuvel phys_addr_t (*pgtable_alloc)(void), int flags) 190d27cfa1fSArd Biesheuvel { 191d27cfa1fSArd Biesheuvel unsigned long next; 19220a004e7SWill Deacon pmd_t *pmdp; 193c1cc1552SCatalin Marinas 19420a004e7SWill Deacon pmdp = pmd_set_fixmap_offset(pudp, addr); 195c1cc1552SCatalin Marinas do { 19620a004e7SWill Deacon pmd_t old_pmd = READ_ONCE(*pmdp); 197e98216b5SArd Biesheuvel 198c1cc1552SCatalin Marinas next = pmd_addr_end(addr, end); 199e98216b5SArd Biesheuvel 200c1cc1552SCatalin Marinas /* try section mapping first */ 20183863f25SLaura Abbott if (((addr | next | phys) & ~SECTION_MASK) == 0 && 202c0951366SArd Biesheuvel (flags & NO_BLOCK_MAPPINGS) == 0) { 20320a004e7SWill Deacon pmd_set_huge(pmdp, phys, prot); 204e98216b5SArd Biesheuvel 205a55f9929SCatalin Marinas /* 206e98216b5SArd Biesheuvel * After the PMD entry has been populated once, we 207e98216b5SArd Biesheuvel * only allow updates to the permission attributes. 208a55f9929SCatalin Marinas */ 209e98216b5SArd Biesheuvel BUG_ON(!pgattr_change_is_safe(pmd_val(old_pmd), 21020a004e7SWill Deacon READ_ONCE(pmd_val(*pmdp)))); 211a55f9929SCatalin Marinas } else { 21220a004e7SWill Deacon alloc_init_cont_pte(pmdp, addr, next, phys, prot, 213d27cfa1fSArd Biesheuvel pgtable_alloc, flags); 214e98216b5SArd Biesheuvel 215e98216b5SArd Biesheuvel BUG_ON(pmd_val(old_pmd) != 0 && 21620a004e7SWill Deacon pmd_val(old_pmd) != READ_ONCE(pmd_val(*pmdp))); 217a55f9929SCatalin Marinas } 218c1cc1552SCatalin Marinas phys += next - addr; 21920a004e7SWill Deacon } while (pmdp++, addr = next, addr != end); 220f4710445SMark Rutland 221f4710445SMark Rutland pmd_clear_fixmap(); 222c1cc1552SCatalin Marinas } 223c1cc1552SCatalin Marinas 22420a004e7SWill Deacon static void alloc_init_cont_pmd(pud_t *pudp, unsigned long addr, 225d27cfa1fSArd Biesheuvel unsigned long end, phys_addr_t phys, 226d27cfa1fSArd Biesheuvel pgprot_t prot, 227d27cfa1fSArd Biesheuvel phys_addr_t (*pgtable_alloc)(void), int flags) 228d27cfa1fSArd Biesheuvel { 229d27cfa1fSArd Biesheuvel unsigned long next; 23020a004e7SWill Deacon pud_t pud = READ_ONCE(*pudp); 231d27cfa1fSArd Biesheuvel 232d27cfa1fSArd Biesheuvel /* 233d27cfa1fSArd Biesheuvel * Check for initial section mappings in the pgd/pud. 234d27cfa1fSArd Biesheuvel */ 23520a004e7SWill Deacon BUG_ON(pud_sect(pud)); 23620a004e7SWill Deacon if (pud_none(pud)) { 237d27cfa1fSArd Biesheuvel phys_addr_t pmd_phys; 238d27cfa1fSArd Biesheuvel BUG_ON(!pgtable_alloc); 239d27cfa1fSArd Biesheuvel pmd_phys = pgtable_alloc(); 24020a004e7SWill Deacon __pud_populate(pudp, pmd_phys, PUD_TYPE_TABLE); 24120a004e7SWill Deacon pud = READ_ONCE(*pudp); 242d27cfa1fSArd Biesheuvel } 24320a004e7SWill Deacon BUG_ON(pud_bad(pud)); 244d27cfa1fSArd Biesheuvel 245d27cfa1fSArd Biesheuvel do { 246d27cfa1fSArd Biesheuvel pgprot_t __prot = prot; 247d27cfa1fSArd Biesheuvel 248d27cfa1fSArd Biesheuvel next = pmd_cont_addr_end(addr, end); 249d27cfa1fSArd Biesheuvel 250d27cfa1fSArd Biesheuvel /* use a contiguous mapping if the range is suitably aligned */ 251d27cfa1fSArd Biesheuvel if ((((addr | next | phys) & ~CONT_PMD_MASK) == 0) && 252d27cfa1fSArd Biesheuvel (flags & NO_CONT_MAPPINGS) == 0) 253d27cfa1fSArd Biesheuvel __prot = __pgprot(pgprot_val(prot) | PTE_CONT); 254d27cfa1fSArd Biesheuvel 25520a004e7SWill Deacon init_pmd(pudp, addr, next, phys, __prot, pgtable_alloc, flags); 256d27cfa1fSArd Biesheuvel 257d27cfa1fSArd Biesheuvel phys += next - addr; 258d27cfa1fSArd Biesheuvel } while (addr = next, addr != end); 259d27cfa1fSArd Biesheuvel } 260d27cfa1fSArd Biesheuvel 261da141706SLaura Abbott static inline bool use_1G_block(unsigned long addr, unsigned long next, 262da141706SLaura Abbott unsigned long phys) 263da141706SLaura Abbott { 264da141706SLaura Abbott if (PAGE_SHIFT != 12) 265da141706SLaura Abbott return false; 266da141706SLaura Abbott 267da141706SLaura Abbott if (((addr | next | phys) & ~PUD_MASK) != 0) 268da141706SLaura Abbott return false; 269da141706SLaura Abbott 270da141706SLaura Abbott return true; 271da141706SLaura Abbott } 272da141706SLaura Abbott 27320a004e7SWill Deacon static void alloc_init_pud(pgd_t *pgdp, unsigned long addr, unsigned long end, 274da141706SLaura Abbott phys_addr_t phys, pgprot_t prot, 27553e1b329SArd Biesheuvel phys_addr_t (*pgtable_alloc)(void), 276c0951366SArd Biesheuvel int flags) 277c1cc1552SCatalin Marinas { 278c1cc1552SCatalin Marinas unsigned long next; 27920a004e7SWill Deacon pud_t *pudp; 28020a004e7SWill Deacon pgd_t pgd = READ_ONCE(*pgdp); 281c1cc1552SCatalin Marinas 28220a004e7SWill Deacon if (pgd_none(pgd)) { 283132233a7SLaura Abbott phys_addr_t pud_phys; 284132233a7SLaura Abbott BUG_ON(!pgtable_alloc); 285132233a7SLaura Abbott pud_phys = pgtable_alloc(); 28620a004e7SWill Deacon __pgd_populate(pgdp, pud_phys, PUD_TYPE_TABLE); 28720a004e7SWill Deacon pgd = READ_ONCE(*pgdp); 288c79b954bSJungseok Lee } 28920a004e7SWill Deacon BUG_ON(pgd_bad(pgd)); 290c79b954bSJungseok Lee 29120a004e7SWill Deacon pudp = pud_set_fixmap_offset(pgdp, addr); 292c1cc1552SCatalin Marinas do { 29320a004e7SWill Deacon pud_t old_pud = READ_ONCE(*pudp); 294e98216b5SArd Biesheuvel 295c1cc1552SCatalin Marinas next = pud_addr_end(addr, end); 296206a2a73SSteve Capper 297206a2a73SSteve Capper /* 298206a2a73SSteve Capper * For 4K granule only, attempt to put down a 1GB block 299206a2a73SSteve Capper */ 300c0951366SArd Biesheuvel if (use_1G_block(addr, next, phys) && 301c0951366SArd Biesheuvel (flags & NO_BLOCK_MAPPINGS) == 0) { 30220a004e7SWill Deacon pud_set_huge(pudp, phys, prot); 303206a2a73SSteve Capper 304206a2a73SSteve Capper /* 305e98216b5SArd Biesheuvel * After the PUD entry has been populated once, we 306e98216b5SArd Biesheuvel * only allow updates to the permission attributes. 307206a2a73SSteve Capper */ 308e98216b5SArd Biesheuvel BUG_ON(!pgattr_change_is_safe(pud_val(old_pud), 30920a004e7SWill Deacon READ_ONCE(pud_val(*pudp)))); 310206a2a73SSteve Capper } else { 31120a004e7SWill Deacon alloc_init_cont_pmd(pudp, addr, next, phys, prot, 312c0951366SArd Biesheuvel pgtable_alloc, flags); 313e98216b5SArd Biesheuvel 314e98216b5SArd Biesheuvel BUG_ON(pud_val(old_pud) != 0 && 31520a004e7SWill Deacon pud_val(old_pud) != READ_ONCE(pud_val(*pudp))); 316206a2a73SSteve Capper } 317c1cc1552SCatalin Marinas phys += next - addr; 31820a004e7SWill Deacon } while (pudp++, addr = next, addr != end); 319f4710445SMark Rutland 320f4710445SMark Rutland pud_clear_fixmap(); 321c1cc1552SCatalin Marinas } 322c1cc1552SCatalin Marinas 32340f87d31SArd Biesheuvel static void __create_pgd_mapping(pgd_t *pgdir, phys_addr_t phys, 32440f87d31SArd Biesheuvel unsigned long virt, phys_addr_t size, 32540f87d31SArd Biesheuvel pgprot_t prot, 32653e1b329SArd Biesheuvel phys_addr_t (*pgtable_alloc)(void), 327c0951366SArd Biesheuvel int flags) 328c1cc1552SCatalin Marinas { 329c1cc1552SCatalin Marinas unsigned long addr, length, end, next; 33020a004e7SWill Deacon pgd_t *pgdp = pgd_offset_raw(pgdir, virt); 331c1cc1552SCatalin Marinas 332cc5d2b3bSMark Rutland /* 333cc5d2b3bSMark Rutland * If the virtual and physical address don't have the same offset 334cc5d2b3bSMark Rutland * within a page, we cannot map the region as the caller expects. 335cc5d2b3bSMark Rutland */ 336cc5d2b3bSMark Rutland if (WARN_ON((phys ^ virt) & ~PAGE_MASK)) 337cc5d2b3bSMark Rutland return; 338cc5d2b3bSMark Rutland 3399c4e08a3SMark Rutland phys &= PAGE_MASK; 340c1cc1552SCatalin Marinas addr = virt & PAGE_MASK; 341c1cc1552SCatalin Marinas length = PAGE_ALIGN(size + (virt & ~PAGE_MASK)); 342c1cc1552SCatalin Marinas 343c1cc1552SCatalin Marinas end = addr + length; 344c1cc1552SCatalin Marinas do { 345c1cc1552SCatalin Marinas next = pgd_addr_end(addr, end); 34620a004e7SWill Deacon alloc_init_pud(pgdp, addr, next, phys, prot, pgtable_alloc, 347c0951366SArd Biesheuvel flags); 348c1cc1552SCatalin Marinas phys += next - addr; 34920a004e7SWill Deacon } while (pgdp++, addr = next, addr != end); 350c1cc1552SCatalin Marinas } 351c1cc1552SCatalin Marinas 3521378dc3dSArd Biesheuvel static phys_addr_t pgd_pgtable_alloc(void) 353da141706SLaura Abbott { 35421ab99c2SMark Rutland void *ptr = (void *)__get_free_page(PGALLOC_GFP); 3551378dc3dSArd Biesheuvel if (!ptr || !pgtable_page_ctor(virt_to_page(ptr))) 3561378dc3dSArd Biesheuvel BUG(); 35721ab99c2SMark Rutland 35821ab99c2SMark Rutland /* Ensure the zeroed page is visible to the page table walker */ 35921ab99c2SMark Rutland dsb(ishst); 360f4710445SMark Rutland return __pa(ptr); 361da141706SLaura Abbott } 362da141706SLaura Abbott 363132233a7SLaura Abbott /* 364132233a7SLaura Abbott * This function can only be used to modify existing table entries, 365132233a7SLaura Abbott * without allocating new levels of table. Note that this permits the 366132233a7SLaura Abbott * creation of new section or page entries. 367132233a7SLaura Abbott */ 368132233a7SLaura Abbott static void __init create_mapping_noalloc(phys_addr_t phys, unsigned long virt, 369da141706SLaura Abbott phys_addr_t size, pgprot_t prot) 370d7ecbddfSMark Salter { 371d7ecbddfSMark Salter if (virt < VMALLOC_START) { 372d7ecbddfSMark Salter pr_warn("BUG: not creating mapping for %pa at 0x%016lx - outside kernel range\n", 373d7ecbddfSMark Salter &phys, virt); 374d7ecbddfSMark Salter return; 375d7ecbddfSMark Salter } 376d27cfa1fSArd Biesheuvel __create_pgd_mapping(init_mm.pgd, phys, virt, size, prot, NULL, 377d27cfa1fSArd Biesheuvel NO_CONT_MAPPINGS); 378d7ecbddfSMark Salter } 379d7ecbddfSMark Salter 3808ce837ceSArd Biesheuvel void __init create_pgd_mapping(struct mm_struct *mm, phys_addr_t phys, 3818ce837ceSArd Biesheuvel unsigned long virt, phys_addr_t size, 382f14c66ceSArd Biesheuvel pgprot_t prot, bool page_mappings_only) 3838ce837ceSArd Biesheuvel { 384c0951366SArd Biesheuvel int flags = 0; 385c0951366SArd Biesheuvel 3861378dc3dSArd Biesheuvel BUG_ON(mm == &init_mm); 3871378dc3dSArd Biesheuvel 388c0951366SArd Biesheuvel if (page_mappings_only) 389d27cfa1fSArd Biesheuvel flags = NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS; 390c0951366SArd Biesheuvel 39111509a30SMark Rutland __create_pgd_mapping(mm->pgd, phys, virt, size, prot, 392c0951366SArd Biesheuvel pgd_pgtable_alloc, flags); 393d7ecbddfSMark Salter } 394d7ecbddfSMark Salter 395aa8c09beSArd Biesheuvel static void update_mapping_prot(phys_addr_t phys, unsigned long virt, 396da141706SLaura Abbott phys_addr_t size, pgprot_t prot) 397da141706SLaura Abbott { 398da141706SLaura Abbott if (virt < VMALLOC_START) { 399aa8c09beSArd Biesheuvel pr_warn("BUG: not updating mapping for %pa at 0x%016lx - outside kernel range\n", 400da141706SLaura Abbott &phys, virt); 401da141706SLaura Abbott return; 402da141706SLaura Abbott } 403da141706SLaura Abbott 404d27cfa1fSArd Biesheuvel __create_pgd_mapping(init_mm.pgd, phys, virt, size, prot, NULL, 405d27cfa1fSArd Biesheuvel NO_CONT_MAPPINGS); 406aa8c09beSArd Biesheuvel 407aa8c09beSArd Biesheuvel /* flush the TLBs after updating live kernel mappings */ 408aa8c09beSArd Biesheuvel flush_tlb_kernel_range(virt, virt + size); 409da141706SLaura Abbott } 410da141706SLaura Abbott 41120a004e7SWill Deacon static void __init __map_memblock(pgd_t *pgdp, phys_addr_t start, 41298d2e153STakahiro Akashi phys_addr_t end, pgprot_t prot, int flags) 413da141706SLaura Abbott { 41420a004e7SWill Deacon __create_pgd_mapping(pgdp, start, __phys_to_virt(start), end - start, 41598d2e153STakahiro Akashi prot, early_pgtable_alloc, flags); 416da141706SLaura Abbott } 417da141706SLaura Abbott 4185ea5306cSArd Biesheuvel void __init mark_linear_text_alias_ro(void) 4195ea5306cSArd Biesheuvel { 4205ea5306cSArd Biesheuvel /* 4215ea5306cSArd Biesheuvel * Remove the write permissions from the linear alias of .text/.rodata 4225ea5306cSArd Biesheuvel */ 4235ea5306cSArd Biesheuvel update_mapping_prot(__pa_symbol(_text), (unsigned long)lm_alias(_text), 4245ea5306cSArd Biesheuvel (unsigned long)__init_begin - (unsigned long)_text, 4255ea5306cSArd Biesheuvel PAGE_KERNEL_RO); 4265ea5306cSArd Biesheuvel } 4275ea5306cSArd Biesheuvel 42820a004e7SWill Deacon static void __init map_mem(pgd_t *pgdp) 429c1cc1552SCatalin Marinas { 43098d2e153STakahiro Akashi phys_addr_t kernel_start = __pa_symbol(_text); 43198d2e153STakahiro Akashi phys_addr_t kernel_end = __pa_symbol(__init_begin); 432c1cc1552SCatalin Marinas struct memblock_region *reg; 43398d2e153STakahiro Akashi int flags = 0; 43498d2e153STakahiro Akashi 43598d2e153STakahiro Akashi if (debug_pagealloc_enabled()) 43698d2e153STakahiro Akashi flags = NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS; 43798d2e153STakahiro Akashi 43898d2e153STakahiro Akashi /* 43998d2e153STakahiro Akashi * Take care not to create a writable alias for the 44098d2e153STakahiro Akashi * read-only text and rodata sections of the kernel image. 44198d2e153STakahiro Akashi * So temporarily mark them as NOMAP to skip mappings in 44298d2e153STakahiro Akashi * the following for-loop 44398d2e153STakahiro Akashi */ 44498d2e153STakahiro Akashi memblock_mark_nomap(kernel_start, kernel_end - kernel_start); 44598d2e153STakahiro Akashi #ifdef CONFIG_KEXEC_CORE 44698d2e153STakahiro Akashi if (crashk_res.end) 44798d2e153STakahiro Akashi memblock_mark_nomap(crashk_res.start, 44898d2e153STakahiro Akashi resource_size(&crashk_res)); 44998d2e153STakahiro Akashi #endif 450f6bc87c3SSteve Capper 451c1cc1552SCatalin Marinas /* map all the memory banks */ 452c1cc1552SCatalin Marinas for_each_memblock(memory, reg) { 453c1cc1552SCatalin Marinas phys_addr_t start = reg->base; 454c1cc1552SCatalin Marinas phys_addr_t end = start + reg->size; 455c1cc1552SCatalin Marinas 456c1cc1552SCatalin Marinas if (start >= end) 457c1cc1552SCatalin Marinas break; 45868709f45SArd Biesheuvel if (memblock_is_nomap(reg)) 45968709f45SArd Biesheuvel continue; 460c1cc1552SCatalin Marinas 46120a004e7SWill Deacon __map_memblock(pgdp, start, end, PAGE_KERNEL, flags); 462c1cc1552SCatalin Marinas } 46398d2e153STakahiro Akashi 46498d2e153STakahiro Akashi /* 46598d2e153STakahiro Akashi * Map the linear alias of the [_text, __init_begin) interval 46698d2e153STakahiro Akashi * as non-executable now, and remove the write permission in 46798d2e153STakahiro Akashi * mark_linear_text_alias_ro() below (which will be called after 46898d2e153STakahiro Akashi * alternative patching has completed). This makes the contents 46998d2e153STakahiro Akashi * of the region accessible to subsystems such as hibernate, 47098d2e153STakahiro Akashi * but protects it from inadvertent modification or execution. 47198d2e153STakahiro Akashi * Note that contiguous mappings cannot be remapped in this way, 47298d2e153STakahiro Akashi * so we should avoid them here. 47398d2e153STakahiro Akashi */ 47420a004e7SWill Deacon __map_memblock(pgdp, kernel_start, kernel_end, 47598d2e153STakahiro Akashi PAGE_KERNEL, NO_CONT_MAPPINGS); 47698d2e153STakahiro Akashi memblock_clear_nomap(kernel_start, kernel_end - kernel_start); 47798d2e153STakahiro Akashi 47898d2e153STakahiro Akashi #ifdef CONFIG_KEXEC_CORE 47998d2e153STakahiro Akashi /* 48098d2e153STakahiro Akashi * Use page-level mappings here so that we can shrink the region 48198d2e153STakahiro Akashi * in page granularity and put back unused memory to buddy system 48298d2e153STakahiro Akashi * through /sys/kernel/kexec_crash_size interface. 48398d2e153STakahiro Akashi */ 48498d2e153STakahiro Akashi if (crashk_res.end) { 48520a004e7SWill Deacon __map_memblock(pgdp, crashk_res.start, crashk_res.end + 1, 48698d2e153STakahiro Akashi PAGE_KERNEL, 48798d2e153STakahiro Akashi NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS); 48898d2e153STakahiro Akashi memblock_clear_nomap(crashk_res.start, 48998d2e153STakahiro Akashi resource_size(&crashk_res)); 49098d2e153STakahiro Akashi } 49198d2e153STakahiro Akashi #endif 492c1cc1552SCatalin Marinas } 493c1cc1552SCatalin Marinas 494da141706SLaura Abbott void mark_rodata_ro(void) 495da141706SLaura Abbott { 4962f39b5f9SJeremy Linton unsigned long section_size; 497f9040773SArd Biesheuvel 4982f39b5f9SJeremy Linton /* 4999fdc14c5SArd Biesheuvel * mark .rodata as read only. Use __init_begin rather than __end_rodata 5009fdc14c5SArd Biesheuvel * to cover NOTES and EXCEPTION_TABLE. 5012f39b5f9SJeremy Linton */ 5029fdc14c5SArd Biesheuvel section_size = (unsigned long)__init_begin - (unsigned long)__start_rodata; 503aa8c09beSArd Biesheuvel update_mapping_prot(__pa_symbol(__start_rodata), (unsigned long)__start_rodata, 5042f39b5f9SJeremy Linton section_size, PAGE_KERNEL_RO); 505e98216b5SArd Biesheuvel 5061404d6f1SLaura Abbott debug_checkwx(); 507da141706SLaura Abbott } 508da141706SLaura Abbott 50920a004e7SWill Deacon static void __init map_kernel_segment(pgd_t *pgdp, void *va_start, void *va_end, 510d27cfa1fSArd Biesheuvel pgprot_t prot, struct vm_struct *vma, 51192bbd16eSWill Deacon int flags, unsigned long vm_flags) 512068a17a5SMark Rutland { 5132077be67SLaura Abbott phys_addr_t pa_start = __pa_symbol(va_start); 514068a17a5SMark Rutland unsigned long size = va_end - va_start; 515068a17a5SMark Rutland 516068a17a5SMark Rutland BUG_ON(!PAGE_ALIGNED(pa_start)); 517068a17a5SMark Rutland BUG_ON(!PAGE_ALIGNED(size)); 518068a17a5SMark Rutland 51920a004e7SWill Deacon __create_pgd_mapping(pgdp, pa_start, (unsigned long)va_start, size, prot, 520d27cfa1fSArd Biesheuvel early_pgtable_alloc, flags); 521f9040773SArd Biesheuvel 52292bbd16eSWill Deacon if (!(vm_flags & VM_NO_GUARD)) 52392bbd16eSWill Deacon size += PAGE_SIZE; 52492bbd16eSWill Deacon 525f9040773SArd Biesheuvel vma->addr = va_start; 526f9040773SArd Biesheuvel vma->phys_addr = pa_start; 527f9040773SArd Biesheuvel vma->size = size; 52892bbd16eSWill Deacon vma->flags = VM_MAP | vm_flags; 529f9040773SArd Biesheuvel vma->caller = __builtin_return_address(0); 530f9040773SArd Biesheuvel 531f9040773SArd Biesheuvel vm_area_add_early(vma); 532068a17a5SMark Rutland } 533068a17a5SMark Rutland 53428b066daSArd Biesheuvel static int __init parse_rodata(char *arg) 53528b066daSArd Biesheuvel { 53628b066daSArd Biesheuvel return strtobool(arg, &rodata_enabled); 53728b066daSArd Biesheuvel } 53828b066daSArd Biesheuvel early_param("rodata", parse_rodata); 53928b066daSArd Biesheuvel 54051a0048bSWill Deacon #ifdef CONFIG_UNMAP_KERNEL_AT_EL0 54151a0048bSWill Deacon static int __init map_entry_trampoline(void) 54251a0048bSWill Deacon { 54351a0048bSWill Deacon pgprot_t prot = rodata_enabled ? PAGE_KERNEL_ROX : PAGE_KERNEL_EXEC; 54451a0048bSWill Deacon phys_addr_t pa_start = __pa_symbol(__entry_tramp_text_start); 54551a0048bSWill Deacon 54651a0048bSWill Deacon /* The trampoline is always mapped and can therefore be global */ 54751a0048bSWill Deacon pgprot_val(prot) &= ~PTE_NG; 54851a0048bSWill Deacon 54951a0048bSWill Deacon /* Map only the text into the trampoline page table */ 55051a0048bSWill Deacon memset(tramp_pg_dir, 0, PGD_SIZE); 55151a0048bSWill Deacon __create_pgd_mapping(tramp_pg_dir, pa_start, TRAMP_VALIAS, PAGE_SIZE, 55251a0048bSWill Deacon prot, pgd_pgtable_alloc, 0); 55351a0048bSWill Deacon 5546c27c408SWill Deacon /* Map both the text and data into the kernel page table */ 55551a0048bSWill Deacon __set_fixmap(FIX_ENTRY_TRAMP_TEXT, pa_start, prot); 5566c27c408SWill Deacon if (IS_ENABLED(CONFIG_RANDOMIZE_BASE)) { 5576c27c408SWill Deacon extern char __entry_tramp_data_start[]; 5586c27c408SWill Deacon 5596c27c408SWill Deacon __set_fixmap(FIX_ENTRY_TRAMP_DATA, 5606c27c408SWill Deacon __pa_symbol(__entry_tramp_data_start), 5616c27c408SWill Deacon PAGE_KERNEL_RO); 5626c27c408SWill Deacon } 5636c27c408SWill Deacon 56451a0048bSWill Deacon return 0; 56551a0048bSWill Deacon } 56651a0048bSWill Deacon core_initcall(map_entry_trampoline); 56751a0048bSWill Deacon #endif 56851a0048bSWill Deacon 569068a17a5SMark Rutland /* 570068a17a5SMark Rutland * Create fine-grained mappings for the kernel. 571068a17a5SMark Rutland */ 57220a004e7SWill Deacon static void __init map_kernel(pgd_t *pgdp) 573068a17a5SMark Rutland { 5742ebe088bSArd Biesheuvel static struct vm_struct vmlinux_text, vmlinux_rodata, vmlinux_inittext, 5752ebe088bSArd Biesheuvel vmlinux_initdata, vmlinux_data; 576068a17a5SMark Rutland 57728b066daSArd Biesheuvel /* 57828b066daSArd Biesheuvel * External debuggers may need to write directly to the text 57928b066daSArd Biesheuvel * mapping to install SW breakpoints. Allow this (only) when 58028b066daSArd Biesheuvel * explicitly requested with rodata=off. 58128b066daSArd Biesheuvel */ 58228b066daSArd Biesheuvel pgprot_t text_prot = rodata_enabled ? PAGE_KERNEL_ROX : PAGE_KERNEL_EXEC; 58328b066daSArd Biesheuvel 584d27cfa1fSArd Biesheuvel /* 585d27cfa1fSArd Biesheuvel * Only rodata will be remapped with different permissions later on, 586d27cfa1fSArd Biesheuvel * all other segments are allowed to use contiguous mappings. 587d27cfa1fSArd Biesheuvel */ 58820a004e7SWill Deacon map_kernel_segment(pgdp, _text, _etext, text_prot, &vmlinux_text, 0, 58992bbd16eSWill Deacon VM_NO_GUARD); 59020a004e7SWill Deacon map_kernel_segment(pgdp, __start_rodata, __inittext_begin, PAGE_KERNEL, 59192bbd16eSWill Deacon &vmlinux_rodata, NO_CONT_MAPPINGS, VM_NO_GUARD); 59220a004e7SWill Deacon map_kernel_segment(pgdp, __inittext_begin, __inittext_end, text_prot, 59392bbd16eSWill Deacon &vmlinux_inittext, 0, VM_NO_GUARD); 59420a004e7SWill Deacon map_kernel_segment(pgdp, __initdata_begin, __initdata_end, PAGE_KERNEL, 59592bbd16eSWill Deacon &vmlinux_initdata, 0, VM_NO_GUARD); 59620a004e7SWill Deacon map_kernel_segment(pgdp, _data, _end, PAGE_KERNEL, &vmlinux_data, 0, 0); 597068a17a5SMark Rutland 59820a004e7SWill Deacon if (!READ_ONCE(pgd_val(*pgd_offset_raw(pgdp, FIXADDR_START)))) { 599068a17a5SMark Rutland /* 600f9040773SArd Biesheuvel * The fixmap falls in a separate pgd to the kernel, and doesn't 601f9040773SArd Biesheuvel * live in the carveout for the swapper_pg_dir. We can simply 602f9040773SArd Biesheuvel * re-use the existing dir for the fixmap. 603068a17a5SMark Rutland */ 60420a004e7SWill Deacon set_pgd(pgd_offset_raw(pgdp, FIXADDR_START), 60520a004e7SWill Deacon READ_ONCE(*pgd_offset_k(FIXADDR_START))); 606f9040773SArd Biesheuvel } else if (CONFIG_PGTABLE_LEVELS > 3) { 607f9040773SArd Biesheuvel /* 608f9040773SArd Biesheuvel * The fixmap shares its top level pgd entry with the kernel 609f9040773SArd Biesheuvel * mapping. This can really only occur when we are running 610f9040773SArd Biesheuvel * with 16k/4 levels, so we can simply reuse the pud level 611f9040773SArd Biesheuvel * entry instead. 612f9040773SArd Biesheuvel */ 613f9040773SArd Biesheuvel BUG_ON(!IS_ENABLED(CONFIG_ARM64_16K_PAGES)); 61420a004e7SWill Deacon pud_populate(&init_mm, 61520a004e7SWill Deacon pud_set_fixmap_offset(pgdp, FIXADDR_START), 61619338304SKristina Martsenko lm_alias(bm_pmd)); 617f9040773SArd Biesheuvel pud_clear_fixmap(); 618f9040773SArd Biesheuvel } else { 619f9040773SArd Biesheuvel BUG(); 620f9040773SArd Biesheuvel } 621068a17a5SMark Rutland 62220a004e7SWill Deacon kasan_copy_shadow(pgdp); 623068a17a5SMark Rutland } 624068a17a5SMark Rutland 625c1cc1552SCatalin Marinas /* 626c1cc1552SCatalin Marinas * paging_init() sets up the page tables, initialises the zone memory 627c1cc1552SCatalin Marinas * maps and sets up the zero page. 628c1cc1552SCatalin Marinas */ 629c1cc1552SCatalin Marinas void __init paging_init(void) 630c1cc1552SCatalin Marinas { 631068a17a5SMark Rutland phys_addr_t pgd_phys = early_pgtable_alloc(); 63220a004e7SWill Deacon pgd_t *pgdp = pgd_set_fixmap(pgd_phys); 633068a17a5SMark Rutland 63420a004e7SWill Deacon map_kernel(pgdp); 63520a004e7SWill Deacon map_mem(pgdp); 636068a17a5SMark Rutland 637068a17a5SMark Rutland /* 638068a17a5SMark Rutland * We want to reuse the original swapper_pg_dir so we don't have to 639068a17a5SMark Rutland * communicate the new address to non-coherent secondaries in 640068a17a5SMark Rutland * secondary_entry, and so cpu_switch_mm can generate the address with 641068a17a5SMark Rutland * adrp+add rather than a load from some global variable. 642068a17a5SMark Rutland * 643068a17a5SMark Rutland * To do this we need to go via a temporary pgd. 644068a17a5SMark Rutland */ 645068a17a5SMark Rutland cpu_replace_ttbr1(__va(pgd_phys)); 64620a004e7SWill Deacon memcpy(swapper_pg_dir, pgdp, PGD_SIZE); 6472077be67SLaura Abbott cpu_replace_ttbr1(lm_alias(swapper_pg_dir)); 648068a17a5SMark Rutland 649068a17a5SMark Rutland pgd_clear_fixmap(); 650068a17a5SMark Rutland memblock_free(pgd_phys, PAGE_SIZE); 651068a17a5SMark Rutland 652068a17a5SMark Rutland /* 653068a17a5SMark Rutland * We only reuse the PGD from the swapper_pg_dir, not the pud + pmd 654068a17a5SMark Rutland * allocated with it. 655068a17a5SMark Rutland */ 6562077be67SLaura Abbott memblock_free(__pa_symbol(swapper_pg_dir) + PAGE_SIZE, 6570370b31eSSteve Capper __pa_symbol(swapper_pg_end) - __pa_symbol(swapper_pg_dir) 6580370b31eSSteve Capper - PAGE_SIZE); 659c1cc1552SCatalin Marinas } 660c1cc1552SCatalin Marinas 661c1cc1552SCatalin Marinas /* 662c1cc1552SCatalin Marinas * Check whether a kernel address is valid (derived from arch/x86/). 663c1cc1552SCatalin Marinas */ 664c1cc1552SCatalin Marinas int kern_addr_valid(unsigned long addr) 665c1cc1552SCatalin Marinas { 66620a004e7SWill Deacon pgd_t *pgdp; 66720a004e7SWill Deacon pud_t *pudp, pud; 66820a004e7SWill Deacon pmd_t *pmdp, pmd; 66920a004e7SWill Deacon pte_t *ptep, pte; 670c1cc1552SCatalin Marinas 671c1cc1552SCatalin Marinas if ((((long)addr) >> VA_BITS) != -1UL) 672c1cc1552SCatalin Marinas return 0; 673c1cc1552SCatalin Marinas 67420a004e7SWill Deacon pgdp = pgd_offset_k(addr); 67520a004e7SWill Deacon if (pgd_none(READ_ONCE(*pgdp))) 676c1cc1552SCatalin Marinas return 0; 677c1cc1552SCatalin Marinas 67820a004e7SWill Deacon pudp = pud_offset(pgdp, addr); 67920a004e7SWill Deacon pud = READ_ONCE(*pudp); 68020a004e7SWill Deacon if (pud_none(pud)) 681c1cc1552SCatalin Marinas return 0; 682c1cc1552SCatalin Marinas 68320a004e7SWill Deacon if (pud_sect(pud)) 68420a004e7SWill Deacon return pfn_valid(pud_pfn(pud)); 685206a2a73SSteve Capper 68620a004e7SWill Deacon pmdp = pmd_offset(pudp, addr); 68720a004e7SWill Deacon pmd = READ_ONCE(*pmdp); 68820a004e7SWill Deacon if (pmd_none(pmd)) 689c1cc1552SCatalin Marinas return 0; 690c1cc1552SCatalin Marinas 69120a004e7SWill Deacon if (pmd_sect(pmd)) 69220a004e7SWill Deacon return pfn_valid(pmd_pfn(pmd)); 693da6e4cb6SDave Anderson 69420a004e7SWill Deacon ptep = pte_offset_kernel(pmdp, addr); 69520a004e7SWill Deacon pte = READ_ONCE(*ptep); 69620a004e7SWill Deacon if (pte_none(pte)) 697c1cc1552SCatalin Marinas return 0; 698c1cc1552SCatalin Marinas 69920a004e7SWill Deacon return pfn_valid(pte_pfn(pte)); 700c1cc1552SCatalin Marinas } 701c1cc1552SCatalin Marinas #ifdef CONFIG_SPARSEMEM_VMEMMAP 702b433dce0SSuzuki K. Poulose #if !ARM64_SWAPPER_USES_SECTION_MAPS 7037b73d978SChristoph Hellwig int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node, 7047b73d978SChristoph Hellwig struct vmem_altmap *altmap) 705c1cc1552SCatalin Marinas { 7060aad818bSJohannes Weiner return vmemmap_populate_basepages(start, end, node); 707c1cc1552SCatalin Marinas } 708b433dce0SSuzuki K. Poulose #else /* !ARM64_SWAPPER_USES_SECTION_MAPS */ 7097b73d978SChristoph Hellwig int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node, 7107b73d978SChristoph Hellwig struct vmem_altmap *altmap) 711c1cc1552SCatalin Marinas { 7120aad818bSJohannes Weiner unsigned long addr = start; 713c1cc1552SCatalin Marinas unsigned long next; 71420a004e7SWill Deacon pgd_t *pgdp; 71520a004e7SWill Deacon pud_t *pudp; 71620a004e7SWill Deacon pmd_t *pmdp; 717c1cc1552SCatalin Marinas 718c1cc1552SCatalin Marinas do { 719c1cc1552SCatalin Marinas next = pmd_addr_end(addr, end); 720c1cc1552SCatalin Marinas 72120a004e7SWill Deacon pgdp = vmemmap_pgd_populate(addr, node); 72220a004e7SWill Deacon if (!pgdp) 723c1cc1552SCatalin Marinas return -ENOMEM; 724c1cc1552SCatalin Marinas 72520a004e7SWill Deacon pudp = vmemmap_pud_populate(pgdp, addr, node); 72620a004e7SWill Deacon if (!pudp) 727c1cc1552SCatalin Marinas return -ENOMEM; 728c1cc1552SCatalin Marinas 72920a004e7SWill Deacon pmdp = pmd_offset(pudp, addr); 73020a004e7SWill Deacon if (pmd_none(READ_ONCE(*pmdp))) { 731c1cc1552SCatalin Marinas void *p = NULL; 732c1cc1552SCatalin Marinas 733c1cc1552SCatalin Marinas p = vmemmap_alloc_block_buf(PMD_SIZE, node); 734c1cc1552SCatalin Marinas if (!p) 735c1cc1552SCatalin Marinas return -ENOMEM; 736c1cc1552SCatalin Marinas 73720a004e7SWill Deacon pmd_set_huge(pmdp, __pa(p), __pgprot(PROT_SECT_NORMAL)); 738c1cc1552SCatalin Marinas } else 73920a004e7SWill Deacon vmemmap_verify((pte_t *)pmdp, node, addr, next); 740c1cc1552SCatalin Marinas } while (addr = next, addr != end); 741c1cc1552SCatalin Marinas 742c1cc1552SCatalin Marinas return 0; 743c1cc1552SCatalin Marinas } 744c1cc1552SCatalin Marinas #endif /* CONFIG_ARM64_64K_PAGES */ 74524b6d416SChristoph Hellwig void vmemmap_free(unsigned long start, unsigned long end, 74624b6d416SChristoph Hellwig struct vmem_altmap *altmap) 7470197518cSTang Chen { 7480197518cSTang Chen } 749c1cc1552SCatalin Marinas #endif /* CONFIG_SPARSEMEM_VMEMMAP */ 750af86e597SLaura Abbott 751af86e597SLaura Abbott static inline pud_t * fixmap_pud(unsigned long addr) 752af86e597SLaura Abbott { 75320a004e7SWill Deacon pgd_t *pgdp = pgd_offset_k(addr); 75420a004e7SWill Deacon pgd_t pgd = READ_ONCE(*pgdp); 755af86e597SLaura Abbott 75620a004e7SWill Deacon BUG_ON(pgd_none(pgd) || pgd_bad(pgd)); 757af86e597SLaura Abbott 75820a004e7SWill Deacon return pud_offset_kimg(pgdp, addr); 759af86e597SLaura Abbott } 760af86e597SLaura Abbott 761af86e597SLaura Abbott static inline pmd_t * fixmap_pmd(unsigned long addr) 762af86e597SLaura Abbott { 76320a004e7SWill Deacon pud_t *pudp = fixmap_pud(addr); 76420a004e7SWill Deacon pud_t pud = READ_ONCE(*pudp); 765af86e597SLaura Abbott 76620a004e7SWill Deacon BUG_ON(pud_none(pud) || pud_bad(pud)); 767af86e597SLaura Abbott 76820a004e7SWill Deacon return pmd_offset_kimg(pudp, addr); 769af86e597SLaura Abbott } 770af86e597SLaura Abbott 771af86e597SLaura Abbott static inline pte_t * fixmap_pte(unsigned long addr) 772af86e597SLaura Abbott { 773157962f5SArd Biesheuvel return &bm_pte[pte_index(addr)]; 774af86e597SLaura Abbott } 775af86e597SLaura Abbott 7762077be67SLaura Abbott /* 7772077be67SLaura Abbott * The p*d_populate functions call virt_to_phys implicitly so they can't be used 7782077be67SLaura Abbott * directly on kernel symbols (bm_p*d). This function is called too early to use 7792077be67SLaura Abbott * lm_alias so __p*d_populate functions must be used to populate with the 7802077be67SLaura Abbott * physical address from __pa_symbol. 7812077be67SLaura Abbott */ 782af86e597SLaura Abbott void __init early_fixmap_init(void) 783af86e597SLaura Abbott { 78420a004e7SWill Deacon pgd_t *pgdp, pgd; 78520a004e7SWill Deacon pud_t *pudp; 78620a004e7SWill Deacon pmd_t *pmdp; 787af86e597SLaura Abbott unsigned long addr = FIXADDR_START; 788af86e597SLaura Abbott 78920a004e7SWill Deacon pgdp = pgd_offset_k(addr); 79020a004e7SWill Deacon pgd = READ_ONCE(*pgdp); 791f80fb3a3SArd Biesheuvel if (CONFIG_PGTABLE_LEVELS > 3 && 79220a004e7SWill Deacon !(pgd_none(pgd) || pgd_page_paddr(pgd) == __pa_symbol(bm_pud))) { 793f9040773SArd Biesheuvel /* 794f9040773SArd Biesheuvel * We only end up here if the kernel mapping and the fixmap 795f9040773SArd Biesheuvel * share the top level pgd entry, which should only happen on 796f9040773SArd Biesheuvel * 16k/4 levels configurations. 797f9040773SArd Biesheuvel */ 798f9040773SArd Biesheuvel BUG_ON(!IS_ENABLED(CONFIG_ARM64_16K_PAGES)); 79920a004e7SWill Deacon pudp = pud_offset_kimg(pgdp, addr); 800f9040773SArd Biesheuvel } else { 80120a004e7SWill Deacon if (pgd_none(pgd)) 80220a004e7SWill Deacon __pgd_populate(pgdp, __pa_symbol(bm_pud), PUD_TYPE_TABLE); 80320a004e7SWill Deacon pudp = fixmap_pud(addr); 804f9040773SArd Biesheuvel } 80520a004e7SWill Deacon if (pud_none(READ_ONCE(*pudp))) 80620a004e7SWill Deacon __pud_populate(pudp, __pa_symbol(bm_pmd), PMD_TYPE_TABLE); 80720a004e7SWill Deacon pmdp = fixmap_pmd(addr); 80820a004e7SWill Deacon __pmd_populate(pmdp, __pa_symbol(bm_pte), PMD_TYPE_TABLE); 809af86e597SLaura Abbott 810af86e597SLaura Abbott /* 811af86e597SLaura Abbott * The boot-ioremap range spans multiple pmds, for which 812157962f5SArd Biesheuvel * we are not prepared: 813af86e597SLaura Abbott */ 814af86e597SLaura Abbott BUILD_BUG_ON((__fix_to_virt(FIX_BTMAP_BEGIN) >> PMD_SHIFT) 815af86e597SLaura Abbott != (__fix_to_virt(FIX_BTMAP_END) >> PMD_SHIFT)); 816af86e597SLaura Abbott 81720a004e7SWill Deacon if ((pmdp != fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN))) 81820a004e7SWill Deacon || pmdp != fixmap_pmd(fix_to_virt(FIX_BTMAP_END))) { 819af86e597SLaura Abbott WARN_ON(1); 82020a004e7SWill Deacon pr_warn("pmdp %p != %p, %p\n", 82120a004e7SWill Deacon pmdp, fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN)), 822af86e597SLaura Abbott fixmap_pmd(fix_to_virt(FIX_BTMAP_END))); 823af86e597SLaura Abbott pr_warn("fix_to_virt(FIX_BTMAP_BEGIN): %08lx\n", 824af86e597SLaura Abbott fix_to_virt(FIX_BTMAP_BEGIN)); 825af86e597SLaura Abbott pr_warn("fix_to_virt(FIX_BTMAP_END): %08lx\n", 826af86e597SLaura Abbott fix_to_virt(FIX_BTMAP_END)); 827af86e597SLaura Abbott 828af86e597SLaura Abbott pr_warn("FIX_BTMAP_END: %d\n", FIX_BTMAP_END); 829af86e597SLaura Abbott pr_warn("FIX_BTMAP_BEGIN: %d\n", FIX_BTMAP_BEGIN); 830af86e597SLaura Abbott } 831af86e597SLaura Abbott } 832af86e597SLaura Abbott 83318b4b276SJames Morse /* 83418b4b276SJames Morse * Unusually, this is also called in IRQ context (ghes_iounmap_irq) so if we 83518b4b276SJames Morse * ever need to use IPIs for TLB broadcasting, then we're in trouble here. 83618b4b276SJames Morse */ 837af86e597SLaura Abbott void __set_fixmap(enum fixed_addresses idx, 838af86e597SLaura Abbott phys_addr_t phys, pgprot_t flags) 839af86e597SLaura Abbott { 840af86e597SLaura Abbott unsigned long addr = __fix_to_virt(idx); 84120a004e7SWill Deacon pte_t *ptep; 842af86e597SLaura Abbott 843b63dbef9SMark Rutland BUG_ON(idx <= FIX_HOLE || idx >= __end_of_fixed_addresses); 844af86e597SLaura Abbott 84520a004e7SWill Deacon ptep = fixmap_pte(addr); 846af86e597SLaura Abbott 847af86e597SLaura Abbott if (pgprot_val(flags)) { 84820a004e7SWill Deacon set_pte(ptep, pfn_pte(phys >> PAGE_SHIFT, flags)); 849af86e597SLaura Abbott } else { 85020a004e7SWill Deacon pte_clear(&init_mm, addr, ptep); 851af86e597SLaura Abbott flush_tlb_kernel_range(addr, addr+PAGE_SIZE); 852af86e597SLaura Abbott } 853af86e597SLaura Abbott } 85461bd93ceSArd Biesheuvel 855f80fb3a3SArd Biesheuvel void *__init __fixmap_remap_fdt(phys_addr_t dt_phys, int *size, pgprot_t prot) 85661bd93ceSArd Biesheuvel { 85761bd93ceSArd Biesheuvel const u64 dt_virt_base = __fix_to_virt(FIX_FDT); 858f80fb3a3SArd Biesheuvel int offset; 85961bd93ceSArd Biesheuvel void *dt_virt; 86061bd93ceSArd Biesheuvel 86161bd93ceSArd Biesheuvel /* 86261bd93ceSArd Biesheuvel * Check whether the physical FDT address is set and meets the minimum 86361bd93ceSArd Biesheuvel * alignment requirement. Since we are relying on MIN_FDT_ALIGN to be 86404a84810SArd Biesheuvel * at least 8 bytes so that we can always access the magic and size 86504a84810SArd Biesheuvel * fields of the FDT header after mapping the first chunk, double check 86604a84810SArd Biesheuvel * here if that is indeed the case. 86761bd93ceSArd Biesheuvel */ 86861bd93ceSArd Biesheuvel BUILD_BUG_ON(MIN_FDT_ALIGN < 8); 86961bd93ceSArd Biesheuvel if (!dt_phys || dt_phys % MIN_FDT_ALIGN) 87061bd93ceSArd Biesheuvel return NULL; 87161bd93ceSArd Biesheuvel 87261bd93ceSArd Biesheuvel /* 87361bd93ceSArd Biesheuvel * Make sure that the FDT region can be mapped without the need to 87461bd93ceSArd Biesheuvel * allocate additional translation table pages, so that it is safe 875132233a7SLaura Abbott * to call create_mapping_noalloc() this early. 87661bd93ceSArd Biesheuvel * 87761bd93ceSArd Biesheuvel * On 64k pages, the FDT will be mapped using PTEs, so we need to 87861bd93ceSArd Biesheuvel * be in the same PMD as the rest of the fixmap. 87961bd93ceSArd Biesheuvel * On 4k pages, we'll use section mappings for the FDT so we only 88061bd93ceSArd Biesheuvel * have to be in the same PUD. 88161bd93ceSArd Biesheuvel */ 88261bd93ceSArd Biesheuvel BUILD_BUG_ON(dt_virt_base % SZ_2M); 88361bd93ceSArd Biesheuvel 884b433dce0SSuzuki K. Poulose BUILD_BUG_ON(__fix_to_virt(FIX_FDT_END) >> SWAPPER_TABLE_SHIFT != 885b433dce0SSuzuki K. Poulose __fix_to_virt(FIX_BTMAP_BEGIN) >> SWAPPER_TABLE_SHIFT); 88661bd93ceSArd Biesheuvel 887b433dce0SSuzuki K. Poulose offset = dt_phys % SWAPPER_BLOCK_SIZE; 88861bd93ceSArd Biesheuvel dt_virt = (void *)dt_virt_base + offset; 88961bd93ceSArd Biesheuvel 89061bd93ceSArd Biesheuvel /* map the first chunk so we can read the size from the header */ 891132233a7SLaura Abbott create_mapping_noalloc(round_down(dt_phys, SWAPPER_BLOCK_SIZE), 892132233a7SLaura Abbott dt_virt_base, SWAPPER_BLOCK_SIZE, prot); 89361bd93ceSArd Biesheuvel 89404a84810SArd Biesheuvel if (fdt_magic(dt_virt) != FDT_MAGIC) 89561bd93ceSArd Biesheuvel return NULL; 89661bd93ceSArd Biesheuvel 897f80fb3a3SArd Biesheuvel *size = fdt_totalsize(dt_virt); 898f80fb3a3SArd Biesheuvel if (*size > MAX_FDT_SIZE) 89961bd93ceSArd Biesheuvel return NULL; 90061bd93ceSArd Biesheuvel 901f80fb3a3SArd Biesheuvel if (offset + *size > SWAPPER_BLOCK_SIZE) 902132233a7SLaura Abbott create_mapping_noalloc(round_down(dt_phys, SWAPPER_BLOCK_SIZE), dt_virt_base, 903f80fb3a3SArd Biesheuvel round_up(offset + *size, SWAPPER_BLOCK_SIZE), prot); 904f80fb3a3SArd Biesheuvel 905f80fb3a3SArd Biesheuvel return dt_virt; 906f80fb3a3SArd Biesheuvel } 907f80fb3a3SArd Biesheuvel 908f80fb3a3SArd Biesheuvel void *__init fixmap_remap_fdt(phys_addr_t dt_phys) 909f80fb3a3SArd Biesheuvel { 910f80fb3a3SArd Biesheuvel void *dt_virt; 911f80fb3a3SArd Biesheuvel int size; 912f80fb3a3SArd Biesheuvel 913f80fb3a3SArd Biesheuvel dt_virt = __fixmap_remap_fdt(dt_phys, &size, PAGE_KERNEL_RO); 914f80fb3a3SArd Biesheuvel if (!dt_virt) 915f80fb3a3SArd Biesheuvel return NULL; 91661bd93ceSArd Biesheuvel 91761bd93ceSArd Biesheuvel memblock_reserve(dt_phys, size); 91861bd93ceSArd Biesheuvel return dt_virt; 91961bd93ceSArd Biesheuvel } 920324420bfSArd Biesheuvel 921324420bfSArd Biesheuvel int __init arch_ioremap_pud_supported(void) 922324420bfSArd Biesheuvel { 923324420bfSArd Biesheuvel /* only 4k granule supports level 1 block mappings */ 924324420bfSArd Biesheuvel return IS_ENABLED(CONFIG_ARM64_4K_PAGES); 925324420bfSArd Biesheuvel } 926324420bfSArd Biesheuvel 927324420bfSArd Biesheuvel int __init arch_ioremap_pmd_supported(void) 928324420bfSArd Biesheuvel { 929324420bfSArd Biesheuvel return 1; 930324420bfSArd Biesheuvel } 931324420bfSArd Biesheuvel 93220a004e7SWill Deacon int pud_set_huge(pud_t *pudp, phys_addr_t phys, pgprot_t prot) 933324420bfSArd Biesheuvel { 93419338304SKristina Martsenko pgprot_t sect_prot = __pgprot(PUD_TYPE_SECT | 93519338304SKristina Martsenko pgprot_val(mk_sect_prot(prot))); 93615122ee2SWill Deacon 93715122ee2SWill Deacon /* ioremap_page_range doesn't honour BBM */ 93815122ee2SWill Deacon if (pud_present(READ_ONCE(*pudp))) 93915122ee2SWill Deacon return 0; 94015122ee2SWill Deacon 941324420bfSArd Biesheuvel BUG_ON(phys & ~PUD_MASK); 94220a004e7SWill Deacon set_pud(pudp, pfn_pud(__phys_to_pfn(phys), sect_prot)); 943324420bfSArd Biesheuvel return 1; 944324420bfSArd Biesheuvel } 945324420bfSArd Biesheuvel 94620a004e7SWill Deacon int pmd_set_huge(pmd_t *pmdp, phys_addr_t phys, pgprot_t prot) 947324420bfSArd Biesheuvel { 94819338304SKristina Martsenko pgprot_t sect_prot = __pgprot(PMD_TYPE_SECT | 94919338304SKristina Martsenko pgprot_val(mk_sect_prot(prot))); 95015122ee2SWill Deacon 95115122ee2SWill Deacon /* ioremap_page_range doesn't honour BBM */ 95215122ee2SWill Deacon if (pmd_present(READ_ONCE(*pmdp))) 95315122ee2SWill Deacon return 0; 95415122ee2SWill Deacon 955324420bfSArd Biesheuvel BUG_ON(phys & ~PMD_MASK); 95620a004e7SWill Deacon set_pmd(pmdp, pfn_pmd(__phys_to_pfn(phys), sect_prot)); 957324420bfSArd Biesheuvel return 1; 958324420bfSArd Biesheuvel } 959324420bfSArd Biesheuvel 96020a004e7SWill Deacon int pud_clear_huge(pud_t *pudp) 961324420bfSArd Biesheuvel { 96220a004e7SWill Deacon if (!pud_sect(READ_ONCE(*pudp))) 963324420bfSArd Biesheuvel return 0; 96420a004e7SWill Deacon pud_clear(pudp); 965324420bfSArd Biesheuvel return 1; 966324420bfSArd Biesheuvel } 967324420bfSArd Biesheuvel 96820a004e7SWill Deacon int pmd_clear_huge(pmd_t *pmdp) 969324420bfSArd Biesheuvel { 97020a004e7SWill Deacon if (!pmd_sect(READ_ONCE(*pmdp))) 971324420bfSArd Biesheuvel return 0; 97220a004e7SWill Deacon pmd_clear(pmdp); 973324420bfSArd Biesheuvel return 1; 974324420bfSArd Biesheuvel } 975