1c1cc1552SCatalin Marinas /* 2c1cc1552SCatalin Marinas * Based on arch/arm/mm/mmu.c 3c1cc1552SCatalin Marinas * 4c1cc1552SCatalin Marinas * Copyright (C) 1995-2005 Russell King 5c1cc1552SCatalin Marinas * Copyright (C) 2012 ARM Ltd. 6c1cc1552SCatalin Marinas * 7c1cc1552SCatalin Marinas * This program is free software; you can redistribute it and/or modify 8c1cc1552SCatalin Marinas * it under the terms of the GNU General Public License version 2 as 9c1cc1552SCatalin Marinas * published by the Free Software Foundation. 10c1cc1552SCatalin Marinas * 11c1cc1552SCatalin Marinas * This program is distributed in the hope that it will be useful, 12c1cc1552SCatalin Marinas * but WITHOUT ANY WARRANTY; without even the implied warranty of 13c1cc1552SCatalin Marinas * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14c1cc1552SCatalin Marinas * GNU General Public License for more details. 15c1cc1552SCatalin Marinas * 16c1cc1552SCatalin Marinas * You should have received a copy of the GNU General Public License 17c1cc1552SCatalin Marinas * along with this program. If not, see <http://www.gnu.org/licenses/>. 18c1cc1552SCatalin Marinas */ 19c1cc1552SCatalin Marinas 20c1cc1552SCatalin Marinas #include <linux/export.h> 21c1cc1552SCatalin Marinas #include <linux/kernel.h> 22c1cc1552SCatalin Marinas #include <linux/errno.h> 23c1cc1552SCatalin Marinas #include <linux/init.h> 2461bd93ceSArd Biesheuvel #include <linux/libfdt.h> 25c1cc1552SCatalin Marinas #include <linux/mman.h> 26c1cc1552SCatalin Marinas #include <linux/nodemask.h> 27c1cc1552SCatalin Marinas #include <linux/memblock.h> 28c1cc1552SCatalin Marinas #include <linux/fs.h> 292475ff9dSCatalin Marinas #include <linux/io.h> 3041089357SCatalin Marinas #include <linux/slab.h> 31da141706SLaura Abbott #include <linux/stop_machine.h> 32c1cc1552SCatalin Marinas 33c1cc1552SCatalin Marinas #include <asm/cputype.h> 34af86e597SLaura Abbott #include <asm/fixmap.h> 35b433dce0SSuzuki K. Poulose #include <asm/kernel-pgtable.h> 36c1cc1552SCatalin Marinas #include <asm/sections.h> 37c1cc1552SCatalin Marinas #include <asm/setup.h> 38c1cc1552SCatalin Marinas #include <asm/sizes.h> 39c1cc1552SCatalin Marinas #include <asm/tlb.h> 40c79b954bSJungseok Lee #include <asm/memblock.h> 41c1cc1552SCatalin Marinas #include <asm/mmu_context.h> 42c1cc1552SCatalin Marinas 43c1cc1552SCatalin Marinas #include "mm.h" 44c1cc1552SCatalin Marinas 45dd006da2SArd Biesheuvel u64 idmap_t0sz = TCR_T0SZ(VA_BITS); 46dd006da2SArd Biesheuvel 47c1cc1552SCatalin Marinas /* 48c1cc1552SCatalin Marinas * Empty_zero_page is a special page that is used for zero-initialized data 49c1cc1552SCatalin Marinas * and COW. 50c1cc1552SCatalin Marinas */ 51c1cc1552SCatalin Marinas struct page *empty_zero_page; 52c1cc1552SCatalin Marinas EXPORT_SYMBOL(empty_zero_page); 53c1cc1552SCatalin Marinas 54c1cc1552SCatalin Marinas pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, 55c1cc1552SCatalin Marinas unsigned long size, pgprot_t vma_prot) 56c1cc1552SCatalin Marinas { 57c1cc1552SCatalin Marinas if (!pfn_valid(pfn)) 58c1cc1552SCatalin Marinas return pgprot_noncached(vma_prot); 59c1cc1552SCatalin Marinas else if (file->f_flags & O_SYNC) 60c1cc1552SCatalin Marinas return pgprot_writecombine(vma_prot); 61c1cc1552SCatalin Marinas return vma_prot; 62c1cc1552SCatalin Marinas } 63c1cc1552SCatalin Marinas EXPORT_SYMBOL(phys_mem_access_prot); 64c1cc1552SCatalin Marinas 65c1cc1552SCatalin Marinas static void __init *early_alloc(unsigned long sz) 66c1cc1552SCatalin Marinas { 67*7142392dSSuzuki K. Poulose phys_addr_t phys; 68*7142392dSSuzuki K. Poulose void *ptr; 69*7142392dSSuzuki K. Poulose 70*7142392dSSuzuki K. Poulose phys = memblock_alloc(sz, sz); 71*7142392dSSuzuki K. Poulose BUG_ON(!phys); 72*7142392dSSuzuki K. Poulose ptr = __va(phys); 73c1cc1552SCatalin Marinas memset(ptr, 0, sz); 74c1cc1552SCatalin Marinas return ptr; 75c1cc1552SCatalin Marinas } 76c1cc1552SCatalin Marinas 77da141706SLaura Abbott /* 78da141706SLaura Abbott * remap a PMD into pages 79da141706SLaura Abbott */ 80da141706SLaura Abbott static void split_pmd(pmd_t *pmd, pte_t *pte) 81da141706SLaura Abbott { 82da141706SLaura Abbott unsigned long pfn = pmd_pfn(*pmd); 83da141706SLaura Abbott int i = 0; 84da141706SLaura Abbott 85da141706SLaura Abbott do { 86da141706SLaura Abbott /* 87da141706SLaura Abbott * Need to have the least restrictive permissions available 88348a65cdSJeremy Linton * permissions will be fixed up later. Default the new page 89348a65cdSJeremy Linton * range as contiguous ptes. 90da141706SLaura Abbott */ 91348a65cdSJeremy Linton set_pte(pte, pfn_pte(pfn, PAGE_KERNEL_EXEC_CONT)); 92da141706SLaura Abbott pfn++; 93da141706SLaura Abbott } while (pte++, i++, i < PTRS_PER_PTE); 94da141706SLaura Abbott } 95da141706SLaura Abbott 96348a65cdSJeremy Linton /* 97348a65cdSJeremy Linton * Given a PTE with the CONT bit set, determine where the CONT range 98348a65cdSJeremy Linton * starts, and clear the entire range of PTE CONT bits. 99348a65cdSJeremy Linton */ 100348a65cdSJeremy Linton static void clear_cont_pte_range(pte_t *pte, unsigned long addr) 101348a65cdSJeremy Linton { 102348a65cdSJeremy Linton int i; 103348a65cdSJeremy Linton 104348a65cdSJeremy Linton pte -= CONT_RANGE_OFFSET(addr); 105348a65cdSJeremy Linton for (i = 0; i < CONT_PTES; i++) { 106348a65cdSJeremy Linton set_pte(pte, pte_mknoncont(*pte)); 107348a65cdSJeremy Linton pte++; 108348a65cdSJeremy Linton } 109348a65cdSJeremy Linton flush_tlb_all(); 110348a65cdSJeremy Linton } 111348a65cdSJeremy Linton 112348a65cdSJeremy Linton /* 113348a65cdSJeremy Linton * Given a range of PTEs set the pfn and provided page protection flags 114348a65cdSJeremy Linton */ 115348a65cdSJeremy Linton static void __populate_init_pte(pte_t *pte, unsigned long addr, 116348a65cdSJeremy Linton unsigned long end, phys_addr_t phys, 117348a65cdSJeremy Linton pgprot_t prot) 118348a65cdSJeremy Linton { 119348a65cdSJeremy Linton unsigned long pfn = __phys_to_pfn(phys); 120348a65cdSJeremy Linton 121348a65cdSJeremy Linton do { 122348a65cdSJeremy Linton /* clear all the bits except the pfn, then apply the prot */ 123348a65cdSJeremy Linton set_pte(pte, pfn_pte(pfn, prot)); 124348a65cdSJeremy Linton pte++; 125348a65cdSJeremy Linton pfn++; 126348a65cdSJeremy Linton addr += PAGE_SIZE; 127348a65cdSJeremy Linton } while (addr != end); 128348a65cdSJeremy Linton } 129348a65cdSJeremy Linton 130da141706SLaura Abbott static void alloc_init_pte(pmd_t *pmd, unsigned long addr, 131348a65cdSJeremy Linton unsigned long end, phys_addr_t phys, 132da141706SLaura Abbott pgprot_t prot, 133da141706SLaura Abbott void *(*alloc)(unsigned long size)) 134c1cc1552SCatalin Marinas { 135c1cc1552SCatalin Marinas pte_t *pte; 136348a65cdSJeremy Linton unsigned long next; 137c1cc1552SCatalin Marinas 138a1c76574SMark Rutland if (pmd_none(*pmd) || pmd_sect(*pmd)) { 139da141706SLaura Abbott pte = alloc(PTRS_PER_PTE * sizeof(pte_t)); 140da141706SLaura Abbott if (pmd_sect(*pmd)) 141da141706SLaura Abbott split_pmd(pmd, pte); 142c1cc1552SCatalin Marinas __pmd_populate(pmd, __pa(pte), PMD_TYPE_TABLE); 143da141706SLaura Abbott flush_tlb_all(); 144c1cc1552SCatalin Marinas } 145a1c76574SMark Rutland BUG_ON(pmd_bad(*pmd)); 146c1cc1552SCatalin Marinas 147c1cc1552SCatalin Marinas pte = pte_offset_kernel(pmd, addr); 148c1cc1552SCatalin Marinas do { 149348a65cdSJeremy Linton next = min(end, (addr + CONT_SIZE) & CONT_MASK); 150348a65cdSJeremy Linton if (((addr | next | phys) & ~CONT_MASK) == 0) { 151348a65cdSJeremy Linton /* a block of CONT_PTES */ 152348a65cdSJeremy Linton __populate_init_pte(pte, addr, next, phys, 153b219545eSArd Biesheuvel __pgprot(pgprot_val(prot) | PTE_CONT)); 154348a65cdSJeremy Linton } else { 155348a65cdSJeremy Linton /* 156348a65cdSJeremy Linton * If the range being split is already inside of a 157348a65cdSJeremy Linton * contiguous range but this PTE isn't going to be 158348a65cdSJeremy Linton * contiguous, then we want to unmark the adjacent 159348a65cdSJeremy Linton * ranges, then update the portion of the range we 160348a65cdSJeremy Linton * are interrested in. 161348a65cdSJeremy Linton */ 162348a65cdSJeremy Linton clear_cont_pte_range(pte, addr); 163348a65cdSJeremy Linton __populate_init_pte(pte, addr, next, phys, prot); 164348a65cdSJeremy Linton } 165348a65cdSJeremy Linton 166348a65cdSJeremy Linton pte += (next - addr) >> PAGE_SHIFT; 167348a65cdSJeremy Linton phys += next - addr; 168348a65cdSJeremy Linton addr = next; 169348a65cdSJeremy Linton } while (addr != end); 170c1cc1552SCatalin Marinas } 171c1cc1552SCatalin Marinas 1729a17a213SJisheng Zhang static void split_pud(pud_t *old_pud, pmd_t *pmd) 173da141706SLaura Abbott { 174da141706SLaura Abbott unsigned long addr = pud_pfn(*old_pud) << PAGE_SHIFT; 175da141706SLaura Abbott pgprot_t prot = __pgprot(pud_val(*old_pud) ^ addr); 176da141706SLaura Abbott int i = 0; 177da141706SLaura Abbott 178da141706SLaura Abbott do { 1791e43ba9cSArd Biesheuvel set_pmd(pmd, __pmd(addr | pgprot_val(prot))); 180da141706SLaura Abbott addr += PMD_SIZE; 181da141706SLaura Abbott } while (pmd++, i++, i < PTRS_PER_PMD); 182da141706SLaura Abbott } 183da141706SLaura Abbott 184da141706SLaura Abbott static void alloc_init_pmd(struct mm_struct *mm, pud_t *pud, 185e1e1fddaSArd Biesheuvel unsigned long addr, unsigned long end, 186da141706SLaura Abbott phys_addr_t phys, pgprot_t prot, 187da141706SLaura Abbott void *(*alloc)(unsigned long size)) 188c1cc1552SCatalin Marinas { 189c1cc1552SCatalin Marinas pmd_t *pmd; 190c1cc1552SCatalin Marinas unsigned long next; 191c1cc1552SCatalin Marinas 192c1cc1552SCatalin Marinas /* 193c1cc1552SCatalin Marinas * Check for initial section mappings in the pgd/pud and remove them. 194c1cc1552SCatalin Marinas */ 195a1c76574SMark Rutland if (pud_none(*pud) || pud_sect(*pud)) { 196da141706SLaura Abbott pmd = alloc(PTRS_PER_PMD * sizeof(pmd_t)); 197da141706SLaura Abbott if (pud_sect(*pud)) { 198da141706SLaura Abbott /* 199da141706SLaura Abbott * need to have the 1G of mappings continue to be 200da141706SLaura Abbott * present 201da141706SLaura Abbott */ 202da141706SLaura Abbott split_pud(pud, pmd); 203da141706SLaura Abbott } 204e1e1fddaSArd Biesheuvel pud_populate(mm, pud, pmd); 205da141706SLaura Abbott flush_tlb_all(); 206c1cc1552SCatalin Marinas } 207a1c76574SMark Rutland BUG_ON(pud_bad(*pud)); 208c1cc1552SCatalin Marinas 209c1cc1552SCatalin Marinas pmd = pmd_offset(pud, addr); 210c1cc1552SCatalin Marinas do { 211c1cc1552SCatalin Marinas next = pmd_addr_end(addr, end); 212c1cc1552SCatalin Marinas /* try section mapping first */ 213a55f9929SCatalin Marinas if (((addr | next | phys) & ~SECTION_MASK) == 0) { 214a55f9929SCatalin Marinas pmd_t old_pmd =*pmd; 2158ce837ceSArd Biesheuvel set_pmd(pmd, __pmd(phys | 2168ce837ceSArd Biesheuvel pgprot_val(mk_sect_prot(prot)))); 217a55f9929SCatalin Marinas /* 218a55f9929SCatalin Marinas * Check for previous table entries created during 219a55f9929SCatalin Marinas * boot (__create_page_tables) and flush them. 220a55f9929SCatalin Marinas */ 221523d6e9fSzhichang.yuan if (!pmd_none(old_pmd)) { 222a55f9929SCatalin Marinas flush_tlb_all(); 223523d6e9fSzhichang.yuan if (pmd_table(old_pmd)) { 224523d6e9fSzhichang.yuan phys_addr_t table = __pa(pte_offset_map(&old_pmd, 0)); 22541089357SCatalin Marinas if (!WARN_ON_ONCE(slab_is_available())) 226523d6e9fSzhichang.yuan memblock_free(table, PAGE_SIZE); 227523d6e9fSzhichang.yuan } 228523d6e9fSzhichang.yuan } 229a55f9929SCatalin Marinas } else { 230348a65cdSJeremy Linton alloc_init_pte(pmd, addr, next, phys, prot, alloc); 231a55f9929SCatalin Marinas } 232c1cc1552SCatalin Marinas phys += next - addr; 233c1cc1552SCatalin Marinas } while (pmd++, addr = next, addr != end); 234c1cc1552SCatalin Marinas } 235c1cc1552SCatalin Marinas 236da141706SLaura Abbott static inline bool use_1G_block(unsigned long addr, unsigned long next, 237da141706SLaura Abbott unsigned long phys) 238da141706SLaura Abbott { 239da141706SLaura Abbott if (PAGE_SHIFT != 12) 240da141706SLaura Abbott return false; 241da141706SLaura Abbott 242da141706SLaura Abbott if (((addr | next | phys) & ~PUD_MASK) != 0) 243da141706SLaura Abbott return false; 244da141706SLaura Abbott 245da141706SLaura Abbott return true; 246da141706SLaura Abbott } 247da141706SLaura Abbott 248da141706SLaura Abbott static void alloc_init_pud(struct mm_struct *mm, pgd_t *pgd, 249e1e1fddaSArd Biesheuvel unsigned long addr, unsigned long end, 250da141706SLaura Abbott phys_addr_t phys, pgprot_t prot, 251da141706SLaura Abbott void *(*alloc)(unsigned long size)) 252c1cc1552SCatalin Marinas { 253c79b954bSJungseok Lee pud_t *pud; 254c1cc1552SCatalin Marinas unsigned long next; 255c1cc1552SCatalin Marinas 256c79b954bSJungseok Lee if (pgd_none(*pgd)) { 257da141706SLaura Abbott pud = alloc(PTRS_PER_PUD * sizeof(pud_t)); 258e1e1fddaSArd Biesheuvel pgd_populate(mm, pgd, pud); 259c79b954bSJungseok Lee } 260c79b954bSJungseok Lee BUG_ON(pgd_bad(*pgd)); 261c79b954bSJungseok Lee 262c79b954bSJungseok Lee pud = pud_offset(pgd, addr); 263c1cc1552SCatalin Marinas do { 264c1cc1552SCatalin Marinas next = pud_addr_end(addr, end); 265206a2a73SSteve Capper 266206a2a73SSteve Capper /* 267206a2a73SSteve Capper * For 4K granule only, attempt to put down a 1GB block 268206a2a73SSteve Capper */ 269da141706SLaura Abbott if (use_1G_block(addr, next, phys)) { 270206a2a73SSteve Capper pud_t old_pud = *pud; 2718ce837ceSArd Biesheuvel set_pud(pud, __pud(phys | 2728ce837ceSArd Biesheuvel pgprot_val(mk_sect_prot(prot)))); 273206a2a73SSteve Capper 274206a2a73SSteve Capper /* 275206a2a73SSteve Capper * If we have an old value for a pud, it will 276206a2a73SSteve Capper * be pointing to a pmd table that we no longer 277206a2a73SSteve Capper * need (from swapper_pg_dir). 278206a2a73SSteve Capper * 279206a2a73SSteve Capper * Look up the old pmd table and free it. 280206a2a73SSteve Capper */ 281206a2a73SSteve Capper if (!pud_none(old_pud)) { 282206a2a73SSteve Capper flush_tlb_all(); 283523d6e9fSzhichang.yuan if (pud_table(old_pud)) { 284523d6e9fSzhichang.yuan phys_addr_t table = __pa(pmd_offset(&old_pud, 0)); 28541089357SCatalin Marinas if (!WARN_ON_ONCE(slab_is_available())) 286523d6e9fSzhichang.yuan memblock_free(table, PAGE_SIZE); 287523d6e9fSzhichang.yuan } 288206a2a73SSteve Capper } 289206a2a73SSteve Capper } else { 290da141706SLaura Abbott alloc_init_pmd(mm, pud, addr, next, phys, prot, alloc); 291206a2a73SSteve Capper } 292c1cc1552SCatalin Marinas phys += next - addr; 293c1cc1552SCatalin Marinas } while (pud++, addr = next, addr != end); 294c1cc1552SCatalin Marinas } 295c1cc1552SCatalin Marinas 296c1cc1552SCatalin Marinas /* 297c1cc1552SCatalin Marinas * Create the page directory entries and any necessary page tables for the 298c1cc1552SCatalin Marinas * mapping specified by 'md'. 299c1cc1552SCatalin Marinas */ 300da141706SLaura Abbott static void __create_mapping(struct mm_struct *mm, pgd_t *pgd, 301e1e1fddaSArd Biesheuvel phys_addr_t phys, unsigned long virt, 302da141706SLaura Abbott phys_addr_t size, pgprot_t prot, 303da141706SLaura Abbott void *(*alloc)(unsigned long size)) 304c1cc1552SCatalin Marinas { 305c1cc1552SCatalin Marinas unsigned long addr, length, end, next; 306c1cc1552SCatalin Marinas 307c1cc1552SCatalin Marinas addr = virt & PAGE_MASK; 308c1cc1552SCatalin Marinas length = PAGE_ALIGN(size + (virt & ~PAGE_MASK)); 309c1cc1552SCatalin Marinas 310c1cc1552SCatalin Marinas end = addr + length; 311c1cc1552SCatalin Marinas do { 312c1cc1552SCatalin Marinas next = pgd_addr_end(addr, end); 313da141706SLaura Abbott alloc_init_pud(mm, pgd, addr, next, phys, prot, alloc); 314c1cc1552SCatalin Marinas phys += next - addr; 315c1cc1552SCatalin Marinas } while (pgd++, addr = next, addr != end); 316c1cc1552SCatalin Marinas } 317c1cc1552SCatalin Marinas 318da141706SLaura Abbott static void *late_alloc(unsigned long size) 319da141706SLaura Abbott { 320da141706SLaura Abbott void *ptr; 321da141706SLaura Abbott 322da141706SLaura Abbott BUG_ON(size > PAGE_SIZE); 323da141706SLaura Abbott ptr = (void *)__get_free_page(PGALLOC_GFP); 324da141706SLaura Abbott BUG_ON(!ptr); 325da141706SLaura Abbott return ptr; 326da141706SLaura Abbott } 327da141706SLaura Abbott 328c53e0baaSMark Rutland static void __init create_mapping(phys_addr_t phys, unsigned long virt, 329da141706SLaura Abbott phys_addr_t size, pgprot_t prot) 330d7ecbddfSMark Salter { 331d7ecbddfSMark Salter if (virt < VMALLOC_START) { 332d7ecbddfSMark Salter pr_warn("BUG: not creating mapping for %pa at 0x%016lx - outside kernel range\n", 333d7ecbddfSMark Salter &phys, virt); 334d7ecbddfSMark Salter return; 335d7ecbddfSMark Salter } 336e1e1fddaSArd Biesheuvel __create_mapping(&init_mm, pgd_offset_k(virt & PAGE_MASK), phys, virt, 337da141706SLaura Abbott size, prot, early_alloc); 338d7ecbddfSMark Salter } 339d7ecbddfSMark Salter 3408ce837ceSArd Biesheuvel void __init create_pgd_mapping(struct mm_struct *mm, phys_addr_t phys, 3418ce837ceSArd Biesheuvel unsigned long virt, phys_addr_t size, 3428ce837ceSArd Biesheuvel pgprot_t prot) 3438ce837ceSArd Biesheuvel { 344da141706SLaura Abbott __create_mapping(mm, pgd_offset(mm, virt), phys, virt, size, prot, 34560305db9SArd Biesheuvel late_alloc); 346d7ecbddfSMark Salter } 347d7ecbddfSMark Salter 348da141706SLaura Abbott static void create_mapping_late(phys_addr_t phys, unsigned long virt, 349da141706SLaura Abbott phys_addr_t size, pgprot_t prot) 350da141706SLaura Abbott { 351da141706SLaura Abbott if (virt < VMALLOC_START) { 352da141706SLaura Abbott pr_warn("BUG: not creating mapping for %pa at 0x%016lx - outside kernel range\n", 353da141706SLaura Abbott &phys, virt); 354da141706SLaura Abbott return; 355da141706SLaura Abbott } 356da141706SLaura Abbott 357da141706SLaura Abbott return __create_mapping(&init_mm, pgd_offset_k(virt & PAGE_MASK), 358da141706SLaura Abbott phys, virt, size, prot, late_alloc); 359da141706SLaura Abbott } 360da141706SLaura Abbott 361da141706SLaura Abbott #ifdef CONFIG_DEBUG_RODATA 362da141706SLaura Abbott static void __init __map_memblock(phys_addr_t start, phys_addr_t end) 363da141706SLaura Abbott { 364da141706SLaura Abbott /* 365da141706SLaura Abbott * Set up the executable regions using the existing section mappings 366da141706SLaura Abbott * for now. This will get more fine grained later once all memory 367da141706SLaura Abbott * is mapped 368da141706SLaura Abbott */ 3694fee9f36SArd Biesheuvel unsigned long kernel_x_start = round_down(__pa(_stext), SWAPPER_BLOCK_SIZE); 3704fee9f36SArd Biesheuvel unsigned long kernel_x_end = round_up(__pa(__init_end), SWAPPER_BLOCK_SIZE); 371da141706SLaura Abbott 372da141706SLaura Abbott if (end < kernel_x_start) { 373da141706SLaura Abbott create_mapping(start, __phys_to_virt(start), 374da141706SLaura Abbott end - start, PAGE_KERNEL); 375da141706SLaura Abbott } else if (start >= kernel_x_end) { 376da141706SLaura Abbott create_mapping(start, __phys_to_virt(start), 377da141706SLaura Abbott end - start, PAGE_KERNEL); 378da141706SLaura Abbott } else { 379da141706SLaura Abbott if (start < kernel_x_start) 380da141706SLaura Abbott create_mapping(start, __phys_to_virt(start), 381da141706SLaura Abbott kernel_x_start - start, 382da141706SLaura Abbott PAGE_KERNEL); 383da141706SLaura Abbott create_mapping(kernel_x_start, 384da141706SLaura Abbott __phys_to_virt(kernel_x_start), 385da141706SLaura Abbott kernel_x_end - kernel_x_start, 386da141706SLaura Abbott PAGE_KERNEL_EXEC); 387da141706SLaura Abbott if (kernel_x_end < end) 388da141706SLaura Abbott create_mapping(kernel_x_end, 389da141706SLaura Abbott __phys_to_virt(kernel_x_end), 390da141706SLaura Abbott end - kernel_x_end, 391da141706SLaura Abbott PAGE_KERNEL); 392da141706SLaura Abbott } 393da141706SLaura Abbott 394da141706SLaura Abbott } 395da141706SLaura Abbott #else 396da141706SLaura Abbott static void __init __map_memblock(phys_addr_t start, phys_addr_t end) 397da141706SLaura Abbott { 398da141706SLaura Abbott create_mapping(start, __phys_to_virt(start), end - start, 399da141706SLaura Abbott PAGE_KERNEL_EXEC); 400da141706SLaura Abbott } 401da141706SLaura Abbott #endif 402da141706SLaura Abbott 403c1cc1552SCatalin Marinas static void __init map_mem(void) 404c1cc1552SCatalin Marinas { 405c1cc1552SCatalin Marinas struct memblock_region *reg; 406e25208f7SCatalin Marinas phys_addr_t limit; 407c1cc1552SCatalin Marinas 408f6bc87c3SSteve Capper /* 409f6bc87c3SSteve Capper * Temporarily limit the memblock range. We need to do this as 410f6bc87c3SSteve Capper * create_mapping requires puds, pmds and ptes to be allocated from 411f6bc87c3SSteve Capper * memory addressable from the initial direct kernel mapping. 412f6bc87c3SSteve Capper * 4133dec0fe4SCatalin Marinas * The initial direct kernel mapping, located at swapper_pg_dir, gives 414b433dce0SSuzuki K. Poulose * us PUD_SIZE (with SECTION maps) or PMD_SIZE (without SECTION maps, 415b433dce0SSuzuki K. Poulose * memory starting from PHYS_OFFSET (which must be aligned to 2MB as 416b433dce0SSuzuki K. Poulose * per Documentation/arm64/booting.txt). 417f6bc87c3SSteve Capper */ 418b433dce0SSuzuki K. Poulose limit = PHYS_OFFSET + SWAPPER_INIT_MAP_SIZE; 419e25208f7SCatalin Marinas memblock_set_current_limit(limit); 420f6bc87c3SSteve Capper 421c1cc1552SCatalin Marinas /* map all the memory banks */ 422c1cc1552SCatalin Marinas for_each_memblock(memory, reg) { 423c1cc1552SCatalin Marinas phys_addr_t start = reg->base; 424c1cc1552SCatalin Marinas phys_addr_t end = start + reg->size; 425c1cc1552SCatalin Marinas 426c1cc1552SCatalin Marinas if (start >= end) 427c1cc1552SCatalin Marinas break; 428c1cc1552SCatalin Marinas 429b433dce0SSuzuki K. Poulose if (ARM64_SWAPPER_USES_SECTION_MAPS) { 430e25208f7SCatalin Marinas /* 431e25208f7SCatalin Marinas * For the first memory bank align the start address and 432e25208f7SCatalin Marinas * current memblock limit to prevent create_mapping() from 433b433dce0SSuzuki K. Poulose * allocating pte page tables from unmapped memory. With 434b433dce0SSuzuki K. Poulose * the section maps, if the first block doesn't end on section 435b433dce0SSuzuki K. Poulose * size boundary, create_mapping() will try to allocate a pte 436b433dce0SSuzuki K. Poulose * page, which may be returned from an unmapped area. 437b433dce0SSuzuki K. Poulose * When section maps are not used, the pte page table for the 438b433dce0SSuzuki K. Poulose * current limit is already present in swapper_pg_dir. 439e25208f7SCatalin Marinas */ 440e25208f7SCatalin Marinas if (start < limit) 441b433dce0SSuzuki K. Poulose start = ALIGN(start, SECTION_SIZE); 442e25208f7SCatalin Marinas if (end < limit) { 443b433dce0SSuzuki K. Poulose limit = end & SECTION_MASK; 444e25208f7SCatalin Marinas memblock_set_current_limit(limit); 445e25208f7SCatalin Marinas } 446b433dce0SSuzuki K. Poulose } 447da141706SLaura Abbott __map_memblock(start, end); 448c1cc1552SCatalin Marinas } 449f6bc87c3SSteve Capper 450f6bc87c3SSteve Capper /* Limit no longer required. */ 451f6bc87c3SSteve Capper memblock_set_current_limit(MEMBLOCK_ALLOC_ANYWHERE); 452c1cc1552SCatalin Marinas } 453c1cc1552SCatalin Marinas 4549a17a213SJisheng Zhang static void __init fixup_executable(void) 455da141706SLaura Abbott { 456da141706SLaura Abbott #ifdef CONFIG_DEBUG_RODATA 457da141706SLaura Abbott /* now that we are actually fully mapped, make the start/end more fine grained */ 4584fee9f36SArd Biesheuvel if (!IS_ALIGNED((unsigned long)_stext, SWAPPER_BLOCK_SIZE)) { 459da141706SLaura Abbott unsigned long aligned_start = round_down(__pa(_stext), 4604fee9f36SArd Biesheuvel SWAPPER_BLOCK_SIZE); 461da141706SLaura Abbott 462da141706SLaura Abbott create_mapping(aligned_start, __phys_to_virt(aligned_start), 463da141706SLaura Abbott __pa(_stext) - aligned_start, 464da141706SLaura Abbott PAGE_KERNEL); 465da141706SLaura Abbott } 466da141706SLaura Abbott 4674fee9f36SArd Biesheuvel if (!IS_ALIGNED((unsigned long)__init_end, SWAPPER_BLOCK_SIZE)) { 468da141706SLaura Abbott unsigned long aligned_end = round_up(__pa(__init_end), 4694fee9f36SArd Biesheuvel SWAPPER_BLOCK_SIZE); 470da141706SLaura Abbott create_mapping(__pa(__init_end), (unsigned long)__init_end, 471da141706SLaura Abbott aligned_end - __pa(__init_end), 472da141706SLaura Abbott PAGE_KERNEL); 473da141706SLaura Abbott } 474da141706SLaura Abbott #endif 475da141706SLaura Abbott } 476da141706SLaura Abbott 477da141706SLaura Abbott #ifdef CONFIG_DEBUG_RODATA 478da141706SLaura Abbott void mark_rodata_ro(void) 479da141706SLaura Abbott { 480da141706SLaura Abbott create_mapping_late(__pa(_stext), (unsigned long)_stext, 481da141706SLaura Abbott (unsigned long)_etext - (unsigned long)_stext, 4820b2aa5b8SLaura Abbott PAGE_KERNEL_ROX); 483da141706SLaura Abbott 484da141706SLaura Abbott } 485da141706SLaura Abbott #endif 486da141706SLaura Abbott 487da141706SLaura Abbott void fixup_init(void) 488da141706SLaura Abbott { 489da141706SLaura Abbott create_mapping_late(__pa(__init_begin), (unsigned long)__init_begin, 490da141706SLaura Abbott (unsigned long)__init_end - (unsigned long)__init_begin, 491da141706SLaura Abbott PAGE_KERNEL); 492da141706SLaura Abbott } 493da141706SLaura Abbott 494c1cc1552SCatalin Marinas /* 495c1cc1552SCatalin Marinas * paging_init() sets up the page tables, initialises the zone memory 496c1cc1552SCatalin Marinas * maps and sets up the zero page. 497c1cc1552SCatalin Marinas */ 498c1cc1552SCatalin Marinas void __init paging_init(void) 499c1cc1552SCatalin Marinas { 500c1cc1552SCatalin Marinas void *zero_page; 501c1cc1552SCatalin Marinas 502c1cc1552SCatalin Marinas map_mem(); 503da141706SLaura Abbott fixup_executable(); 504c1cc1552SCatalin Marinas 505c1cc1552SCatalin Marinas /* allocate the zero page. */ 506c1cc1552SCatalin Marinas zero_page = early_alloc(PAGE_SIZE); 507c1cc1552SCatalin Marinas 508c1cc1552SCatalin Marinas bootmem_init(); 509c1cc1552SCatalin Marinas 510c1cc1552SCatalin Marinas empty_zero_page = virt_to_page(zero_page); 511c1cc1552SCatalin Marinas 512c1cc1552SCatalin Marinas /* 513c1cc1552SCatalin Marinas * TTBR0 is only used for the identity mapping at this stage. Make it 514c1cc1552SCatalin Marinas * point to zero page to avoid speculatively fetching new entries. 515c1cc1552SCatalin Marinas */ 516c1cc1552SCatalin Marinas cpu_set_reserved_ttbr0(); 5178e63d388SWill Deacon local_flush_tlb_all(); 518dd006da2SArd Biesheuvel cpu_set_default_tcr_t0sz(); 519c1cc1552SCatalin Marinas } 520c1cc1552SCatalin Marinas 521c1cc1552SCatalin Marinas /* 522c1cc1552SCatalin Marinas * Check whether a kernel address is valid (derived from arch/x86/). 523c1cc1552SCatalin Marinas */ 524c1cc1552SCatalin Marinas int kern_addr_valid(unsigned long addr) 525c1cc1552SCatalin Marinas { 526c1cc1552SCatalin Marinas pgd_t *pgd; 527c1cc1552SCatalin Marinas pud_t *pud; 528c1cc1552SCatalin Marinas pmd_t *pmd; 529c1cc1552SCatalin Marinas pte_t *pte; 530c1cc1552SCatalin Marinas 531c1cc1552SCatalin Marinas if ((((long)addr) >> VA_BITS) != -1UL) 532c1cc1552SCatalin Marinas return 0; 533c1cc1552SCatalin Marinas 534c1cc1552SCatalin Marinas pgd = pgd_offset_k(addr); 535c1cc1552SCatalin Marinas if (pgd_none(*pgd)) 536c1cc1552SCatalin Marinas return 0; 537c1cc1552SCatalin Marinas 538c1cc1552SCatalin Marinas pud = pud_offset(pgd, addr); 539c1cc1552SCatalin Marinas if (pud_none(*pud)) 540c1cc1552SCatalin Marinas return 0; 541c1cc1552SCatalin Marinas 542206a2a73SSteve Capper if (pud_sect(*pud)) 543206a2a73SSteve Capper return pfn_valid(pud_pfn(*pud)); 544206a2a73SSteve Capper 545c1cc1552SCatalin Marinas pmd = pmd_offset(pud, addr); 546c1cc1552SCatalin Marinas if (pmd_none(*pmd)) 547c1cc1552SCatalin Marinas return 0; 548c1cc1552SCatalin Marinas 549da6e4cb6SDave Anderson if (pmd_sect(*pmd)) 550da6e4cb6SDave Anderson return pfn_valid(pmd_pfn(*pmd)); 551da6e4cb6SDave Anderson 552c1cc1552SCatalin Marinas pte = pte_offset_kernel(pmd, addr); 553c1cc1552SCatalin Marinas if (pte_none(*pte)) 554c1cc1552SCatalin Marinas return 0; 555c1cc1552SCatalin Marinas 556c1cc1552SCatalin Marinas return pfn_valid(pte_pfn(*pte)); 557c1cc1552SCatalin Marinas } 558c1cc1552SCatalin Marinas #ifdef CONFIG_SPARSEMEM_VMEMMAP 559b433dce0SSuzuki K. Poulose #if !ARM64_SWAPPER_USES_SECTION_MAPS 5600aad818bSJohannes Weiner int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node) 561c1cc1552SCatalin Marinas { 5620aad818bSJohannes Weiner return vmemmap_populate_basepages(start, end, node); 563c1cc1552SCatalin Marinas } 564b433dce0SSuzuki K. Poulose #else /* !ARM64_SWAPPER_USES_SECTION_MAPS */ 5650aad818bSJohannes Weiner int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node) 566c1cc1552SCatalin Marinas { 5670aad818bSJohannes Weiner unsigned long addr = start; 568c1cc1552SCatalin Marinas unsigned long next; 569c1cc1552SCatalin Marinas pgd_t *pgd; 570c1cc1552SCatalin Marinas pud_t *pud; 571c1cc1552SCatalin Marinas pmd_t *pmd; 572c1cc1552SCatalin Marinas 573c1cc1552SCatalin Marinas do { 574c1cc1552SCatalin Marinas next = pmd_addr_end(addr, end); 575c1cc1552SCatalin Marinas 576c1cc1552SCatalin Marinas pgd = vmemmap_pgd_populate(addr, node); 577c1cc1552SCatalin Marinas if (!pgd) 578c1cc1552SCatalin Marinas return -ENOMEM; 579c1cc1552SCatalin Marinas 580c1cc1552SCatalin Marinas pud = vmemmap_pud_populate(pgd, addr, node); 581c1cc1552SCatalin Marinas if (!pud) 582c1cc1552SCatalin Marinas return -ENOMEM; 583c1cc1552SCatalin Marinas 584c1cc1552SCatalin Marinas pmd = pmd_offset(pud, addr); 585c1cc1552SCatalin Marinas if (pmd_none(*pmd)) { 586c1cc1552SCatalin Marinas void *p = NULL; 587c1cc1552SCatalin Marinas 588c1cc1552SCatalin Marinas p = vmemmap_alloc_block_buf(PMD_SIZE, node); 589c1cc1552SCatalin Marinas if (!p) 590c1cc1552SCatalin Marinas return -ENOMEM; 591c1cc1552SCatalin Marinas 592a501e324SCatalin Marinas set_pmd(pmd, __pmd(__pa(p) | PROT_SECT_NORMAL)); 593c1cc1552SCatalin Marinas } else 594c1cc1552SCatalin Marinas vmemmap_verify((pte_t *)pmd, node, addr, next); 595c1cc1552SCatalin Marinas } while (addr = next, addr != end); 596c1cc1552SCatalin Marinas 597c1cc1552SCatalin Marinas return 0; 598c1cc1552SCatalin Marinas } 599c1cc1552SCatalin Marinas #endif /* CONFIG_ARM64_64K_PAGES */ 6000aad818bSJohannes Weiner void vmemmap_free(unsigned long start, unsigned long end) 6010197518cSTang Chen { 6020197518cSTang Chen } 603c1cc1552SCatalin Marinas #endif /* CONFIG_SPARSEMEM_VMEMMAP */ 604af86e597SLaura Abbott 605af86e597SLaura Abbott static pte_t bm_pte[PTRS_PER_PTE] __page_aligned_bss; 6069f25e6adSKirill A. Shutemov #if CONFIG_PGTABLE_LEVELS > 2 607af86e597SLaura Abbott static pmd_t bm_pmd[PTRS_PER_PMD] __page_aligned_bss; 608af86e597SLaura Abbott #endif 6099f25e6adSKirill A. Shutemov #if CONFIG_PGTABLE_LEVELS > 3 610af86e597SLaura Abbott static pud_t bm_pud[PTRS_PER_PUD] __page_aligned_bss; 611af86e597SLaura Abbott #endif 612af86e597SLaura Abbott 613af86e597SLaura Abbott static inline pud_t * fixmap_pud(unsigned long addr) 614af86e597SLaura Abbott { 615af86e597SLaura Abbott pgd_t *pgd = pgd_offset_k(addr); 616af86e597SLaura Abbott 617af86e597SLaura Abbott BUG_ON(pgd_none(*pgd) || pgd_bad(*pgd)); 618af86e597SLaura Abbott 619af86e597SLaura Abbott return pud_offset(pgd, addr); 620af86e597SLaura Abbott } 621af86e597SLaura Abbott 622af86e597SLaura Abbott static inline pmd_t * fixmap_pmd(unsigned long addr) 623af86e597SLaura Abbott { 624af86e597SLaura Abbott pud_t *pud = fixmap_pud(addr); 625af86e597SLaura Abbott 626af86e597SLaura Abbott BUG_ON(pud_none(*pud) || pud_bad(*pud)); 627af86e597SLaura Abbott 628af86e597SLaura Abbott return pmd_offset(pud, addr); 629af86e597SLaura Abbott } 630af86e597SLaura Abbott 631af86e597SLaura Abbott static inline pte_t * fixmap_pte(unsigned long addr) 632af86e597SLaura Abbott { 633af86e597SLaura Abbott pmd_t *pmd = fixmap_pmd(addr); 634af86e597SLaura Abbott 635af86e597SLaura Abbott BUG_ON(pmd_none(*pmd) || pmd_bad(*pmd)); 636af86e597SLaura Abbott 637af86e597SLaura Abbott return pte_offset_kernel(pmd, addr); 638af86e597SLaura Abbott } 639af86e597SLaura Abbott 640af86e597SLaura Abbott void __init early_fixmap_init(void) 641af86e597SLaura Abbott { 642af86e597SLaura Abbott pgd_t *pgd; 643af86e597SLaura Abbott pud_t *pud; 644af86e597SLaura Abbott pmd_t *pmd; 645af86e597SLaura Abbott unsigned long addr = FIXADDR_START; 646af86e597SLaura Abbott 647af86e597SLaura Abbott pgd = pgd_offset_k(addr); 648af86e597SLaura Abbott pgd_populate(&init_mm, pgd, bm_pud); 649af86e597SLaura Abbott pud = pud_offset(pgd, addr); 650af86e597SLaura Abbott pud_populate(&init_mm, pud, bm_pmd); 651af86e597SLaura Abbott pmd = pmd_offset(pud, addr); 652af86e597SLaura Abbott pmd_populate_kernel(&init_mm, pmd, bm_pte); 653af86e597SLaura Abbott 654af86e597SLaura Abbott /* 655af86e597SLaura Abbott * The boot-ioremap range spans multiple pmds, for which 656af86e597SLaura Abbott * we are not preparted: 657af86e597SLaura Abbott */ 658af86e597SLaura Abbott BUILD_BUG_ON((__fix_to_virt(FIX_BTMAP_BEGIN) >> PMD_SHIFT) 659af86e597SLaura Abbott != (__fix_to_virt(FIX_BTMAP_END) >> PMD_SHIFT)); 660af86e597SLaura Abbott 661af86e597SLaura Abbott if ((pmd != fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN))) 662af86e597SLaura Abbott || pmd != fixmap_pmd(fix_to_virt(FIX_BTMAP_END))) { 663af86e597SLaura Abbott WARN_ON(1); 664af86e597SLaura Abbott pr_warn("pmd %p != %p, %p\n", 665af86e597SLaura Abbott pmd, fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN)), 666af86e597SLaura Abbott fixmap_pmd(fix_to_virt(FIX_BTMAP_END))); 667af86e597SLaura Abbott pr_warn("fix_to_virt(FIX_BTMAP_BEGIN): %08lx\n", 668af86e597SLaura Abbott fix_to_virt(FIX_BTMAP_BEGIN)); 669af86e597SLaura Abbott pr_warn("fix_to_virt(FIX_BTMAP_END): %08lx\n", 670af86e597SLaura Abbott fix_to_virt(FIX_BTMAP_END)); 671af86e597SLaura Abbott 672af86e597SLaura Abbott pr_warn("FIX_BTMAP_END: %d\n", FIX_BTMAP_END); 673af86e597SLaura Abbott pr_warn("FIX_BTMAP_BEGIN: %d\n", FIX_BTMAP_BEGIN); 674af86e597SLaura Abbott } 675af86e597SLaura Abbott } 676af86e597SLaura Abbott 677af86e597SLaura Abbott void __set_fixmap(enum fixed_addresses idx, 678af86e597SLaura Abbott phys_addr_t phys, pgprot_t flags) 679af86e597SLaura Abbott { 680af86e597SLaura Abbott unsigned long addr = __fix_to_virt(idx); 681af86e597SLaura Abbott pte_t *pte; 682af86e597SLaura Abbott 683b63dbef9SMark Rutland BUG_ON(idx <= FIX_HOLE || idx >= __end_of_fixed_addresses); 684af86e597SLaura Abbott 685af86e597SLaura Abbott pte = fixmap_pte(addr); 686af86e597SLaura Abbott 687af86e597SLaura Abbott if (pgprot_val(flags)) { 688af86e597SLaura Abbott set_pte(pte, pfn_pte(phys >> PAGE_SHIFT, flags)); 689af86e597SLaura Abbott } else { 690af86e597SLaura Abbott pte_clear(&init_mm, addr, pte); 691af86e597SLaura Abbott flush_tlb_kernel_range(addr, addr+PAGE_SIZE); 692af86e597SLaura Abbott } 693af86e597SLaura Abbott } 69461bd93ceSArd Biesheuvel 69561bd93ceSArd Biesheuvel void *__init fixmap_remap_fdt(phys_addr_t dt_phys) 69661bd93ceSArd Biesheuvel { 69761bd93ceSArd Biesheuvel const u64 dt_virt_base = __fix_to_virt(FIX_FDT); 698fb226c3dSArd Biesheuvel pgprot_t prot = PAGE_KERNEL_RO; 699b433dce0SSuzuki K. Poulose int size, offset; 70061bd93ceSArd Biesheuvel void *dt_virt; 70161bd93ceSArd Biesheuvel 70261bd93ceSArd Biesheuvel /* 70361bd93ceSArd Biesheuvel * Check whether the physical FDT address is set and meets the minimum 70461bd93ceSArd Biesheuvel * alignment requirement. Since we are relying on MIN_FDT_ALIGN to be 70561bd93ceSArd Biesheuvel * at least 8 bytes so that we can always access the size field of the 70661bd93ceSArd Biesheuvel * FDT header after mapping the first chunk, double check here if that 70761bd93ceSArd Biesheuvel * is indeed the case. 70861bd93ceSArd Biesheuvel */ 70961bd93ceSArd Biesheuvel BUILD_BUG_ON(MIN_FDT_ALIGN < 8); 71061bd93ceSArd Biesheuvel if (!dt_phys || dt_phys % MIN_FDT_ALIGN) 71161bd93ceSArd Biesheuvel return NULL; 71261bd93ceSArd Biesheuvel 71361bd93ceSArd Biesheuvel /* 71461bd93ceSArd Biesheuvel * Make sure that the FDT region can be mapped without the need to 71561bd93ceSArd Biesheuvel * allocate additional translation table pages, so that it is safe 71661bd93ceSArd Biesheuvel * to call create_mapping() this early. 71761bd93ceSArd Biesheuvel * 71861bd93ceSArd Biesheuvel * On 64k pages, the FDT will be mapped using PTEs, so we need to 71961bd93ceSArd Biesheuvel * be in the same PMD as the rest of the fixmap. 72061bd93ceSArd Biesheuvel * On 4k pages, we'll use section mappings for the FDT so we only 72161bd93ceSArd Biesheuvel * have to be in the same PUD. 72261bd93ceSArd Biesheuvel */ 72361bd93ceSArd Biesheuvel BUILD_BUG_ON(dt_virt_base % SZ_2M); 72461bd93ceSArd Biesheuvel 725b433dce0SSuzuki K. Poulose BUILD_BUG_ON(__fix_to_virt(FIX_FDT_END) >> SWAPPER_TABLE_SHIFT != 726b433dce0SSuzuki K. Poulose __fix_to_virt(FIX_BTMAP_BEGIN) >> SWAPPER_TABLE_SHIFT); 72761bd93ceSArd Biesheuvel 728b433dce0SSuzuki K. Poulose offset = dt_phys % SWAPPER_BLOCK_SIZE; 72961bd93ceSArd Biesheuvel dt_virt = (void *)dt_virt_base + offset; 73061bd93ceSArd Biesheuvel 73161bd93ceSArd Biesheuvel /* map the first chunk so we can read the size from the header */ 732b433dce0SSuzuki K. Poulose create_mapping(round_down(dt_phys, SWAPPER_BLOCK_SIZE), dt_virt_base, 733b433dce0SSuzuki K. Poulose SWAPPER_BLOCK_SIZE, prot); 73461bd93ceSArd Biesheuvel 73561bd93ceSArd Biesheuvel if (fdt_check_header(dt_virt) != 0) 73661bd93ceSArd Biesheuvel return NULL; 73761bd93ceSArd Biesheuvel 73861bd93ceSArd Biesheuvel size = fdt_totalsize(dt_virt); 73961bd93ceSArd Biesheuvel if (size > MAX_FDT_SIZE) 74061bd93ceSArd Biesheuvel return NULL; 74161bd93ceSArd Biesheuvel 742b433dce0SSuzuki K. Poulose if (offset + size > SWAPPER_BLOCK_SIZE) 743b433dce0SSuzuki K. Poulose create_mapping(round_down(dt_phys, SWAPPER_BLOCK_SIZE), dt_virt_base, 744b433dce0SSuzuki K. Poulose round_up(offset + size, SWAPPER_BLOCK_SIZE), prot); 74561bd93ceSArd Biesheuvel 74661bd93ceSArd Biesheuvel memblock_reserve(dt_phys, size); 74761bd93ceSArd Biesheuvel 74861bd93ceSArd Biesheuvel return dt_virt; 74961bd93ceSArd Biesheuvel } 750