1c1cc1552SCatalin Marinas /* 2c1cc1552SCatalin Marinas * Based on arch/arm/mm/mmu.c 3c1cc1552SCatalin Marinas * 4c1cc1552SCatalin Marinas * Copyright (C) 1995-2005 Russell King 5c1cc1552SCatalin Marinas * Copyright (C) 2012 ARM Ltd. 6c1cc1552SCatalin Marinas * 7c1cc1552SCatalin Marinas * This program is free software; you can redistribute it and/or modify 8c1cc1552SCatalin Marinas * it under the terms of the GNU General Public License version 2 as 9c1cc1552SCatalin Marinas * published by the Free Software Foundation. 10c1cc1552SCatalin Marinas * 11c1cc1552SCatalin Marinas * This program is distributed in the hope that it will be useful, 12c1cc1552SCatalin Marinas * but WITHOUT ANY WARRANTY; without even the implied warranty of 13c1cc1552SCatalin Marinas * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14c1cc1552SCatalin Marinas * GNU General Public License for more details. 15c1cc1552SCatalin Marinas * 16c1cc1552SCatalin Marinas * You should have received a copy of the GNU General Public License 17c1cc1552SCatalin Marinas * along with this program. If not, see <http://www.gnu.org/licenses/>. 18c1cc1552SCatalin Marinas */ 19c1cc1552SCatalin Marinas 20c1cc1552SCatalin Marinas #include <linux/export.h> 21c1cc1552SCatalin Marinas #include <linux/kernel.h> 22c1cc1552SCatalin Marinas #include <linux/errno.h> 23c1cc1552SCatalin Marinas #include <linux/init.h> 2461bd93ceSArd Biesheuvel #include <linux/libfdt.h> 25c1cc1552SCatalin Marinas #include <linux/mman.h> 26c1cc1552SCatalin Marinas #include <linux/nodemask.h> 27c1cc1552SCatalin Marinas #include <linux/memblock.h> 28c1cc1552SCatalin Marinas #include <linux/fs.h> 292475ff9dSCatalin Marinas #include <linux/io.h> 3041089357SCatalin Marinas #include <linux/slab.h> 31da141706SLaura Abbott #include <linux/stop_machine.h> 32c1cc1552SCatalin Marinas 33c1cc1552SCatalin Marinas #include <asm/cputype.h> 34af86e597SLaura Abbott #include <asm/fixmap.h> 35b433dce0SSuzuki K. Poulose #include <asm/kernel-pgtable.h> 36c1cc1552SCatalin Marinas #include <asm/sections.h> 37c1cc1552SCatalin Marinas #include <asm/setup.h> 38c1cc1552SCatalin Marinas #include <asm/sizes.h> 39c1cc1552SCatalin Marinas #include <asm/tlb.h> 40c79b954bSJungseok Lee #include <asm/memblock.h> 41c1cc1552SCatalin Marinas #include <asm/mmu_context.h> 42c1cc1552SCatalin Marinas 43c1cc1552SCatalin Marinas #include "mm.h" 44c1cc1552SCatalin Marinas 45dd006da2SArd Biesheuvel u64 idmap_t0sz = TCR_T0SZ(VA_BITS); 46dd006da2SArd Biesheuvel 47c1cc1552SCatalin Marinas /* 48c1cc1552SCatalin Marinas * Empty_zero_page is a special page that is used for zero-initialized data 49c1cc1552SCatalin Marinas * and COW. 50c1cc1552SCatalin Marinas */ 51c1cc1552SCatalin Marinas struct page *empty_zero_page; 52c1cc1552SCatalin Marinas EXPORT_SYMBOL(empty_zero_page); 53c1cc1552SCatalin Marinas 54c1cc1552SCatalin Marinas pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, 55c1cc1552SCatalin Marinas unsigned long size, pgprot_t vma_prot) 56c1cc1552SCatalin Marinas { 57c1cc1552SCatalin Marinas if (!pfn_valid(pfn)) 58c1cc1552SCatalin Marinas return pgprot_noncached(vma_prot); 59c1cc1552SCatalin Marinas else if (file->f_flags & O_SYNC) 60c1cc1552SCatalin Marinas return pgprot_writecombine(vma_prot); 61c1cc1552SCatalin Marinas return vma_prot; 62c1cc1552SCatalin Marinas } 63c1cc1552SCatalin Marinas EXPORT_SYMBOL(phys_mem_access_prot); 64c1cc1552SCatalin Marinas 65c1cc1552SCatalin Marinas static void __init *early_alloc(unsigned long sz) 66c1cc1552SCatalin Marinas { 677142392dSSuzuki K. Poulose phys_addr_t phys; 687142392dSSuzuki K. Poulose void *ptr; 697142392dSSuzuki K. Poulose 707142392dSSuzuki K. Poulose phys = memblock_alloc(sz, sz); 717142392dSSuzuki K. Poulose BUG_ON(!phys); 727142392dSSuzuki K. Poulose ptr = __va(phys); 73c1cc1552SCatalin Marinas memset(ptr, 0, sz); 74c1cc1552SCatalin Marinas return ptr; 75c1cc1552SCatalin Marinas } 76c1cc1552SCatalin Marinas 77da141706SLaura Abbott /* 78da141706SLaura Abbott * remap a PMD into pages 79da141706SLaura Abbott */ 80da141706SLaura Abbott static void split_pmd(pmd_t *pmd, pte_t *pte) 81da141706SLaura Abbott { 82da141706SLaura Abbott unsigned long pfn = pmd_pfn(*pmd); 83da141706SLaura Abbott int i = 0; 84da141706SLaura Abbott 85da141706SLaura Abbott do { 86da141706SLaura Abbott /* 87da141706SLaura Abbott * Need to have the least restrictive permissions available 88*667c2759SCatalin Marinas * permissions will be fixed up later 89da141706SLaura Abbott */ 90*667c2759SCatalin Marinas set_pte(pte, pfn_pte(pfn, PAGE_KERNEL_EXEC)); 91da141706SLaura Abbott pfn++; 92da141706SLaura Abbott } while (pte++, i++, i < PTRS_PER_PTE); 93da141706SLaura Abbott } 94da141706SLaura Abbott 95da141706SLaura Abbott static void alloc_init_pte(pmd_t *pmd, unsigned long addr, 96*667c2759SCatalin Marinas unsigned long end, unsigned long pfn, 97da141706SLaura Abbott pgprot_t prot, 98da141706SLaura Abbott void *(*alloc)(unsigned long size)) 99c1cc1552SCatalin Marinas { 100c1cc1552SCatalin Marinas pte_t *pte; 101c1cc1552SCatalin Marinas 102a1c76574SMark Rutland if (pmd_none(*pmd) || pmd_sect(*pmd)) { 103da141706SLaura Abbott pte = alloc(PTRS_PER_PTE * sizeof(pte_t)); 104da141706SLaura Abbott if (pmd_sect(*pmd)) 105da141706SLaura Abbott split_pmd(pmd, pte); 106c1cc1552SCatalin Marinas __pmd_populate(pmd, __pa(pte), PMD_TYPE_TABLE); 107da141706SLaura Abbott flush_tlb_all(); 108c1cc1552SCatalin Marinas } 109a1c76574SMark Rutland BUG_ON(pmd_bad(*pmd)); 110c1cc1552SCatalin Marinas 111c1cc1552SCatalin Marinas pte = pte_offset_kernel(pmd, addr); 112c1cc1552SCatalin Marinas do { 113*667c2759SCatalin Marinas set_pte(pte, pfn_pte(pfn, prot)); 114*667c2759SCatalin Marinas pfn++; 115*667c2759SCatalin Marinas } while (pte++, addr += PAGE_SIZE, addr != end); 116c1cc1552SCatalin Marinas } 117c1cc1552SCatalin Marinas 1189a17a213SJisheng Zhang static void split_pud(pud_t *old_pud, pmd_t *pmd) 119da141706SLaura Abbott { 120da141706SLaura Abbott unsigned long addr = pud_pfn(*old_pud) << PAGE_SHIFT; 121da141706SLaura Abbott pgprot_t prot = __pgprot(pud_val(*old_pud) ^ addr); 122da141706SLaura Abbott int i = 0; 123da141706SLaura Abbott 124da141706SLaura Abbott do { 1251e43ba9cSArd Biesheuvel set_pmd(pmd, __pmd(addr | pgprot_val(prot))); 126da141706SLaura Abbott addr += PMD_SIZE; 127da141706SLaura Abbott } while (pmd++, i++, i < PTRS_PER_PMD); 128da141706SLaura Abbott } 129da141706SLaura Abbott 130da141706SLaura Abbott static void alloc_init_pmd(struct mm_struct *mm, pud_t *pud, 131e1e1fddaSArd Biesheuvel unsigned long addr, unsigned long end, 132da141706SLaura Abbott phys_addr_t phys, pgprot_t prot, 133da141706SLaura Abbott void *(*alloc)(unsigned long size)) 134c1cc1552SCatalin Marinas { 135c1cc1552SCatalin Marinas pmd_t *pmd; 136c1cc1552SCatalin Marinas unsigned long next; 137c1cc1552SCatalin Marinas 138c1cc1552SCatalin Marinas /* 139c1cc1552SCatalin Marinas * Check for initial section mappings in the pgd/pud and remove them. 140c1cc1552SCatalin Marinas */ 141a1c76574SMark Rutland if (pud_none(*pud) || pud_sect(*pud)) { 142da141706SLaura Abbott pmd = alloc(PTRS_PER_PMD * sizeof(pmd_t)); 143da141706SLaura Abbott if (pud_sect(*pud)) { 144da141706SLaura Abbott /* 145da141706SLaura Abbott * need to have the 1G of mappings continue to be 146da141706SLaura Abbott * present 147da141706SLaura Abbott */ 148da141706SLaura Abbott split_pud(pud, pmd); 149da141706SLaura Abbott } 150e1e1fddaSArd Biesheuvel pud_populate(mm, pud, pmd); 151da141706SLaura Abbott flush_tlb_all(); 152c1cc1552SCatalin Marinas } 153a1c76574SMark Rutland BUG_ON(pud_bad(*pud)); 154c1cc1552SCatalin Marinas 155c1cc1552SCatalin Marinas pmd = pmd_offset(pud, addr); 156c1cc1552SCatalin Marinas do { 157c1cc1552SCatalin Marinas next = pmd_addr_end(addr, end); 158c1cc1552SCatalin Marinas /* try section mapping first */ 159a55f9929SCatalin Marinas if (((addr | next | phys) & ~SECTION_MASK) == 0) { 160a55f9929SCatalin Marinas pmd_t old_pmd =*pmd; 1618ce837ceSArd Biesheuvel set_pmd(pmd, __pmd(phys | 1628ce837ceSArd Biesheuvel pgprot_val(mk_sect_prot(prot)))); 163a55f9929SCatalin Marinas /* 164a55f9929SCatalin Marinas * Check for previous table entries created during 165a55f9929SCatalin Marinas * boot (__create_page_tables) and flush them. 166a55f9929SCatalin Marinas */ 167523d6e9fSzhichang.yuan if (!pmd_none(old_pmd)) { 168a55f9929SCatalin Marinas flush_tlb_all(); 169523d6e9fSzhichang.yuan if (pmd_table(old_pmd)) { 170523d6e9fSzhichang.yuan phys_addr_t table = __pa(pte_offset_map(&old_pmd, 0)); 17141089357SCatalin Marinas if (!WARN_ON_ONCE(slab_is_available())) 172523d6e9fSzhichang.yuan memblock_free(table, PAGE_SIZE); 173523d6e9fSzhichang.yuan } 174523d6e9fSzhichang.yuan } 175a55f9929SCatalin Marinas } else { 176*667c2759SCatalin Marinas alloc_init_pte(pmd, addr, next, __phys_to_pfn(phys), 177*667c2759SCatalin Marinas prot, alloc); 178a55f9929SCatalin Marinas } 179c1cc1552SCatalin Marinas phys += next - addr; 180c1cc1552SCatalin Marinas } while (pmd++, addr = next, addr != end); 181c1cc1552SCatalin Marinas } 182c1cc1552SCatalin Marinas 183da141706SLaura Abbott static inline bool use_1G_block(unsigned long addr, unsigned long next, 184da141706SLaura Abbott unsigned long phys) 185da141706SLaura Abbott { 186da141706SLaura Abbott if (PAGE_SHIFT != 12) 187da141706SLaura Abbott return false; 188da141706SLaura Abbott 189da141706SLaura Abbott if (((addr | next | phys) & ~PUD_MASK) != 0) 190da141706SLaura Abbott return false; 191da141706SLaura Abbott 192da141706SLaura Abbott return true; 193da141706SLaura Abbott } 194da141706SLaura Abbott 195da141706SLaura Abbott static void alloc_init_pud(struct mm_struct *mm, pgd_t *pgd, 196e1e1fddaSArd Biesheuvel unsigned long addr, unsigned long end, 197da141706SLaura Abbott phys_addr_t phys, pgprot_t prot, 198da141706SLaura Abbott void *(*alloc)(unsigned long size)) 199c1cc1552SCatalin Marinas { 200c79b954bSJungseok Lee pud_t *pud; 201c1cc1552SCatalin Marinas unsigned long next; 202c1cc1552SCatalin Marinas 203c79b954bSJungseok Lee if (pgd_none(*pgd)) { 204da141706SLaura Abbott pud = alloc(PTRS_PER_PUD * sizeof(pud_t)); 205e1e1fddaSArd Biesheuvel pgd_populate(mm, pgd, pud); 206c79b954bSJungseok Lee } 207c79b954bSJungseok Lee BUG_ON(pgd_bad(*pgd)); 208c79b954bSJungseok Lee 209c79b954bSJungseok Lee pud = pud_offset(pgd, addr); 210c1cc1552SCatalin Marinas do { 211c1cc1552SCatalin Marinas next = pud_addr_end(addr, end); 212206a2a73SSteve Capper 213206a2a73SSteve Capper /* 214206a2a73SSteve Capper * For 4K granule only, attempt to put down a 1GB block 215206a2a73SSteve Capper */ 216da141706SLaura Abbott if (use_1G_block(addr, next, phys)) { 217206a2a73SSteve Capper pud_t old_pud = *pud; 2188ce837ceSArd Biesheuvel set_pud(pud, __pud(phys | 2198ce837ceSArd Biesheuvel pgprot_val(mk_sect_prot(prot)))); 220206a2a73SSteve Capper 221206a2a73SSteve Capper /* 222206a2a73SSteve Capper * If we have an old value for a pud, it will 223206a2a73SSteve Capper * be pointing to a pmd table that we no longer 224206a2a73SSteve Capper * need (from swapper_pg_dir). 225206a2a73SSteve Capper * 226206a2a73SSteve Capper * Look up the old pmd table and free it. 227206a2a73SSteve Capper */ 228206a2a73SSteve Capper if (!pud_none(old_pud)) { 229206a2a73SSteve Capper flush_tlb_all(); 230523d6e9fSzhichang.yuan if (pud_table(old_pud)) { 231523d6e9fSzhichang.yuan phys_addr_t table = __pa(pmd_offset(&old_pud, 0)); 23241089357SCatalin Marinas if (!WARN_ON_ONCE(slab_is_available())) 233523d6e9fSzhichang.yuan memblock_free(table, PAGE_SIZE); 234523d6e9fSzhichang.yuan } 235206a2a73SSteve Capper } 236206a2a73SSteve Capper } else { 237da141706SLaura Abbott alloc_init_pmd(mm, pud, addr, next, phys, prot, alloc); 238206a2a73SSteve Capper } 239c1cc1552SCatalin Marinas phys += next - addr; 240c1cc1552SCatalin Marinas } while (pud++, addr = next, addr != end); 241c1cc1552SCatalin Marinas } 242c1cc1552SCatalin Marinas 243c1cc1552SCatalin Marinas /* 244c1cc1552SCatalin Marinas * Create the page directory entries and any necessary page tables for the 245c1cc1552SCatalin Marinas * mapping specified by 'md'. 246c1cc1552SCatalin Marinas */ 247da141706SLaura Abbott static void __create_mapping(struct mm_struct *mm, pgd_t *pgd, 248e1e1fddaSArd Biesheuvel phys_addr_t phys, unsigned long virt, 249da141706SLaura Abbott phys_addr_t size, pgprot_t prot, 250da141706SLaura Abbott void *(*alloc)(unsigned long size)) 251c1cc1552SCatalin Marinas { 252c1cc1552SCatalin Marinas unsigned long addr, length, end, next; 253c1cc1552SCatalin Marinas 254c1cc1552SCatalin Marinas addr = virt & PAGE_MASK; 255c1cc1552SCatalin Marinas length = PAGE_ALIGN(size + (virt & ~PAGE_MASK)); 256c1cc1552SCatalin Marinas 257c1cc1552SCatalin Marinas end = addr + length; 258c1cc1552SCatalin Marinas do { 259c1cc1552SCatalin Marinas next = pgd_addr_end(addr, end); 260da141706SLaura Abbott alloc_init_pud(mm, pgd, addr, next, phys, prot, alloc); 261c1cc1552SCatalin Marinas phys += next - addr; 262c1cc1552SCatalin Marinas } while (pgd++, addr = next, addr != end); 263c1cc1552SCatalin Marinas } 264c1cc1552SCatalin Marinas 265da141706SLaura Abbott static void *late_alloc(unsigned long size) 266da141706SLaura Abbott { 267da141706SLaura Abbott void *ptr; 268da141706SLaura Abbott 269da141706SLaura Abbott BUG_ON(size > PAGE_SIZE); 270da141706SLaura Abbott ptr = (void *)__get_free_page(PGALLOC_GFP); 271da141706SLaura Abbott BUG_ON(!ptr); 272da141706SLaura Abbott return ptr; 273da141706SLaura Abbott } 274da141706SLaura Abbott 275c53e0baaSMark Rutland static void __init create_mapping(phys_addr_t phys, unsigned long virt, 276da141706SLaura Abbott phys_addr_t size, pgprot_t prot) 277d7ecbddfSMark Salter { 278d7ecbddfSMark Salter if (virt < VMALLOC_START) { 279d7ecbddfSMark Salter pr_warn("BUG: not creating mapping for %pa at 0x%016lx - outside kernel range\n", 280d7ecbddfSMark Salter &phys, virt); 281d7ecbddfSMark Salter return; 282d7ecbddfSMark Salter } 283e1e1fddaSArd Biesheuvel __create_mapping(&init_mm, pgd_offset_k(virt & PAGE_MASK), phys, virt, 284da141706SLaura Abbott size, prot, early_alloc); 285d7ecbddfSMark Salter } 286d7ecbddfSMark Salter 2878ce837ceSArd Biesheuvel void __init create_pgd_mapping(struct mm_struct *mm, phys_addr_t phys, 2888ce837ceSArd Biesheuvel unsigned long virt, phys_addr_t size, 2898ce837ceSArd Biesheuvel pgprot_t prot) 2908ce837ceSArd Biesheuvel { 291da141706SLaura Abbott __create_mapping(mm, pgd_offset(mm, virt), phys, virt, size, prot, 29260305db9SArd Biesheuvel late_alloc); 293d7ecbddfSMark Salter } 294d7ecbddfSMark Salter 295da141706SLaura Abbott static void create_mapping_late(phys_addr_t phys, unsigned long virt, 296da141706SLaura Abbott phys_addr_t size, pgprot_t prot) 297da141706SLaura Abbott { 298da141706SLaura Abbott if (virt < VMALLOC_START) { 299da141706SLaura Abbott pr_warn("BUG: not creating mapping for %pa at 0x%016lx - outside kernel range\n", 300da141706SLaura Abbott &phys, virt); 301da141706SLaura Abbott return; 302da141706SLaura Abbott } 303da141706SLaura Abbott 304da141706SLaura Abbott return __create_mapping(&init_mm, pgd_offset_k(virt & PAGE_MASK), 305da141706SLaura Abbott phys, virt, size, prot, late_alloc); 306da141706SLaura Abbott } 307da141706SLaura Abbott 308da141706SLaura Abbott #ifdef CONFIG_DEBUG_RODATA 309da141706SLaura Abbott static void __init __map_memblock(phys_addr_t start, phys_addr_t end) 310da141706SLaura Abbott { 311da141706SLaura Abbott /* 312da141706SLaura Abbott * Set up the executable regions using the existing section mappings 313da141706SLaura Abbott * for now. This will get more fine grained later once all memory 314da141706SLaura Abbott * is mapped 315da141706SLaura Abbott */ 3164fee9f36SArd Biesheuvel unsigned long kernel_x_start = round_down(__pa(_stext), SWAPPER_BLOCK_SIZE); 3174fee9f36SArd Biesheuvel unsigned long kernel_x_end = round_up(__pa(__init_end), SWAPPER_BLOCK_SIZE); 318da141706SLaura Abbott 319da141706SLaura Abbott if (end < kernel_x_start) { 320da141706SLaura Abbott create_mapping(start, __phys_to_virt(start), 321da141706SLaura Abbott end - start, PAGE_KERNEL); 322da141706SLaura Abbott } else if (start >= kernel_x_end) { 323da141706SLaura Abbott create_mapping(start, __phys_to_virt(start), 324da141706SLaura Abbott end - start, PAGE_KERNEL); 325da141706SLaura Abbott } else { 326da141706SLaura Abbott if (start < kernel_x_start) 327da141706SLaura Abbott create_mapping(start, __phys_to_virt(start), 328da141706SLaura Abbott kernel_x_start - start, 329da141706SLaura Abbott PAGE_KERNEL); 330da141706SLaura Abbott create_mapping(kernel_x_start, 331da141706SLaura Abbott __phys_to_virt(kernel_x_start), 332da141706SLaura Abbott kernel_x_end - kernel_x_start, 333da141706SLaura Abbott PAGE_KERNEL_EXEC); 334da141706SLaura Abbott if (kernel_x_end < end) 335da141706SLaura Abbott create_mapping(kernel_x_end, 336da141706SLaura Abbott __phys_to_virt(kernel_x_end), 337da141706SLaura Abbott end - kernel_x_end, 338da141706SLaura Abbott PAGE_KERNEL); 339da141706SLaura Abbott } 340da141706SLaura Abbott 341da141706SLaura Abbott } 342da141706SLaura Abbott #else 343da141706SLaura Abbott static void __init __map_memblock(phys_addr_t start, phys_addr_t end) 344da141706SLaura Abbott { 345da141706SLaura Abbott create_mapping(start, __phys_to_virt(start), end - start, 346da141706SLaura Abbott PAGE_KERNEL_EXEC); 347da141706SLaura Abbott } 348da141706SLaura Abbott #endif 349da141706SLaura Abbott 350c1cc1552SCatalin Marinas static void __init map_mem(void) 351c1cc1552SCatalin Marinas { 352c1cc1552SCatalin Marinas struct memblock_region *reg; 353e25208f7SCatalin Marinas phys_addr_t limit; 354c1cc1552SCatalin Marinas 355f6bc87c3SSteve Capper /* 356f6bc87c3SSteve Capper * Temporarily limit the memblock range. We need to do this as 357f6bc87c3SSteve Capper * create_mapping requires puds, pmds and ptes to be allocated from 358f6bc87c3SSteve Capper * memory addressable from the initial direct kernel mapping. 359f6bc87c3SSteve Capper * 3603dec0fe4SCatalin Marinas * The initial direct kernel mapping, located at swapper_pg_dir, gives 361b433dce0SSuzuki K. Poulose * us PUD_SIZE (with SECTION maps) or PMD_SIZE (without SECTION maps, 362b433dce0SSuzuki K. Poulose * memory starting from PHYS_OFFSET (which must be aligned to 2MB as 363b433dce0SSuzuki K. Poulose * per Documentation/arm64/booting.txt). 364f6bc87c3SSteve Capper */ 365b433dce0SSuzuki K. Poulose limit = PHYS_OFFSET + SWAPPER_INIT_MAP_SIZE; 366e25208f7SCatalin Marinas memblock_set_current_limit(limit); 367f6bc87c3SSteve Capper 368c1cc1552SCatalin Marinas /* map all the memory banks */ 369c1cc1552SCatalin Marinas for_each_memblock(memory, reg) { 370c1cc1552SCatalin Marinas phys_addr_t start = reg->base; 371c1cc1552SCatalin Marinas phys_addr_t end = start + reg->size; 372c1cc1552SCatalin Marinas 373c1cc1552SCatalin Marinas if (start >= end) 374c1cc1552SCatalin Marinas break; 375c1cc1552SCatalin Marinas 376b433dce0SSuzuki K. Poulose if (ARM64_SWAPPER_USES_SECTION_MAPS) { 377e25208f7SCatalin Marinas /* 378e25208f7SCatalin Marinas * For the first memory bank align the start address and 379e25208f7SCatalin Marinas * current memblock limit to prevent create_mapping() from 380b433dce0SSuzuki K. Poulose * allocating pte page tables from unmapped memory. With 381b433dce0SSuzuki K. Poulose * the section maps, if the first block doesn't end on section 382b433dce0SSuzuki K. Poulose * size boundary, create_mapping() will try to allocate a pte 383b433dce0SSuzuki K. Poulose * page, which may be returned from an unmapped area. 384b433dce0SSuzuki K. Poulose * When section maps are not used, the pte page table for the 385b433dce0SSuzuki K. Poulose * current limit is already present in swapper_pg_dir. 386e25208f7SCatalin Marinas */ 387e25208f7SCatalin Marinas if (start < limit) 388b433dce0SSuzuki K. Poulose start = ALIGN(start, SECTION_SIZE); 389e25208f7SCatalin Marinas if (end < limit) { 390b433dce0SSuzuki K. Poulose limit = end & SECTION_MASK; 391e25208f7SCatalin Marinas memblock_set_current_limit(limit); 392e25208f7SCatalin Marinas } 393b433dce0SSuzuki K. Poulose } 394da141706SLaura Abbott __map_memblock(start, end); 395c1cc1552SCatalin Marinas } 396f6bc87c3SSteve Capper 397f6bc87c3SSteve Capper /* Limit no longer required. */ 398f6bc87c3SSteve Capper memblock_set_current_limit(MEMBLOCK_ALLOC_ANYWHERE); 399c1cc1552SCatalin Marinas } 400c1cc1552SCatalin Marinas 4019a17a213SJisheng Zhang static void __init fixup_executable(void) 402da141706SLaura Abbott { 403da141706SLaura Abbott #ifdef CONFIG_DEBUG_RODATA 404da141706SLaura Abbott /* now that we are actually fully mapped, make the start/end more fine grained */ 4054fee9f36SArd Biesheuvel if (!IS_ALIGNED((unsigned long)_stext, SWAPPER_BLOCK_SIZE)) { 406da141706SLaura Abbott unsigned long aligned_start = round_down(__pa(_stext), 4074fee9f36SArd Biesheuvel SWAPPER_BLOCK_SIZE); 408da141706SLaura Abbott 409da141706SLaura Abbott create_mapping(aligned_start, __phys_to_virt(aligned_start), 410da141706SLaura Abbott __pa(_stext) - aligned_start, 411da141706SLaura Abbott PAGE_KERNEL); 412da141706SLaura Abbott } 413da141706SLaura Abbott 4144fee9f36SArd Biesheuvel if (!IS_ALIGNED((unsigned long)__init_end, SWAPPER_BLOCK_SIZE)) { 415da141706SLaura Abbott unsigned long aligned_end = round_up(__pa(__init_end), 4164fee9f36SArd Biesheuvel SWAPPER_BLOCK_SIZE); 417da141706SLaura Abbott create_mapping(__pa(__init_end), (unsigned long)__init_end, 418da141706SLaura Abbott aligned_end - __pa(__init_end), 419da141706SLaura Abbott PAGE_KERNEL); 420da141706SLaura Abbott } 421da141706SLaura Abbott #endif 422da141706SLaura Abbott } 423da141706SLaura Abbott 424da141706SLaura Abbott #ifdef CONFIG_DEBUG_RODATA 425da141706SLaura Abbott void mark_rodata_ro(void) 426da141706SLaura Abbott { 427da141706SLaura Abbott create_mapping_late(__pa(_stext), (unsigned long)_stext, 428da141706SLaura Abbott (unsigned long)_etext - (unsigned long)_stext, 4290b2aa5b8SLaura Abbott PAGE_KERNEL_ROX); 430da141706SLaura Abbott 431da141706SLaura Abbott } 432da141706SLaura Abbott #endif 433da141706SLaura Abbott 434da141706SLaura Abbott void fixup_init(void) 435da141706SLaura Abbott { 436da141706SLaura Abbott create_mapping_late(__pa(__init_begin), (unsigned long)__init_begin, 437da141706SLaura Abbott (unsigned long)__init_end - (unsigned long)__init_begin, 438da141706SLaura Abbott PAGE_KERNEL); 439da141706SLaura Abbott } 440da141706SLaura Abbott 441c1cc1552SCatalin Marinas /* 442c1cc1552SCatalin Marinas * paging_init() sets up the page tables, initialises the zone memory 443c1cc1552SCatalin Marinas * maps and sets up the zero page. 444c1cc1552SCatalin Marinas */ 445c1cc1552SCatalin Marinas void __init paging_init(void) 446c1cc1552SCatalin Marinas { 447c1cc1552SCatalin Marinas void *zero_page; 448c1cc1552SCatalin Marinas 449c1cc1552SCatalin Marinas map_mem(); 450da141706SLaura Abbott fixup_executable(); 451c1cc1552SCatalin Marinas 452c1cc1552SCatalin Marinas /* allocate the zero page. */ 453c1cc1552SCatalin Marinas zero_page = early_alloc(PAGE_SIZE); 454c1cc1552SCatalin Marinas 455c1cc1552SCatalin Marinas bootmem_init(); 456c1cc1552SCatalin Marinas 457c1cc1552SCatalin Marinas empty_zero_page = virt_to_page(zero_page); 458c1cc1552SCatalin Marinas 459c1cc1552SCatalin Marinas /* 460c1cc1552SCatalin Marinas * TTBR0 is only used for the identity mapping at this stage. Make it 461c1cc1552SCatalin Marinas * point to zero page to avoid speculatively fetching new entries. 462c1cc1552SCatalin Marinas */ 463c1cc1552SCatalin Marinas cpu_set_reserved_ttbr0(); 4648e63d388SWill Deacon local_flush_tlb_all(); 465dd006da2SArd Biesheuvel cpu_set_default_tcr_t0sz(); 466c1cc1552SCatalin Marinas } 467c1cc1552SCatalin Marinas 468c1cc1552SCatalin Marinas /* 469c1cc1552SCatalin Marinas * Check whether a kernel address is valid (derived from arch/x86/). 470c1cc1552SCatalin Marinas */ 471c1cc1552SCatalin Marinas int kern_addr_valid(unsigned long addr) 472c1cc1552SCatalin Marinas { 473c1cc1552SCatalin Marinas pgd_t *pgd; 474c1cc1552SCatalin Marinas pud_t *pud; 475c1cc1552SCatalin Marinas pmd_t *pmd; 476c1cc1552SCatalin Marinas pte_t *pte; 477c1cc1552SCatalin Marinas 478c1cc1552SCatalin Marinas if ((((long)addr) >> VA_BITS) != -1UL) 479c1cc1552SCatalin Marinas return 0; 480c1cc1552SCatalin Marinas 481c1cc1552SCatalin Marinas pgd = pgd_offset_k(addr); 482c1cc1552SCatalin Marinas if (pgd_none(*pgd)) 483c1cc1552SCatalin Marinas return 0; 484c1cc1552SCatalin Marinas 485c1cc1552SCatalin Marinas pud = pud_offset(pgd, addr); 486c1cc1552SCatalin Marinas if (pud_none(*pud)) 487c1cc1552SCatalin Marinas return 0; 488c1cc1552SCatalin Marinas 489206a2a73SSteve Capper if (pud_sect(*pud)) 490206a2a73SSteve Capper return pfn_valid(pud_pfn(*pud)); 491206a2a73SSteve Capper 492c1cc1552SCatalin Marinas pmd = pmd_offset(pud, addr); 493c1cc1552SCatalin Marinas if (pmd_none(*pmd)) 494c1cc1552SCatalin Marinas return 0; 495c1cc1552SCatalin Marinas 496da6e4cb6SDave Anderson if (pmd_sect(*pmd)) 497da6e4cb6SDave Anderson return pfn_valid(pmd_pfn(*pmd)); 498da6e4cb6SDave Anderson 499c1cc1552SCatalin Marinas pte = pte_offset_kernel(pmd, addr); 500c1cc1552SCatalin Marinas if (pte_none(*pte)) 501c1cc1552SCatalin Marinas return 0; 502c1cc1552SCatalin Marinas 503c1cc1552SCatalin Marinas return pfn_valid(pte_pfn(*pte)); 504c1cc1552SCatalin Marinas } 505c1cc1552SCatalin Marinas #ifdef CONFIG_SPARSEMEM_VMEMMAP 506b433dce0SSuzuki K. Poulose #if !ARM64_SWAPPER_USES_SECTION_MAPS 5070aad818bSJohannes Weiner int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node) 508c1cc1552SCatalin Marinas { 5090aad818bSJohannes Weiner return vmemmap_populate_basepages(start, end, node); 510c1cc1552SCatalin Marinas } 511b433dce0SSuzuki K. Poulose #else /* !ARM64_SWAPPER_USES_SECTION_MAPS */ 5120aad818bSJohannes Weiner int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node) 513c1cc1552SCatalin Marinas { 5140aad818bSJohannes Weiner unsigned long addr = start; 515c1cc1552SCatalin Marinas unsigned long next; 516c1cc1552SCatalin Marinas pgd_t *pgd; 517c1cc1552SCatalin Marinas pud_t *pud; 518c1cc1552SCatalin Marinas pmd_t *pmd; 519c1cc1552SCatalin Marinas 520c1cc1552SCatalin Marinas do { 521c1cc1552SCatalin Marinas next = pmd_addr_end(addr, end); 522c1cc1552SCatalin Marinas 523c1cc1552SCatalin Marinas pgd = vmemmap_pgd_populate(addr, node); 524c1cc1552SCatalin Marinas if (!pgd) 525c1cc1552SCatalin Marinas return -ENOMEM; 526c1cc1552SCatalin Marinas 527c1cc1552SCatalin Marinas pud = vmemmap_pud_populate(pgd, addr, node); 528c1cc1552SCatalin Marinas if (!pud) 529c1cc1552SCatalin Marinas return -ENOMEM; 530c1cc1552SCatalin Marinas 531c1cc1552SCatalin Marinas pmd = pmd_offset(pud, addr); 532c1cc1552SCatalin Marinas if (pmd_none(*pmd)) { 533c1cc1552SCatalin Marinas void *p = NULL; 534c1cc1552SCatalin Marinas 535c1cc1552SCatalin Marinas p = vmemmap_alloc_block_buf(PMD_SIZE, node); 536c1cc1552SCatalin Marinas if (!p) 537c1cc1552SCatalin Marinas return -ENOMEM; 538c1cc1552SCatalin Marinas 539a501e324SCatalin Marinas set_pmd(pmd, __pmd(__pa(p) | PROT_SECT_NORMAL)); 540c1cc1552SCatalin Marinas } else 541c1cc1552SCatalin Marinas vmemmap_verify((pte_t *)pmd, node, addr, next); 542c1cc1552SCatalin Marinas } while (addr = next, addr != end); 543c1cc1552SCatalin Marinas 544c1cc1552SCatalin Marinas return 0; 545c1cc1552SCatalin Marinas } 546c1cc1552SCatalin Marinas #endif /* CONFIG_ARM64_64K_PAGES */ 5470aad818bSJohannes Weiner void vmemmap_free(unsigned long start, unsigned long end) 5480197518cSTang Chen { 5490197518cSTang Chen } 550c1cc1552SCatalin Marinas #endif /* CONFIG_SPARSEMEM_VMEMMAP */ 551af86e597SLaura Abbott 552af86e597SLaura Abbott static pte_t bm_pte[PTRS_PER_PTE] __page_aligned_bss; 5539f25e6adSKirill A. Shutemov #if CONFIG_PGTABLE_LEVELS > 2 554af86e597SLaura Abbott static pmd_t bm_pmd[PTRS_PER_PMD] __page_aligned_bss; 555af86e597SLaura Abbott #endif 5569f25e6adSKirill A. Shutemov #if CONFIG_PGTABLE_LEVELS > 3 557af86e597SLaura Abbott static pud_t bm_pud[PTRS_PER_PUD] __page_aligned_bss; 558af86e597SLaura Abbott #endif 559af86e597SLaura Abbott 560af86e597SLaura Abbott static inline pud_t * fixmap_pud(unsigned long addr) 561af86e597SLaura Abbott { 562af86e597SLaura Abbott pgd_t *pgd = pgd_offset_k(addr); 563af86e597SLaura Abbott 564af86e597SLaura Abbott BUG_ON(pgd_none(*pgd) || pgd_bad(*pgd)); 565af86e597SLaura Abbott 566af86e597SLaura Abbott return pud_offset(pgd, addr); 567af86e597SLaura Abbott } 568af86e597SLaura Abbott 569af86e597SLaura Abbott static inline pmd_t * fixmap_pmd(unsigned long addr) 570af86e597SLaura Abbott { 571af86e597SLaura Abbott pud_t *pud = fixmap_pud(addr); 572af86e597SLaura Abbott 573af86e597SLaura Abbott BUG_ON(pud_none(*pud) || pud_bad(*pud)); 574af86e597SLaura Abbott 575af86e597SLaura Abbott return pmd_offset(pud, addr); 576af86e597SLaura Abbott } 577af86e597SLaura Abbott 578af86e597SLaura Abbott static inline pte_t * fixmap_pte(unsigned long addr) 579af86e597SLaura Abbott { 580af86e597SLaura Abbott pmd_t *pmd = fixmap_pmd(addr); 581af86e597SLaura Abbott 582af86e597SLaura Abbott BUG_ON(pmd_none(*pmd) || pmd_bad(*pmd)); 583af86e597SLaura Abbott 584af86e597SLaura Abbott return pte_offset_kernel(pmd, addr); 585af86e597SLaura Abbott } 586af86e597SLaura Abbott 587af86e597SLaura Abbott void __init early_fixmap_init(void) 588af86e597SLaura Abbott { 589af86e597SLaura Abbott pgd_t *pgd; 590af86e597SLaura Abbott pud_t *pud; 591af86e597SLaura Abbott pmd_t *pmd; 592af86e597SLaura Abbott unsigned long addr = FIXADDR_START; 593af86e597SLaura Abbott 594af86e597SLaura Abbott pgd = pgd_offset_k(addr); 595af86e597SLaura Abbott pgd_populate(&init_mm, pgd, bm_pud); 596af86e597SLaura Abbott pud = pud_offset(pgd, addr); 597af86e597SLaura Abbott pud_populate(&init_mm, pud, bm_pmd); 598af86e597SLaura Abbott pmd = pmd_offset(pud, addr); 599af86e597SLaura Abbott pmd_populate_kernel(&init_mm, pmd, bm_pte); 600af86e597SLaura Abbott 601af86e597SLaura Abbott /* 602af86e597SLaura Abbott * The boot-ioremap range spans multiple pmds, for which 603af86e597SLaura Abbott * we are not preparted: 604af86e597SLaura Abbott */ 605af86e597SLaura Abbott BUILD_BUG_ON((__fix_to_virt(FIX_BTMAP_BEGIN) >> PMD_SHIFT) 606af86e597SLaura Abbott != (__fix_to_virt(FIX_BTMAP_END) >> PMD_SHIFT)); 607af86e597SLaura Abbott 608af86e597SLaura Abbott if ((pmd != fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN))) 609af86e597SLaura Abbott || pmd != fixmap_pmd(fix_to_virt(FIX_BTMAP_END))) { 610af86e597SLaura Abbott WARN_ON(1); 611af86e597SLaura Abbott pr_warn("pmd %p != %p, %p\n", 612af86e597SLaura Abbott pmd, fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN)), 613af86e597SLaura Abbott fixmap_pmd(fix_to_virt(FIX_BTMAP_END))); 614af86e597SLaura Abbott pr_warn("fix_to_virt(FIX_BTMAP_BEGIN): %08lx\n", 615af86e597SLaura Abbott fix_to_virt(FIX_BTMAP_BEGIN)); 616af86e597SLaura Abbott pr_warn("fix_to_virt(FIX_BTMAP_END): %08lx\n", 617af86e597SLaura Abbott fix_to_virt(FIX_BTMAP_END)); 618af86e597SLaura Abbott 619af86e597SLaura Abbott pr_warn("FIX_BTMAP_END: %d\n", FIX_BTMAP_END); 620af86e597SLaura Abbott pr_warn("FIX_BTMAP_BEGIN: %d\n", FIX_BTMAP_BEGIN); 621af86e597SLaura Abbott } 622af86e597SLaura Abbott } 623af86e597SLaura Abbott 624af86e597SLaura Abbott void __set_fixmap(enum fixed_addresses idx, 625af86e597SLaura Abbott phys_addr_t phys, pgprot_t flags) 626af86e597SLaura Abbott { 627af86e597SLaura Abbott unsigned long addr = __fix_to_virt(idx); 628af86e597SLaura Abbott pte_t *pte; 629af86e597SLaura Abbott 630b63dbef9SMark Rutland BUG_ON(idx <= FIX_HOLE || idx >= __end_of_fixed_addresses); 631af86e597SLaura Abbott 632af86e597SLaura Abbott pte = fixmap_pte(addr); 633af86e597SLaura Abbott 634af86e597SLaura Abbott if (pgprot_val(flags)) { 635af86e597SLaura Abbott set_pte(pte, pfn_pte(phys >> PAGE_SHIFT, flags)); 636af86e597SLaura Abbott } else { 637af86e597SLaura Abbott pte_clear(&init_mm, addr, pte); 638af86e597SLaura Abbott flush_tlb_kernel_range(addr, addr+PAGE_SIZE); 639af86e597SLaura Abbott } 640af86e597SLaura Abbott } 64161bd93ceSArd Biesheuvel 64261bd93ceSArd Biesheuvel void *__init fixmap_remap_fdt(phys_addr_t dt_phys) 64361bd93ceSArd Biesheuvel { 64461bd93ceSArd Biesheuvel const u64 dt_virt_base = __fix_to_virt(FIX_FDT); 645fb226c3dSArd Biesheuvel pgprot_t prot = PAGE_KERNEL_RO; 646b433dce0SSuzuki K. Poulose int size, offset; 64761bd93ceSArd Biesheuvel void *dt_virt; 64861bd93ceSArd Biesheuvel 64961bd93ceSArd Biesheuvel /* 65061bd93ceSArd Biesheuvel * Check whether the physical FDT address is set and meets the minimum 65161bd93ceSArd Biesheuvel * alignment requirement. Since we are relying on MIN_FDT_ALIGN to be 65261bd93ceSArd Biesheuvel * at least 8 bytes so that we can always access the size field of the 65361bd93ceSArd Biesheuvel * FDT header after mapping the first chunk, double check here if that 65461bd93ceSArd Biesheuvel * is indeed the case. 65561bd93ceSArd Biesheuvel */ 65661bd93ceSArd Biesheuvel BUILD_BUG_ON(MIN_FDT_ALIGN < 8); 65761bd93ceSArd Biesheuvel if (!dt_phys || dt_phys % MIN_FDT_ALIGN) 65861bd93ceSArd Biesheuvel return NULL; 65961bd93ceSArd Biesheuvel 66061bd93ceSArd Biesheuvel /* 66161bd93ceSArd Biesheuvel * Make sure that the FDT region can be mapped without the need to 66261bd93ceSArd Biesheuvel * allocate additional translation table pages, so that it is safe 66361bd93ceSArd Biesheuvel * to call create_mapping() this early. 66461bd93ceSArd Biesheuvel * 66561bd93ceSArd Biesheuvel * On 64k pages, the FDT will be mapped using PTEs, so we need to 66661bd93ceSArd Biesheuvel * be in the same PMD as the rest of the fixmap. 66761bd93ceSArd Biesheuvel * On 4k pages, we'll use section mappings for the FDT so we only 66861bd93ceSArd Biesheuvel * have to be in the same PUD. 66961bd93ceSArd Biesheuvel */ 67061bd93ceSArd Biesheuvel BUILD_BUG_ON(dt_virt_base % SZ_2M); 67161bd93ceSArd Biesheuvel 672b433dce0SSuzuki K. Poulose BUILD_BUG_ON(__fix_to_virt(FIX_FDT_END) >> SWAPPER_TABLE_SHIFT != 673b433dce0SSuzuki K. Poulose __fix_to_virt(FIX_BTMAP_BEGIN) >> SWAPPER_TABLE_SHIFT); 67461bd93ceSArd Biesheuvel 675b433dce0SSuzuki K. Poulose offset = dt_phys % SWAPPER_BLOCK_SIZE; 67661bd93ceSArd Biesheuvel dt_virt = (void *)dt_virt_base + offset; 67761bd93ceSArd Biesheuvel 67861bd93ceSArd Biesheuvel /* map the first chunk so we can read the size from the header */ 679b433dce0SSuzuki K. Poulose create_mapping(round_down(dt_phys, SWAPPER_BLOCK_SIZE), dt_virt_base, 680b433dce0SSuzuki K. Poulose SWAPPER_BLOCK_SIZE, prot); 68161bd93ceSArd Biesheuvel 68261bd93ceSArd Biesheuvel if (fdt_check_header(dt_virt) != 0) 68361bd93ceSArd Biesheuvel return NULL; 68461bd93ceSArd Biesheuvel 68561bd93ceSArd Biesheuvel size = fdt_totalsize(dt_virt); 68661bd93ceSArd Biesheuvel if (size > MAX_FDT_SIZE) 68761bd93ceSArd Biesheuvel return NULL; 68861bd93ceSArd Biesheuvel 689b433dce0SSuzuki K. Poulose if (offset + size > SWAPPER_BLOCK_SIZE) 690b433dce0SSuzuki K. Poulose create_mapping(round_down(dt_phys, SWAPPER_BLOCK_SIZE), dt_virt_base, 691b433dce0SSuzuki K. Poulose round_up(offset + size, SWAPPER_BLOCK_SIZE), prot); 69261bd93ceSArd Biesheuvel 69361bd93ceSArd Biesheuvel memblock_reserve(dt_phys, size); 69461bd93ceSArd Biesheuvel 69561bd93ceSArd Biesheuvel return dt_virt; 69661bd93ceSArd Biesheuvel } 697