1c1cc1552SCatalin Marinas /* 2c1cc1552SCatalin Marinas * Based on arch/arm/mm/mmu.c 3c1cc1552SCatalin Marinas * 4c1cc1552SCatalin Marinas * Copyright (C) 1995-2005 Russell King 5c1cc1552SCatalin Marinas * Copyright (C) 2012 ARM Ltd. 6c1cc1552SCatalin Marinas * 7c1cc1552SCatalin Marinas * This program is free software; you can redistribute it and/or modify 8c1cc1552SCatalin Marinas * it under the terms of the GNU General Public License version 2 as 9c1cc1552SCatalin Marinas * published by the Free Software Foundation. 10c1cc1552SCatalin Marinas * 11c1cc1552SCatalin Marinas * This program is distributed in the hope that it will be useful, 12c1cc1552SCatalin Marinas * but WITHOUT ANY WARRANTY; without even the implied warranty of 13c1cc1552SCatalin Marinas * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14c1cc1552SCatalin Marinas * GNU General Public License for more details. 15c1cc1552SCatalin Marinas * 16c1cc1552SCatalin Marinas * You should have received a copy of the GNU General Public License 17c1cc1552SCatalin Marinas * along with this program. If not, see <http://www.gnu.org/licenses/>. 18c1cc1552SCatalin Marinas */ 19c1cc1552SCatalin Marinas 20c1cc1552SCatalin Marinas #include <linux/export.h> 21c1cc1552SCatalin Marinas #include <linux/kernel.h> 22c1cc1552SCatalin Marinas #include <linux/errno.h> 23c1cc1552SCatalin Marinas #include <linux/init.h> 24*61bd93ceSArd Biesheuvel #include <linux/libfdt.h> 25c1cc1552SCatalin Marinas #include <linux/mman.h> 26c1cc1552SCatalin Marinas #include <linux/nodemask.h> 27c1cc1552SCatalin Marinas #include <linux/memblock.h> 28c1cc1552SCatalin Marinas #include <linux/fs.h> 292475ff9dSCatalin Marinas #include <linux/io.h> 3041089357SCatalin Marinas #include <linux/slab.h> 31da141706SLaura Abbott #include <linux/stop_machine.h> 32c1cc1552SCatalin Marinas 33c1cc1552SCatalin Marinas #include <asm/cputype.h> 34af86e597SLaura Abbott #include <asm/fixmap.h> 35c1cc1552SCatalin Marinas #include <asm/sections.h> 36c1cc1552SCatalin Marinas #include <asm/setup.h> 37c1cc1552SCatalin Marinas #include <asm/sizes.h> 38c1cc1552SCatalin Marinas #include <asm/tlb.h> 39c79b954bSJungseok Lee #include <asm/memblock.h> 40c1cc1552SCatalin Marinas #include <asm/mmu_context.h> 41c1cc1552SCatalin Marinas 42c1cc1552SCatalin Marinas #include "mm.h" 43c1cc1552SCatalin Marinas 44dd006da2SArd Biesheuvel u64 idmap_t0sz = TCR_T0SZ(VA_BITS); 45dd006da2SArd Biesheuvel 46c1cc1552SCatalin Marinas /* 47c1cc1552SCatalin Marinas * Empty_zero_page is a special page that is used for zero-initialized data 48c1cc1552SCatalin Marinas * and COW. 49c1cc1552SCatalin Marinas */ 50c1cc1552SCatalin Marinas struct page *empty_zero_page; 51c1cc1552SCatalin Marinas EXPORT_SYMBOL(empty_zero_page); 52c1cc1552SCatalin Marinas 53c1cc1552SCatalin Marinas pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, 54c1cc1552SCatalin Marinas unsigned long size, pgprot_t vma_prot) 55c1cc1552SCatalin Marinas { 56c1cc1552SCatalin Marinas if (!pfn_valid(pfn)) 57c1cc1552SCatalin Marinas return pgprot_noncached(vma_prot); 58c1cc1552SCatalin Marinas else if (file->f_flags & O_SYNC) 59c1cc1552SCatalin Marinas return pgprot_writecombine(vma_prot); 60c1cc1552SCatalin Marinas return vma_prot; 61c1cc1552SCatalin Marinas } 62c1cc1552SCatalin Marinas EXPORT_SYMBOL(phys_mem_access_prot); 63c1cc1552SCatalin Marinas 64c1cc1552SCatalin Marinas static void __init *early_alloc(unsigned long sz) 65c1cc1552SCatalin Marinas { 66c1cc1552SCatalin Marinas void *ptr = __va(memblock_alloc(sz, sz)); 67da141706SLaura Abbott BUG_ON(!ptr); 68c1cc1552SCatalin Marinas memset(ptr, 0, sz); 69c1cc1552SCatalin Marinas return ptr; 70c1cc1552SCatalin Marinas } 71c1cc1552SCatalin Marinas 72da141706SLaura Abbott /* 73da141706SLaura Abbott * remap a PMD into pages 74da141706SLaura Abbott */ 75da141706SLaura Abbott static void split_pmd(pmd_t *pmd, pte_t *pte) 76da141706SLaura Abbott { 77da141706SLaura Abbott unsigned long pfn = pmd_pfn(*pmd); 78da141706SLaura Abbott int i = 0; 79da141706SLaura Abbott 80da141706SLaura Abbott do { 81da141706SLaura Abbott /* 82da141706SLaura Abbott * Need to have the least restrictive permissions available 83da141706SLaura Abbott * permissions will be fixed up later 84da141706SLaura Abbott */ 85da141706SLaura Abbott set_pte(pte, pfn_pte(pfn, PAGE_KERNEL_EXEC)); 86da141706SLaura Abbott pfn++; 87da141706SLaura Abbott } while (pte++, i++, i < PTRS_PER_PTE); 88da141706SLaura Abbott } 89da141706SLaura Abbott 90da141706SLaura Abbott static void alloc_init_pte(pmd_t *pmd, unsigned long addr, 91d7ecbddfSMark Salter unsigned long end, unsigned long pfn, 92da141706SLaura Abbott pgprot_t prot, 93da141706SLaura Abbott void *(*alloc)(unsigned long size)) 94c1cc1552SCatalin Marinas { 95c1cc1552SCatalin Marinas pte_t *pte; 96c1cc1552SCatalin Marinas 97a1c76574SMark Rutland if (pmd_none(*pmd) || pmd_sect(*pmd)) { 98da141706SLaura Abbott pte = alloc(PTRS_PER_PTE * sizeof(pte_t)); 99da141706SLaura Abbott if (pmd_sect(*pmd)) 100da141706SLaura Abbott split_pmd(pmd, pte); 101c1cc1552SCatalin Marinas __pmd_populate(pmd, __pa(pte), PMD_TYPE_TABLE); 102da141706SLaura Abbott flush_tlb_all(); 103c1cc1552SCatalin Marinas } 104a1c76574SMark Rutland BUG_ON(pmd_bad(*pmd)); 105c1cc1552SCatalin Marinas 106c1cc1552SCatalin Marinas pte = pte_offset_kernel(pmd, addr); 107c1cc1552SCatalin Marinas do { 108d7ecbddfSMark Salter set_pte(pte, pfn_pte(pfn, prot)); 109c1cc1552SCatalin Marinas pfn++; 110c1cc1552SCatalin Marinas } while (pte++, addr += PAGE_SIZE, addr != end); 111c1cc1552SCatalin Marinas } 112c1cc1552SCatalin Marinas 113da141706SLaura Abbott void split_pud(pud_t *old_pud, pmd_t *pmd) 114da141706SLaura Abbott { 115da141706SLaura Abbott unsigned long addr = pud_pfn(*old_pud) << PAGE_SHIFT; 116da141706SLaura Abbott pgprot_t prot = __pgprot(pud_val(*old_pud) ^ addr); 117da141706SLaura Abbott int i = 0; 118da141706SLaura Abbott 119da141706SLaura Abbott do { 120da141706SLaura Abbott set_pmd(pmd, __pmd(addr | prot)); 121da141706SLaura Abbott addr += PMD_SIZE; 122da141706SLaura Abbott } while (pmd++, i++, i < PTRS_PER_PMD); 123da141706SLaura Abbott } 124da141706SLaura Abbott 125da141706SLaura Abbott static void alloc_init_pmd(struct mm_struct *mm, pud_t *pud, 126e1e1fddaSArd Biesheuvel unsigned long addr, unsigned long end, 127da141706SLaura Abbott phys_addr_t phys, pgprot_t prot, 128da141706SLaura Abbott void *(*alloc)(unsigned long size)) 129c1cc1552SCatalin Marinas { 130c1cc1552SCatalin Marinas pmd_t *pmd; 131c1cc1552SCatalin Marinas unsigned long next; 132c1cc1552SCatalin Marinas 133c1cc1552SCatalin Marinas /* 134c1cc1552SCatalin Marinas * Check for initial section mappings in the pgd/pud and remove them. 135c1cc1552SCatalin Marinas */ 136a1c76574SMark Rutland if (pud_none(*pud) || pud_sect(*pud)) { 137da141706SLaura Abbott pmd = alloc(PTRS_PER_PMD * sizeof(pmd_t)); 138da141706SLaura Abbott if (pud_sect(*pud)) { 139da141706SLaura Abbott /* 140da141706SLaura Abbott * need to have the 1G of mappings continue to be 141da141706SLaura Abbott * present 142da141706SLaura Abbott */ 143da141706SLaura Abbott split_pud(pud, pmd); 144da141706SLaura Abbott } 145e1e1fddaSArd Biesheuvel pud_populate(mm, pud, pmd); 146da141706SLaura Abbott flush_tlb_all(); 147c1cc1552SCatalin Marinas } 148a1c76574SMark Rutland BUG_ON(pud_bad(*pud)); 149c1cc1552SCatalin Marinas 150c1cc1552SCatalin Marinas pmd = pmd_offset(pud, addr); 151c1cc1552SCatalin Marinas do { 152c1cc1552SCatalin Marinas next = pmd_addr_end(addr, end); 153c1cc1552SCatalin Marinas /* try section mapping first */ 154a55f9929SCatalin Marinas if (((addr | next | phys) & ~SECTION_MASK) == 0) { 155a55f9929SCatalin Marinas pmd_t old_pmd =*pmd; 1568ce837ceSArd Biesheuvel set_pmd(pmd, __pmd(phys | 1578ce837ceSArd Biesheuvel pgprot_val(mk_sect_prot(prot)))); 158a55f9929SCatalin Marinas /* 159a55f9929SCatalin Marinas * Check for previous table entries created during 160a55f9929SCatalin Marinas * boot (__create_page_tables) and flush them. 161a55f9929SCatalin Marinas */ 162523d6e9fSzhichang.yuan if (!pmd_none(old_pmd)) { 163a55f9929SCatalin Marinas flush_tlb_all(); 164523d6e9fSzhichang.yuan if (pmd_table(old_pmd)) { 165523d6e9fSzhichang.yuan phys_addr_t table = __pa(pte_offset_map(&old_pmd, 0)); 16641089357SCatalin Marinas if (!WARN_ON_ONCE(slab_is_available())) 167523d6e9fSzhichang.yuan memblock_free(table, PAGE_SIZE); 168523d6e9fSzhichang.yuan } 169523d6e9fSzhichang.yuan } 170a55f9929SCatalin Marinas } else { 171d7ecbddfSMark Salter alloc_init_pte(pmd, addr, next, __phys_to_pfn(phys), 172da141706SLaura Abbott prot, alloc); 173a55f9929SCatalin Marinas } 174c1cc1552SCatalin Marinas phys += next - addr; 175c1cc1552SCatalin Marinas } while (pmd++, addr = next, addr != end); 176c1cc1552SCatalin Marinas } 177c1cc1552SCatalin Marinas 178da141706SLaura Abbott static inline bool use_1G_block(unsigned long addr, unsigned long next, 179da141706SLaura Abbott unsigned long phys) 180da141706SLaura Abbott { 181da141706SLaura Abbott if (PAGE_SHIFT != 12) 182da141706SLaura Abbott return false; 183da141706SLaura Abbott 184da141706SLaura Abbott if (((addr | next | phys) & ~PUD_MASK) != 0) 185da141706SLaura Abbott return false; 186da141706SLaura Abbott 187da141706SLaura Abbott return true; 188da141706SLaura Abbott } 189da141706SLaura Abbott 190da141706SLaura Abbott static void alloc_init_pud(struct mm_struct *mm, pgd_t *pgd, 191e1e1fddaSArd Biesheuvel unsigned long addr, unsigned long end, 192da141706SLaura Abbott phys_addr_t phys, pgprot_t prot, 193da141706SLaura Abbott void *(*alloc)(unsigned long size)) 194c1cc1552SCatalin Marinas { 195c79b954bSJungseok Lee pud_t *pud; 196c1cc1552SCatalin Marinas unsigned long next; 197c1cc1552SCatalin Marinas 198c79b954bSJungseok Lee if (pgd_none(*pgd)) { 199da141706SLaura Abbott pud = alloc(PTRS_PER_PUD * sizeof(pud_t)); 200e1e1fddaSArd Biesheuvel pgd_populate(mm, pgd, pud); 201c79b954bSJungseok Lee } 202c79b954bSJungseok Lee BUG_ON(pgd_bad(*pgd)); 203c79b954bSJungseok Lee 204c79b954bSJungseok Lee pud = pud_offset(pgd, addr); 205c1cc1552SCatalin Marinas do { 206c1cc1552SCatalin Marinas next = pud_addr_end(addr, end); 207206a2a73SSteve Capper 208206a2a73SSteve Capper /* 209206a2a73SSteve Capper * For 4K granule only, attempt to put down a 1GB block 210206a2a73SSteve Capper */ 211da141706SLaura Abbott if (use_1G_block(addr, next, phys)) { 212206a2a73SSteve Capper pud_t old_pud = *pud; 2138ce837ceSArd Biesheuvel set_pud(pud, __pud(phys | 2148ce837ceSArd Biesheuvel pgprot_val(mk_sect_prot(prot)))); 215206a2a73SSteve Capper 216206a2a73SSteve Capper /* 217206a2a73SSteve Capper * If we have an old value for a pud, it will 218206a2a73SSteve Capper * be pointing to a pmd table that we no longer 219206a2a73SSteve Capper * need (from swapper_pg_dir). 220206a2a73SSteve Capper * 221206a2a73SSteve Capper * Look up the old pmd table and free it. 222206a2a73SSteve Capper */ 223206a2a73SSteve Capper if (!pud_none(old_pud)) { 224206a2a73SSteve Capper flush_tlb_all(); 225523d6e9fSzhichang.yuan if (pud_table(old_pud)) { 226523d6e9fSzhichang.yuan phys_addr_t table = __pa(pmd_offset(&old_pud, 0)); 22741089357SCatalin Marinas if (!WARN_ON_ONCE(slab_is_available())) 228523d6e9fSzhichang.yuan memblock_free(table, PAGE_SIZE); 229523d6e9fSzhichang.yuan } 230206a2a73SSteve Capper } 231206a2a73SSteve Capper } else { 232da141706SLaura Abbott alloc_init_pmd(mm, pud, addr, next, phys, prot, alloc); 233206a2a73SSteve Capper } 234c1cc1552SCatalin Marinas phys += next - addr; 235c1cc1552SCatalin Marinas } while (pud++, addr = next, addr != end); 236c1cc1552SCatalin Marinas } 237c1cc1552SCatalin Marinas 238c1cc1552SCatalin Marinas /* 239c1cc1552SCatalin Marinas * Create the page directory entries and any necessary page tables for the 240c1cc1552SCatalin Marinas * mapping specified by 'md'. 241c1cc1552SCatalin Marinas */ 242da141706SLaura Abbott static void __create_mapping(struct mm_struct *mm, pgd_t *pgd, 243e1e1fddaSArd Biesheuvel phys_addr_t phys, unsigned long virt, 244da141706SLaura Abbott phys_addr_t size, pgprot_t prot, 245da141706SLaura Abbott void *(*alloc)(unsigned long size)) 246c1cc1552SCatalin Marinas { 247c1cc1552SCatalin Marinas unsigned long addr, length, end, next; 248c1cc1552SCatalin Marinas 249c1cc1552SCatalin Marinas addr = virt & PAGE_MASK; 250c1cc1552SCatalin Marinas length = PAGE_ALIGN(size + (virt & ~PAGE_MASK)); 251c1cc1552SCatalin Marinas 252c1cc1552SCatalin Marinas end = addr + length; 253c1cc1552SCatalin Marinas do { 254c1cc1552SCatalin Marinas next = pgd_addr_end(addr, end); 255da141706SLaura Abbott alloc_init_pud(mm, pgd, addr, next, phys, prot, alloc); 256c1cc1552SCatalin Marinas phys += next - addr; 257c1cc1552SCatalin Marinas } while (pgd++, addr = next, addr != end); 258c1cc1552SCatalin Marinas } 259c1cc1552SCatalin Marinas 260da141706SLaura Abbott static void *late_alloc(unsigned long size) 261da141706SLaura Abbott { 262da141706SLaura Abbott void *ptr; 263da141706SLaura Abbott 264da141706SLaura Abbott BUG_ON(size > PAGE_SIZE); 265da141706SLaura Abbott ptr = (void *)__get_free_page(PGALLOC_GFP); 266da141706SLaura Abbott BUG_ON(!ptr); 267da141706SLaura Abbott return ptr; 268da141706SLaura Abbott } 269da141706SLaura Abbott 270da141706SLaura Abbott static void __ref create_mapping(phys_addr_t phys, unsigned long virt, 271da141706SLaura Abbott phys_addr_t size, pgprot_t prot) 272d7ecbddfSMark Salter { 273d7ecbddfSMark Salter if (virt < VMALLOC_START) { 274d7ecbddfSMark Salter pr_warn("BUG: not creating mapping for %pa at 0x%016lx - outside kernel range\n", 275d7ecbddfSMark Salter &phys, virt); 276d7ecbddfSMark Salter return; 277d7ecbddfSMark Salter } 278e1e1fddaSArd Biesheuvel __create_mapping(&init_mm, pgd_offset_k(virt & PAGE_MASK), phys, virt, 279da141706SLaura Abbott size, prot, early_alloc); 280d7ecbddfSMark Salter } 281d7ecbddfSMark Salter 2828ce837ceSArd Biesheuvel void __init create_pgd_mapping(struct mm_struct *mm, phys_addr_t phys, 2838ce837ceSArd Biesheuvel unsigned long virt, phys_addr_t size, 2848ce837ceSArd Biesheuvel pgprot_t prot) 2858ce837ceSArd Biesheuvel { 286da141706SLaura Abbott __create_mapping(mm, pgd_offset(mm, virt), phys, virt, size, prot, 28760305db9SArd Biesheuvel late_alloc); 288d7ecbddfSMark Salter } 289d7ecbddfSMark Salter 290da141706SLaura Abbott static void create_mapping_late(phys_addr_t phys, unsigned long virt, 291da141706SLaura Abbott phys_addr_t size, pgprot_t prot) 292da141706SLaura Abbott { 293da141706SLaura Abbott if (virt < VMALLOC_START) { 294da141706SLaura Abbott pr_warn("BUG: not creating mapping for %pa at 0x%016lx - outside kernel range\n", 295da141706SLaura Abbott &phys, virt); 296da141706SLaura Abbott return; 297da141706SLaura Abbott } 298da141706SLaura Abbott 299da141706SLaura Abbott return __create_mapping(&init_mm, pgd_offset_k(virt & PAGE_MASK), 300da141706SLaura Abbott phys, virt, size, prot, late_alloc); 301da141706SLaura Abbott } 302da141706SLaura Abbott 303da141706SLaura Abbott #ifdef CONFIG_DEBUG_RODATA 304da141706SLaura Abbott static void __init __map_memblock(phys_addr_t start, phys_addr_t end) 305da141706SLaura Abbott { 306da141706SLaura Abbott /* 307da141706SLaura Abbott * Set up the executable regions using the existing section mappings 308da141706SLaura Abbott * for now. This will get more fine grained later once all memory 309da141706SLaura Abbott * is mapped 310da141706SLaura Abbott */ 311da141706SLaura Abbott unsigned long kernel_x_start = round_down(__pa(_stext), SECTION_SIZE); 312da141706SLaura Abbott unsigned long kernel_x_end = round_up(__pa(__init_end), SECTION_SIZE); 313da141706SLaura Abbott 314da141706SLaura Abbott if (end < kernel_x_start) { 315da141706SLaura Abbott create_mapping(start, __phys_to_virt(start), 316da141706SLaura Abbott end - start, PAGE_KERNEL); 317da141706SLaura Abbott } else if (start >= kernel_x_end) { 318da141706SLaura Abbott create_mapping(start, __phys_to_virt(start), 319da141706SLaura Abbott end - start, PAGE_KERNEL); 320da141706SLaura Abbott } else { 321da141706SLaura Abbott if (start < kernel_x_start) 322da141706SLaura Abbott create_mapping(start, __phys_to_virt(start), 323da141706SLaura Abbott kernel_x_start - start, 324da141706SLaura Abbott PAGE_KERNEL); 325da141706SLaura Abbott create_mapping(kernel_x_start, 326da141706SLaura Abbott __phys_to_virt(kernel_x_start), 327da141706SLaura Abbott kernel_x_end - kernel_x_start, 328da141706SLaura Abbott PAGE_KERNEL_EXEC); 329da141706SLaura Abbott if (kernel_x_end < end) 330da141706SLaura Abbott create_mapping(kernel_x_end, 331da141706SLaura Abbott __phys_to_virt(kernel_x_end), 332da141706SLaura Abbott end - kernel_x_end, 333da141706SLaura Abbott PAGE_KERNEL); 334da141706SLaura Abbott } 335da141706SLaura Abbott 336da141706SLaura Abbott } 337da141706SLaura Abbott #else 338da141706SLaura Abbott static void __init __map_memblock(phys_addr_t start, phys_addr_t end) 339da141706SLaura Abbott { 340da141706SLaura Abbott create_mapping(start, __phys_to_virt(start), end - start, 341da141706SLaura Abbott PAGE_KERNEL_EXEC); 342da141706SLaura Abbott } 343da141706SLaura Abbott #endif 344da141706SLaura Abbott 345c1cc1552SCatalin Marinas static void __init map_mem(void) 346c1cc1552SCatalin Marinas { 347c1cc1552SCatalin Marinas struct memblock_region *reg; 348e25208f7SCatalin Marinas phys_addr_t limit; 349c1cc1552SCatalin Marinas 350f6bc87c3SSteve Capper /* 351f6bc87c3SSteve Capper * Temporarily limit the memblock range. We need to do this as 352f6bc87c3SSteve Capper * create_mapping requires puds, pmds and ptes to be allocated from 353f6bc87c3SSteve Capper * memory addressable from the initial direct kernel mapping. 354f6bc87c3SSteve Capper * 3553dec0fe4SCatalin Marinas * The initial direct kernel mapping, located at swapper_pg_dir, gives 3563dec0fe4SCatalin Marinas * us PUD_SIZE (4K pages) or PMD_SIZE (64K pages) memory starting from 3573dec0fe4SCatalin Marinas * PHYS_OFFSET (which must be aligned to 2MB as per 3583dec0fe4SCatalin Marinas * Documentation/arm64/booting.txt). 359f6bc87c3SSteve Capper */ 3603dec0fe4SCatalin Marinas if (IS_ENABLED(CONFIG_ARM64_64K_PAGES)) 3613dec0fe4SCatalin Marinas limit = PHYS_OFFSET + PMD_SIZE; 3623dec0fe4SCatalin Marinas else 363c79b954bSJungseok Lee limit = PHYS_OFFSET + PUD_SIZE; 364e25208f7SCatalin Marinas memblock_set_current_limit(limit); 365f6bc87c3SSteve Capper 366c1cc1552SCatalin Marinas /* map all the memory banks */ 367c1cc1552SCatalin Marinas for_each_memblock(memory, reg) { 368c1cc1552SCatalin Marinas phys_addr_t start = reg->base; 369c1cc1552SCatalin Marinas phys_addr_t end = start + reg->size; 370c1cc1552SCatalin Marinas 371c1cc1552SCatalin Marinas if (start >= end) 372c1cc1552SCatalin Marinas break; 373c1cc1552SCatalin Marinas 374e25208f7SCatalin Marinas #ifndef CONFIG_ARM64_64K_PAGES 375e25208f7SCatalin Marinas /* 376e25208f7SCatalin Marinas * For the first memory bank align the start address and 377e25208f7SCatalin Marinas * current memblock limit to prevent create_mapping() from 378e25208f7SCatalin Marinas * allocating pte page tables from unmapped memory. 379e25208f7SCatalin Marinas * When 64K pages are enabled, the pte page table for the 380e25208f7SCatalin Marinas * first PGDIR_SIZE is already present in swapper_pg_dir. 381e25208f7SCatalin Marinas */ 382e25208f7SCatalin Marinas if (start < limit) 383e25208f7SCatalin Marinas start = ALIGN(start, PMD_SIZE); 384e25208f7SCatalin Marinas if (end < limit) { 385e25208f7SCatalin Marinas limit = end & PMD_MASK; 386e25208f7SCatalin Marinas memblock_set_current_limit(limit); 387e25208f7SCatalin Marinas } 388e25208f7SCatalin Marinas #endif 389da141706SLaura Abbott __map_memblock(start, end); 390c1cc1552SCatalin Marinas } 391f6bc87c3SSteve Capper 392f6bc87c3SSteve Capper /* Limit no longer required. */ 393f6bc87c3SSteve Capper memblock_set_current_limit(MEMBLOCK_ALLOC_ANYWHERE); 394c1cc1552SCatalin Marinas } 395c1cc1552SCatalin Marinas 396da141706SLaura Abbott void __init fixup_executable(void) 397da141706SLaura Abbott { 398da141706SLaura Abbott #ifdef CONFIG_DEBUG_RODATA 399da141706SLaura Abbott /* now that we are actually fully mapped, make the start/end more fine grained */ 400da141706SLaura Abbott if (!IS_ALIGNED((unsigned long)_stext, SECTION_SIZE)) { 401da141706SLaura Abbott unsigned long aligned_start = round_down(__pa(_stext), 402da141706SLaura Abbott SECTION_SIZE); 403da141706SLaura Abbott 404da141706SLaura Abbott create_mapping(aligned_start, __phys_to_virt(aligned_start), 405da141706SLaura Abbott __pa(_stext) - aligned_start, 406da141706SLaura Abbott PAGE_KERNEL); 407da141706SLaura Abbott } 408da141706SLaura Abbott 409da141706SLaura Abbott if (!IS_ALIGNED((unsigned long)__init_end, SECTION_SIZE)) { 410da141706SLaura Abbott unsigned long aligned_end = round_up(__pa(__init_end), 411da141706SLaura Abbott SECTION_SIZE); 412da141706SLaura Abbott create_mapping(__pa(__init_end), (unsigned long)__init_end, 413da141706SLaura Abbott aligned_end - __pa(__init_end), 414da141706SLaura Abbott PAGE_KERNEL); 415da141706SLaura Abbott } 416da141706SLaura Abbott #endif 417da141706SLaura Abbott } 418da141706SLaura Abbott 419da141706SLaura Abbott #ifdef CONFIG_DEBUG_RODATA 420da141706SLaura Abbott void mark_rodata_ro(void) 421da141706SLaura Abbott { 422da141706SLaura Abbott create_mapping_late(__pa(_stext), (unsigned long)_stext, 423da141706SLaura Abbott (unsigned long)_etext - (unsigned long)_stext, 424da141706SLaura Abbott PAGE_KERNEL_EXEC | PTE_RDONLY); 425da141706SLaura Abbott 426da141706SLaura Abbott } 427da141706SLaura Abbott #endif 428da141706SLaura Abbott 429da141706SLaura Abbott void fixup_init(void) 430da141706SLaura Abbott { 431da141706SLaura Abbott create_mapping_late(__pa(__init_begin), (unsigned long)__init_begin, 432da141706SLaura Abbott (unsigned long)__init_end - (unsigned long)__init_begin, 433da141706SLaura Abbott PAGE_KERNEL); 434da141706SLaura Abbott } 435da141706SLaura Abbott 436c1cc1552SCatalin Marinas /* 437c1cc1552SCatalin Marinas * paging_init() sets up the page tables, initialises the zone memory 438c1cc1552SCatalin Marinas * maps and sets up the zero page. 439c1cc1552SCatalin Marinas */ 440c1cc1552SCatalin Marinas void __init paging_init(void) 441c1cc1552SCatalin Marinas { 442c1cc1552SCatalin Marinas void *zero_page; 443c1cc1552SCatalin Marinas 444c1cc1552SCatalin Marinas map_mem(); 445da141706SLaura Abbott fixup_executable(); 446c1cc1552SCatalin Marinas 447c1cc1552SCatalin Marinas /* allocate the zero page. */ 448c1cc1552SCatalin Marinas zero_page = early_alloc(PAGE_SIZE); 449c1cc1552SCatalin Marinas 450c1cc1552SCatalin Marinas bootmem_init(); 451c1cc1552SCatalin Marinas 452c1cc1552SCatalin Marinas empty_zero_page = virt_to_page(zero_page); 453c1cc1552SCatalin Marinas 454c1cc1552SCatalin Marinas /* 455c1cc1552SCatalin Marinas * TTBR0 is only used for the identity mapping at this stage. Make it 456c1cc1552SCatalin Marinas * point to zero page to avoid speculatively fetching new entries. 457c1cc1552SCatalin Marinas */ 458c1cc1552SCatalin Marinas cpu_set_reserved_ttbr0(); 459c1cc1552SCatalin Marinas flush_tlb_all(); 460dd006da2SArd Biesheuvel cpu_set_default_tcr_t0sz(); 461c1cc1552SCatalin Marinas } 462c1cc1552SCatalin Marinas 463c1cc1552SCatalin Marinas /* 464c1cc1552SCatalin Marinas * Enable the identity mapping to allow the MMU disabling. 465c1cc1552SCatalin Marinas */ 466c1cc1552SCatalin Marinas void setup_mm_for_reboot(void) 467c1cc1552SCatalin Marinas { 468dd006da2SArd Biesheuvel cpu_set_reserved_ttbr0(); 469c1cc1552SCatalin Marinas flush_tlb_all(); 470dd006da2SArd Biesheuvel cpu_set_idmap_tcr_t0sz(); 471dd006da2SArd Biesheuvel cpu_switch_mm(idmap_pg_dir, &init_mm); 472c1cc1552SCatalin Marinas } 473c1cc1552SCatalin Marinas 474c1cc1552SCatalin Marinas /* 475c1cc1552SCatalin Marinas * Check whether a kernel address is valid (derived from arch/x86/). 476c1cc1552SCatalin Marinas */ 477c1cc1552SCatalin Marinas int kern_addr_valid(unsigned long addr) 478c1cc1552SCatalin Marinas { 479c1cc1552SCatalin Marinas pgd_t *pgd; 480c1cc1552SCatalin Marinas pud_t *pud; 481c1cc1552SCatalin Marinas pmd_t *pmd; 482c1cc1552SCatalin Marinas pte_t *pte; 483c1cc1552SCatalin Marinas 484c1cc1552SCatalin Marinas if ((((long)addr) >> VA_BITS) != -1UL) 485c1cc1552SCatalin Marinas return 0; 486c1cc1552SCatalin Marinas 487c1cc1552SCatalin Marinas pgd = pgd_offset_k(addr); 488c1cc1552SCatalin Marinas if (pgd_none(*pgd)) 489c1cc1552SCatalin Marinas return 0; 490c1cc1552SCatalin Marinas 491c1cc1552SCatalin Marinas pud = pud_offset(pgd, addr); 492c1cc1552SCatalin Marinas if (pud_none(*pud)) 493c1cc1552SCatalin Marinas return 0; 494c1cc1552SCatalin Marinas 495206a2a73SSteve Capper if (pud_sect(*pud)) 496206a2a73SSteve Capper return pfn_valid(pud_pfn(*pud)); 497206a2a73SSteve Capper 498c1cc1552SCatalin Marinas pmd = pmd_offset(pud, addr); 499c1cc1552SCatalin Marinas if (pmd_none(*pmd)) 500c1cc1552SCatalin Marinas return 0; 501c1cc1552SCatalin Marinas 502da6e4cb6SDave Anderson if (pmd_sect(*pmd)) 503da6e4cb6SDave Anderson return pfn_valid(pmd_pfn(*pmd)); 504da6e4cb6SDave Anderson 505c1cc1552SCatalin Marinas pte = pte_offset_kernel(pmd, addr); 506c1cc1552SCatalin Marinas if (pte_none(*pte)) 507c1cc1552SCatalin Marinas return 0; 508c1cc1552SCatalin Marinas 509c1cc1552SCatalin Marinas return pfn_valid(pte_pfn(*pte)); 510c1cc1552SCatalin Marinas } 511c1cc1552SCatalin Marinas #ifdef CONFIG_SPARSEMEM_VMEMMAP 512c1cc1552SCatalin Marinas #ifdef CONFIG_ARM64_64K_PAGES 5130aad818bSJohannes Weiner int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node) 514c1cc1552SCatalin Marinas { 5150aad818bSJohannes Weiner return vmemmap_populate_basepages(start, end, node); 516c1cc1552SCatalin Marinas } 517c1cc1552SCatalin Marinas #else /* !CONFIG_ARM64_64K_PAGES */ 5180aad818bSJohannes Weiner int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node) 519c1cc1552SCatalin Marinas { 5200aad818bSJohannes Weiner unsigned long addr = start; 521c1cc1552SCatalin Marinas unsigned long next; 522c1cc1552SCatalin Marinas pgd_t *pgd; 523c1cc1552SCatalin Marinas pud_t *pud; 524c1cc1552SCatalin Marinas pmd_t *pmd; 525c1cc1552SCatalin Marinas 526c1cc1552SCatalin Marinas do { 527c1cc1552SCatalin Marinas next = pmd_addr_end(addr, end); 528c1cc1552SCatalin Marinas 529c1cc1552SCatalin Marinas pgd = vmemmap_pgd_populate(addr, node); 530c1cc1552SCatalin Marinas if (!pgd) 531c1cc1552SCatalin Marinas return -ENOMEM; 532c1cc1552SCatalin Marinas 533c1cc1552SCatalin Marinas pud = vmemmap_pud_populate(pgd, addr, node); 534c1cc1552SCatalin Marinas if (!pud) 535c1cc1552SCatalin Marinas return -ENOMEM; 536c1cc1552SCatalin Marinas 537c1cc1552SCatalin Marinas pmd = pmd_offset(pud, addr); 538c1cc1552SCatalin Marinas if (pmd_none(*pmd)) { 539c1cc1552SCatalin Marinas void *p = NULL; 540c1cc1552SCatalin Marinas 541c1cc1552SCatalin Marinas p = vmemmap_alloc_block_buf(PMD_SIZE, node); 542c1cc1552SCatalin Marinas if (!p) 543c1cc1552SCatalin Marinas return -ENOMEM; 544c1cc1552SCatalin Marinas 545a501e324SCatalin Marinas set_pmd(pmd, __pmd(__pa(p) | PROT_SECT_NORMAL)); 546c1cc1552SCatalin Marinas } else 547c1cc1552SCatalin Marinas vmemmap_verify((pte_t *)pmd, node, addr, next); 548c1cc1552SCatalin Marinas } while (addr = next, addr != end); 549c1cc1552SCatalin Marinas 550c1cc1552SCatalin Marinas return 0; 551c1cc1552SCatalin Marinas } 552c1cc1552SCatalin Marinas #endif /* CONFIG_ARM64_64K_PAGES */ 5530aad818bSJohannes Weiner void vmemmap_free(unsigned long start, unsigned long end) 5540197518cSTang Chen { 5550197518cSTang Chen } 556c1cc1552SCatalin Marinas #endif /* CONFIG_SPARSEMEM_VMEMMAP */ 557af86e597SLaura Abbott 558af86e597SLaura Abbott static pte_t bm_pte[PTRS_PER_PTE] __page_aligned_bss; 5599f25e6adSKirill A. Shutemov #if CONFIG_PGTABLE_LEVELS > 2 560af86e597SLaura Abbott static pmd_t bm_pmd[PTRS_PER_PMD] __page_aligned_bss; 561af86e597SLaura Abbott #endif 5629f25e6adSKirill A. Shutemov #if CONFIG_PGTABLE_LEVELS > 3 563af86e597SLaura Abbott static pud_t bm_pud[PTRS_PER_PUD] __page_aligned_bss; 564af86e597SLaura Abbott #endif 565af86e597SLaura Abbott 566af86e597SLaura Abbott static inline pud_t * fixmap_pud(unsigned long addr) 567af86e597SLaura Abbott { 568af86e597SLaura Abbott pgd_t *pgd = pgd_offset_k(addr); 569af86e597SLaura Abbott 570af86e597SLaura Abbott BUG_ON(pgd_none(*pgd) || pgd_bad(*pgd)); 571af86e597SLaura Abbott 572af86e597SLaura Abbott return pud_offset(pgd, addr); 573af86e597SLaura Abbott } 574af86e597SLaura Abbott 575af86e597SLaura Abbott static inline pmd_t * fixmap_pmd(unsigned long addr) 576af86e597SLaura Abbott { 577af86e597SLaura Abbott pud_t *pud = fixmap_pud(addr); 578af86e597SLaura Abbott 579af86e597SLaura Abbott BUG_ON(pud_none(*pud) || pud_bad(*pud)); 580af86e597SLaura Abbott 581af86e597SLaura Abbott return pmd_offset(pud, addr); 582af86e597SLaura Abbott } 583af86e597SLaura Abbott 584af86e597SLaura Abbott static inline pte_t * fixmap_pte(unsigned long addr) 585af86e597SLaura Abbott { 586af86e597SLaura Abbott pmd_t *pmd = fixmap_pmd(addr); 587af86e597SLaura Abbott 588af86e597SLaura Abbott BUG_ON(pmd_none(*pmd) || pmd_bad(*pmd)); 589af86e597SLaura Abbott 590af86e597SLaura Abbott return pte_offset_kernel(pmd, addr); 591af86e597SLaura Abbott } 592af86e597SLaura Abbott 593af86e597SLaura Abbott void __init early_fixmap_init(void) 594af86e597SLaura Abbott { 595af86e597SLaura Abbott pgd_t *pgd; 596af86e597SLaura Abbott pud_t *pud; 597af86e597SLaura Abbott pmd_t *pmd; 598af86e597SLaura Abbott unsigned long addr = FIXADDR_START; 599af86e597SLaura Abbott 600af86e597SLaura Abbott pgd = pgd_offset_k(addr); 601af86e597SLaura Abbott pgd_populate(&init_mm, pgd, bm_pud); 602af86e597SLaura Abbott pud = pud_offset(pgd, addr); 603af86e597SLaura Abbott pud_populate(&init_mm, pud, bm_pmd); 604af86e597SLaura Abbott pmd = pmd_offset(pud, addr); 605af86e597SLaura Abbott pmd_populate_kernel(&init_mm, pmd, bm_pte); 606af86e597SLaura Abbott 607af86e597SLaura Abbott /* 608af86e597SLaura Abbott * The boot-ioremap range spans multiple pmds, for which 609af86e597SLaura Abbott * we are not preparted: 610af86e597SLaura Abbott */ 611af86e597SLaura Abbott BUILD_BUG_ON((__fix_to_virt(FIX_BTMAP_BEGIN) >> PMD_SHIFT) 612af86e597SLaura Abbott != (__fix_to_virt(FIX_BTMAP_END) >> PMD_SHIFT)); 613af86e597SLaura Abbott 614af86e597SLaura Abbott if ((pmd != fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN))) 615af86e597SLaura Abbott || pmd != fixmap_pmd(fix_to_virt(FIX_BTMAP_END))) { 616af86e597SLaura Abbott WARN_ON(1); 617af86e597SLaura Abbott pr_warn("pmd %p != %p, %p\n", 618af86e597SLaura Abbott pmd, fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN)), 619af86e597SLaura Abbott fixmap_pmd(fix_to_virt(FIX_BTMAP_END))); 620af86e597SLaura Abbott pr_warn("fix_to_virt(FIX_BTMAP_BEGIN): %08lx\n", 621af86e597SLaura Abbott fix_to_virt(FIX_BTMAP_BEGIN)); 622af86e597SLaura Abbott pr_warn("fix_to_virt(FIX_BTMAP_END): %08lx\n", 623af86e597SLaura Abbott fix_to_virt(FIX_BTMAP_END)); 624af86e597SLaura Abbott 625af86e597SLaura Abbott pr_warn("FIX_BTMAP_END: %d\n", FIX_BTMAP_END); 626af86e597SLaura Abbott pr_warn("FIX_BTMAP_BEGIN: %d\n", FIX_BTMAP_BEGIN); 627af86e597SLaura Abbott } 628af86e597SLaura Abbott } 629af86e597SLaura Abbott 630af86e597SLaura Abbott void __set_fixmap(enum fixed_addresses idx, 631af86e597SLaura Abbott phys_addr_t phys, pgprot_t flags) 632af86e597SLaura Abbott { 633af86e597SLaura Abbott unsigned long addr = __fix_to_virt(idx); 634af86e597SLaura Abbott pte_t *pte; 635af86e597SLaura Abbott 636b63dbef9SMark Rutland BUG_ON(idx <= FIX_HOLE || idx >= __end_of_fixed_addresses); 637af86e597SLaura Abbott 638af86e597SLaura Abbott pte = fixmap_pte(addr); 639af86e597SLaura Abbott 640af86e597SLaura Abbott if (pgprot_val(flags)) { 641af86e597SLaura Abbott set_pte(pte, pfn_pte(phys >> PAGE_SHIFT, flags)); 642af86e597SLaura Abbott } else { 643af86e597SLaura Abbott pte_clear(&init_mm, addr, pte); 644af86e597SLaura Abbott flush_tlb_kernel_range(addr, addr+PAGE_SIZE); 645af86e597SLaura Abbott } 646af86e597SLaura Abbott } 647*61bd93ceSArd Biesheuvel 648*61bd93ceSArd Biesheuvel void *__init fixmap_remap_fdt(phys_addr_t dt_phys) 649*61bd93ceSArd Biesheuvel { 650*61bd93ceSArd Biesheuvel const u64 dt_virt_base = __fix_to_virt(FIX_FDT); 651*61bd93ceSArd Biesheuvel pgprot_t prot = PAGE_KERNEL | PTE_RDONLY; 652*61bd93ceSArd Biesheuvel int granularity, size, offset; 653*61bd93ceSArd Biesheuvel void *dt_virt; 654*61bd93ceSArd Biesheuvel 655*61bd93ceSArd Biesheuvel /* 656*61bd93ceSArd Biesheuvel * Check whether the physical FDT address is set and meets the minimum 657*61bd93ceSArd Biesheuvel * alignment requirement. Since we are relying on MIN_FDT_ALIGN to be 658*61bd93ceSArd Biesheuvel * at least 8 bytes so that we can always access the size field of the 659*61bd93ceSArd Biesheuvel * FDT header after mapping the first chunk, double check here if that 660*61bd93ceSArd Biesheuvel * is indeed the case. 661*61bd93ceSArd Biesheuvel */ 662*61bd93ceSArd Biesheuvel BUILD_BUG_ON(MIN_FDT_ALIGN < 8); 663*61bd93ceSArd Biesheuvel if (!dt_phys || dt_phys % MIN_FDT_ALIGN) 664*61bd93ceSArd Biesheuvel return NULL; 665*61bd93ceSArd Biesheuvel 666*61bd93ceSArd Biesheuvel /* 667*61bd93ceSArd Biesheuvel * Make sure that the FDT region can be mapped without the need to 668*61bd93ceSArd Biesheuvel * allocate additional translation table pages, so that it is safe 669*61bd93ceSArd Biesheuvel * to call create_mapping() this early. 670*61bd93ceSArd Biesheuvel * 671*61bd93ceSArd Biesheuvel * On 64k pages, the FDT will be mapped using PTEs, so we need to 672*61bd93ceSArd Biesheuvel * be in the same PMD as the rest of the fixmap. 673*61bd93ceSArd Biesheuvel * On 4k pages, we'll use section mappings for the FDT so we only 674*61bd93ceSArd Biesheuvel * have to be in the same PUD. 675*61bd93ceSArd Biesheuvel */ 676*61bd93ceSArd Biesheuvel BUILD_BUG_ON(dt_virt_base % SZ_2M); 677*61bd93ceSArd Biesheuvel 678*61bd93ceSArd Biesheuvel if (IS_ENABLED(CONFIG_ARM64_64K_PAGES)) { 679*61bd93ceSArd Biesheuvel BUILD_BUG_ON(__fix_to_virt(FIX_FDT_END) >> PMD_SHIFT != 680*61bd93ceSArd Biesheuvel __fix_to_virt(FIX_BTMAP_BEGIN) >> PMD_SHIFT); 681*61bd93ceSArd Biesheuvel 682*61bd93ceSArd Biesheuvel granularity = PAGE_SIZE; 683*61bd93ceSArd Biesheuvel } else { 684*61bd93ceSArd Biesheuvel BUILD_BUG_ON(__fix_to_virt(FIX_FDT_END) >> PUD_SHIFT != 685*61bd93ceSArd Biesheuvel __fix_to_virt(FIX_BTMAP_BEGIN) >> PUD_SHIFT); 686*61bd93ceSArd Biesheuvel 687*61bd93ceSArd Biesheuvel granularity = PMD_SIZE; 688*61bd93ceSArd Biesheuvel } 689*61bd93ceSArd Biesheuvel 690*61bd93ceSArd Biesheuvel offset = dt_phys % granularity; 691*61bd93ceSArd Biesheuvel dt_virt = (void *)dt_virt_base + offset; 692*61bd93ceSArd Biesheuvel 693*61bd93ceSArd Biesheuvel /* map the first chunk so we can read the size from the header */ 694*61bd93ceSArd Biesheuvel create_mapping(round_down(dt_phys, granularity), dt_virt_base, 695*61bd93ceSArd Biesheuvel granularity, prot); 696*61bd93ceSArd Biesheuvel 697*61bd93ceSArd Biesheuvel if (fdt_check_header(dt_virt) != 0) 698*61bd93ceSArd Biesheuvel return NULL; 699*61bd93ceSArd Biesheuvel 700*61bd93ceSArd Biesheuvel size = fdt_totalsize(dt_virt); 701*61bd93ceSArd Biesheuvel if (size > MAX_FDT_SIZE) 702*61bd93ceSArd Biesheuvel return NULL; 703*61bd93ceSArd Biesheuvel 704*61bd93ceSArd Biesheuvel if (offset + size > granularity) 705*61bd93ceSArd Biesheuvel create_mapping(round_down(dt_phys, granularity), dt_virt_base, 706*61bd93ceSArd Biesheuvel round_up(offset + size, granularity), prot); 707*61bd93ceSArd Biesheuvel 708*61bd93ceSArd Biesheuvel memblock_reserve(dt_phys, size); 709*61bd93ceSArd Biesheuvel 710*61bd93ceSArd Biesheuvel return dt_virt; 711*61bd93ceSArd Biesheuvel } 712