1c1cc1552SCatalin Marinas /* 2c1cc1552SCatalin Marinas * Based on arch/arm/mm/mmu.c 3c1cc1552SCatalin Marinas * 4c1cc1552SCatalin Marinas * Copyright (C) 1995-2005 Russell King 5c1cc1552SCatalin Marinas * Copyright (C) 2012 ARM Ltd. 6c1cc1552SCatalin Marinas * 7c1cc1552SCatalin Marinas * This program is free software; you can redistribute it and/or modify 8c1cc1552SCatalin Marinas * it under the terms of the GNU General Public License version 2 as 9c1cc1552SCatalin Marinas * published by the Free Software Foundation. 10c1cc1552SCatalin Marinas * 11c1cc1552SCatalin Marinas * This program is distributed in the hope that it will be useful, 12c1cc1552SCatalin Marinas * but WITHOUT ANY WARRANTY; without even the implied warranty of 13c1cc1552SCatalin Marinas * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14c1cc1552SCatalin Marinas * GNU General Public License for more details. 15c1cc1552SCatalin Marinas * 16c1cc1552SCatalin Marinas * You should have received a copy of the GNU General Public License 17c1cc1552SCatalin Marinas * along with this program. If not, see <http://www.gnu.org/licenses/>. 18c1cc1552SCatalin Marinas */ 19c1cc1552SCatalin Marinas 205a9e3e15SJisheng Zhang #include <linux/cache.h> 21c1cc1552SCatalin Marinas #include <linux/export.h> 22c1cc1552SCatalin Marinas #include <linux/kernel.h> 23c1cc1552SCatalin Marinas #include <linux/errno.h> 24c1cc1552SCatalin Marinas #include <linux/init.h> 2598d2e153STakahiro Akashi #include <linux/ioport.h> 2698d2e153STakahiro Akashi #include <linux/kexec.h> 2761bd93ceSArd Biesheuvel #include <linux/libfdt.h> 28c1cc1552SCatalin Marinas #include <linux/mman.h> 29c1cc1552SCatalin Marinas #include <linux/nodemask.h> 30c1cc1552SCatalin Marinas #include <linux/memblock.h> 31c1cc1552SCatalin Marinas #include <linux/fs.h> 322475ff9dSCatalin Marinas #include <linux/io.h> 332077be67SLaura Abbott #include <linux/mm.h> 346efd8499STobias Klauser #include <linux/vmalloc.h> 35c1cc1552SCatalin Marinas 3621ab99c2SMark Rutland #include <asm/barrier.h> 37c1cc1552SCatalin Marinas #include <asm/cputype.h> 38af86e597SLaura Abbott #include <asm/fixmap.h> 39068a17a5SMark Rutland #include <asm/kasan.h> 40b433dce0SSuzuki K. Poulose #include <asm/kernel-pgtable.h> 41c1cc1552SCatalin Marinas #include <asm/sections.h> 42c1cc1552SCatalin Marinas #include <asm/setup.h> 43c1cc1552SCatalin Marinas #include <asm/sizes.h> 44c1cc1552SCatalin Marinas #include <asm/tlb.h> 45c79b954bSJungseok Lee #include <asm/memblock.h> 46c1cc1552SCatalin Marinas #include <asm/mmu_context.h> 471404d6f1SLaura Abbott #include <asm/ptdump.h> 48c1cc1552SCatalin Marinas 49c0951366SArd Biesheuvel #define NO_BLOCK_MAPPINGS BIT(0) 50d27cfa1fSArd Biesheuvel #define NO_CONT_MAPPINGS BIT(1) 51c0951366SArd Biesheuvel 52dd006da2SArd Biesheuvel u64 idmap_t0sz = TCR_T0SZ(VA_BITS); 53fa2a8445SKristina Martsenko u64 idmap_ptrs_per_pgd = PTRS_PER_PGD; 54dd006da2SArd Biesheuvel 555a9e3e15SJisheng Zhang u64 kimage_voffset __ro_after_init; 56a7f8de16SArd Biesheuvel EXPORT_SYMBOL(kimage_voffset); 57a7f8de16SArd Biesheuvel 58c1cc1552SCatalin Marinas /* 59c1cc1552SCatalin Marinas * Empty_zero_page is a special page that is used for zero-initialized data 60c1cc1552SCatalin Marinas * and COW. 61c1cc1552SCatalin Marinas */ 625227cfa7SMark Rutland unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)] __page_aligned_bss; 63c1cc1552SCatalin Marinas EXPORT_SYMBOL(empty_zero_page); 64c1cc1552SCatalin Marinas 65f9040773SArd Biesheuvel static pte_t bm_pte[PTRS_PER_PTE] __page_aligned_bss; 66f9040773SArd Biesheuvel static pmd_t bm_pmd[PTRS_PER_PMD] __page_aligned_bss __maybe_unused; 67f9040773SArd Biesheuvel static pud_t bm_pud[PTRS_PER_PUD] __page_aligned_bss __maybe_unused; 68f9040773SArd Biesheuvel 69c1cc1552SCatalin Marinas pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, 70c1cc1552SCatalin Marinas unsigned long size, pgprot_t vma_prot) 71c1cc1552SCatalin Marinas { 72c1cc1552SCatalin Marinas if (!pfn_valid(pfn)) 73c1cc1552SCatalin Marinas return pgprot_noncached(vma_prot); 74c1cc1552SCatalin Marinas else if (file->f_flags & O_SYNC) 75c1cc1552SCatalin Marinas return pgprot_writecombine(vma_prot); 76c1cc1552SCatalin Marinas return vma_prot; 77c1cc1552SCatalin Marinas } 78c1cc1552SCatalin Marinas EXPORT_SYMBOL(phys_mem_access_prot); 79c1cc1552SCatalin Marinas 80f4710445SMark Rutland static phys_addr_t __init early_pgtable_alloc(void) 81c1cc1552SCatalin Marinas { 827142392dSSuzuki K. Poulose phys_addr_t phys; 837142392dSSuzuki K. Poulose void *ptr; 847142392dSSuzuki K. Poulose 8521ab99c2SMark Rutland phys = memblock_alloc(PAGE_SIZE, PAGE_SIZE); 86f4710445SMark Rutland 87f4710445SMark Rutland /* 88f4710445SMark Rutland * The FIX_{PGD,PUD,PMD} slots may be in active use, but the FIX_PTE 89f4710445SMark Rutland * slot will be free, so we can (ab)use the FIX_PTE slot to initialise 90f4710445SMark Rutland * any level of table. 91f4710445SMark Rutland */ 92f4710445SMark Rutland ptr = pte_set_fixmap(phys); 93f4710445SMark Rutland 9421ab99c2SMark Rutland memset(ptr, 0, PAGE_SIZE); 9521ab99c2SMark Rutland 96f4710445SMark Rutland /* 97f4710445SMark Rutland * Implicit barriers also ensure the zeroed page is visible to the page 98f4710445SMark Rutland * table walker 99f4710445SMark Rutland */ 100f4710445SMark Rutland pte_clear_fixmap(); 101f4710445SMark Rutland 102f4710445SMark Rutland return phys; 103c1cc1552SCatalin Marinas } 104c1cc1552SCatalin Marinas 105e98216b5SArd Biesheuvel static bool pgattr_change_is_safe(u64 old, u64 new) 106e98216b5SArd Biesheuvel { 107e98216b5SArd Biesheuvel /* 108e98216b5SArd Biesheuvel * The following mapping attributes may be updated in live 109e98216b5SArd Biesheuvel * kernel mappings without the need for break-before-make. 110e98216b5SArd Biesheuvel */ 111e98216b5SArd Biesheuvel static const pteval_t mask = PTE_PXN | PTE_RDONLY | PTE_WRITE; 112e98216b5SArd Biesheuvel 113141d1497SArd Biesheuvel /* creating or taking down mappings is always safe */ 114141d1497SArd Biesheuvel if (old == 0 || new == 0) 115141d1497SArd Biesheuvel return true; 116141d1497SArd Biesheuvel 117141d1497SArd Biesheuvel /* live contiguous mappings may not be manipulated at all */ 118141d1497SArd Biesheuvel if ((old | new) & PTE_CONT) 119141d1497SArd Biesheuvel return false; 120141d1497SArd Biesheuvel 121*4e602056SWill Deacon /* Transitioning from Global to Non-Global is safe */ 122*4e602056SWill Deacon if (((old ^ new) == PTE_NG) && (new & PTE_NG)) 123*4e602056SWill Deacon return true; 124*4e602056SWill Deacon 125141d1497SArd Biesheuvel return ((old ^ new) & ~mask) == 0; 126e98216b5SArd Biesheuvel } 127e98216b5SArd Biesheuvel 128d27cfa1fSArd Biesheuvel static void init_pte(pmd_t *pmd, unsigned long addr, unsigned long end, 129d27cfa1fSArd Biesheuvel phys_addr_t phys, pgprot_t prot) 130c1cc1552SCatalin Marinas { 131c1cc1552SCatalin Marinas pte_t *pte; 132c1cc1552SCatalin Marinas 133f4710445SMark Rutland pte = pte_set_fixmap_offset(pmd, addr); 134c1cc1552SCatalin Marinas do { 135e98216b5SArd Biesheuvel pte_t old_pte = *pte; 136e98216b5SArd Biesheuvel 137e393cf40SArd Biesheuvel set_pte(pte, pfn_pte(__phys_to_pfn(phys), prot)); 138e98216b5SArd Biesheuvel 139e98216b5SArd Biesheuvel /* 140e98216b5SArd Biesheuvel * After the PTE entry has been populated once, we 141e98216b5SArd Biesheuvel * only allow updates to the permission attributes. 142e98216b5SArd Biesheuvel */ 143e98216b5SArd Biesheuvel BUG_ON(!pgattr_change_is_safe(pte_val(old_pte), pte_val(*pte))); 144e98216b5SArd Biesheuvel 145e393cf40SArd Biesheuvel phys += PAGE_SIZE; 146667c2759SCatalin Marinas } while (pte++, addr += PAGE_SIZE, addr != end); 147f4710445SMark Rutland 148f4710445SMark Rutland pte_clear_fixmap(); 149c1cc1552SCatalin Marinas } 150c1cc1552SCatalin Marinas 151d27cfa1fSArd Biesheuvel static void alloc_init_cont_pte(pmd_t *pmd, unsigned long addr, 152d27cfa1fSArd Biesheuvel unsigned long end, phys_addr_t phys, 153d27cfa1fSArd Biesheuvel pgprot_t prot, 15453e1b329SArd Biesheuvel phys_addr_t (*pgtable_alloc)(void), 155c0951366SArd Biesheuvel int flags) 156c1cc1552SCatalin Marinas { 157c1cc1552SCatalin Marinas unsigned long next; 158c1cc1552SCatalin Marinas 159d27cfa1fSArd Biesheuvel BUG_ON(pmd_sect(*pmd)); 160d27cfa1fSArd Biesheuvel if (pmd_none(*pmd)) { 161d27cfa1fSArd Biesheuvel phys_addr_t pte_phys; 162132233a7SLaura Abbott BUG_ON(!pgtable_alloc); 163d27cfa1fSArd Biesheuvel pte_phys = pgtable_alloc(); 164d27cfa1fSArd Biesheuvel __pmd_populate(pmd, pte_phys, PMD_TYPE_TABLE); 165c1cc1552SCatalin Marinas } 166d27cfa1fSArd Biesheuvel BUG_ON(pmd_bad(*pmd)); 167d27cfa1fSArd Biesheuvel 168d27cfa1fSArd Biesheuvel do { 169d27cfa1fSArd Biesheuvel pgprot_t __prot = prot; 170d27cfa1fSArd Biesheuvel 171d27cfa1fSArd Biesheuvel next = pte_cont_addr_end(addr, end); 172d27cfa1fSArd Biesheuvel 173d27cfa1fSArd Biesheuvel /* use a contiguous mapping if the range is suitably aligned */ 174d27cfa1fSArd Biesheuvel if ((((addr | next | phys) & ~CONT_PTE_MASK) == 0) && 175d27cfa1fSArd Biesheuvel (flags & NO_CONT_MAPPINGS) == 0) 176d27cfa1fSArd Biesheuvel __prot = __pgprot(pgprot_val(prot) | PTE_CONT); 177d27cfa1fSArd Biesheuvel 178d27cfa1fSArd Biesheuvel init_pte(pmd, addr, next, phys, __prot); 179d27cfa1fSArd Biesheuvel 180d27cfa1fSArd Biesheuvel phys += next - addr; 181d27cfa1fSArd Biesheuvel } while (addr = next, addr != end); 182d27cfa1fSArd Biesheuvel } 183d27cfa1fSArd Biesheuvel 184d27cfa1fSArd Biesheuvel static void init_pmd(pud_t *pud, unsigned long addr, unsigned long end, 185d27cfa1fSArd Biesheuvel phys_addr_t phys, pgprot_t prot, 186d27cfa1fSArd Biesheuvel phys_addr_t (*pgtable_alloc)(void), int flags) 187d27cfa1fSArd Biesheuvel { 188d27cfa1fSArd Biesheuvel unsigned long next; 189d27cfa1fSArd Biesheuvel pmd_t *pmd; 190c1cc1552SCatalin Marinas 191f4710445SMark Rutland pmd = pmd_set_fixmap_offset(pud, addr); 192c1cc1552SCatalin Marinas do { 193e98216b5SArd Biesheuvel pmd_t old_pmd = *pmd; 194e98216b5SArd Biesheuvel 195c1cc1552SCatalin Marinas next = pmd_addr_end(addr, end); 196e98216b5SArd Biesheuvel 197c1cc1552SCatalin Marinas /* try section mapping first */ 19883863f25SLaura Abbott if (((addr | next | phys) & ~SECTION_MASK) == 0 && 199c0951366SArd Biesheuvel (flags & NO_BLOCK_MAPPINGS) == 0) { 200d81bbe6dSMark Rutland pmd_set_huge(pmd, phys, prot); 201e98216b5SArd Biesheuvel 202a55f9929SCatalin Marinas /* 203e98216b5SArd Biesheuvel * After the PMD entry has been populated once, we 204e98216b5SArd Biesheuvel * only allow updates to the permission attributes. 205a55f9929SCatalin Marinas */ 206e98216b5SArd Biesheuvel BUG_ON(!pgattr_change_is_safe(pmd_val(old_pmd), 207e98216b5SArd Biesheuvel pmd_val(*pmd))); 208a55f9929SCatalin Marinas } else { 209d27cfa1fSArd Biesheuvel alloc_init_cont_pte(pmd, addr, next, phys, prot, 210d27cfa1fSArd Biesheuvel pgtable_alloc, flags); 211e98216b5SArd Biesheuvel 212e98216b5SArd Biesheuvel BUG_ON(pmd_val(old_pmd) != 0 && 213e98216b5SArd Biesheuvel pmd_val(old_pmd) != pmd_val(*pmd)); 214a55f9929SCatalin Marinas } 215c1cc1552SCatalin Marinas phys += next - addr; 216c1cc1552SCatalin Marinas } while (pmd++, addr = next, addr != end); 217f4710445SMark Rutland 218f4710445SMark Rutland pmd_clear_fixmap(); 219c1cc1552SCatalin Marinas } 220c1cc1552SCatalin Marinas 221d27cfa1fSArd Biesheuvel static void alloc_init_cont_pmd(pud_t *pud, unsigned long addr, 222d27cfa1fSArd Biesheuvel unsigned long end, phys_addr_t phys, 223d27cfa1fSArd Biesheuvel pgprot_t prot, 224d27cfa1fSArd Biesheuvel phys_addr_t (*pgtable_alloc)(void), int flags) 225d27cfa1fSArd Biesheuvel { 226d27cfa1fSArd Biesheuvel unsigned long next; 227d27cfa1fSArd Biesheuvel 228d27cfa1fSArd Biesheuvel /* 229d27cfa1fSArd Biesheuvel * Check for initial section mappings in the pgd/pud. 230d27cfa1fSArd Biesheuvel */ 231d27cfa1fSArd Biesheuvel BUG_ON(pud_sect(*pud)); 232d27cfa1fSArd Biesheuvel if (pud_none(*pud)) { 233d27cfa1fSArd Biesheuvel phys_addr_t pmd_phys; 234d27cfa1fSArd Biesheuvel BUG_ON(!pgtable_alloc); 235d27cfa1fSArd Biesheuvel pmd_phys = pgtable_alloc(); 236d27cfa1fSArd Biesheuvel __pud_populate(pud, pmd_phys, PUD_TYPE_TABLE); 237d27cfa1fSArd Biesheuvel } 238d27cfa1fSArd Biesheuvel BUG_ON(pud_bad(*pud)); 239d27cfa1fSArd Biesheuvel 240d27cfa1fSArd Biesheuvel do { 241d27cfa1fSArd Biesheuvel pgprot_t __prot = prot; 242d27cfa1fSArd Biesheuvel 243d27cfa1fSArd Biesheuvel next = pmd_cont_addr_end(addr, end); 244d27cfa1fSArd Biesheuvel 245d27cfa1fSArd Biesheuvel /* use a contiguous mapping if the range is suitably aligned */ 246d27cfa1fSArd Biesheuvel if ((((addr | next | phys) & ~CONT_PMD_MASK) == 0) && 247d27cfa1fSArd Biesheuvel (flags & NO_CONT_MAPPINGS) == 0) 248d27cfa1fSArd Biesheuvel __prot = __pgprot(pgprot_val(prot) | PTE_CONT); 249d27cfa1fSArd Biesheuvel 250d27cfa1fSArd Biesheuvel init_pmd(pud, addr, next, phys, __prot, pgtable_alloc, flags); 251d27cfa1fSArd Biesheuvel 252d27cfa1fSArd Biesheuvel phys += next - addr; 253d27cfa1fSArd Biesheuvel } while (addr = next, addr != end); 254d27cfa1fSArd Biesheuvel } 255d27cfa1fSArd Biesheuvel 256da141706SLaura Abbott static inline bool use_1G_block(unsigned long addr, unsigned long next, 257da141706SLaura Abbott unsigned long phys) 258da141706SLaura Abbott { 259da141706SLaura Abbott if (PAGE_SHIFT != 12) 260da141706SLaura Abbott return false; 261da141706SLaura Abbott 262da141706SLaura Abbott if (((addr | next | phys) & ~PUD_MASK) != 0) 263da141706SLaura Abbott return false; 264da141706SLaura Abbott 265da141706SLaura Abbott return true; 266da141706SLaura Abbott } 267da141706SLaura Abbott 26811509a30SMark Rutland static void alloc_init_pud(pgd_t *pgd, unsigned long addr, unsigned long end, 269da141706SLaura Abbott phys_addr_t phys, pgprot_t prot, 27053e1b329SArd Biesheuvel phys_addr_t (*pgtable_alloc)(void), 271c0951366SArd Biesheuvel int flags) 272c1cc1552SCatalin Marinas { 273c79b954bSJungseok Lee pud_t *pud; 274c1cc1552SCatalin Marinas unsigned long next; 275c1cc1552SCatalin Marinas 276c79b954bSJungseok Lee if (pgd_none(*pgd)) { 277132233a7SLaura Abbott phys_addr_t pud_phys; 278132233a7SLaura Abbott BUG_ON(!pgtable_alloc); 279132233a7SLaura Abbott pud_phys = pgtable_alloc(); 280f4710445SMark Rutland __pgd_populate(pgd, pud_phys, PUD_TYPE_TABLE); 281c79b954bSJungseok Lee } 282c79b954bSJungseok Lee BUG_ON(pgd_bad(*pgd)); 283c79b954bSJungseok Lee 284f4710445SMark Rutland pud = pud_set_fixmap_offset(pgd, addr); 285c1cc1552SCatalin Marinas do { 286e98216b5SArd Biesheuvel pud_t old_pud = *pud; 287e98216b5SArd Biesheuvel 288c1cc1552SCatalin Marinas next = pud_addr_end(addr, end); 289206a2a73SSteve Capper 290206a2a73SSteve Capper /* 291206a2a73SSteve Capper * For 4K granule only, attempt to put down a 1GB block 292206a2a73SSteve Capper */ 293c0951366SArd Biesheuvel if (use_1G_block(addr, next, phys) && 294c0951366SArd Biesheuvel (flags & NO_BLOCK_MAPPINGS) == 0) { 295c661cb1cSMark Rutland pud_set_huge(pud, phys, prot); 296206a2a73SSteve Capper 297206a2a73SSteve Capper /* 298e98216b5SArd Biesheuvel * After the PUD entry has been populated once, we 299e98216b5SArd Biesheuvel * only allow updates to the permission attributes. 300206a2a73SSteve Capper */ 301e98216b5SArd Biesheuvel BUG_ON(!pgattr_change_is_safe(pud_val(old_pud), 302e98216b5SArd Biesheuvel pud_val(*pud))); 303206a2a73SSteve Capper } else { 304d27cfa1fSArd Biesheuvel alloc_init_cont_pmd(pud, addr, next, phys, prot, 305c0951366SArd Biesheuvel pgtable_alloc, flags); 306e98216b5SArd Biesheuvel 307e98216b5SArd Biesheuvel BUG_ON(pud_val(old_pud) != 0 && 308e98216b5SArd Biesheuvel pud_val(old_pud) != pud_val(*pud)); 309206a2a73SSteve Capper } 310c1cc1552SCatalin Marinas phys += next - addr; 311c1cc1552SCatalin Marinas } while (pud++, addr = next, addr != end); 312f4710445SMark Rutland 313f4710445SMark Rutland pud_clear_fixmap(); 314c1cc1552SCatalin Marinas } 315c1cc1552SCatalin Marinas 31640f87d31SArd Biesheuvel static void __create_pgd_mapping(pgd_t *pgdir, phys_addr_t phys, 31740f87d31SArd Biesheuvel unsigned long virt, phys_addr_t size, 31840f87d31SArd Biesheuvel pgprot_t prot, 31953e1b329SArd Biesheuvel phys_addr_t (*pgtable_alloc)(void), 320c0951366SArd Biesheuvel int flags) 321c1cc1552SCatalin Marinas { 322c1cc1552SCatalin Marinas unsigned long addr, length, end, next; 32340f87d31SArd Biesheuvel pgd_t *pgd = pgd_offset_raw(pgdir, virt); 324c1cc1552SCatalin Marinas 325cc5d2b3bSMark Rutland /* 326cc5d2b3bSMark Rutland * If the virtual and physical address don't have the same offset 327cc5d2b3bSMark Rutland * within a page, we cannot map the region as the caller expects. 328cc5d2b3bSMark Rutland */ 329cc5d2b3bSMark Rutland if (WARN_ON((phys ^ virt) & ~PAGE_MASK)) 330cc5d2b3bSMark Rutland return; 331cc5d2b3bSMark Rutland 3329c4e08a3SMark Rutland phys &= PAGE_MASK; 333c1cc1552SCatalin Marinas addr = virt & PAGE_MASK; 334c1cc1552SCatalin Marinas length = PAGE_ALIGN(size + (virt & ~PAGE_MASK)); 335c1cc1552SCatalin Marinas 336c1cc1552SCatalin Marinas end = addr + length; 337c1cc1552SCatalin Marinas do { 338c1cc1552SCatalin Marinas next = pgd_addr_end(addr, end); 33953e1b329SArd Biesheuvel alloc_init_pud(pgd, addr, next, phys, prot, pgtable_alloc, 340c0951366SArd Biesheuvel flags); 341c1cc1552SCatalin Marinas phys += next - addr; 342c1cc1552SCatalin Marinas } while (pgd++, addr = next, addr != end); 343c1cc1552SCatalin Marinas } 344c1cc1552SCatalin Marinas 3451378dc3dSArd Biesheuvel static phys_addr_t pgd_pgtable_alloc(void) 346da141706SLaura Abbott { 34721ab99c2SMark Rutland void *ptr = (void *)__get_free_page(PGALLOC_GFP); 3481378dc3dSArd Biesheuvel if (!ptr || !pgtable_page_ctor(virt_to_page(ptr))) 3491378dc3dSArd Biesheuvel BUG(); 35021ab99c2SMark Rutland 35121ab99c2SMark Rutland /* Ensure the zeroed page is visible to the page table walker */ 35221ab99c2SMark Rutland dsb(ishst); 353f4710445SMark Rutland return __pa(ptr); 354da141706SLaura Abbott } 355da141706SLaura Abbott 356132233a7SLaura Abbott /* 357132233a7SLaura Abbott * This function can only be used to modify existing table entries, 358132233a7SLaura Abbott * without allocating new levels of table. Note that this permits the 359132233a7SLaura Abbott * creation of new section or page entries. 360132233a7SLaura Abbott */ 361132233a7SLaura Abbott static void __init create_mapping_noalloc(phys_addr_t phys, unsigned long virt, 362da141706SLaura Abbott phys_addr_t size, pgprot_t prot) 363d7ecbddfSMark Salter { 364d7ecbddfSMark Salter if (virt < VMALLOC_START) { 365d7ecbddfSMark Salter pr_warn("BUG: not creating mapping for %pa at 0x%016lx - outside kernel range\n", 366d7ecbddfSMark Salter &phys, virt); 367d7ecbddfSMark Salter return; 368d7ecbddfSMark Salter } 369d27cfa1fSArd Biesheuvel __create_pgd_mapping(init_mm.pgd, phys, virt, size, prot, NULL, 370d27cfa1fSArd Biesheuvel NO_CONT_MAPPINGS); 371d7ecbddfSMark Salter } 372d7ecbddfSMark Salter 3738ce837ceSArd Biesheuvel void __init create_pgd_mapping(struct mm_struct *mm, phys_addr_t phys, 3748ce837ceSArd Biesheuvel unsigned long virt, phys_addr_t size, 375f14c66ceSArd Biesheuvel pgprot_t prot, bool page_mappings_only) 3768ce837ceSArd Biesheuvel { 377c0951366SArd Biesheuvel int flags = 0; 378c0951366SArd Biesheuvel 3791378dc3dSArd Biesheuvel BUG_ON(mm == &init_mm); 3801378dc3dSArd Biesheuvel 381c0951366SArd Biesheuvel if (page_mappings_only) 382d27cfa1fSArd Biesheuvel flags = NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS; 383c0951366SArd Biesheuvel 38411509a30SMark Rutland __create_pgd_mapping(mm->pgd, phys, virt, size, prot, 385c0951366SArd Biesheuvel pgd_pgtable_alloc, flags); 386d7ecbddfSMark Salter } 387d7ecbddfSMark Salter 388aa8c09beSArd Biesheuvel static void update_mapping_prot(phys_addr_t phys, unsigned long virt, 389da141706SLaura Abbott phys_addr_t size, pgprot_t prot) 390da141706SLaura Abbott { 391da141706SLaura Abbott if (virt < VMALLOC_START) { 392aa8c09beSArd Biesheuvel pr_warn("BUG: not updating mapping for %pa at 0x%016lx - outside kernel range\n", 393da141706SLaura Abbott &phys, virt); 394da141706SLaura Abbott return; 395da141706SLaura Abbott } 396da141706SLaura Abbott 397d27cfa1fSArd Biesheuvel __create_pgd_mapping(init_mm.pgd, phys, virt, size, prot, NULL, 398d27cfa1fSArd Biesheuvel NO_CONT_MAPPINGS); 399aa8c09beSArd Biesheuvel 400aa8c09beSArd Biesheuvel /* flush the TLBs after updating live kernel mappings */ 401aa8c09beSArd Biesheuvel flush_tlb_kernel_range(virt, virt + size); 402da141706SLaura Abbott } 403da141706SLaura Abbott 40498d2e153STakahiro Akashi static void __init __map_memblock(pgd_t *pgd, phys_addr_t start, 40598d2e153STakahiro Akashi phys_addr_t end, pgprot_t prot, int flags) 406da141706SLaura Abbott { 40798d2e153STakahiro Akashi __create_pgd_mapping(pgd, start, __phys_to_virt(start), end - start, 40898d2e153STakahiro Akashi prot, early_pgtable_alloc, flags); 409da141706SLaura Abbott } 410da141706SLaura Abbott 4115ea5306cSArd Biesheuvel void __init mark_linear_text_alias_ro(void) 4125ea5306cSArd Biesheuvel { 4135ea5306cSArd Biesheuvel /* 4145ea5306cSArd Biesheuvel * Remove the write permissions from the linear alias of .text/.rodata 4155ea5306cSArd Biesheuvel */ 4165ea5306cSArd Biesheuvel update_mapping_prot(__pa_symbol(_text), (unsigned long)lm_alias(_text), 4175ea5306cSArd Biesheuvel (unsigned long)__init_begin - (unsigned long)_text, 4185ea5306cSArd Biesheuvel PAGE_KERNEL_RO); 4195ea5306cSArd Biesheuvel } 4205ea5306cSArd Biesheuvel 421068a17a5SMark Rutland static void __init map_mem(pgd_t *pgd) 422c1cc1552SCatalin Marinas { 42398d2e153STakahiro Akashi phys_addr_t kernel_start = __pa_symbol(_text); 42498d2e153STakahiro Akashi phys_addr_t kernel_end = __pa_symbol(__init_begin); 425c1cc1552SCatalin Marinas struct memblock_region *reg; 42698d2e153STakahiro Akashi int flags = 0; 42798d2e153STakahiro Akashi 42898d2e153STakahiro Akashi if (debug_pagealloc_enabled()) 42998d2e153STakahiro Akashi flags = NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS; 43098d2e153STakahiro Akashi 43198d2e153STakahiro Akashi /* 43298d2e153STakahiro Akashi * Take care not to create a writable alias for the 43398d2e153STakahiro Akashi * read-only text and rodata sections of the kernel image. 43498d2e153STakahiro Akashi * So temporarily mark them as NOMAP to skip mappings in 43598d2e153STakahiro Akashi * the following for-loop 43698d2e153STakahiro Akashi */ 43798d2e153STakahiro Akashi memblock_mark_nomap(kernel_start, kernel_end - kernel_start); 43898d2e153STakahiro Akashi #ifdef CONFIG_KEXEC_CORE 43998d2e153STakahiro Akashi if (crashk_res.end) 44098d2e153STakahiro Akashi memblock_mark_nomap(crashk_res.start, 44198d2e153STakahiro Akashi resource_size(&crashk_res)); 44298d2e153STakahiro Akashi #endif 443f6bc87c3SSteve Capper 444c1cc1552SCatalin Marinas /* map all the memory banks */ 445c1cc1552SCatalin Marinas for_each_memblock(memory, reg) { 446c1cc1552SCatalin Marinas phys_addr_t start = reg->base; 447c1cc1552SCatalin Marinas phys_addr_t end = start + reg->size; 448c1cc1552SCatalin Marinas 449c1cc1552SCatalin Marinas if (start >= end) 450c1cc1552SCatalin Marinas break; 45168709f45SArd Biesheuvel if (memblock_is_nomap(reg)) 45268709f45SArd Biesheuvel continue; 453c1cc1552SCatalin Marinas 45498d2e153STakahiro Akashi __map_memblock(pgd, start, end, PAGE_KERNEL, flags); 455c1cc1552SCatalin Marinas } 45698d2e153STakahiro Akashi 45798d2e153STakahiro Akashi /* 45898d2e153STakahiro Akashi * Map the linear alias of the [_text, __init_begin) interval 45998d2e153STakahiro Akashi * as non-executable now, and remove the write permission in 46098d2e153STakahiro Akashi * mark_linear_text_alias_ro() below (which will be called after 46198d2e153STakahiro Akashi * alternative patching has completed). This makes the contents 46298d2e153STakahiro Akashi * of the region accessible to subsystems such as hibernate, 46398d2e153STakahiro Akashi * but protects it from inadvertent modification or execution. 46498d2e153STakahiro Akashi * Note that contiguous mappings cannot be remapped in this way, 46598d2e153STakahiro Akashi * so we should avoid them here. 46698d2e153STakahiro Akashi */ 46798d2e153STakahiro Akashi __map_memblock(pgd, kernel_start, kernel_end, 46898d2e153STakahiro Akashi PAGE_KERNEL, NO_CONT_MAPPINGS); 46998d2e153STakahiro Akashi memblock_clear_nomap(kernel_start, kernel_end - kernel_start); 47098d2e153STakahiro Akashi 47198d2e153STakahiro Akashi #ifdef CONFIG_KEXEC_CORE 47298d2e153STakahiro Akashi /* 47398d2e153STakahiro Akashi * Use page-level mappings here so that we can shrink the region 47498d2e153STakahiro Akashi * in page granularity and put back unused memory to buddy system 47598d2e153STakahiro Akashi * through /sys/kernel/kexec_crash_size interface. 47698d2e153STakahiro Akashi */ 47798d2e153STakahiro Akashi if (crashk_res.end) { 47898d2e153STakahiro Akashi __map_memblock(pgd, crashk_res.start, crashk_res.end + 1, 47998d2e153STakahiro Akashi PAGE_KERNEL, 48098d2e153STakahiro Akashi NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS); 48198d2e153STakahiro Akashi memblock_clear_nomap(crashk_res.start, 48298d2e153STakahiro Akashi resource_size(&crashk_res)); 48398d2e153STakahiro Akashi } 48498d2e153STakahiro Akashi #endif 485c1cc1552SCatalin Marinas } 486c1cc1552SCatalin Marinas 487da141706SLaura Abbott void mark_rodata_ro(void) 488da141706SLaura Abbott { 4892f39b5f9SJeremy Linton unsigned long section_size; 490f9040773SArd Biesheuvel 4912f39b5f9SJeremy Linton /* 4929fdc14c5SArd Biesheuvel * mark .rodata as read only. Use __init_begin rather than __end_rodata 4939fdc14c5SArd Biesheuvel * to cover NOTES and EXCEPTION_TABLE. 4942f39b5f9SJeremy Linton */ 4959fdc14c5SArd Biesheuvel section_size = (unsigned long)__init_begin - (unsigned long)__start_rodata; 496aa8c09beSArd Biesheuvel update_mapping_prot(__pa_symbol(__start_rodata), (unsigned long)__start_rodata, 4972f39b5f9SJeremy Linton section_size, PAGE_KERNEL_RO); 498e98216b5SArd Biesheuvel 4991404d6f1SLaura Abbott debug_checkwx(); 500da141706SLaura Abbott } 501da141706SLaura Abbott 5022c09ec06SArd Biesheuvel static void __init map_kernel_segment(pgd_t *pgd, void *va_start, void *va_end, 503d27cfa1fSArd Biesheuvel pgprot_t prot, struct vm_struct *vma, 50492bbd16eSWill Deacon int flags, unsigned long vm_flags) 505068a17a5SMark Rutland { 5062077be67SLaura Abbott phys_addr_t pa_start = __pa_symbol(va_start); 507068a17a5SMark Rutland unsigned long size = va_end - va_start; 508068a17a5SMark Rutland 509068a17a5SMark Rutland BUG_ON(!PAGE_ALIGNED(pa_start)); 510068a17a5SMark Rutland BUG_ON(!PAGE_ALIGNED(size)); 511068a17a5SMark Rutland 512068a17a5SMark Rutland __create_pgd_mapping(pgd, pa_start, (unsigned long)va_start, size, prot, 513d27cfa1fSArd Biesheuvel early_pgtable_alloc, flags); 514f9040773SArd Biesheuvel 51592bbd16eSWill Deacon if (!(vm_flags & VM_NO_GUARD)) 51692bbd16eSWill Deacon size += PAGE_SIZE; 51792bbd16eSWill Deacon 518f9040773SArd Biesheuvel vma->addr = va_start; 519f9040773SArd Biesheuvel vma->phys_addr = pa_start; 520f9040773SArd Biesheuvel vma->size = size; 52192bbd16eSWill Deacon vma->flags = VM_MAP | vm_flags; 522f9040773SArd Biesheuvel vma->caller = __builtin_return_address(0); 523f9040773SArd Biesheuvel 524f9040773SArd Biesheuvel vm_area_add_early(vma); 525068a17a5SMark Rutland } 526068a17a5SMark Rutland 52728b066daSArd Biesheuvel static int __init parse_rodata(char *arg) 52828b066daSArd Biesheuvel { 52928b066daSArd Biesheuvel return strtobool(arg, &rodata_enabled); 53028b066daSArd Biesheuvel } 53128b066daSArd Biesheuvel early_param("rodata", parse_rodata); 53228b066daSArd Biesheuvel 53351a0048bSWill Deacon #ifdef CONFIG_UNMAP_KERNEL_AT_EL0 53451a0048bSWill Deacon static int __init map_entry_trampoline(void) 53551a0048bSWill Deacon { 53651a0048bSWill Deacon pgprot_t prot = rodata_enabled ? PAGE_KERNEL_ROX : PAGE_KERNEL_EXEC; 53751a0048bSWill Deacon phys_addr_t pa_start = __pa_symbol(__entry_tramp_text_start); 53851a0048bSWill Deacon 53951a0048bSWill Deacon /* The trampoline is always mapped and can therefore be global */ 54051a0048bSWill Deacon pgprot_val(prot) &= ~PTE_NG; 54151a0048bSWill Deacon 54251a0048bSWill Deacon /* Map only the text into the trampoline page table */ 54351a0048bSWill Deacon memset(tramp_pg_dir, 0, PGD_SIZE); 54451a0048bSWill Deacon __create_pgd_mapping(tramp_pg_dir, pa_start, TRAMP_VALIAS, PAGE_SIZE, 54551a0048bSWill Deacon prot, pgd_pgtable_alloc, 0); 54651a0048bSWill Deacon 5476c27c408SWill Deacon /* Map both the text and data into the kernel page table */ 54851a0048bSWill Deacon __set_fixmap(FIX_ENTRY_TRAMP_TEXT, pa_start, prot); 5496c27c408SWill Deacon if (IS_ENABLED(CONFIG_RANDOMIZE_BASE)) { 5506c27c408SWill Deacon extern char __entry_tramp_data_start[]; 5516c27c408SWill Deacon 5526c27c408SWill Deacon __set_fixmap(FIX_ENTRY_TRAMP_DATA, 5536c27c408SWill Deacon __pa_symbol(__entry_tramp_data_start), 5546c27c408SWill Deacon PAGE_KERNEL_RO); 5556c27c408SWill Deacon } 5566c27c408SWill Deacon 55751a0048bSWill Deacon return 0; 55851a0048bSWill Deacon } 55951a0048bSWill Deacon core_initcall(map_entry_trampoline); 56051a0048bSWill Deacon #endif 56151a0048bSWill Deacon 562068a17a5SMark Rutland /* 563068a17a5SMark Rutland * Create fine-grained mappings for the kernel. 564068a17a5SMark Rutland */ 565068a17a5SMark Rutland static void __init map_kernel(pgd_t *pgd) 566068a17a5SMark Rutland { 5672ebe088bSArd Biesheuvel static struct vm_struct vmlinux_text, vmlinux_rodata, vmlinux_inittext, 5682ebe088bSArd Biesheuvel vmlinux_initdata, vmlinux_data; 569068a17a5SMark Rutland 57028b066daSArd Biesheuvel /* 57128b066daSArd Biesheuvel * External debuggers may need to write directly to the text 57228b066daSArd Biesheuvel * mapping to install SW breakpoints. Allow this (only) when 57328b066daSArd Biesheuvel * explicitly requested with rodata=off. 57428b066daSArd Biesheuvel */ 57528b066daSArd Biesheuvel pgprot_t text_prot = rodata_enabled ? PAGE_KERNEL_ROX : PAGE_KERNEL_EXEC; 57628b066daSArd Biesheuvel 577d27cfa1fSArd Biesheuvel /* 578d27cfa1fSArd Biesheuvel * Only rodata will be remapped with different permissions later on, 579d27cfa1fSArd Biesheuvel * all other segments are allowed to use contiguous mappings. 580d27cfa1fSArd Biesheuvel */ 58192bbd16eSWill Deacon map_kernel_segment(pgd, _text, _etext, text_prot, &vmlinux_text, 0, 58292bbd16eSWill Deacon VM_NO_GUARD); 5832ebe088bSArd Biesheuvel map_kernel_segment(pgd, __start_rodata, __inittext_begin, PAGE_KERNEL, 58492bbd16eSWill Deacon &vmlinux_rodata, NO_CONT_MAPPINGS, VM_NO_GUARD); 5852ebe088bSArd Biesheuvel map_kernel_segment(pgd, __inittext_begin, __inittext_end, text_prot, 58692bbd16eSWill Deacon &vmlinux_inittext, 0, VM_NO_GUARD); 5872ebe088bSArd Biesheuvel map_kernel_segment(pgd, __initdata_begin, __initdata_end, PAGE_KERNEL, 58892bbd16eSWill Deacon &vmlinux_initdata, 0, VM_NO_GUARD); 58992bbd16eSWill Deacon map_kernel_segment(pgd, _data, _end, PAGE_KERNEL, &vmlinux_data, 0, 0); 590068a17a5SMark Rutland 591f9040773SArd Biesheuvel if (!pgd_val(*pgd_offset_raw(pgd, FIXADDR_START))) { 592068a17a5SMark Rutland /* 593f9040773SArd Biesheuvel * The fixmap falls in a separate pgd to the kernel, and doesn't 594f9040773SArd Biesheuvel * live in the carveout for the swapper_pg_dir. We can simply 595f9040773SArd Biesheuvel * re-use the existing dir for the fixmap. 596068a17a5SMark Rutland */ 597f9040773SArd Biesheuvel set_pgd(pgd_offset_raw(pgd, FIXADDR_START), 598f9040773SArd Biesheuvel *pgd_offset_k(FIXADDR_START)); 599f9040773SArd Biesheuvel } else if (CONFIG_PGTABLE_LEVELS > 3) { 600f9040773SArd Biesheuvel /* 601f9040773SArd Biesheuvel * The fixmap shares its top level pgd entry with the kernel 602f9040773SArd Biesheuvel * mapping. This can really only occur when we are running 603f9040773SArd Biesheuvel * with 16k/4 levels, so we can simply reuse the pud level 604f9040773SArd Biesheuvel * entry instead. 605f9040773SArd Biesheuvel */ 606f9040773SArd Biesheuvel BUG_ON(!IS_ENABLED(CONFIG_ARM64_16K_PAGES)); 60719338304SKristina Martsenko pud_populate(&init_mm, pud_set_fixmap_offset(pgd, FIXADDR_START), 60819338304SKristina Martsenko lm_alias(bm_pmd)); 609f9040773SArd Biesheuvel pud_clear_fixmap(); 610f9040773SArd Biesheuvel } else { 611f9040773SArd Biesheuvel BUG(); 612f9040773SArd Biesheuvel } 613068a17a5SMark Rutland 614068a17a5SMark Rutland kasan_copy_shadow(pgd); 615068a17a5SMark Rutland } 616068a17a5SMark Rutland 617c1cc1552SCatalin Marinas /* 618c1cc1552SCatalin Marinas * paging_init() sets up the page tables, initialises the zone memory 619c1cc1552SCatalin Marinas * maps and sets up the zero page. 620c1cc1552SCatalin Marinas */ 621c1cc1552SCatalin Marinas void __init paging_init(void) 622c1cc1552SCatalin Marinas { 623068a17a5SMark Rutland phys_addr_t pgd_phys = early_pgtable_alloc(); 624068a17a5SMark Rutland pgd_t *pgd = pgd_set_fixmap(pgd_phys); 625068a17a5SMark Rutland 626068a17a5SMark Rutland map_kernel(pgd); 627068a17a5SMark Rutland map_mem(pgd); 628068a17a5SMark Rutland 629068a17a5SMark Rutland /* 630068a17a5SMark Rutland * We want to reuse the original swapper_pg_dir so we don't have to 631068a17a5SMark Rutland * communicate the new address to non-coherent secondaries in 632068a17a5SMark Rutland * secondary_entry, and so cpu_switch_mm can generate the address with 633068a17a5SMark Rutland * adrp+add rather than a load from some global variable. 634068a17a5SMark Rutland * 635068a17a5SMark Rutland * To do this we need to go via a temporary pgd. 636068a17a5SMark Rutland */ 637068a17a5SMark Rutland cpu_replace_ttbr1(__va(pgd_phys)); 63812f043ffSArnd Bergmann memcpy(swapper_pg_dir, pgd, PGD_SIZE); 6392077be67SLaura Abbott cpu_replace_ttbr1(lm_alias(swapper_pg_dir)); 640068a17a5SMark Rutland 641068a17a5SMark Rutland pgd_clear_fixmap(); 642068a17a5SMark Rutland memblock_free(pgd_phys, PAGE_SIZE); 643068a17a5SMark Rutland 644068a17a5SMark Rutland /* 645068a17a5SMark Rutland * We only reuse the PGD from the swapper_pg_dir, not the pud + pmd 646068a17a5SMark Rutland * allocated with it. 647068a17a5SMark Rutland */ 6482077be67SLaura Abbott memblock_free(__pa_symbol(swapper_pg_dir) + PAGE_SIZE, 6490370b31eSSteve Capper __pa_symbol(swapper_pg_end) - __pa_symbol(swapper_pg_dir) 6500370b31eSSteve Capper - PAGE_SIZE); 651c1cc1552SCatalin Marinas } 652c1cc1552SCatalin Marinas 653c1cc1552SCatalin Marinas /* 654c1cc1552SCatalin Marinas * Check whether a kernel address is valid (derived from arch/x86/). 655c1cc1552SCatalin Marinas */ 656c1cc1552SCatalin Marinas int kern_addr_valid(unsigned long addr) 657c1cc1552SCatalin Marinas { 658c1cc1552SCatalin Marinas pgd_t *pgd; 659c1cc1552SCatalin Marinas pud_t *pud; 660c1cc1552SCatalin Marinas pmd_t *pmd; 661c1cc1552SCatalin Marinas pte_t *pte; 662c1cc1552SCatalin Marinas 663c1cc1552SCatalin Marinas if ((((long)addr) >> VA_BITS) != -1UL) 664c1cc1552SCatalin Marinas return 0; 665c1cc1552SCatalin Marinas 666c1cc1552SCatalin Marinas pgd = pgd_offset_k(addr); 667c1cc1552SCatalin Marinas if (pgd_none(*pgd)) 668c1cc1552SCatalin Marinas return 0; 669c1cc1552SCatalin Marinas 670c1cc1552SCatalin Marinas pud = pud_offset(pgd, addr); 671c1cc1552SCatalin Marinas if (pud_none(*pud)) 672c1cc1552SCatalin Marinas return 0; 673c1cc1552SCatalin Marinas 674206a2a73SSteve Capper if (pud_sect(*pud)) 675206a2a73SSteve Capper return pfn_valid(pud_pfn(*pud)); 676206a2a73SSteve Capper 677c1cc1552SCatalin Marinas pmd = pmd_offset(pud, addr); 678c1cc1552SCatalin Marinas if (pmd_none(*pmd)) 679c1cc1552SCatalin Marinas return 0; 680c1cc1552SCatalin Marinas 681da6e4cb6SDave Anderson if (pmd_sect(*pmd)) 682da6e4cb6SDave Anderson return pfn_valid(pmd_pfn(*pmd)); 683da6e4cb6SDave Anderson 684c1cc1552SCatalin Marinas pte = pte_offset_kernel(pmd, addr); 685c1cc1552SCatalin Marinas if (pte_none(*pte)) 686c1cc1552SCatalin Marinas return 0; 687c1cc1552SCatalin Marinas 688c1cc1552SCatalin Marinas return pfn_valid(pte_pfn(*pte)); 689c1cc1552SCatalin Marinas } 690c1cc1552SCatalin Marinas #ifdef CONFIG_SPARSEMEM_VMEMMAP 691b433dce0SSuzuki K. Poulose #if !ARM64_SWAPPER_USES_SECTION_MAPS 6920aad818bSJohannes Weiner int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node) 693c1cc1552SCatalin Marinas { 6940aad818bSJohannes Weiner return vmemmap_populate_basepages(start, end, node); 695c1cc1552SCatalin Marinas } 696b433dce0SSuzuki K. Poulose #else /* !ARM64_SWAPPER_USES_SECTION_MAPS */ 6970aad818bSJohannes Weiner int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node) 698c1cc1552SCatalin Marinas { 6990aad818bSJohannes Weiner unsigned long addr = start; 700c1cc1552SCatalin Marinas unsigned long next; 701c1cc1552SCatalin Marinas pgd_t *pgd; 702c1cc1552SCatalin Marinas pud_t *pud; 703c1cc1552SCatalin Marinas pmd_t *pmd; 704c1cc1552SCatalin Marinas 705c1cc1552SCatalin Marinas do { 706c1cc1552SCatalin Marinas next = pmd_addr_end(addr, end); 707c1cc1552SCatalin Marinas 708c1cc1552SCatalin Marinas pgd = vmemmap_pgd_populate(addr, node); 709c1cc1552SCatalin Marinas if (!pgd) 710c1cc1552SCatalin Marinas return -ENOMEM; 711c1cc1552SCatalin Marinas 712c1cc1552SCatalin Marinas pud = vmemmap_pud_populate(pgd, addr, node); 713c1cc1552SCatalin Marinas if (!pud) 714c1cc1552SCatalin Marinas return -ENOMEM; 715c1cc1552SCatalin Marinas 716c1cc1552SCatalin Marinas pmd = pmd_offset(pud, addr); 717c1cc1552SCatalin Marinas if (pmd_none(*pmd)) { 718c1cc1552SCatalin Marinas void *p = NULL; 719c1cc1552SCatalin Marinas 720c1cc1552SCatalin Marinas p = vmemmap_alloc_block_buf(PMD_SIZE, node); 721c1cc1552SCatalin Marinas if (!p) 722c1cc1552SCatalin Marinas return -ENOMEM; 723c1cc1552SCatalin Marinas 72419338304SKristina Martsenko pmd_set_huge(pmd, __pa(p), __pgprot(PROT_SECT_NORMAL)); 725c1cc1552SCatalin Marinas } else 726c1cc1552SCatalin Marinas vmemmap_verify((pte_t *)pmd, node, addr, next); 727c1cc1552SCatalin Marinas } while (addr = next, addr != end); 728c1cc1552SCatalin Marinas 729c1cc1552SCatalin Marinas return 0; 730c1cc1552SCatalin Marinas } 731c1cc1552SCatalin Marinas #endif /* CONFIG_ARM64_64K_PAGES */ 7320aad818bSJohannes Weiner void vmemmap_free(unsigned long start, unsigned long end) 7330197518cSTang Chen { 7340197518cSTang Chen } 735c1cc1552SCatalin Marinas #endif /* CONFIG_SPARSEMEM_VMEMMAP */ 736af86e597SLaura Abbott 737af86e597SLaura Abbott static inline pud_t * fixmap_pud(unsigned long addr) 738af86e597SLaura Abbott { 739af86e597SLaura Abbott pgd_t *pgd = pgd_offset_k(addr); 740af86e597SLaura Abbott 741af86e597SLaura Abbott BUG_ON(pgd_none(*pgd) || pgd_bad(*pgd)); 742af86e597SLaura Abbott 743157962f5SArd Biesheuvel return pud_offset_kimg(pgd, addr); 744af86e597SLaura Abbott } 745af86e597SLaura Abbott 746af86e597SLaura Abbott static inline pmd_t * fixmap_pmd(unsigned long addr) 747af86e597SLaura Abbott { 748af86e597SLaura Abbott pud_t *pud = fixmap_pud(addr); 749af86e597SLaura Abbott 750af86e597SLaura Abbott BUG_ON(pud_none(*pud) || pud_bad(*pud)); 751af86e597SLaura Abbott 752157962f5SArd Biesheuvel return pmd_offset_kimg(pud, addr); 753af86e597SLaura Abbott } 754af86e597SLaura Abbott 755af86e597SLaura Abbott static inline pte_t * fixmap_pte(unsigned long addr) 756af86e597SLaura Abbott { 757157962f5SArd Biesheuvel return &bm_pte[pte_index(addr)]; 758af86e597SLaura Abbott } 759af86e597SLaura Abbott 7602077be67SLaura Abbott /* 7612077be67SLaura Abbott * The p*d_populate functions call virt_to_phys implicitly so they can't be used 7622077be67SLaura Abbott * directly on kernel symbols (bm_p*d). This function is called too early to use 7632077be67SLaura Abbott * lm_alias so __p*d_populate functions must be used to populate with the 7642077be67SLaura Abbott * physical address from __pa_symbol. 7652077be67SLaura Abbott */ 766af86e597SLaura Abbott void __init early_fixmap_init(void) 767af86e597SLaura Abbott { 768af86e597SLaura Abbott pgd_t *pgd; 769af86e597SLaura Abbott pud_t *pud; 770af86e597SLaura Abbott pmd_t *pmd; 771af86e597SLaura Abbott unsigned long addr = FIXADDR_START; 772af86e597SLaura Abbott 773af86e597SLaura Abbott pgd = pgd_offset_k(addr); 774f80fb3a3SArd Biesheuvel if (CONFIG_PGTABLE_LEVELS > 3 && 7752077be67SLaura Abbott !(pgd_none(*pgd) || pgd_page_paddr(*pgd) == __pa_symbol(bm_pud))) { 776f9040773SArd Biesheuvel /* 777f9040773SArd Biesheuvel * We only end up here if the kernel mapping and the fixmap 778f9040773SArd Biesheuvel * share the top level pgd entry, which should only happen on 779f9040773SArd Biesheuvel * 16k/4 levels configurations. 780f9040773SArd Biesheuvel */ 781f9040773SArd Biesheuvel BUG_ON(!IS_ENABLED(CONFIG_ARM64_16K_PAGES)); 782f9040773SArd Biesheuvel pud = pud_offset_kimg(pgd, addr); 783f9040773SArd Biesheuvel } else { 7842077be67SLaura Abbott if (pgd_none(*pgd)) 7852077be67SLaura Abbott __pgd_populate(pgd, __pa_symbol(bm_pud), PUD_TYPE_TABLE); 786157962f5SArd Biesheuvel pud = fixmap_pud(addr); 787f9040773SArd Biesheuvel } 7882077be67SLaura Abbott if (pud_none(*pud)) 7892077be67SLaura Abbott __pud_populate(pud, __pa_symbol(bm_pmd), PMD_TYPE_TABLE); 790157962f5SArd Biesheuvel pmd = fixmap_pmd(addr); 7912077be67SLaura Abbott __pmd_populate(pmd, __pa_symbol(bm_pte), PMD_TYPE_TABLE); 792af86e597SLaura Abbott 793af86e597SLaura Abbott /* 794af86e597SLaura Abbott * The boot-ioremap range spans multiple pmds, for which 795157962f5SArd Biesheuvel * we are not prepared: 796af86e597SLaura Abbott */ 797af86e597SLaura Abbott BUILD_BUG_ON((__fix_to_virt(FIX_BTMAP_BEGIN) >> PMD_SHIFT) 798af86e597SLaura Abbott != (__fix_to_virt(FIX_BTMAP_END) >> PMD_SHIFT)); 799af86e597SLaura Abbott 800af86e597SLaura Abbott if ((pmd != fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN))) 801af86e597SLaura Abbott || pmd != fixmap_pmd(fix_to_virt(FIX_BTMAP_END))) { 802af86e597SLaura Abbott WARN_ON(1); 803af86e597SLaura Abbott pr_warn("pmd %p != %p, %p\n", 804af86e597SLaura Abbott pmd, fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN)), 805af86e597SLaura Abbott fixmap_pmd(fix_to_virt(FIX_BTMAP_END))); 806af86e597SLaura Abbott pr_warn("fix_to_virt(FIX_BTMAP_BEGIN): %08lx\n", 807af86e597SLaura Abbott fix_to_virt(FIX_BTMAP_BEGIN)); 808af86e597SLaura Abbott pr_warn("fix_to_virt(FIX_BTMAP_END): %08lx\n", 809af86e597SLaura Abbott fix_to_virt(FIX_BTMAP_END)); 810af86e597SLaura Abbott 811af86e597SLaura Abbott pr_warn("FIX_BTMAP_END: %d\n", FIX_BTMAP_END); 812af86e597SLaura Abbott pr_warn("FIX_BTMAP_BEGIN: %d\n", FIX_BTMAP_BEGIN); 813af86e597SLaura Abbott } 814af86e597SLaura Abbott } 815af86e597SLaura Abbott 81618b4b276SJames Morse /* 81718b4b276SJames Morse * Unusually, this is also called in IRQ context (ghes_iounmap_irq) so if we 81818b4b276SJames Morse * ever need to use IPIs for TLB broadcasting, then we're in trouble here. 81918b4b276SJames Morse */ 820af86e597SLaura Abbott void __set_fixmap(enum fixed_addresses idx, 821af86e597SLaura Abbott phys_addr_t phys, pgprot_t flags) 822af86e597SLaura Abbott { 823af86e597SLaura Abbott unsigned long addr = __fix_to_virt(idx); 824af86e597SLaura Abbott pte_t *pte; 825af86e597SLaura Abbott 826b63dbef9SMark Rutland BUG_ON(idx <= FIX_HOLE || idx >= __end_of_fixed_addresses); 827af86e597SLaura Abbott 828af86e597SLaura Abbott pte = fixmap_pte(addr); 829af86e597SLaura Abbott 830af86e597SLaura Abbott if (pgprot_val(flags)) { 831af86e597SLaura Abbott set_pte(pte, pfn_pte(phys >> PAGE_SHIFT, flags)); 832af86e597SLaura Abbott } else { 833af86e597SLaura Abbott pte_clear(&init_mm, addr, pte); 834af86e597SLaura Abbott flush_tlb_kernel_range(addr, addr+PAGE_SIZE); 835af86e597SLaura Abbott } 836af86e597SLaura Abbott } 83761bd93ceSArd Biesheuvel 838f80fb3a3SArd Biesheuvel void *__init __fixmap_remap_fdt(phys_addr_t dt_phys, int *size, pgprot_t prot) 83961bd93ceSArd Biesheuvel { 84061bd93ceSArd Biesheuvel const u64 dt_virt_base = __fix_to_virt(FIX_FDT); 841f80fb3a3SArd Biesheuvel int offset; 84261bd93ceSArd Biesheuvel void *dt_virt; 84361bd93ceSArd Biesheuvel 84461bd93ceSArd Biesheuvel /* 84561bd93ceSArd Biesheuvel * Check whether the physical FDT address is set and meets the minimum 84661bd93ceSArd Biesheuvel * alignment requirement. Since we are relying on MIN_FDT_ALIGN to be 84704a84810SArd Biesheuvel * at least 8 bytes so that we can always access the magic and size 84804a84810SArd Biesheuvel * fields of the FDT header after mapping the first chunk, double check 84904a84810SArd Biesheuvel * here if that is indeed the case. 85061bd93ceSArd Biesheuvel */ 85161bd93ceSArd Biesheuvel BUILD_BUG_ON(MIN_FDT_ALIGN < 8); 85261bd93ceSArd Biesheuvel if (!dt_phys || dt_phys % MIN_FDT_ALIGN) 85361bd93ceSArd Biesheuvel return NULL; 85461bd93ceSArd Biesheuvel 85561bd93ceSArd Biesheuvel /* 85661bd93ceSArd Biesheuvel * Make sure that the FDT region can be mapped without the need to 85761bd93ceSArd Biesheuvel * allocate additional translation table pages, so that it is safe 858132233a7SLaura Abbott * to call create_mapping_noalloc() this early. 85961bd93ceSArd Biesheuvel * 86061bd93ceSArd Biesheuvel * On 64k pages, the FDT will be mapped using PTEs, so we need to 86161bd93ceSArd Biesheuvel * be in the same PMD as the rest of the fixmap. 86261bd93ceSArd Biesheuvel * On 4k pages, we'll use section mappings for the FDT so we only 86361bd93ceSArd Biesheuvel * have to be in the same PUD. 86461bd93ceSArd Biesheuvel */ 86561bd93ceSArd Biesheuvel BUILD_BUG_ON(dt_virt_base % SZ_2M); 86661bd93ceSArd Biesheuvel 867b433dce0SSuzuki K. Poulose BUILD_BUG_ON(__fix_to_virt(FIX_FDT_END) >> SWAPPER_TABLE_SHIFT != 868b433dce0SSuzuki K. Poulose __fix_to_virt(FIX_BTMAP_BEGIN) >> SWAPPER_TABLE_SHIFT); 86961bd93ceSArd Biesheuvel 870b433dce0SSuzuki K. Poulose offset = dt_phys % SWAPPER_BLOCK_SIZE; 87161bd93ceSArd Biesheuvel dt_virt = (void *)dt_virt_base + offset; 87261bd93ceSArd Biesheuvel 87361bd93ceSArd Biesheuvel /* map the first chunk so we can read the size from the header */ 874132233a7SLaura Abbott create_mapping_noalloc(round_down(dt_phys, SWAPPER_BLOCK_SIZE), 875132233a7SLaura Abbott dt_virt_base, SWAPPER_BLOCK_SIZE, prot); 87661bd93ceSArd Biesheuvel 87704a84810SArd Biesheuvel if (fdt_magic(dt_virt) != FDT_MAGIC) 87861bd93ceSArd Biesheuvel return NULL; 87961bd93ceSArd Biesheuvel 880f80fb3a3SArd Biesheuvel *size = fdt_totalsize(dt_virt); 881f80fb3a3SArd Biesheuvel if (*size > MAX_FDT_SIZE) 88261bd93ceSArd Biesheuvel return NULL; 88361bd93ceSArd Biesheuvel 884f80fb3a3SArd Biesheuvel if (offset + *size > SWAPPER_BLOCK_SIZE) 885132233a7SLaura Abbott create_mapping_noalloc(round_down(dt_phys, SWAPPER_BLOCK_SIZE), dt_virt_base, 886f80fb3a3SArd Biesheuvel round_up(offset + *size, SWAPPER_BLOCK_SIZE), prot); 887f80fb3a3SArd Biesheuvel 888f80fb3a3SArd Biesheuvel return dt_virt; 889f80fb3a3SArd Biesheuvel } 890f80fb3a3SArd Biesheuvel 891f80fb3a3SArd Biesheuvel void *__init fixmap_remap_fdt(phys_addr_t dt_phys) 892f80fb3a3SArd Biesheuvel { 893f80fb3a3SArd Biesheuvel void *dt_virt; 894f80fb3a3SArd Biesheuvel int size; 895f80fb3a3SArd Biesheuvel 896f80fb3a3SArd Biesheuvel dt_virt = __fixmap_remap_fdt(dt_phys, &size, PAGE_KERNEL_RO); 897f80fb3a3SArd Biesheuvel if (!dt_virt) 898f80fb3a3SArd Biesheuvel return NULL; 89961bd93ceSArd Biesheuvel 90061bd93ceSArd Biesheuvel memblock_reserve(dt_phys, size); 90161bd93ceSArd Biesheuvel return dt_virt; 90261bd93ceSArd Biesheuvel } 903324420bfSArd Biesheuvel 904324420bfSArd Biesheuvel int __init arch_ioremap_pud_supported(void) 905324420bfSArd Biesheuvel { 906324420bfSArd Biesheuvel /* only 4k granule supports level 1 block mappings */ 907324420bfSArd Biesheuvel return IS_ENABLED(CONFIG_ARM64_4K_PAGES); 908324420bfSArd Biesheuvel } 909324420bfSArd Biesheuvel 910324420bfSArd Biesheuvel int __init arch_ioremap_pmd_supported(void) 911324420bfSArd Biesheuvel { 912324420bfSArd Biesheuvel return 1; 913324420bfSArd Biesheuvel } 914324420bfSArd Biesheuvel 915324420bfSArd Biesheuvel int pud_set_huge(pud_t *pud, phys_addr_t phys, pgprot_t prot) 916324420bfSArd Biesheuvel { 91719338304SKristina Martsenko pgprot_t sect_prot = __pgprot(PUD_TYPE_SECT | 91819338304SKristina Martsenko pgprot_val(mk_sect_prot(prot))); 919324420bfSArd Biesheuvel BUG_ON(phys & ~PUD_MASK); 92019338304SKristina Martsenko set_pud(pud, pfn_pud(__phys_to_pfn(phys), sect_prot)); 921324420bfSArd Biesheuvel return 1; 922324420bfSArd Biesheuvel } 923324420bfSArd Biesheuvel 924324420bfSArd Biesheuvel int pmd_set_huge(pmd_t *pmd, phys_addr_t phys, pgprot_t prot) 925324420bfSArd Biesheuvel { 92619338304SKristina Martsenko pgprot_t sect_prot = __pgprot(PMD_TYPE_SECT | 92719338304SKristina Martsenko pgprot_val(mk_sect_prot(prot))); 928324420bfSArd Biesheuvel BUG_ON(phys & ~PMD_MASK); 92919338304SKristina Martsenko set_pmd(pmd, pfn_pmd(__phys_to_pfn(phys), sect_prot)); 930324420bfSArd Biesheuvel return 1; 931324420bfSArd Biesheuvel } 932324420bfSArd Biesheuvel 933324420bfSArd Biesheuvel int pud_clear_huge(pud_t *pud) 934324420bfSArd Biesheuvel { 935324420bfSArd Biesheuvel if (!pud_sect(*pud)) 936324420bfSArd Biesheuvel return 0; 937324420bfSArd Biesheuvel pud_clear(pud); 938324420bfSArd Biesheuvel return 1; 939324420bfSArd Biesheuvel } 940324420bfSArd Biesheuvel 941324420bfSArd Biesheuvel int pmd_clear_huge(pmd_t *pmd) 942324420bfSArd Biesheuvel { 943324420bfSArd Biesheuvel if (!pmd_sect(*pmd)) 944324420bfSArd Biesheuvel return 0; 945324420bfSArd Biesheuvel pmd_clear(pmd); 946324420bfSArd Biesheuvel return 1; 947324420bfSArd Biesheuvel } 948