1c1cc1552SCatalin Marinas /* 2c1cc1552SCatalin Marinas * Based on arch/arm/mm/mmu.c 3c1cc1552SCatalin Marinas * 4c1cc1552SCatalin Marinas * Copyright (C) 1995-2005 Russell King 5c1cc1552SCatalin Marinas * Copyright (C) 2012 ARM Ltd. 6c1cc1552SCatalin Marinas * 7c1cc1552SCatalin Marinas * This program is free software; you can redistribute it and/or modify 8c1cc1552SCatalin Marinas * it under the terms of the GNU General Public License version 2 as 9c1cc1552SCatalin Marinas * published by the Free Software Foundation. 10c1cc1552SCatalin Marinas * 11c1cc1552SCatalin Marinas * This program is distributed in the hope that it will be useful, 12c1cc1552SCatalin Marinas * but WITHOUT ANY WARRANTY; without even the implied warranty of 13c1cc1552SCatalin Marinas * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14c1cc1552SCatalin Marinas * GNU General Public License for more details. 15c1cc1552SCatalin Marinas * 16c1cc1552SCatalin Marinas * You should have received a copy of the GNU General Public License 17c1cc1552SCatalin Marinas * along with this program. If not, see <http://www.gnu.org/licenses/>. 18c1cc1552SCatalin Marinas */ 19c1cc1552SCatalin Marinas 20c1cc1552SCatalin Marinas #include <linux/export.h> 21c1cc1552SCatalin Marinas #include <linux/kernel.h> 22c1cc1552SCatalin Marinas #include <linux/errno.h> 23c1cc1552SCatalin Marinas #include <linux/init.h> 2461bd93ceSArd Biesheuvel #include <linux/libfdt.h> 25c1cc1552SCatalin Marinas #include <linux/mman.h> 26c1cc1552SCatalin Marinas #include <linux/nodemask.h> 27c1cc1552SCatalin Marinas #include <linux/memblock.h> 28c1cc1552SCatalin Marinas #include <linux/fs.h> 292475ff9dSCatalin Marinas #include <linux/io.h> 3041089357SCatalin Marinas #include <linux/slab.h> 31da141706SLaura Abbott #include <linux/stop_machine.h> 32c1cc1552SCatalin Marinas 3321ab99c2SMark Rutland #include <asm/barrier.h> 34c1cc1552SCatalin Marinas #include <asm/cputype.h> 35af86e597SLaura Abbott #include <asm/fixmap.h> 36068a17a5SMark Rutland #include <asm/kasan.h> 37b433dce0SSuzuki K. Poulose #include <asm/kernel-pgtable.h> 38c1cc1552SCatalin Marinas #include <asm/sections.h> 39c1cc1552SCatalin Marinas #include <asm/setup.h> 40c1cc1552SCatalin Marinas #include <asm/sizes.h> 41c1cc1552SCatalin Marinas #include <asm/tlb.h> 42c79b954bSJungseok Lee #include <asm/memblock.h> 43c1cc1552SCatalin Marinas #include <asm/mmu_context.h> 44c1cc1552SCatalin Marinas 45c1cc1552SCatalin Marinas #include "mm.h" 46c1cc1552SCatalin Marinas 47dd006da2SArd Biesheuvel u64 idmap_t0sz = TCR_T0SZ(VA_BITS); 48dd006da2SArd Biesheuvel 49c1cc1552SCatalin Marinas /* 50c1cc1552SCatalin Marinas * Empty_zero_page is a special page that is used for zero-initialized data 51c1cc1552SCatalin Marinas * and COW. 52c1cc1552SCatalin Marinas */ 535227cfa7SMark Rutland unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)] __page_aligned_bss; 54c1cc1552SCatalin Marinas EXPORT_SYMBOL(empty_zero_page); 55c1cc1552SCatalin Marinas 56c1cc1552SCatalin Marinas pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, 57c1cc1552SCatalin Marinas unsigned long size, pgprot_t vma_prot) 58c1cc1552SCatalin Marinas { 59c1cc1552SCatalin Marinas if (!pfn_valid(pfn)) 60c1cc1552SCatalin Marinas return pgprot_noncached(vma_prot); 61c1cc1552SCatalin Marinas else if (file->f_flags & O_SYNC) 62c1cc1552SCatalin Marinas return pgprot_writecombine(vma_prot); 63c1cc1552SCatalin Marinas return vma_prot; 64c1cc1552SCatalin Marinas } 65c1cc1552SCatalin Marinas EXPORT_SYMBOL(phys_mem_access_prot); 66c1cc1552SCatalin Marinas 67f4710445SMark Rutland static phys_addr_t __init early_pgtable_alloc(void) 68c1cc1552SCatalin Marinas { 697142392dSSuzuki K. Poulose phys_addr_t phys; 707142392dSSuzuki K. Poulose void *ptr; 717142392dSSuzuki K. Poulose 7221ab99c2SMark Rutland phys = memblock_alloc(PAGE_SIZE, PAGE_SIZE); 737142392dSSuzuki K. Poulose BUG_ON(!phys); 74f4710445SMark Rutland 75f4710445SMark Rutland /* 76f4710445SMark Rutland * The FIX_{PGD,PUD,PMD} slots may be in active use, but the FIX_PTE 77f4710445SMark Rutland * slot will be free, so we can (ab)use the FIX_PTE slot to initialise 78f4710445SMark Rutland * any level of table. 79f4710445SMark Rutland */ 80f4710445SMark Rutland ptr = pte_set_fixmap(phys); 81f4710445SMark Rutland 8221ab99c2SMark Rutland memset(ptr, 0, PAGE_SIZE); 8321ab99c2SMark Rutland 84f4710445SMark Rutland /* 85f4710445SMark Rutland * Implicit barriers also ensure the zeroed page is visible to the page 86f4710445SMark Rutland * table walker 87f4710445SMark Rutland */ 88f4710445SMark Rutland pte_clear_fixmap(); 89f4710445SMark Rutland 90f4710445SMark Rutland return phys; 91c1cc1552SCatalin Marinas } 92c1cc1552SCatalin Marinas 93da141706SLaura Abbott /* 94da141706SLaura Abbott * remap a PMD into pages 95da141706SLaura Abbott */ 96da141706SLaura Abbott static void split_pmd(pmd_t *pmd, pte_t *pte) 97da141706SLaura Abbott { 98da141706SLaura Abbott unsigned long pfn = pmd_pfn(*pmd); 99da141706SLaura Abbott int i = 0; 100da141706SLaura Abbott 101da141706SLaura Abbott do { 102da141706SLaura Abbott /* 103da141706SLaura Abbott * Need to have the least restrictive permissions available 104667c2759SCatalin Marinas * permissions will be fixed up later 105da141706SLaura Abbott */ 106667c2759SCatalin Marinas set_pte(pte, pfn_pte(pfn, PAGE_KERNEL_EXEC)); 107da141706SLaura Abbott pfn++; 108da141706SLaura Abbott } while (pte++, i++, i < PTRS_PER_PTE); 109da141706SLaura Abbott } 110da141706SLaura Abbott 111da141706SLaura Abbott static void alloc_init_pte(pmd_t *pmd, unsigned long addr, 112667c2759SCatalin Marinas unsigned long end, unsigned long pfn, 113da141706SLaura Abbott pgprot_t prot, 114f4710445SMark Rutland phys_addr_t (*pgtable_alloc)(void)) 115c1cc1552SCatalin Marinas { 116c1cc1552SCatalin Marinas pte_t *pte; 117c1cc1552SCatalin Marinas 118a1c76574SMark Rutland if (pmd_none(*pmd) || pmd_sect(*pmd)) { 119132233a7SLaura Abbott phys_addr_t pte_phys; 120132233a7SLaura Abbott BUG_ON(!pgtable_alloc); 121132233a7SLaura Abbott pte_phys = pgtable_alloc(); 122f4710445SMark Rutland pte = pte_set_fixmap(pte_phys); 123da141706SLaura Abbott if (pmd_sect(*pmd)) 124da141706SLaura Abbott split_pmd(pmd, pte); 125f4710445SMark Rutland __pmd_populate(pmd, pte_phys, PMD_TYPE_TABLE); 126da141706SLaura Abbott flush_tlb_all(); 127f4710445SMark Rutland pte_clear_fixmap(); 128c1cc1552SCatalin Marinas } 129a1c76574SMark Rutland BUG_ON(pmd_bad(*pmd)); 130c1cc1552SCatalin Marinas 131f4710445SMark Rutland pte = pte_set_fixmap_offset(pmd, addr); 132c1cc1552SCatalin Marinas do { 133667c2759SCatalin Marinas set_pte(pte, pfn_pte(pfn, prot)); 134667c2759SCatalin Marinas pfn++; 135667c2759SCatalin Marinas } while (pte++, addr += PAGE_SIZE, addr != end); 136f4710445SMark Rutland 137f4710445SMark Rutland pte_clear_fixmap(); 138c1cc1552SCatalin Marinas } 139c1cc1552SCatalin Marinas 1409a17a213SJisheng Zhang static void split_pud(pud_t *old_pud, pmd_t *pmd) 141da141706SLaura Abbott { 142da141706SLaura Abbott unsigned long addr = pud_pfn(*old_pud) << PAGE_SHIFT; 143da141706SLaura Abbott pgprot_t prot = __pgprot(pud_val(*old_pud) ^ addr); 144da141706SLaura Abbott int i = 0; 145da141706SLaura Abbott 146da141706SLaura Abbott do { 1471e43ba9cSArd Biesheuvel set_pmd(pmd, __pmd(addr | pgprot_val(prot))); 148da141706SLaura Abbott addr += PMD_SIZE; 149da141706SLaura Abbott } while (pmd++, i++, i < PTRS_PER_PMD); 150da141706SLaura Abbott } 151da141706SLaura Abbott 15283863f25SLaura Abbott #ifdef CONFIG_DEBUG_PAGEALLOC 15383863f25SLaura Abbott static bool block_mappings_allowed(phys_addr_t (*pgtable_alloc)(void)) 15483863f25SLaura Abbott { 15583863f25SLaura Abbott 15683863f25SLaura Abbott /* 15783863f25SLaura Abbott * If debug_page_alloc is enabled we must map the linear map 15883863f25SLaura Abbott * using pages. However, other mappings created by 15983863f25SLaura Abbott * create_mapping_noalloc must use sections in some cases. Allow 16083863f25SLaura Abbott * sections to be used in those cases, where no pgtable_alloc 16183863f25SLaura Abbott * function is provided. 16283863f25SLaura Abbott */ 16383863f25SLaura Abbott return !pgtable_alloc || !debug_pagealloc_enabled(); 16483863f25SLaura Abbott } 16583863f25SLaura Abbott #else 16683863f25SLaura Abbott static bool block_mappings_allowed(phys_addr_t (*pgtable_alloc)(void)) 16783863f25SLaura Abbott { 16883863f25SLaura Abbott return true; 16983863f25SLaura Abbott } 17083863f25SLaura Abbott #endif 17183863f25SLaura Abbott 17211509a30SMark Rutland static void alloc_init_pmd(pud_t *pud, unsigned long addr, unsigned long end, 173da141706SLaura Abbott phys_addr_t phys, pgprot_t prot, 174f4710445SMark Rutland phys_addr_t (*pgtable_alloc)(void)) 175c1cc1552SCatalin Marinas { 176c1cc1552SCatalin Marinas pmd_t *pmd; 177c1cc1552SCatalin Marinas unsigned long next; 178c1cc1552SCatalin Marinas 179c1cc1552SCatalin Marinas /* 180c1cc1552SCatalin Marinas * Check for initial section mappings in the pgd/pud and remove them. 181c1cc1552SCatalin Marinas */ 182a1c76574SMark Rutland if (pud_none(*pud) || pud_sect(*pud)) { 183132233a7SLaura Abbott phys_addr_t pmd_phys; 184132233a7SLaura Abbott BUG_ON(!pgtable_alloc); 185132233a7SLaura Abbott pmd_phys = pgtable_alloc(); 186f4710445SMark Rutland pmd = pmd_set_fixmap(pmd_phys); 187da141706SLaura Abbott if (pud_sect(*pud)) { 188da141706SLaura Abbott /* 189da141706SLaura Abbott * need to have the 1G of mappings continue to be 190da141706SLaura Abbott * present 191da141706SLaura Abbott */ 192da141706SLaura Abbott split_pud(pud, pmd); 193da141706SLaura Abbott } 194f4710445SMark Rutland __pud_populate(pud, pmd_phys, PUD_TYPE_TABLE); 195da141706SLaura Abbott flush_tlb_all(); 196f4710445SMark Rutland pmd_clear_fixmap(); 197c1cc1552SCatalin Marinas } 198a1c76574SMark Rutland BUG_ON(pud_bad(*pud)); 199c1cc1552SCatalin Marinas 200f4710445SMark Rutland pmd = pmd_set_fixmap_offset(pud, addr); 201c1cc1552SCatalin Marinas do { 202c1cc1552SCatalin Marinas next = pmd_addr_end(addr, end); 203c1cc1552SCatalin Marinas /* try section mapping first */ 20483863f25SLaura Abbott if (((addr | next | phys) & ~SECTION_MASK) == 0 && 20583863f25SLaura Abbott block_mappings_allowed(pgtable_alloc)) { 206a55f9929SCatalin Marinas pmd_t old_pmd =*pmd; 2078ce837ceSArd Biesheuvel set_pmd(pmd, __pmd(phys | 2088ce837ceSArd Biesheuvel pgprot_val(mk_sect_prot(prot)))); 209a55f9929SCatalin Marinas /* 210a55f9929SCatalin Marinas * Check for previous table entries created during 211a55f9929SCatalin Marinas * boot (__create_page_tables) and flush them. 212a55f9929SCatalin Marinas */ 213523d6e9fSzhichang.yuan if (!pmd_none(old_pmd)) { 214a55f9929SCatalin Marinas flush_tlb_all(); 215523d6e9fSzhichang.yuan if (pmd_table(old_pmd)) { 216316b39dbSMark Rutland phys_addr_t table = pmd_page_paddr(old_pmd); 21741089357SCatalin Marinas if (!WARN_ON_ONCE(slab_is_available())) 218523d6e9fSzhichang.yuan memblock_free(table, PAGE_SIZE); 219523d6e9fSzhichang.yuan } 220523d6e9fSzhichang.yuan } 221a55f9929SCatalin Marinas } else { 222667c2759SCatalin Marinas alloc_init_pte(pmd, addr, next, __phys_to_pfn(phys), 22321ab99c2SMark Rutland prot, pgtable_alloc); 224a55f9929SCatalin Marinas } 225c1cc1552SCatalin Marinas phys += next - addr; 226c1cc1552SCatalin Marinas } while (pmd++, addr = next, addr != end); 227f4710445SMark Rutland 228f4710445SMark Rutland pmd_clear_fixmap(); 229c1cc1552SCatalin Marinas } 230c1cc1552SCatalin Marinas 231da141706SLaura Abbott static inline bool use_1G_block(unsigned long addr, unsigned long next, 232da141706SLaura Abbott unsigned long phys) 233da141706SLaura Abbott { 234da141706SLaura Abbott if (PAGE_SHIFT != 12) 235da141706SLaura Abbott return false; 236da141706SLaura Abbott 237da141706SLaura Abbott if (((addr | next | phys) & ~PUD_MASK) != 0) 238da141706SLaura Abbott return false; 239da141706SLaura Abbott 240da141706SLaura Abbott return true; 241da141706SLaura Abbott } 242da141706SLaura Abbott 24311509a30SMark Rutland static void alloc_init_pud(pgd_t *pgd, unsigned long addr, unsigned long end, 244da141706SLaura Abbott phys_addr_t phys, pgprot_t prot, 245f4710445SMark Rutland phys_addr_t (*pgtable_alloc)(void)) 246c1cc1552SCatalin Marinas { 247c79b954bSJungseok Lee pud_t *pud; 248c1cc1552SCatalin Marinas unsigned long next; 249c1cc1552SCatalin Marinas 250c79b954bSJungseok Lee if (pgd_none(*pgd)) { 251132233a7SLaura Abbott phys_addr_t pud_phys; 252132233a7SLaura Abbott BUG_ON(!pgtable_alloc); 253132233a7SLaura Abbott pud_phys = pgtable_alloc(); 254f4710445SMark Rutland __pgd_populate(pgd, pud_phys, PUD_TYPE_TABLE); 255c79b954bSJungseok Lee } 256c79b954bSJungseok Lee BUG_ON(pgd_bad(*pgd)); 257c79b954bSJungseok Lee 258f4710445SMark Rutland pud = pud_set_fixmap_offset(pgd, addr); 259c1cc1552SCatalin Marinas do { 260c1cc1552SCatalin Marinas next = pud_addr_end(addr, end); 261206a2a73SSteve Capper 262206a2a73SSteve Capper /* 263206a2a73SSteve Capper * For 4K granule only, attempt to put down a 1GB block 264206a2a73SSteve Capper */ 26583863f25SLaura Abbott if (use_1G_block(addr, next, phys) && 26683863f25SLaura Abbott block_mappings_allowed(pgtable_alloc)) { 267206a2a73SSteve Capper pud_t old_pud = *pud; 2688ce837ceSArd Biesheuvel set_pud(pud, __pud(phys | 2698ce837ceSArd Biesheuvel pgprot_val(mk_sect_prot(prot)))); 270206a2a73SSteve Capper 271206a2a73SSteve Capper /* 272206a2a73SSteve Capper * If we have an old value for a pud, it will 273206a2a73SSteve Capper * be pointing to a pmd table that we no longer 274206a2a73SSteve Capper * need (from swapper_pg_dir). 275206a2a73SSteve Capper * 276206a2a73SSteve Capper * Look up the old pmd table and free it. 277206a2a73SSteve Capper */ 278206a2a73SSteve Capper if (!pud_none(old_pud)) { 279206a2a73SSteve Capper flush_tlb_all(); 280523d6e9fSzhichang.yuan if (pud_table(old_pud)) { 281316b39dbSMark Rutland phys_addr_t table = pud_page_paddr(old_pud); 28241089357SCatalin Marinas if (!WARN_ON_ONCE(slab_is_available())) 283523d6e9fSzhichang.yuan memblock_free(table, PAGE_SIZE); 284523d6e9fSzhichang.yuan } 285206a2a73SSteve Capper } 286206a2a73SSteve Capper } else { 28711509a30SMark Rutland alloc_init_pmd(pud, addr, next, phys, prot, 28821ab99c2SMark Rutland pgtable_alloc); 289206a2a73SSteve Capper } 290c1cc1552SCatalin Marinas phys += next - addr; 291c1cc1552SCatalin Marinas } while (pud++, addr = next, addr != end); 292f4710445SMark Rutland 293f4710445SMark Rutland pud_clear_fixmap(); 294c1cc1552SCatalin Marinas } 295c1cc1552SCatalin Marinas 296c1cc1552SCatalin Marinas /* 297c1cc1552SCatalin Marinas * Create the page directory entries and any necessary page tables for the 298c1cc1552SCatalin Marinas * mapping specified by 'md'. 299c1cc1552SCatalin Marinas */ 30011509a30SMark Rutland static void init_pgd(pgd_t *pgd, phys_addr_t phys, unsigned long virt, 301da141706SLaura Abbott phys_addr_t size, pgprot_t prot, 302f4710445SMark Rutland phys_addr_t (*pgtable_alloc)(void)) 303c1cc1552SCatalin Marinas { 304c1cc1552SCatalin Marinas unsigned long addr, length, end, next; 305c1cc1552SCatalin Marinas 306cc5d2b3bSMark Rutland /* 307cc5d2b3bSMark Rutland * If the virtual and physical address don't have the same offset 308cc5d2b3bSMark Rutland * within a page, we cannot map the region as the caller expects. 309cc5d2b3bSMark Rutland */ 310cc5d2b3bSMark Rutland if (WARN_ON((phys ^ virt) & ~PAGE_MASK)) 311cc5d2b3bSMark Rutland return; 312cc5d2b3bSMark Rutland 3139c4e08a3SMark Rutland phys &= PAGE_MASK; 314c1cc1552SCatalin Marinas addr = virt & PAGE_MASK; 315c1cc1552SCatalin Marinas length = PAGE_ALIGN(size + (virt & ~PAGE_MASK)); 316c1cc1552SCatalin Marinas 317c1cc1552SCatalin Marinas end = addr + length; 318c1cc1552SCatalin Marinas do { 319c1cc1552SCatalin Marinas next = pgd_addr_end(addr, end); 32011509a30SMark Rutland alloc_init_pud(pgd, addr, next, phys, prot, pgtable_alloc); 321c1cc1552SCatalin Marinas phys += next - addr; 322c1cc1552SCatalin Marinas } while (pgd++, addr = next, addr != end); 323c1cc1552SCatalin Marinas } 324c1cc1552SCatalin Marinas 325f4710445SMark Rutland static phys_addr_t late_pgtable_alloc(void) 326da141706SLaura Abbott { 32721ab99c2SMark Rutland void *ptr = (void *)__get_free_page(PGALLOC_GFP); 328da141706SLaura Abbott BUG_ON(!ptr); 32921ab99c2SMark Rutland 33021ab99c2SMark Rutland /* Ensure the zeroed page is visible to the page table walker */ 33121ab99c2SMark Rutland dsb(ishst); 332f4710445SMark Rutland return __pa(ptr); 333da141706SLaura Abbott } 334da141706SLaura Abbott 33511509a30SMark Rutland static void __create_pgd_mapping(pgd_t *pgdir, phys_addr_t phys, 33611509a30SMark Rutland unsigned long virt, phys_addr_t size, 33711509a30SMark Rutland pgprot_t prot, 33811509a30SMark Rutland phys_addr_t (*alloc)(void)) 33911509a30SMark Rutland { 34011509a30SMark Rutland init_pgd(pgd_offset_raw(pgdir, virt), phys, virt, size, prot, alloc); 34111509a30SMark Rutland } 34211509a30SMark Rutland 343132233a7SLaura Abbott /* 344132233a7SLaura Abbott * This function can only be used to modify existing table entries, 345132233a7SLaura Abbott * without allocating new levels of table. Note that this permits the 346132233a7SLaura Abbott * creation of new section or page entries. 347132233a7SLaura Abbott */ 348132233a7SLaura Abbott static void __init create_mapping_noalloc(phys_addr_t phys, unsigned long virt, 349da141706SLaura Abbott phys_addr_t size, pgprot_t prot) 350d7ecbddfSMark Salter { 351d7ecbddfSMark Salter if (virt < VMALLOC_START) { 352d7ecbddfSMark Salter pr_warn("BUG: not creating mapping for %pa at 0x%016lx - outside kernel range\n", 353d7ecbddfSMark Salter &phys, virt); 354d7ecbddfSMark Salter return; 355d7ecbddfSMark Salter } 35611509a30SMark Rutland __create_pgd_mapping(init_mm.pgd, phys, virt, size, prot, 357132233a7SLaura Abbott NULL); 358d7ecbddfSMark Salter } 359d7ecbddfSMark Salter 3608ce837ceSArd Biesheuvel void __init create_pgd_mapping(struct mm_struct *mm, phys_addr_t phys, 3618ce837ceSArd Biesheuvel unsigned long virt, phys_addr_t size, 3628ce837ceSArd Biesheuvel pgprot_t prot) 3638ce837ceSArd Biesheuvel { 36411509a30SMark Rutland __create_pgd_mapping(mm->pgd, phys, virt, size, prot, 36521ab99c2SMark Rutland late_pgtable_alloc); 366d7ecbddfSMark Salter } 367d7ecbddfSMark Salter 368da141706SLaura Abbott static void create_mapping_late(phys_addr_t phys, unsigned long virt, 369da141706SLaura Abbott phys_addr_t size, pgprot_t prot) 370da141706SLaura Abbott { 371da141706SLaura Abbott if (virt < VMALLOC_START) { 372da141706SLaura Abbott pr_warn("BUG: not creating mapping for %pa at 0x%016lx - outside kernel range\n", 373da141706SLaura Abbott &phys, virt); 374da141706SLaura Abbott return; 375da141706SLaura Abbott } 376da141706SLaura Abbott 37711509a30SMark Rutland __create_pgd_mapping(init_mm.pgd, phys, virt, size, prot, 37811509a30SMark Rutland late_pgtable_alloc); 379da141706SLaura Abbott } 380da141706SLaura Abbott 381068a17a5SMark Rutland static void __init __map_memblock(pgd_t *pgd, phys_addr_t start, phys_addr_t end) 382da141706SLaura Abbott { 383068a17a5SMark Rutland 384068a17a5SMark Rutland unsigned long kernel_start = __pa(_stext); 385068a17a5SMark Rutland unsigned long kernel_end = __pa(_end); 386068a17a5SMark Rutland 387da141706SLaura Abbott /* 388068a17a5SMark Rutland * The kernel itself is mapped at page granularity. Map all other 389068a17a5SMark Rutland * memory, making sure we don't overwrite the existing kernel mappings. 390da141706SLaura Abbott */ 391da141706SLaura Abbott 392068a17a5SMark Rutland /* No overlap with the kernel. */ 393068a17a5SMark Rutland if (end < kernel_start || start >= kernel_end) { 394068a17a5SMark Rutland __create_pgd_mapping(pgd, start, __phys_to_virt(start), 395068a17a5SMark Rutland end - start, PAGE_KERNEL, 396068a17a5SMark Rutland early_pgtable_alloc); 397068a17a5SMark Rutland return; 398da141706SLaura Abbott } 399da141706SLaura Abbott 400068a17a5SMark Rutland /* 401068a17a5SMark Rutland * This block overlaps the kernel mapping. Map the portion(s) which 402068a17a5SMark Rutland * don't overlap. 403068a17a5SMark Rutland */ 404068a17a5SMark Rutland if (start < kernel_start) 405068a17a5SMark Rutland __create_pgd_mapping(pgd, start, 406068a17a5SMark Rutland __phys_to_virt(start), 407068a17a5SMark Rutland kernel_start - start, PAGE_KERNEL, 408068a17a5SMark Rutland early_pgtable_alloc); 409068a17a5SMark Rutland if (kernel_end < end) 410068a17a5SMark Rutland __create_pgd_mapping(pgd, kernel_end, 411068a17a5SMark Rutland __phys_to_virt(kernel_end), 412068a17a5SMark Rutland end - kernel_end, PAGE_KERNEL, 413068a17a5SMark Rutland early_pgtable_alloc); 414da141706SLaura Abbott } 415da141706SLaura Abbott 416068a17a5SMark Rutland static void __init map_mem(pgd_t *pgd) 417c1cc1552SCatalin Marinas { 418c1cc1552SCatalin Marinas struct memblock_region *reg; 419f6bc87c3SSteve Capper 420c1cc1552SCatalin Marinas /* map all the memory banks */ 421c1cc1552SCatalin Marinas for_each_memblock(memory, reg) { 422c1cc1552SCatalin Marinas phys_addr_t start = reg->base; 423c1cc1552SCatalin Marinas phys_addr_t end = start + reg->size; 424c1cc1552SCatalin Marinas 425c1cc1552SCatalin Marinas if (start >= end) 426c1cc1552SCatalin Marinas break; 42768709f45SArd Biesheuvel if (memblock_is_nomap(reg)) 42868709f45SArd Biesheuvel continue; 429c1cc1552SCatalin Marinas 430068a17a5SMark Rutland __map_memblock(pgd, start, end); 431c1cc1552SCatalin Marinas } 432c1cc1552SCatalin Marinas } 433c1cc1552SCatalin Marinas 434da141706SLaura Abbott #ifdef CONFIG_DEBUG_RODATA 435da141706SLaura Abbott void mark_rodata_ro(void) 436da141706SLaura Abbott { 437da141706SLaura Abbott create_mapping_late(__pa(_stext), (unsigned long)_stext, 438da141706SLaura Abbott (unsigned long)_etext - (unsigned long)_stext, 4390b2aa5b8SLaura Abbott PAGE_KERNEL_ROX); 440da141706SLaura Abbott 441da141706SLaura Abbott } 442da141706SLaura Abbott #endif 443da141706SLaura Abbott 444da141706SLaura Abbott void fixup_init(void) 445da141706SLaura Abbott { 446da141706SLaura Abbott create_mapping_late(__pa(__init_begin), (unsigned long)__init_begin, 447da141706SLaura Abbott (unsigned long)__init_end - (unsigned long)__init_begin, 448da141706SLaura Abbott PAGE_KERNEL); 449da141706SLaura Abbott } 450da141706SLaura Abbott 451068a17a5SMark Rutland static void __init map_kernel_chunk(pgd_t *pgd, void *va_start, void *va_end, 452068a17a5SMark Rutland pgprot_t prot) 453068a17a5SMark Rutland { 454068a17a5SMark Rutland phys_addr_t pa_start = __pa(va_start); 455068a17a5SMark Rutland unsigned long size = va_end - va_start; 456068a17a5SMark Rutland 457068a17a5SMark Rutland BUG_ON(!PAGE_ALIGNED(pa_start)); 458068a17a5SMark Rutland BUG_ON(!PAGE_ALIGNED(size)); 459068a17a5SMark Rutland 460068a17a5SMark Rutland __create_pgd_mapping(pgd, pa_start, (unsigned long)va_start, size, prot, 461068a17a5SMark Rutland early_pgtable_alloc); 462068a17a5SMark Rutland } 463068a17a5SMark Rutland 464068a17a5SMark Rutland /* 465068a17a5SMark Rutland * Create fine-grained mappings for the kernel. 466068a17a5SMark Rutland */ 467068a17a5SMark Rutland static void __init map_kernel(pgd_t *pgd) 468068a17a5SMark Rutland { 469068a17a5SMark Rutland 470068a17a5SMark Rutland map_kernel_chunk(pgd, _stext, _etext, PAGE_KERNEL_EXEC); 471068a17a5SMark Rutland map_kernel_chunk(pgd, __init_begin, __init_end, PAGE_KERNEL_EXEC); 472068a17a5SMark Rutland map_kernel_chunk(pgd, _data, _end, PAGE_KERNEL); 473068a17a5SMark Rutland 474068a17a5SMark Rutland /* 475068a17a5SMark Rutland * The fixmap falls in a separate pgd to the kernel, and doesn't live 476068a17a5SMark Rutland * in the carveout for the swapper_pg_dir. We can simply re-use the 477068a17a5SMark Rutland * existing dir for the fixmap. 478068a17a5SMark Rutland */ 479068a17a5SMark Rutland set_pgd(pgd_offset_raw(pgd, FIXADDR_START), *pgd_offset_k(FIXADDR_START)); 480068a17a5SMark Rutland 481068a17a5SMark Rutland kasan_copy_shadow(pgd); 482068a17a5SMark Rutland } 483068a17a5SMark Rutland 484c1cc1552SCatalin Marinas /* 485c1cc1552SCatalin Marinas * paging_init() sets up the page tables, initialises the zone memory 486c1cc1552SCatalin Marinas * maps and sets up the zero page. 487c1cc1552SCatalin Marinas */ 488c1cc1552SCatalin Marinas void __init paging_init(void) 489c1cc1552SCatalin Marinas { 490068a17a5SMark Rutland phys_addr_t pgd_phys = early_pgtable_alloc(); 491068a17a5SMark Rutland pgd_t *pgd = pgd_set_fixmap(pgd_phys); 492068a17a5SMark Rutland 493068a17a5SMark Rutland map_kernel(pgd); 494068a17a5SMark Rutland map_mem(pgd); 495068a17a5SMark Rutland 496068a17a5SMark Rutland /* 497068a17a5SMark Rutland * We want to reuse the original swapper_pg_dir so we don't have to 498068a17a5SMark Rutland * communicate the new address to non-coherent secondaries in 499068a17a5SMark Rutland * secondary_entry, and so cpu_switch_mm can generate the address with 500068a17a5SMark Rutland * adrp+add rather than a load from some global variable. 501068a17a5SMark Rutland * 502068a17a5SMark Rutland * To do this we need to go via a temporary pgd. 503068a17a5SMark Rutland */ 504068a17a5SMark Rutland cpu_replace_ttbr1(__va(pgd_phys)); 505068a17a5SMark Rutland memcpy(swapper_pg_dir, pgd, PAGE_SIZE); 506068a17a5SMark Rutland cpu_replace_ttbr1(swapper_pg_dir); 507068a17a5SMark Rutland 508068a17a5SMark Rutland pgd_clear_fixmap(); 509068a17a5SMark Rutland memblock_free(pgd_phys, PAGE_SIZE); 510068a17a5SMark Rutland 511068a17a5SMark Rutland /* 512068a17a5SMark Rutland * We only reuse the PGD from the swapper_pg_dir, not the pud + pmd 513068a17a5SMark Rutland * allocated with it. 514068a17a5SMark Rutland */ 515068a17a5SMark Rutland memblock_free(__pa(swapper_pg_dir) + PAGE_SIZE, 516068a17a5SMark Rutland SWAPPER_DIR_SIZE - PAGE_SIZE); 517c1cc1552SCatalin Marinas 518c1cc1552SCatalin Marinas bootmem_init(); 519c1cc1552SCatalin Marinas } 520c1cc1552SCatalin Marinas 521c1cc1552SCatalin Marinas /* 522c1cc1552SCatalin Marinas * Check whether a kernel address is valid (derived from arch/x86/). 523c1cc1552SCatalin Marinas */ 524c1cc1552SCatalin Marinas int kern_addr_valid(unsigned long addr) 525c1cc1552SCatalin Marinas { 526c1cc1552SCatalin Marinas pgd_t *pgd; 527c1cc1552SCatalin Marinas pud_t *pud; 528c1cc1552SCatalin Marinas pmd_t *pmd; 529c1cc1552SCatalin Marinas pte_t *pte; 530c1cc1552SCatalin Marinas 531c1cc1552SCatalin Marinas if ((((long)addr) >> VA_BITS) != -1UL) 532c1cc1552SCatalin Marinas return 0; 533c1cc1552SCatalin Marinas 534c1cc1552SCatalin Marinas pgd = pgd_offset_k(addr); 535c1cc1552SCatalin Marinas if (pgd_none(*pgd)) 536c1cc1552SCatalin Marinas return 0; 537c1cc1552SCatalin Marinas 538c1cc1552SCatalin Marinas pud = pud_offset(pgd, addr); 539c1cc1552SCatalin Marinas if (pud_none(*pud)) 540c1cc1552SCatalin Marinas return 0; 541c1cc1552SCatalin Marinas 542206a2a73SSteve Capper if (pud_sect(*pud)) 543206a2a73SSteve Capper return pfn_valid(pud_pfn(*pud)); 544206a2a73SSteve Capper 545c1cc1552SCatalin Marinas pmd = pmd_offset(pud, addr); 546c1cc1552SCatalin Marinas if (pmd_none(*pmd)) 547c1cc1552SCatalin Marinas return 0; 548c1cc1552SCatalin Marinas 549da6e4cb6SDave Anderson if (pmd_sect(*pmd)) 550da6e4cb6SDave Anderson return pfn_valid(pmd_pfn(*pmd)); 551da6e4cb6SDave Anderson 552c1cc1552SCatalin Marinas pte = pte_offset_kernel(pmd, addr); 553c1cc1552SCatalin Marinas if (pte_none(*pte)) 554c1cc1552SCatalin Marinas return 0; 555c1cc1552SCatalin Marinas 556c1cc1552SCatalin Marinas return pfn_valid(pte_pfn(*pte)); 557c1cc1552SCatalin Marinas } 558c1cc1552SCatalin Marinas #ifdef CONFIG_SPARSEMEM_VMEMMAP 559b433dce0SSuzuki K. Poulose #if !ARM64_SWAPPER_USES_SECTION_MAPS 5600aad818bSJohannes Weiner int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node) 561c1cc1552SCatalin Marinas { 5620aad818bSJohannes Weiner return vmemmap_populate_basepages(start, end, node); 563c1cc1552SCatalin Marinas } 564b433dce0SSuzuki K. Poulose #else /* !ARM64_SWAPPER_USES_SECTION_MAPS */ 5650aad818bSJohannes Weiner int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node) 566c1cc1552SCatalin Marinas { 5670aad818bSJohannes Weiner unsigned long addr = start; 568c1cc1552SCatalin Marinas unsigned long next; 569c1cc1552SCatalin Marinas pgd_t *pgd; 570c1cc1552SCatalin Marinas pud_t *pud; 571c1cc1552SCatalin Marinas pmd_t *pmd; 572c1cc1552SCatalin Marinas 573c1cc1552SCatalin Marinas do { 574c1cc1552SCatalin Marinas next = pmd_addr_end(addr, end); 575c1cc1552SCatalin Marinas 576c1cc1552SCatalin Marinas pgd = vmemmap_pgd_populate(addr, node); 577c1cc1552SCatalin Marinas if (!pgd) 578c1cc1552SCatalin Marinas return -ENOMEM; 579c1cc1552SCatalin Marinas 580c1cc1552SCatalin Marinas pud = vmemmap_pud_populate(pgd, addr, node); 581c1cc1552SCatalin Marinas if (!pud) 582c1cc1552SCatalin Marinas return -ENOMEM; 583c1cc1552SCatalin Marinas 584c1cc1552SCatalin Marinas pmd = pmd_offset(pud, addr); 585c1cc1552SCatalin Marinas if (pmd_none(*pmd)) { 586c1cc1552SCatalin Marinas void *p = NULL; 587c1cc1552SCatalin Marinas 588c1cc1552SCatalin Marinas p = vmemmap_alloc_block_buf(PMD_SIZE, node); 589c1cc1552SCatalin Marinas if (!p) 590c1cc1552SCatalin Marinas return -ENOMEM; 591c1cc1552SCatalin Marinas 592a501e324SCatalin Marinas set_pmd(pmd, __pmd(__pa(p) | PROT_SECT_NORMAL)); 593c1cc1552SCatalin Marinas } else 594c1cc1552SCatalin Marinas vmemmap_verify((pte_t *)pmd, node, addr, next); 595c1cc1552SCatalin Marinas } while (addr = next, addr != end); 596c1cc1552SCatalin Marinas 597c1cc1552SCatalin Marinas return 0; 598c1cc1552SCatalin Marinas } 599c1cc1552SCatalin Marinas #endif /* CONFIG_ARM64_64K_PAGES */ 6000aad818bSJohannes Weiner void vmemmap_free(unsigned long start, unsigned long end) 6010197518cSTang Chen { 6020197518cSTang Chen } 603c1cc1552SCatalin Marinas #endif /* CONFIG_SPARSEMEM_VMEMMAP */ 604af86e597SLaura Abbott 605af86e597SLaura Abbott static pte_t bm_pte[PTRS_PER_PTE] __page_aligned_bss; 6069f25e6adSKirill A. Shutemov #if CONFIG_PGTABLE_LEVELS > 2 607af86e597SLaura Abbott static pmd_t bm_pmd[PTRS_PER_PMD] __page_aligned_bss; 608af86e597SLaura Abbott #endif 6099f25e6adSKirill A. Shutemov #if CONFIG_PGTABLE_LEVELS > 3 610af86e597SLaura Abbott static pud_t bm_pud[PTRS_PER_PUD] __page_aligned_bss; 611af86e597SLaura Abbott #endif 612af86e597SLaura Abbott 613af86e597SLaura Abbott static inline pud_t * fixmap_pud(unsigned long addr) 614af86e597SLaura Abbott { 615af86e597SLaura Abbott pgd_t *pgd = pgd_offset_k(addr); 616af86e597SLaura Abbott 617af86e597SLaura Abbott BUG_ON(pgd_none(*pgd) || pgd_bad(*pgd)); 618af86e597SLaura Abbott 619af86e597SLaura Abbott return pud_offset(pgd, addr); 620af86e597SLaura Abbott } 621af86e597SLaura Abbott 622af86e597SLaura Abbott static inline pmd_t * fixmap_pmd(unsigned long addr) 623af86e597SLaura Abbott { 624af86e597SLaura Abbott pud_t *pud = fixmap_pud(addr); 625af86e597SLaura Abbott 626af86e597SLaura Abbott BUG_ON(pud_none(*pud) || pud_bad(*pud)); 627af86e597SLaura Abbott 628af86e597SLaura Abbott return pmd_offset(pud, addr); 629af86e597SLaura Abbott } 630af86e597SLaura Abbott 631af86e597SLaura Abbott static inline pte_t * fixmap_pte(unsigned long addr) 632af86e597SLaura Abbott { 633af86e597SLaura Abbott pmd_t *pmd = fixmap_pmd(addr); 634af86e597SLaura Abbott 635af86e597SLaura Abbott BUG_ON(pmd_none(*pmd) || pmd_bad(*pmd)); 636af86e597SLaura Abbott 637af86e597SLaura Abbott return pte_offset_kernel(pmd, addr); 638af86e597SLaura Abbott } 639af86e597SLaura Abbott 640af86e597SLaura Abbott void __init early_fixmap_init(void) 641af86e597SLaura Abbott { 642af86e597SLaura Abbott pgd_t *pgd; 643af86e597SLaura Abbott pud_t *pud; 644af86e597SLaura Abbott pmd_t *pmd; 645af86e597SLaura Abbott unsigned long addr = FIXADDR_START; 646af86e597SLaura Abbott 647af86e597SLaura Abbott pgd = pgd_offset_k(addr); 648af86e597SLaura Abbott pgd_populate(&init_mm, pgd, bm_pud); 649af86e597SLaura Abbott pud = pud_offset(pgd, addr); 650af86e597SLaura Abbott pud_populate(&init_mm, pud, bm_pmd); 651af86e597SLaura Abbott pmd = pmd_offset(pud, addr); 652af86e597SLaura Abbott pmd_populate_kernel(&init_mm, pmd, bm_pte); 653af86e597SLaura Abbott 654af86e597SLaura Abbott /* 655af86e597SLaura Abbott * The boot-ioremap range spans multiple pmds, for which 656af86e597SLaura Abbott * we are not preparted: 657af86e597SLaura Abbott */ 658af86e597SLaura Abbott BUILD_BUG_ON((__fix_to_virt(FIX_BTMAP_BEGIN) >> PMD_SHIFT) 659af86e597SLaura Abbott != (__fix_to_virt(FIX_BTMAP_END) >> PMD_SHIFT)); 660af86e597SLaura Abbott 661af86e597SLaura Abbott if ((pmd != fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN))) 662af86e597SLaura Abbott || pmd != fixmap_pmd(fix_to_virt(FIX_BTMAP_END))) { 663af86e597SLaura Abbott WARN_ON(1); 664af86e597SLaura Abbott pr_warn("pmd %p != %p, %p\n", 665af86e597SLaura Abbott pmd, fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN)), 666af86e597SLaura Abbott fixmap_pmd(fix_to_virt(FIX_BTMAP_END))); 667af86e597SLaura Abbott pr_warn("fix_to_virt(FIX_BTMAP_BEGIN): %08lx\n", 668af86e597SLaura Abbott fix_to_virt(FIX_BTMAP_BEGIN)); 669af86e597SLaura Abbott pr_warn("fix_to_virt(FIX_BTMAP_END): %08lx\n", 670af86e597SLaura Abbott fix_to_virt(FIX_BTMAP_END)); 671af86e597SLaura Abbott 672af86e597SLaura Abbott pr_warn("FIX_BTMAP_END: %d\n", FIX_BTMAP_END); 673af86e597SLaura Abbott pr_warn("FIX_BTMAP_BEGIN: %d\n", FIX_BTMAP_BEGIN); 674af86e597SLaura Abbott } 675af86e597SLaura Abbott } 676af86e597SLaura Abbott 677af86e597SLaura Abbott void __set_fixmap(enum fixed_addresses idx, 678af86e597SLaura Abbott phys_addr_t phys, pgprot_t flags) 679af86e597SLaura Abbott { 680af86e597SLaura Abbott unsigned long addr = __fix_to_virt(idx); 681af86e597SLaura Abbott pte_t *pte; 682af86e597SLaura Abbott 683b63dbef9SMark Rutland BUG_ON(idx <= FIX_HOLE || idx >= __end_of_fixed_addresses); 684af86e597SLaura Abbott 685af86e597SLaura Abbott pte = fixmap_pte(addr); 686af86e597SLaura Abbott 687af86e597SLaura Abbott if (pgprot_val(flags)) { 688af86e597SLaura Abbott set_pte(pte, pfn_pte(phys >> PAGE_SHIFT, flags)); 689af86e597SLaura Abbott } else { 690af86e597SLaura Abbott pte_clear(&init_mm, addr, pte); 691af86e597SLaura Abbott flush_tlb_kernel_range(addr, addr+PAGE_SIZE); 692af86e597SLaura Abbott } 693af86e597SLaura Abbott } 69461bd93ceSArd Biesheuvel 69561bd93ceSArd Biesheuvel void *__init fixmap_remap_fdt(phys_addr_t dt_phys) 69661bd93ceSArd Biesheuvel { 69761bd93ceSArd Biesheuvel const u64 dt_virt_base = __fix_to_virt(FIX_FDT); 698fb226c3dSArd Biesheuvel pgprot_t prot = PAGE_KERNEL_RO; 699b433dce0SSuzuki K. Poulose int size, offset; 70061bd93ceSArd Biesheuvel void *dt_virt; 70161bd93ceSArd Biesheuvel 70261bd93ceSArd Biesheuvel /* 70361bd93ceSArd Biesheuvel * Check whether the physical FDT address is set and meets the minimum 70461bd93ceSArd Biesheuvel * alignment requirement. Since we are relying on MIN_FDT_ALIGN to be 70561bd93ceSArd Biesheuvel * at least 8 bytes so that we can always access the size field of the 70661bd93ceSArd Biesheuvel * FDT header after mapping the first chunk, double check here if that 70761bd93ceSArd Biesheuvel * is indeed the case. 70861bd93ceSArd Biesheuvel */ 70961bd93ceSArd Biesheuvel BUILD_BUG_ON(MIN_FDT_ALIGN < 8); 71061bd93ceSArd Biesheuvel if (!dt_phys || dt_phys % MIN_FDT_ALIGN) 71161bd93ceSArd Biesheuvel return NULL; 71261bd93ceSArd Biesheuvel 71361bd93ceSArd Biesheuvel /* 71461bd93ceSArd Biesheuvel * Make sure that the FDT region can be mapped without the need to 71561bd93ceSArd Biesheuvel * allocate additional translation table pages, so that it is safe 716132233a7SLaura Abbott * to call create_mapping_noalloc() this early. 71761bd93ceSArd Biesheuvel * 71861bd93ceSArd Biesheuvel * On 64k pages, the FDT will be mapped using PTEs, so we need to 71961bd93ceSArd Biesheuvel * be in the same PMD as the rest of the fixmap. 72061bd93ceSArd Biesheuvel * On 4k pages, we'll use section mappings for the FDT so we only 72161bd93ceSArd Biesheuvel * have to be in the same PUD. 72261bd93ceSArd Biesheuvel */ 72361bd93ceSArd Biesheuvel BUILD_BUG_ON(dt_virt_base % SZ_2M); 72461bd93ceSArd Biesheuvel 725b433dce0SSuzuki K. Poulose BUILD_BUG_ON(__fix_to_virt(FIX_FDT_END) >> SWAPPER_TABLE_SHIFT != 726b433dce0SSuzuki K. Poulose __fix_to_virt(FIX_BTMAP_BEGIN) >> SWAPPER_TABLE_SHIFT); 72761bd93ceSArd Biesheuvel 728b433dce0SSuzuki K. Poulose offset = dt_phys % SWAPPER_BLOCK_SIZE; 72961bd93ceSArd Biesheuvel dt_virt = (void *)dt_virt_base + offset; 73061bd93ceSArd Biesheuvel 73161bd93ceSArd Biesheuvel /* map the first chunk so we can read the size from the header */ 732132233a7SLaura Abbott create_mapping_noalloc(round_down(dt_phys, SWAPPER_BLOCK_SIZE), 733132233a7SLaura Abbott dt_virt_base, SWAPPER_BLOCK_SIZE, prot); 73461bd93ceSArd Biesheuvel 73561bd93ceSArd Biesheuvel if (fdt_check_header(dt_virt) != 0) 73661bd93ceSArd Biesheuvel return NULL; 73761bd93ceSArd Biesheuvel 73861bd93ceSArd Biesheuvel size = fdt_totalsize(dt_virt); 73961bd93ceSArd Biesheuvel if (size > MAX_FDT_SIZE) 74061bd93ceSArd Biesheuvel return NULL; 74161bd93ceSArd Biesheuvel 742b433dce0SSuzuki K. Poulose if (offset + size > SWAPPER_BLOCK_SIZE) 743132233a7SLaura Abbott create_mapping_noalloc(round_down(dt_phys, SWAPPER_BLOCK_SIZE), dt_virt_base, 744b433dce0SSuzuki K. Poulose round_up(offset + size, SWAPPER_BLOCK_SIZE), prot); 74561bd93ceSArd Biesheuvel 74661bd93ceSArd Biesheuvel memblock_reserve(dt_phys, size); 74761bd93ceSArd Biesheuvel 74861bd93ceSArd Biesheuvel return dt_virt; 74961bd93ceSArd Biesheuvel } 750*324420bfSArd Biesheuvel 751*324420bfSArd Biesheuvel int __init arch_ioremap_pud_supported(void) 752*324420bfSArd Biesheuvel { 753*324420bfSArd Biesheuvel /* only 4k granule supports level 1 block mappings */ 754*324420bfSArd Biesheuvel return IS_ENABLED(CONFIG_ARM64_4K_PAGES); 755*324420bfSArd Biesheuvel } 756*324420bfSArd Biesheuvel 757*324420bfSArd Biesheuvel int __init arch_ioremap_pmd_supported(void) 758*324420bfSArd Biesheuvel { 759*324420bfSArd Biesheuvel return 1; 760*324420bfSArd Biesheuvel } 761*324420bfSArd Biesheuvel 762*324420bfSArd Biesheuvel int pud_set_huge(pud_t *pud, phys_addr_t phys, pgprot_t prot) 763*324420bfSArd Biesheuvel { 764*324420bfSArd Biesheuvel BUG_ON(phys & ~PUD_MASK); 765*324420bfSArd Biesheuvel set_pud(pud, __pud(phys | PUD_TYPE_SECT | pgprot_val(mk_sect_prot(prot)))); 766*324420bfSArd Biesheuvel return 1; 767*324420bfSArd Biesheuvel } 768*324420bfSArd Biesheuvel 769*324420bfSArd Biesheuvel int pmd_set_huge(pmd_t *pmd, phys_addr_t phys, pgprot_t prot) 770*324420bfSArd Biesheuvel { 771*324420bfSArd Biesheuvel BUG_ON(phys & ~PMD_MASK); 772*324420bfSArd Biesheuvel set_pmd(pmd, __pmd(phys | PMD_TYPE_SECT | pgprot_val(mk_sect_prot(prot)))); 773*324420bfSArd Biesheuvel return 1; 774*324420bfSArd Biesheuvel } 775*324420bfSArd Biesheuvel 776*324420bfSArd Biesheuvel int pud_clear_huge(pud_t *pud) 777*324420bfSArd Biesheuvel { 778*324420bfSArd Biesheuvel if (!pud_sect(*pud)) 779*324420bfSArd Biesheuvel return 0; 780*324420bfSArd Biesheuvel pud_clear(pud); 781*324420bfSArd Biesheuvel return 1; 782*324420bfSArd Biesheuvel } 783*324420bfSArd Biesheuvel 784*324420bfSArd Biesheuvel int pmd_clear_huge(pmd_t *pmd) 785*324420bfSArd Biesheuvel { 786*324420bfSArd Biesheuvel if (!pmd_sect(*pmd)) 787*324420bfSArd Biesheuvel return 0; 788*324420bfSArd Biesheuvel pmd_clear(pmd); 789*324420bfSArd Biesheuvel return 1; 790*324420bfSArd Biesheuvel } 791