1c1cc1552SCatalin Marinas /* 2c1cc1552SCatalin Marinas * Based on arch/arm/mm/mmu.c 3c1cc1552SCatalin Marinas * 4c1cc1552SCatalin Marinas * Copyright (C) 1995-2005 Russell King 5c1cc1552SCatalin Marinas * Copyright (C) 2012 ARM Ltd. 6c1cc1552SCatalin Marinas * 7c1cc1552SCatalin Marinas * This program is free software; you can redistribute it and/or modify 8c1cc1552SCatalin Marinas * it under the terms of the GNU General Public License version 2 as 9c1cc1552SCatalin Marinas * published by the Free Software Foundation. 10c1cc1552SCatalin Marinas * 11c1cc1552SCatalin Marinas * This program is distributed in the hope that it will be useful, 12c1cc1552SCatalin Marinas * but WITHOUT ANY WARRANTY; without even the implied warranty of 13c1cc1552SCatalin Marinas * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14c1cc1552SCatalin Marinas * GNU General Public License for more details. 15c1cc1552SCatalin Marinas * 16c1cc1552SCatalin Marinas * You should have received a copy of the GNU General Public License 17c1cc1552SCatalin Marinas * along with this program. If not, see <http://www.gnu.org/licenses/>. 18c1cc1552SCatalin Marinas */ 19c1cc1552SCatalin Marinas 20c1cc1552SCatalin Marinas #include <linux/export.h> 21c1cc1552SCatalin Marinas #include <linux/kernel.h> 22c1cc1552SCatalin Marinas #include <linux/errno.h> 23c1cc1552SCatalin Marinas #include <linux/init.h> 2461bd93ceSArd Biesheuvel #include <linux/libfdt.h> 25c1cc1552SCatalin Marinas #include <linux/mman.h> 26c1cc1552SCatalin Marinas #include <linux/nodemask.h> 27c1cc1552SCatalin Marinas #include <linux/memblock.h> 28c1cc1552SCatalin Marinas #include <linux/fs.h> 292475ff9dSCatalin Marinas #include <linux/io.h> 3041089357SCatalin Marinas #include <linux/slab.h> 31da141706SLaura Abbott #include <linux/stop_machine.h> 32c1cc1552SCatalin Marinas 33*21ab99c2SMark Rutland #include <asm/barrier.h> 34c1cc1552SCatalin Marinas #include <asm/cputype.h> 35af86e597SLaura Abbott #include <asm/fixmap.h> 36b433dce0SSuzuki K. Poulose #include <asm/kernel-pgtable.h> 37c1cc1552SCatalin Marinas #include <asm/sections.h> 38c1cc1552SCatalin Marinas #include <asm/setup.h> 39c1cc1552SCatalin Marinas #include <asm/sizes.h> 40c1cc1552SCatalin Marinas #include <asm/tlb.h> 41c79b954bSJungseok Lee #include <asm/memblock.h> 42c1cc1552SCatalin Marinas #include <asm/mmu_context.h> 43c1cc1552SCatalin Marinas 44c1cc1552SCatalin Marinas #include "mm.h" 45c1cc1552SCatalin Marinas 46dd006da2SArd Biesheuvel u64 idmap_t0sz = TCR_T0SZ(VA_BITS); 47dd006da2SArd Biesheuvel 48c1cc1552SCatalin Marinas /* 49c1cc1552SCatalin Marinas * Empty_zero_page is a special page that is used for zero-initialized data 50c1cc1552SCatalin Marinas * and COW. 51c1cc1552SCatalin Marinas */ 52c1cc1552SCatalin Marinas struct page *empty_zero_page; 53c1cc1552SCatalin Marinas EXPORT_SYMBOL(empty_zero_page); 54c1cc1552SCatalin Marinas 55c1cc1552SCatalin Marinas pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, 56c1cc1552SCatalin Marinas unsigned long size, pgprot_t vma_prot) 57c1cc1552SCatalin Marinas { 58c1cc1552SCatalin Marinas if (!pfn_valid(pfn)) 59c1cc1552SCatalin Marinas return pgprot_noncached(vma_prot); 60c1cc1552SCatalin Marinas else if (file->f_flags & O_SYNC) 61c1cc1552SCatalin Marinas return pgprot_writecombine(vma_prot); 62c1cc1552SCatalin Marinas return vma_prot; 63c1cc1552SCatalin Marinas } 64c1cc1552SCatalin Marinas EXPORT_SYMBOL(phys_mem_access_prot); 65c1cc1552SCatalin Marinas 66*21ab99c2SMark Rutland static void __init *early_pgtable_alloc(void) 67c1cc1552SCatalin Marinas { 687142392dSSuzuki K. Poulose phys_addr_t phys; 697142392dSSuzuki K. Poulose void *ptr; 707142392dSSuzuki K. Poulose 71*21ab99c2SMark Rutland phys = memblock_alloc(PAGE_SIZE, PAGE_SIZE); 727142392dSSuzuki K. Poulose BUG_ON(!phys); 737142392dSSuzuki K. Poulose ptr = __va(phys); 74*21ab99c2SMark Rutland memset(ptr, 0, PAGE_SIZE); 75*21ab99c2SMark Rutland 76*21ab99c2SMark Rutland /* Ensure the zeroed page is visible to the page table walker */ 77*21ab99c2SMark Rutland dsb(ishst); 78c1cc1552SCatalin Marinas return ptr; 79c1cc1552SCatalin Marinas } 80c1cc1552SCatalin Marinas 81da141706SLaura Abbott /* 82da141706SLaura Abbott * remap a PMD into pages 83da141706SLaura Abbott */ 84da141706SLaura Abbott static void split_pmd(pmd_t *pmd, pte_t *pte) 85da141706SLaura Abbott { 86da141706SLaura Abbott unsigned long pfn = pmd_pfn(*pmd); 87da141706SLaura Abbott int i = 0; 88da141706SLaura Abbott 89da141706SLaura Abbott do { 90da141706SLaura Abbott /* 91da141706SLaura Abbott * Need to have the least restrictive permissions available 92667c2759SCatalin Marinas * permissions will be fixed up later 93da141706SLaura Abbott */ 94667c2759SCatalin Marinas set_pte(pte, pfn_pte(pfn, PAGE_KERNEL_EXEC)); 95da141706SLaura Abbott pfn++; 96da141706SLaura Abbott } while (pte++, i++, i < PTRS_PER_PTE); 97da141706SLaura Abbott } 98da141706SLaura Abbott 99da141706SLaura Abbott static void alloc_init_pte(pmd_t *pmd, unsigned long addr, 100667c2759SCatalin Marinas unsigned long end, unsigned long pfn, 101da141706SLaura Abbott pgprot_t prot, 102*21ab99c2SMark Rutland void *(*pgtable_alloc)(void)) 103c1cc1552SCatalin Marinas { 104c1cc1552SCatalin Marinas pte_t *pte; 105c1cc1552SCatalin Marinas 106a1c76574SMark Rutland if (pmd_none(*pmd) || pmd_sect(*pmd)) { 107*21ab99c2SMark Rutland pte = pgtable_alloc(); 108da141706SLaura Abbott if (pmd_sect(*pmd)) 109da141706SLaura Abbott split_pmd(pmd, pte); 110c1cc1552SCatalin Marinas __pmd_populate(pmd, __pa(pte), PMD_TYPE_TABLE); 111da141706SLaura Abbott flush_tlb_all(); 112c1cc1552SCatalin Marinas } 113a1c76574SMark Rutland BUG_ON(pmd_bad(*pmd)); 114c1cc1552SCatalin Marinas 115c1cc1552SCatalin Marinas pte = pte_offset_kernel(pmd, addr); 116c1cc1552SCatalin Marinas do { 117667c2759SCatalin Marinas set_pte(pte, pfn_pte(pfn, prot)); 118667c2759SCatalin Marinas pfn++; 119667c2759SCatalin Marinas } while (pte++, addr += PAGE_SIZE, addr != end); 120c1cc1552SCatalin Marinas } 121c1cc1552SCatalin Marinas 1229a17a213SJisheng Zhang static void split_pud(pud_t *old_pud, pmd_t *pmd) 123da141706SLaura Abbott { 124da141706SLaura Abbott unsigned long addr = pud_pfn(*old_pud) << PAGE_SHIFT; 125da141706SLaura Abbott pgprot_t prot = __pgprot(pud_val(*old_pud) ^ addr); 126da141706SLaura Abbott int i = 0; 127da141706SLaura Abbott 128da141706SLaura Abbott do { 1291e43ba9cSArd Biesheuvel set_pmd(pmd, __pmd(addr | pgprot_val(prot))); 130da141706SLaura Abbott addr += PMD_SIZE; 131da141706SLaura Abbott } while (pmd++, i++, i < PTRS_PER_PMD); 132da141706SLaura Abbott } 133da141706SLaura Abbott 134da141706SLaura Abbott static void alloc_init_pmd(struct mm_struct *mm, pud_t *pud, 135e1e1fddaSArd Biesheuvel unsigned long addr, unsigned long end, 136da141706SLaura Abbott phys_addr_t phys, pgprot_t prot, 137*21ab99c2SMark Rutland void *(*pgtable_alloc)(void)) 138c1cc1552SCatalin Marinas { 139c1cc1552SCatalin Marinas pmd_t *pmd; 140c1cc1552SCatalin Marinas unsigned long next; 141c1cc1552SCatalin Marinas 142c1cc1552SCatalin Marinas /* 143c1cc1552SCatalin Marinas * Check for initial section mappings in the pgd/pud and remove them. 144c1cc1552SCatalin Marinas */ 145a1c76574SMark Rutland if (pud_none(*pud) || pud_sect(*pud)) { 146*21ab99c2SMark Rutland pmd = pgtable_alloc(); 147da141706SLaura Abbott if (pud_sect(*pud)) { 148da141706SLaura Abbott /* 149da141706SLaura Abbott * need to have the 1G of mappings continue to be 150da141706SLaura Abbott * present 151da141706SLaura Abbott */ 152da141706SLaura Abbott split_pud(pud, pmd); 153da141706SLaura Abbott } 154e1e1fddaSArd Biesheuvel pud_populate(mm, pud, pmd); 155da141706SLaura Abbott flush_tlb_all(); 156c1cc1552SCatalin Marinas } 157a1c76574SMark Rutland BUG_ON(pud_bad(*pud)); 158c1cc1552SCatalin Marinas 159c1cc1552SCatalin Marinas pmd = pmd_offset(pud, addr); 160c1cc1552SCatalin Marinas do { 161c1cc1552SCatalin Marinas next = pmd_addr_end(addr, end); 162c1cc1552SCatalin Marinas /* try section mapping first */ 163a55f9929SCatalin Marinas if (((addr | next | phys) & ~SECTION_MASK) == 0) { 164a55f9929SCatalin Marinas pmd_t old_pmd =*pmd; 1658ce837ceSArd Biesheuvel set_pmd(pmd, __pmd(phys | 1668ce837ceSArd Biesheuvel pgprot_val(mk_sect_prot(prot)))); 167a55f9929SCatalin Marinas /* 168a55f9929SCatalin Marinas * Check for previous table entries created during 169a55f9929SCatalin Marinas * boot (__create_page_tables) and flush them. 170a55f9929SCatalin Marinas */ 171523d6e9fSzhichang.yuan if (!pmd_none(old_pmd)) { 172a55f9929SCatalin Marinas flush_tlb_all(); 173523d6e9fSzhichang.yuan if (pmd_table(old_pmd)) { 174523d6e9fSzhichang.yuan phys_addr_t table = __pa(pte_offset_map(&old_pmd, 0)); 17541089357SCatalin Marinas if (!WARN_ON_ONCE(slab_is_available())) 176523d6e9fSzhichang.yuan memblock_free(table, PAGE_SIZE); 177523d6e9fSzhichang.yuan } 178523d6e9fSzhichang.yuan } 179a55f9929SCatalin Marinas } else { 180667c2759SCatalin Marinas alloc_init_pte(pmd, addr, next, __phys_to_pfn(phys), 181*21ab99c2SMark Rutland prot, pgtable_alloc); 182a55f9929SCatalin Marinas } 183c1cc1552SCatalin Marinas phys += next - addr; 184c1cc1552SCatalin Marinas } while (pmd++, addr = next, addr != end); 185c1cc1552SCatalin Marinas } 186c1cc1552SCatalin Marinas 187da141706SLaura Abbott static inline bool use_1G_block(unsigned long addr, unsigned long next, 188da141706SLaura Abbott unsigned long phys) 189da141706SLaura Abbott { 190da141706SLaura Abbott if (PAGE_SHIFT != 12) 191da141706SLaura Abbott return false; 192da141706SLaura Abbott 193da141706SLaura Abbott if (((addr | next | phys) & ~PUD_MASK) != 0) 194da141706SLaura Abbott return false; 195da141706SLaura Abbott 196da141706SLaura Abbott return true; 197da141706SLaura Abbott } 198da141706SLaura Abbott 199da141706SLaura Abbott static void alloc_init_pud(struct mm_struct *mm, pgd_t *pgd, 200e1e1fddaSArd Biesheuvel unsigned long addr, unsigned long end, 201da141706SLaura Abbott phys_addr_t phys, pgprot_t prot, 202*21ab99c2SMark Rutland void *(*pgtable_alloc)(void)) 203c1cc1552SCatalin Marinas { 204c79b954bSJungseok Lee pud_t *pud; 205c1cc1552SCatalin Marinas unsigned long next; 206c1cc1552SCatalin Marinas 207c79b954bSJungseok Lee if (pgd_none(*pgd)) { 208*21ab99c2SMark Rutland pud = pgtable_alloc(); 209e1e1fddaSArd Biesheuvel pgd_populate(mm, pgd, pud); 210c79b954bSJungseok Lee } 211c79b954bSJungseok Lee BUG_ON(pgd_bad(*pgd)); 212c79b954bSJungseok Lee 213c79b954bSJungseok Lee pud = pud_offset(pgd, addr); 214c1cc1552SCatalin Marinas do { 215c1cc1552SCatalin Marinas next = pud_addr_end(addr, end); 216206a2a73SSteve Capper 217206a2a73SSteve Capper /* 218206a2a73SSteve Capper * For 4K granule only, attempt to put down a 1GB block 219206a2a73SSteve Capper */ 220da141706SLaura Abbott if (use_1G_block(addr, next, phys)) { 221206a2a73SSteve Capper pud_t old_pud = *pud; 2228ce837ceSArd Biesheuvel set_pud(pud, __pud(phys | 2238ce837ceSArd Biesheuvel pgprot_val(mk_sect_prot(prot)))); 224206a2a73SSteve Capper 225206a2a73SSteve Capper /* 226206a2a73SSteve Capper * If we have an old value for a pud, it will 227206a2a73SSteve Capper * be pointing to a pmd table that we no longer 228206a2a73SSteve Capper * need (from swapper_pg_dir). 229206a2a73SSteve Capper * 230206a2a73SSteve Capper * Look up the old pmd table and free it. 231206a2a73SSteve Capper */ 232206a2a73SSteve Capper if (!pud_none(old_pud)) { 233206a2a73SSteve Capper flush_tlb_all(); 234523d6e9fSzhichang.yuan if (pud_table(old_pud)) { 235523d6e9fSzhichang.yuan phys_addr_t table = __pa(pmd_offset(&old_pud, 0)); 23641089357SCatalin Marinas if (!WARN_ON_ONCE(slab_is_available())) 237523d6e9fSzhichang.yuan memblock_free(table, PAGE_SIZE); 238523d6e9fSzhichang.yuan } 239206a2a73SSteve Capper } 240206a2a73SSteve Capper } else { 241*21ab99c2SMark Rutland alloc_init_pmd(mm, pud, addr, next, phys, prot, 242*21ab99c2SMark Rutland pgtable_alloc); 243206a2a73SSteve Capper } 244c1cc1552SCatalin Marinas phys += next - addr; 245c1cc1552SCatalin Marinas } while (pud++, addr = next, addr != end); 246c1cc1552SCatalin Marinas } 247c1cc1552SCatalin Marinas 248c1cc1552SCatalin Marinas /* 249c1cc1552SCatalin Marinas * Create the page directory entries and any necessary page tables for the 250c1cc1552SCatalin Marinas * mapping specified by 'md'. 251c1cc1552SCatalin Marinas */ 252da141706SLaura Abbott static void __create_mapping(struct mm_struct *mm, pgd_t *pgd, 253e1e1fddaSArd Biesheuvel phys_addr_t phys, unsigned long virt, 254da141706SLaura Abbott phys_addr_t size, pgprot_t prot, 255*21ab99c2SMark Rutland void *(*pgtable_alloc)(void)) 256c1cc1552SCatalin Marinas { 257c1cc1552SCatalin Marinas unsigned long addr, length, end, next; 258c1cc1552SCatalin Marinas 259cc5d2b3bSMark Rutland /* 260cc5d2b3bSMark Rutland * If the virtual and physical address don't have the same offset 261cc5d2b3bSMark Rutland * within a page, we cannot map the region as the caller expects. 262cc5d2b3bSMark Rutland */ 263cc5d2b3bSMark Rutland if (WARN_ON((phys ^ virt) & ~PAGE_MASK)) 264cc5d2b3bSMark Rutland return; 265cc5d2b3bSMark Rutland 2669c4e08a3SMark Rutland phys &= PAGE_MASK; 267c1cc1552SCatalin Marinas addr = virt & PAGE_MASK; 268c1cc1552SCatalin Marinas length = PAGE_ALIGN(size + (virt & ~PAGE_MASK)); 269c1cc1552SCatalin Marinas 270c1cc1552SCatalin Marinas end = addr + length; 271c1cc1552SCatalin Marinas do { 272c1cc1552SCatalin Marinas next = pgd_addr_end(addr, end); 273*21ab99c2SMark Rutland alloc_init_pud(mm, pgd, addr, next, phys, prot, pgtable_alloc); 274c1cc1552SCatalin Marinas phys += next - addr; 275c1cc1552SCatalin Marinas } while (pgd++, addr = next, addr != end); 276c1cc1552SCatalin Marinas } 277c1cc1552SCatalin Marinas 278*21ab99c2SMark Rutland static void *late_pgtable_alloc(void) 279da141706SLaura Abbott { 280*21ab99c2SMark Rutland void *ptr = (void *)__get_free_page(PGALLOC_GFP); 281da141706SLaura Abbott BUG_ON(!ptr); 282*21ab99c2SMark Rutland 283*21ab99c2SMark Rutland /* Ensure the zeroed page is visible to the page table walker */ 284*21ab99c2SMark Rutland dsb(ishst); 285da141706SLaura Abbott return ptr; 286da141706SLaura Abbott } 287da141706SLaura Abbott 288c53e0baaSMark Rutland static void __init create_mapping(phys_addr_t phys, unsigned long virt, 289da141706SLaura Abbott phys_addr_t size, pgprot_t prot) 290d7ecbddfSMark Salter { 291d7ecbddfSMark Salter if (virt < VMALLOC_START) { 292d7ecbddfSMark Salter pr_warn("BUG: not creating mapping for %pa at 0x%016lx - outside kernel range\n", 293d7ecbddfSMark Salter &phys, virt); 294d7ecbddfSMark Salter return; 295d7ecbddfSMark Salter } 296e2c30ee3SMark Rutland __create_mapping(&init_mm, pgd_offset_k(virt), phys, virt, 297*21ab99c2SMark Rutland size, prot, early_pgtable_alloc); 298d7ecbddfSMark Salter } 299d7ecbddfSMark Salter 3008ce837ceSArd Biesheuvel void __init create_pgd_mapping(struct mm_struct *mm, phys_addr_t phys, 3018ce837ceSArd Biesheuvel unsigned long virt, phys_addr_t size, 3028ce837ceSArd Biesheuvel pgprot_t prot) 3038ce837ceSArd Biesheuvel { 304da141706SLaura Abbott __create_mapping(mm, pgd_offset(mm, virt), phys, virt, size, prot, 305*21ab99c2SMark Rutland late_pgtable_alloc); 306d7ecbddfSMark Salter } 307d7ecbddfSMark Salter 308da141706SLaura Abbott static void create_mapping_late(phys_addr_t phys, unsigned long virt, 309da141706SLaura Abbott phys_addr_t size, pgprot_t prot) 310da141706SLaura Abbott { 311da141706SLaura Abbott if (virt < VMALLOC_START) { 312da141706SLaura Abbott pr_warn("BUG: not creating mapping for %pa at 0x%016lx - outside kernel range\n", 313da141706SLaura Abbott &phys, virt); 314da141706SLaura Abbott return; 315da141706SLaura Abbott } 316da141706SLaura Abbott 317e2c30ee3SMark Rutland return __create_mapping(&init_mm, pgd_offset_k(virt), 318*21ab99c2SMark Rutland phys, virt, size, prot, late_pgtable_alloc); 319da141706SLaura Abbott } 320da141706SLaura Abbott 321da141706SLaura Abbott #ifdef CONFIG_DEBUG_RODATA 322da141706SLaura Abbott static void __init __map_memblock(phys_addr_t start, phys_addr_t end) 323da141706SLaura Abbott { 324da141706SLaura Abbott /* 325da141706SLaura Abbott * Set up the executable regions using the existing section mappings 326da141706SLaura Abbott * for now. This will get more fine grained later once all memory 327da141706SLaura Abbott * is mapped 328da141706SLaura Abbott */ 3294fee9f36SArd Biesheuvel unsigned long kernel_x_start = round_down(__pa(_stext), SWAPPER_BLOCK_SIZE); 3304fee9f36SArd Biesheuvel unsigned long kernel_x_end = round_up(__pa(__init_end), SWAPPER_BLOCK_SIZE); 331da141706SLaura Abbott 332da141706SLaura Abbott if (end < kernel_x_start) { 333da141706SLaura Abbott create_mapping(start, __phys_to_virt(start), 334da141706SLaura Abbott end - start, PAGE_KERNEL); 335da141706SLaura Abbott } else if (start >= kernel_x_end) { 336da141706SLaura Abbott create_mapping(start, __phys_to_virt(start), 337da141706SLaura Abbott end - start, PAGE_KERNEL); 338da141706SLaura Abbott } else { 339da141706SLaura Abbott if (start < kernel_x_start) 340da141706SLaura Abbott create_mapping(start, __phys_to_virt(start), 341da141706SLaura Abbott kernel_x_start - start, 342da141706SLaura Abbott PAGE_KERNEL); 343da141706SLaura Abbott create_mapping(kernel_x_start, 344da141706SLaura Abbott __phys_to_virt(kernel_x_start), 345da141706SLaura Abbott kernel_x_end - kernel_x_start, 346da141706SLaura Abbott PAGE_KERNEL_EXEC); 347da141706SLaura Abbott if (kernel_x_end < end) 348da141706SLaura Abbott create_mapping(kernel_x_end, 349da141706SLaura Abbott __phys_to_virt(kernel_x_end), 350da141706SLaura Abbott end - kernel_x_end, 351da141706SLaura Abbott PAGE_KERNEL); 352da141706SLaura Abbott } 353da141706SLaura Abbott 354da141706SLaura Abbott } 355da141706SLaura Abbott #else 356da141706SLaura Abbott static void __init __map_memblock(phys_addr_t start, phys_addr_t end) 357da141706SLaura Abbott { 358da141706SLaura Abbott create_mapping(start, __phys_to_virt(start), end - start, 359da141706SLaura Abbott PAGE_KERNEL_EXEC); 360da141706SLaura Abbott } 361da141706SLaura Abbott #endif 362da141706SLaura Abbott 363c1cc1552SCatalin Marinas static void __init map_mem(void) 364c1cc1552SCatalin Marinas { 365c1cc1552SCatalin Marinas struct memblock_region *reg; 366e25208f7SCatalin Marinas phys_addr_t limit; 367c1cc1552SCatalin Marinas 368f6bc87c3SSteve Capper /* 369f6bc87c3SSteve Capper * Temporarily limit the memblock range. We need to do this as 370f6bc87c3SSteve Capper * create_mapping requires puds, pmds and ptes to be allocated from 371f6bc87c3SSteve Capper * memory addressable from the initial direct kernel mapping. 372f6bc87c3SSteve Capper * 3733dec0fe4SCatalin Marinas * The initial direct kernel mapping, located at swapper_pg_dir, gives 374b433dce0SSuzuki K. Poulose * us PUD_SIZE (with SECTION maps) or PMD_SIZE (without SECTION maps, 375b433dce0SSuzuki K. Poulose * memory starting from PHYS_OFFSET (which must be aligned to 2MB as 376b433dce0SSuzuki K. Poulose * per Documentation/arm64/booting.txt). 377f6bc87c3SSteve Capper */ 378b433dce0SSuzuki K. Poulose limit = PHYS_OFFSET + SWAPPER_INIT_MAP_SIZE; 379e25208f7SCatalin Marinas memblock_set_current_limit(limit); 380f6bc87c3SSteve Capper 381c1cc1552SCatalin Marinas /* map all the memory banks */ 382c1cc1552SCatalin Marinas for_each_memblock(memory, reg) { 383c1cc1552SCatalin Marinas phys_addr_t start = reg->base; 384c1cc1552SCatalin Marinas phys_addr_t end = start + reg->size; 385c1cc1552SCatalin Marinas 386c1cc1552SCatalin Marinas if (start >= end) 387c1cc1552SCatalin Marinas break; 38868709f45SArd Biesheuvel if (memblock_is_nomap(reg)) 38968709f45SArd Biesheuvel continue; 390c1cc1552SCatalin Marinas 391b433dce0SSuzuki K. Poulose if (ARM64_SWAPPER_USES_SECTION_MAPS) { 392e25208f7SCatalin Marinas /* 393e25208f7SCatalin Marinas * For the first memory bank align the start address and 394e25208f7SCatalin Marinas * current memblock limit to prevent create_mapping() from 395b433dce0SSuzuki K. Poulose * allocating pte page tables from unmapped memory. With 396b433dce0SSuzuki K. Poulose * the section maps, if the first block doesn't end on section 397b433dce0SSuzuki K. Poulose * size boundary, create_mapping() will try to allocate a pte 398b433dce0SSuzuki K. Poulose * page, which may be returned from an unmapped area. 399b433dce0SSuzuki K. Poulose * When section maps are not used, the pte page table for the 400b433dce0SSuzuki K. Poulose * current limit is already present in swapper_pg_dir. 401e25208f7SCatalin Marinas */ 402e25208f7SCatalin Marinas if (start < limit) 403b433dce0SSuzuki K. Poulose start = ALIGN(start, SECTION_SIZE); 404e25208f7SCatalin Marinas if (end < limit) { 405b433dce0SSuzuki K. Poulose limit = end & SECTION_MASK; 406e25208f7SCatalin Marinas memblock_set_current_limit(limit); 407e25208f7SCatalin Marinas } 408b433dce0SSuzuki K. Poulose } 409da141706SLaura Abbott __map_memblock(start, end); 410c1cc1552SCatalin Marinas } 411f6bc87c3SSteve Capper 412f6bc87c3SSteve Capper /* Limit no longer required. */ 413f6bc87c3SSteve Capper memblock_set_current_limit(MEMBLOCK_ALLOC_ANYWHERE); 414c1cc1552SCatalin Marinas } 415c1cc1552SCatalin Marinas 4169a17a213SJisheng Zhang static void __init fixup_executable(void) 417da141706SLaura Abbott { 418da141706SLaura Abbott #ifdef CONFIG_DEBUG_RODATA 419da141706SLaura Abbott /* now that we are actually fully mapped, make the start/end more fine grained */ 4204fee9f36SArd Biesheuvel if (!IS_ALIGNED((unsigned long)_stext, SWAPPER_BLOCK_SIZE)) { 421da141706SLaura Abbott unsigned long aligned_start = round_down(__pa(_stext), 4224fee9f36SArd Biesheuvel SWAPPER_BLOCK_SIZE); 423da141706SLaura Abbott 424da141706SLaura Abbott create_mapping(aligned_start, __phys_to_virt(aligned_start), 425da141706SLaura Abbott __pa(_stext) - aligned_start, 426da141706SLaura Abbott PAGE_KERNEL); 427da141706SLaura Abbott } 428da141706SLaura Abbott 4294fee9f36SArd Biesheuvel if (!IS_ALIGNED((unsigned long)__init_end, SWAPPER_BLOCK_SIZE)) { 430da141706SLaura Abbott unsigned long aligned_end = round_up(__pa(__init_end), 4314fee9f36SArd Biesheuvel SWAPPER_BLOCK_SIZE); 432da141706SLaura Abbott create_mapping(__pa(__init_end), (unsigned long)__init_end, 433da141706SLaura Abbott aligned_end - __pa(__init_end), 434da141706SLaura Abbott PAGE_KERNEL); 435da141706SLaura Abbott } 436da141706SLaura Abbott #endif 437da141706SLaura Abbott } 438da141706SLaura Abbott 439da141706SLaura Abbott #ifdef CONFIG_DEBUG_RODATA 440da141706SLaura Abbott void mark_rodata_ro(void) 441da141706SLaura Abbott { 442da141706SLaura Abbott create_mapping_late(__pa(_stext), (unsigned long)_stext, 443da141706SLaura Abbott (unsigned long)_etext - (unsigned long)_stext, 4440b2aa5b8SLaura Abbott PAGE_KERNEL_ROX); 445da141706SLaura Abbott 446da141706SLaura Abbott } 447da141706SLaura Abbott #endif 448da141706SLaura Abbott 449da141706SLaura Abbott void fixup_init(void) 450da141706SLaura Abbott { 451da141706SLaura Abbott create_mapping_late(__pa(__init_begin), (unsigned long)__init_begin, 452da141706SLaura Abbott (unsigned long)__init_end - (unsigned long)__init_begin, 453da141706SLaura Abbott PAGE_KERNEL); 454da141706SLaura Abbott } 455da141706SLaura Abbott 456c1cc1552SCatalin Marinas /* 457c1cc1552SCatalin Marinas * paging_init() sets up the page tables, initialises the zone memory 458c1cc1552SCatalin Marinas * maps and sets up the zero page. 459c1cc1552SCatalin Marinas */ 460c1cc1552SCatalin Marinas void __init paging_init(void) 461c1cc1552SCatalin Marinas { 462c1cc1552SCatalin Marinas void *zero_page; 463c1cc1552SCatalin Marinas 464c1cc1552SCatalin Marinas map_mem(); 465da141706SLaura Abbott fixup_executable(); 466c1cc1552SCatalin Marinas 467c1cc1552SCatalin Marinas /* allocate the zero page. */ 468*21ab99c2SMark Rutland zero_page = early_pgtable_alloc(); 469c1cc1552SCatalin Marinas 470c1cc1552SCatalin Marinas bootmem_init(); 471c1cc1552SCatalin Marinas 472c1cc1552SCatalin Marinas empty_zero_page = virt_to_page(zero_page); 473c1cc1552SCatalin Marinas 474c1cc1552SCatalin Marinas /* 475c1cc1552SCatalin Marinas * TTBR0 is only used for the identity mapping at this stage. Make it 476c1cc1552SCatalin Marinas * point to zero page to avoid speculatively fetching new entries. 477c1cc1552SCatalin Marinas */ 478c1cc1552SCatalin Marinas cpu_set_reserved_ttbr0(); 4798e63d388SWill Deacon local_flush_tlb_all(); 480dd006da2SArd Biesheuvel cpu_set_default_tcr_t0sz(); 481c1cc1552SCatalin Marinas } 482c1cc1552SCatalin Marinas 483c1cc1552SCatalin Marinas /* 484c1cc1552SCatalin Marinas * Check whether a kernel address is valid (derived from arch/x86/). 485c1cc1552SCatalin Marinas */ 486c1cc1552SCatalin Marinas int kern_addr_valid(unsigned long addr) 487c1cc1552SCatalin Marinas { 488c1cc1552SCatalin Marinas pgd_t *pgd; 489c1cc1552SCatalin Marinas pud_t *pud; 490c1cc1552SCatalin Marinas pmd_t *pmd; 491c1cc1552SCatalin Marinas pte_t *pte; 492c1cc1552SCatalin Marinas 493c1cc1552SCatalin Marinas if ((((long)addr) >> VA_BITS) != -1UL) 494c1cc1552SCatalin Marinas return 0; 495c1cc1552SCatalin Marinas 496c1cc1552SCatalin Marinas pgd = pgd_offset_k(addr); 497c1cc1552SCatalin Marinas if (pgd_none(*pgd)) 498c1cc1552SCatalin Marinas return 0; 499c1cc1552SCatalin Marinas 500c1cc1552SCatalin Marinas pud = pud_offset(pgd, addr); 501c1cc1552SCatalin Marinas if (pud_none(*pud)) 502c1cc1552SCatalin Marinas return 0; 503c1cc1552SCatalin Marinas 504206a2a73SSteve Capper if (pud_sect(*pud)) 505206a2a73SSteve Capper return pfn_valid(pud_pfn(*pud)); 506206a2a73SSteve Capper 507c1cc1552SCatalin Marinas pmd = pmd_offset(pud, addr); 508c1cc1552SCatalin Marinas if (pmd_none(*pmd)) 509c1cc1552SCatalin Marinas return 0; 510c1cc1552SCatalin Marinas 511da6e4cb6SDave Anderson if (pmd_sect(*pmd)) 512da6e4cb6SDave Anderson return pfn_valid(pmd_pfn(*pmd)); 513da6e4cb6SDave Anderson 514c1cc1552SCatalin Marinas pte = pte_offset_kernel(pmd, addr); 515c1cc1552SCatalin Marinas if (pte_none(*pte)) 516c1cc1552SCatalin Marinas return 0; 517c1cc1552SCatalin Marinas 518c1cc1552SCatalin Marinas return pfn_valid(pte_pfn(*pte)); 519c1cc1552SCatalin Marinas } 520c1cc1552SCatalin Marinas #ifdef CONFIG_SPARSEMEM_VMEMMAP 521b433dce0SSuzuki K. Poulose #if !ARM64_SWAPPER_USES_SECTION_MAPS 5220aad818bSJohannes Weiner int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node) 523c1cc1552SCatalin Marinas { 5240aad818bSJohannes Weiner return vmemmap_populate_basepages(start, end, node); 525c1cc1552SCatalin Marinas } 526b433dce0SSuzuki K. Poulose #else /* !ARM64_SWAPPER_USES_SECTION_MAPS */ 5270aad818bSJohannes Weiner int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node) 528c1cc1552SCatalin Marinas { 5290aad818bSJohannes Weiner unsigned long addr = start; 530c1cc1552SCatalin Marinas unsigned long next; 531c1cc1552SCatalin Marinas pgd_t *pgd; 532c1cc1552SCatalin Marinas pud_t *pud; 533c1cc1552SCatalin Marinas pmd_t *pmd; 534c1cc1552SCatalin Marinas 535c1cc1552SCatalin Marinas do { 536c1cc1552SCatalin Marinas next = pmd_addr_end(addr, end); 537c1cc1552SCatalin Marinas 538c1cc1552SCatalin Marinas pgd = vmemmap_pgd_populate(addr, node); 539c1cc1552SCatalin Marinas if (!pgd) 540c1cc1552SCatalin Marinas return -ENOMEM; 541c1cc1552SCatalin Marinas 542c1cc1552SCatalin Marinas pud = vmemmap_pud_populate(pgd, addr, node); 543c1cc1552SCatalin Marinas if (!pud) 544c1cc1552SCatalin Marinas return -ENOMEM; 545c1cc1552SCatalin Marinas 546c1cc1552SCatalin Marinas pmd = pmd_offset(pud, addr); 547c1cc1552SCatalin Marinas if (pmd_none(*pmd)) { 548c1cc1552SCatalin Marinas void *p = NULL; 549c1cc1552SCatalin Marinas 550c1cc1552SCatalin Marinas p = vmemmap_alloc_block_buf(PMD_SIZE, node); 551c1cc1552SCatalin Marinas if (!p) 552c1cc1552SCatalin Marinas return -ENOMEM; 553c1cc1552SCatalin Marinas 554a501e324SCatalin Marinas set_pmd(pmd, __pmd(__pa(p) | PROT_SECT_NORMAL)); 555c1cc1552SCatalin Marinas } else 556c1cc1552SCatalin Marinas vmemmap_verify((pte_t *)pmd, node, addr, next); 557c1cc1552SCatalin Marinas } while (addr = next, addr != end); 558c1cc1552SCatalin Marinas 559c1cc1552SCatalin Marinas return 0; 560c1cc1552SCatalin Marinas } 561c1cc1552SCatalin Marinas #endif /* CONFIG_ARM64_64K_PAGES */ 5620aad818bSJohannes Weiner void vmemmap_free(unsigned long start, unsigned long end) 5630197518cSTang Chen { 5640197518cSTang Chen } 565c1cc1552SCatalin Marinas #endif /* CONFIG_SPARSEMEM_VMEMMAP */ 566af86e597SLaura Abbott 567af86e597SLaura Abbott static pte_t bm_pte[PTRS_PER_PTE] __page_aligned_bss; 5689f25e6adSKirill A. Shutemov #if CONFIG_PGTABLE_LEVELS > 2 569af86e597SLaura Abbott static pmd_t bm_pmd[PTRS_PER_PMD] __page_aligned_bss; 570af86e597SLaura Abbott #endif 5719f25e6adSKirill A. Shutemov #if CONFIG_PGTABLE_LEVELS > 3 572af86e597SLaura Abbott static pud_t bm_pud[PTRS_PER_PUD] __page_aligned_bss; 573af86e597SLaura Abbott #endif 574af86e597SLaura Abbott 575af86e597SLaura Abbott static inline pud_t * fixmap_pud(unsigned long addr) 576af86e597SLaura Abbott { 577af86e597SLaura Abbott pgd_t *pgd = pgd_offset_k(addr); 578af86e597SLaura Abbott 579af86e597SLaura Abbott BUG_ON(pgd_none(*pgd) || pgd_bad(*pgd)); 580af86e597SLaura Abbott 581af86e597SLaura Abbott return pud_offset(pgd, addr); 582af86e597SLaura Abbott } 583af86e597SLaura Abbott 584af86e597SLaura Abbott static inline pmd_t * fixmap_pmd(unsigned long addr) 585af86e597SLaura Abbott { 586af86e597SLaura Abbott pud_t *pud = fixmap_pud(addr); 587af86e597SLaura Abbott 588af86e597SLaura Abbott BUG_ON(pud_none(*pud) || pud_bad(*pud)); 589af86e597SLaura Abbott 590af86e597SLaura Abbott return pmd_offset(pud, addr); 591af86e597SLaura Abbott } 592af86e597SLaura Abbott 593af86e597SLaura Abbott static inline pte_t * fixmap_pte(unsigned long addr) 594af86e597SLaura Abbott { 595af86e597SLaura Abbott pmd_t *pmd = fixmap_pmd(addr); 596af86e597SLaura Abbott 597af86e597SLaura Abbott BUG_ON(pmd_none(*pmd) || pmd_bad(*pmd)); 598af86e597SLaura Abbott 599af86e597SLaura Abbott return pte_offset_kernel(pmd, addr); 600af86e597SLaura Abbott } 601af86e597SLaura Abbott 602af86e597SLaura Abbott void __init early_fixmap_init(void) 603af86e597SLaura Abbott { 604af86e597SLaura Abbott pgd_t *pgd; 605af86e597SLaura Abbott pud_t *pud; 606af86e597SLaura Abbott pmd_t *pmd; 607af86e597SLaura Abbott unsigned long addr = FIXADDR_START; 608af86e597SLaura Abbott 609af86e597SLaura Abbott pgd = pgd_offset_k(addr); 610af86e597SLaura Abbott pgd_populate(&init_mm, pgd, bm_pud); 611af86e597SLaura Abbott pud = pud_offset(pgd, addr); 612af86e597SLaura Abbott pud_populate(&init_mm, pud, bm_pmd); 613af86e597SLaura Abbott pmd = pmd_offset(pud, addr); 614af86e597SLaura Abbott pmd_populate_kernel(&init_mm, pmd, bm_pte); 615af86e597SLaura Abbott 616af86e597SLaura Abbott /* 617af86e597SLaura Abbott * The boot-ioremap range spans multiple pmds, for which 618af86e597SLaura Abbott * we are not preparted: 619af86e597SLaura Abbott */ 620af86e597SLaura Abbott BUILD_BUG_ON((__fix_to_virt(FIX_BTMAP_BEGIN) >> PMD_SHIFT) 621af86e597SLaura Abbott != (__fix_to_virt(FIX_BTMAP_END) >> PMD_SHIFT)); 622af86e597SLaura Abbott 623af86e597SLaura Abbott if ((pmd != fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN))) 624af86e597SLaura Abbott || pmd != fixmap_pmd(fix_to_virt(FIX_BTMAP_END))) { 625af86e597SLaura Abbott WARN_ON(1); 626af86e597SLaura Abbott pr_warn("pmd %p != %p, %p\n", 627af86e597SLaura Abbott pmd, fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN)), 628af86e597SLaura Abbott fixmap_pmd(fix_to_virt(FIX_BTMAP_END))); 629af86e597SLaura Abbott pr_warn("fix_to_virt(FIX_BTMAP_BEGIN): %08lx\n", 630af86e597SLaura Abbott fix_to_virt(FIX_BTMAP_BEGIN)); 631af86e597SLaura Abbott pr_warn("fix_to_virt(FIX_BTMAP_END): %08lx\n", 632af86e597SLaura Abbott fix_to_virt(FIX_BTMAP_END)); 633af86e597SLaura Abbott 634af86e597SLaura Abbott pr_warn("FIX_BTMAP_END: %d\n", FIX_BTMAP_END); 635af86e597SLaura Abbott pr_warn("FIX_BTMAP_BEGIN: %d\n", FIX_BTMAP_BEGIN); 636af86e597SLaura Abbott } 637af86e597SLaura Abbott } 638af86e597SLaura Abbott 639af86e597SLaura Abbott void __set_fixmap(enum fixed_addresses idx, 640af86e597SLaura Abbott phys_addr_t phys, pgprot_t flags) 641af86e597SLaura Abbott { 642af86e597SLaura Abbott unsigned long addr = __fix_to_virt(idx); 643af86e597SLaura Abbott pte_t *pte; 644af86e597SLaura Abbott 645b63dbef9SMark Rutland BUG_ON(idx <= FIX_HOLE || idx >= __end_of_fixed_addresses); 646af86e597SLaura Abbott 647af86e597SLaura Abbott pte = fixmap_pte(addr); 648af86e597SLaura Abbott 649af86e597SLaura Abbott if (pgprot_val(flags)) { 650af86e597SLaura Abbott set_pte(pte, pfn_pte(phys >> PAGE_SHIFT, flags)); 651af86e597SLaura Abbott } else { 652af86e597SLaura Abbott pte_clear(&init_mm, addr, pte); 653af86e597SLaura Abbott flush_tlb_kernel_range(addr, addr+PAGE_SIZE); 654af86e597SLaura Abbott } 655af86e597SLaura Abbott } 65661bd93ceSArd Biesheuvel 65761bd93ceSArd Biesheuvel void *__init fixmap_remap_fdt(phys_addr_t dt_phys) 65861bd93ceSArd Biesheuvel { 65961bd93ceSArd Biesheuvel const u64 dt_virt_base = __fix_to_virt(FIX_FDT); 660fb226c3dSArd Biesheuvel pgprot_t prot = PAGE_KERNEL_RO; 661b433dce0SSuzuki K. Poulose int size, offset; 66261bd93ceSArd Biesheuvel void *dt_virt; 66361bd93ceSArd Biesheuvel 66461bd93ceSArd Biesheuvel /* 66561bd93ceSArd Biesheuvel * Check whether the physical FDT address is set and meets the minimum 66661bd93ceSArd Biesheuvel * alignment requirement. Since we are relying on MIN_FDT_ALIGN to be 66761bd93ceSArd Biesheuvel * at least 8 bytes so that we can always access the size field of the 66861bd93ceSArd Biesheuvel * FDT header after mapping the first chunk, double check here if that 66961bd93ceSArd Biesheuvel * is indeed the case. 67061bd93ceSArd Biesheuvel */ 67161bd93ceSArd Biesheuvel BUILD_BUG_ON(MIN_FDT_ALIGN < 8); 67261bd93ceSArd Biesheuvel if (!dt_phys || dt_phys % MIN_FDT_ALIGN) 67361bd93ceSArd Biesheuvel return NULL; 67461bd93ceSArd Biesheuvel 67561bd93ceSArd Biesheuvel /* 67661bd93ceSArd Biesheuvel * Make sure that the FDT region can be mapped without the need to 67761bd93ceSArd Biesheuvel * allocate additional translation table pages, so that it is safe 67861bd93ceSArd Biesheuvel * to call create_mapping() this early. 67961bd93ceSArd Biesheuvel * 68061bd93ceSArd Biesheuvel * On 64k pages, the FDT will be mapped using PTEs, so we need to 68161bd93ceSArd Biesheuvel * be in the same PMD as the rest of the fixmap. 68261bd93ceSArd Biesheuvel * On 4k pages, we'll use section mappings for the FDT so we only 68361bd93ceSArd Biesheuvel * have to be in the same PUD. 68461bd93ceSArd Biesheuvel */ 68561bd93ceSArd Biesheuvel BUILD_BUG_ON(dt_virt_base % SZ_2M); 68661bd93ceSArd Biesheuvel 687b433dce0SSuzuki K. Poulose BUILD_BUG_ON(__fix_to_virt(FIX_FDT_END) >> SWAPPER_TABLE_SHIFT != 688b433dce0SSuzuki K. Poulose __fix_to_virt(FIX_BTMAP_BEGIN) >> SWAPPER_TABLE_SHIFT); 68961bd93ceSArd Biesheuvel 690b433dce0SSuzuki K. Poulose offset = dt_phys % SWAPPER_BLOCK_SIZE; 69161bd93ceSArd Biesheuvel dt_virt = (void *)dt_virt_base + offset; 69261bd93ceSArd Biesheuvel 69361bd93ceSArd Biesheuvel /* map the first chunk so we can read the size from the header */ 694b433dce0SSuzuki K. Poulose create_mapping(round_down(dt_phys, SWAPPER_BLOCK_SIZE), dt_virt_base, 695b433dce0SSuzuki K. Poulose SWAPPER_BLOCK_SIZE, prot); 69661bd93ceSArd Biesheuvel 69761bd93ceSArd Biesheuvel if (fdt_check_header(dt_virt) != 0) 69861bd93ceSArd Biesheuvel return NULL; 69961bd93ceSArd Biesheuvel 70061bd93ceSArd Biesheuvel size = fdt_totalsize(dt_virt); 70161bd93ceSArd Biesheuvel if (size > MAX_FDT_SIZE) 70261bd93ceSArd Biesheuvel return NULL; 70361bd93ceSArd Biesheuvel 704b433dce0SSuzuki K. Poulose if (offset + size > SWAPPER_BLOCK_SIZE) 705b433dce0SSuzuki K. Poulose create_mapping(round_down(dt_phys, SWAPPER_BLOCK_SIZE), dt_virt_base, 706b433dce0SSuzuki K. Poulose round_up(offset + size, SWAPPER_BLOCK_SIZE), prot); 70761bd93ceSArd Biesheuvel 70861bd93ceSArd Biesheuvel memblock_reserve(dt_phys, size); 70961bd93ceSArd Biesheuvel 71061bd93ceSArd Biesheuvel return dt_virt; 71161bd93ceSArd Biesheuvel } 712