1caab277bSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only 2c1cc1552SCatalin Marinas /* 3c1cc1552SCatalin Marinas * Based on arch/arm/mm/mmu.c 4c1cc1552SCatalin Marinas * 5c1cc1552SCatalin Marinas * Copyright (C) 1995-2005 Russell King 6c1cc1552SCatalin Marinas * Copyright (C) 2012 ARM Ltd. 7c1cc1552SCatalin Marinas */ 8c1cc1552SCatalin Marinas 95a9e3e15SJisheng Zhang #include <linux/cache.h> 10c1cc1552SCatalin Marinas #include <linux/export.h> 11c1cc1552SCatalin Marinas #include <linux/kernel.h> 12c1cc1552SCatalin Marinas #include <linux/errno.h> 13c1cc1552SCatalin Marinas #include <linux/init.h> 1498d2e153STakahiro Akashi #include <linux/ioport.h> 1598d2e153STakahiro Akashi #include <linux/kexec.h> 1661bd93ceSArd Biesheuvel #include <linux/libfdt.h> 17c1cc1552SCatalin Marinas #include <linux/mman.h> 18c1cc1552SCatalin Marinas #include <linux/nodemask.h> 19c1cc1552SCatalin Marinas #include <linux/memblock.h> 20c1cc1552SCatalin Marinas #include <linux/fs.h> 212475ff9dSCatalin Marinas #include <linux/io.h> 222077be67SLaura Abbott #include <linux/mm.h> 236efd8499STobias Klauser #include <linux/vmalloc.h> 24c1cc1552SCatalin Marinas 2521ab99c2SMark Rutland #include <asm/barrier.h> 26c1cc1552SCatalin Marinas #include <asm/cputype.h> 27af86e597SLaura Abbott #include <asm/fixmap.h> 28068a17a5SMark Rutland #include <asm/kasan.h> 29b433dce0SSuzuki K. Poulose #include <asm/kernel-pgtable.h> 30c1cc1552SCatalin Marinas #include <asm/sections.h> 31c1cc1552SCatalin Marinas #include <asm/setup.h> 3287dfb311SMasahiro Yamada #include <linux/sizes.h> 33c1cc1552SCatalin Marinas #include <asm/tlb.h> 34c1cc1552SCatalin Marinas #include <asm/mmu_context.h> 351404d6f1SLaura Abbott #include <asm/ptdump.h> 36ec28bb9cSChintan Pandya #include <asm/tlbflush.h> 37c1cc1552SCatalin Marinas 38c0951366SArd Biesheuvel #define NO_BLOCK_MAPPINGS BIT(0) 39d27cfa1fSArd Biesheuvel #define NO_CONT_MAPPINGS BIT(1) 40c0951366SArd Biesheuvel 41dd006da2SArd Biesheuvel u64 idmap_t0sz = TCR_T0SZ(VA_BITS); 42fa2a8445SKristina Martsenko u64 idmap_ptrs_per_pgd = PTRS_PER_PGD; 43dd006da2SArd Biesheuvel 445383cc6eSSteve Capper u64 __section(".mmuoff.data.write") vabits_actual; 455383cc6eSSteve Capper EXPORT_SYMBOL(vabits_actual); 46c1cc1552SCatalin Marinas 475a9e3e15SJisheng Zhang u64 kimage_voffset __ro_after_init; 48a7f8de16SArd Biesheuvel EXPORT_SYMBOL(kimage_voffset); 49a7f8de16SArd Biesheuvel 50c1cc1552SCatalin Marinas /* 51c1cc1552SCatalin Marinas * Empty_zero_page is a special page that is used for zero-initialized data 52c1cc1552SCatalin Marinas * and COW. 53c1cc1552SCatalin Marinas */ 545227cfa7SMark Rutland unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)] __page_aligned_bss; 55c1cc1552SCatalin Marinas EXPORT_SYMBOL(empty_zero_page); 56c1cc1552SCatalin Marinas 57f9040773SArd Biesheuvel static pte_t bm_pte[PTRS_PER_PTE] __page_aligned_bss; 58f9040773SArd Biesheuvel static pmd_t bm_pmd[PTRS_PER_PMD] __page_aligned_bss __maybe_unused; 59f9040773SArd Biesheuvel static pud_t bm_pud[PTRS_PER_PUD] __page_aligned_bss __maybe_unused; 60f9040773SArd Biesheuvel 612330b7caSJun Yao static DEFINE_SPINLOCK(swapper_pgdir_lock); 622330b7caSJun Yao 632330b7caSJun Yao void set_swapper_pgd(pgd_t *pgdp, pgd_t pgd) 642330b7caSJun Yao { 652330b7caSJun Yao pgd_t *fixmap_pgdp; 662330b7caSJun Yao 672330b7caSJun Yao spin_lock(&swapper_pgdir_lock); 6826a6f87eSJames Morse fixmap_pgdp = pgd_set_fixmap(__pa_symbol(pgdp)); 692330b7caSJun Yao WRITE_ONCE(*fixmap_pgdp, pgd); 702330b7caSJun Yao /* 712330b7caSJun Yao * We need dsb(ishst) here to ensure the page-table-walker sees 722330b7caSJun Yao * our new entry before set_p?d() returns. The fixmap's 732330b7caSJun Yao * flush_tlb_kernel_range() via clear_fixmap() does this for us. 742330b7caSJun Yao */ 752330b7caSJun Yao pgd_clear_fixmap(); 762330b7caSJun Yao spin_unlock(&swapper_pgdir_lock); 772330b7caSJun Yao } 782330b7caSJun Yao 79c1cc1552SCatalin Marinas pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, 80c1cc1552SCatalin Marinas unsigned long size, pgprot_t vma_prot) 81c1cc1552SCatalin Marinas { 82c1cc1552SCatalin Marinas if (!pfn_valid(pfn)) 83c1cc1552SCatalin Marinas return pgprot_noncached(vma_prot); 84c1cc1552SCatalin Marinas else if (file->f_flags & O_SYNC) 85c1cc1552SCatalin Marinas return pgprot_writecombine(vma_prot); 86c1cc1552SCatalin Marinas return vma_prot; 87c1cc1552SCatalin Marinas } 88c1cc1552SCatalin Marinas EXPORT_SYMBOL(phys_mem_access_prot); 89c1cc1552SCatalin Marinas 9090292acaSYu Zhao static phys_addr_t __init early_pgtable_alloc(int shift) 91c1cc1552SCatalin Marinas { 927142392dSSuzuki K. Poulose phys_addr_t phys; 937142392dSSuzuki K. Poulose void *ptr; 947142392dSSuzuki K. Poulose 959a8dd708SMike Rapoport phys = memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE); 96ecc3e771SMike Rapoport if (!phys) 97ecc3e771SMike Rapoport panic("Failed to allocate page table page\n"); 98f4710445SMark Rutland 99f4710445SMark Rutland /* 100f4710445SMark Rutland * The FIX_{PGD,PUD,PMD} slots may be in active use, but the FIX_PTE 101f4710445SMark Rutland * slot will be free, so we can (ab)use the FIX_PTE slot to initialise 102f4710445SMark Rutland * any level of table. 103f4710445SMark Rutland */ 104f4710445SMark Rutland ptr = pte_set_fixmap(phys); 105f4710445SMark Rutland 10621ab99c2SMark Rutland memset(ptr, 0, PAGE_SIZE); 10721ab99c2SMark Rutland 108f4710445SMark Rutland /* 109f4710445SMark Rutland * Implicit barriers also ensure the zeroed page is visible to the page 110f4710445SMark Rutland * table walker 111f4710445SMark Rutland */ 112f4710445SMark Rutland pte_clear_fixmap(); 113f4710445SMark Rutland 114f4710445SMark Rutland return phys; 115c1cc1552SCatalin Marinas } 116c1cc1552SCatalin Marinas 117e98216b5SArd Biesheuvel static bool pgattr_change_is_safe(u64 old, u64 new) 118e98216b5SArd Biesheuvel { 119e98216b5SArd Biesheuvel /* 120e98216b5SArd Biesheuvel * The following mapping attributes may be updated in live 121e98216b5SArd Biesheuvel * kernel mappings without the need for break-before-make. 122e98216b5SArd Biesheuvel */ 123753e8abcSArd Biesheuvel static const pteval_t mask = PTE_PXN | PTE_RDONLY | PTE_WRITE | PTE_NG; 124e98216b5SArd Biesheuvel 125141d1497SArd Biesheuvel /* creating or taking down mappings is always safe */ 126141d1497SArd Biesheuvel if (old == 0 || new == 0) 127141d1497SArd Biesheuvel return true; 128141d1497SArd Biesheuvel 129141d1497SArd Biesheuvel /* live contiguous mappings may not be manipulated at all */ 130141d1497SArd Biesheuvel if ((old | new) & PTE_CONT) 131141d1497SArd Biesheuvel return false; 132141d1497SArd Biesheuvel 133753e8abcSArd Biesheuvel /* Transitioning from Non-Global to Global is unsafe */ 134753e8abcSArd Biesheuvel if (old & ~new & PTE_NG) 135753e8abcSArd Biesheuvel return false; 1364e602056SWill Deacon 137141d1497SArd Biesheuvel return ((old ^ new) & ~mask) == 0; 138e98216b5SArd Biesheuvel } 139e98216b5SArd Biesheuvel 14020a004e7SWill Deacon static void init_pte(pmd_t *pmdp, unsigned long addr, unsigned long end, 141d27cfa1fSArd Biesheuvel phys_addr_t phys, pgprot_t prot) 142c1cc1552SCatalin Marinas { 14320a004e7SWill Deacon pte_t *ptep; 144c1cc1552SCatalin Marinas 14520a004e7SWill Deacon ptep = pte_set_fixmap_offset(pmdp, addr); 146c1cc1552SCatalin Marinas do { 14720a004e7SWill Deacon pte_t old_pte = READ_ONCE(*ptep); 148e98216b5SArd Biesheuvel 14920a004e7SWill Deacon set_pte(ptep, pfn_pte(__phys_to_pfn(phys), prot)); 150e98216b5SArd Biesheuvel 151e98216b5SArd Biesheuvel /* 152e98216b5SArd Biesheuvel * After the PTE entry has been populated once, we 153e98216b5SArd Biesheuvel * only allow updates to the permission attributes. 154e98216b5SArd Biesheuvel */ 15520a004e7SWill Deacon BUG_ON(!pgattr_change_is_safe(pte_val(old_pte), 15620a004e7SWill Deacon READ_ONCE(pte_val(*ptep)))); 157e98216b5SArd Biesheuvel 158e393cf40SArd Biesheuvel phys += PAGE_SIZE; 15920a004e7SWill Deacon } while (ptep++, addr += PAGE_SIZE, addr != end); 160f4710445SMark Rutland 161f4710445SMark Rutland pte_clear_fixmap(); 162c1cc1552SCatalin Marinas } 163c1cc1552SCatalin Marinas 16420a004e7SWill Deacon static void alloc_init_cont_pte(pmd_t *pmdp, unsigned long addr, 165d27cfa1fSArd Biesheuvel unsigned long end, phys_addr_t phys, 166d27cfa1fSArd Biesheuvel pgprot_t prot, 16790292acaSYu Zhao phys_addr_t (*pgtable_alloc)(int), 168c0951366SArd Biesheuvel int flags) 169c1cc1552SCatalin Marinas { 170c1cc1552SCatalin Marinas unsigned long next; 17120a004e7SWill Deacon pmd_t pmd = READ_ONCE(*pmdp); 172c1cc1552SCatalin Marinas 17320a004e7SWill Deacon BUG_ON(pmd_sect(pmd)); 17420a004e7SWill Deacon if (pmd_none(pmd)) { 175d27cfa1fSArd Biesheuvel phys_addr_t pte_phys; 176132233a7SLaura Abbott BUG_ON(!pgtable_alloc); 17790292acaSYu Zhao pte_phys = pgtable_alloc(PAGE_SHIFT); 17820a004e7SWill Deacon __pmd_populate(pmdp, pte_phys, PMD_TYPE_TABLE); 17920a004e7SWill Deacon pmd = READ_ONCE(*pmdp); 180c1cc1552SCatalin Marinas } 18120a004e7SWill Deacon BUG_ON(pmd_bad(pmd)); 182d27cfa1fSArd Biesheuvel 183d27cfa1fSArd Biesheuvel do { 184d27cfa1fSArd Biesheuvel pgprot_t __prot = prot; 185d27cfa1fSArd Biesheuvel 186d27cfa1fSArd Biesheuvel next = pte_cont_addr_end(addr, end); 187d27cfa1fSArd Biesheuvel 188d27cfa1fSArd Biesheuvel /* use a contiguous mapping if the range is suitably aligned */ 189d27cfa1fSArd Biesheuvel if ((((addr | next | phys) & ~CONT_PTE_MASK) == 0) && 190d27cfa1fSArd Biesheuvel (flags & NO_CONT_MAPPINGS) == 0) 191d27cfa1fSArd Biesheuvel __prot = __pgprot(pgprot_val(prot) | PTE_CONT); 192d27cfa1fSArd Biesheuvel 19320a004e7SWill Deacon init_pte(pmdp, addr, next, phys, __prot); 194d27cfa1fSArd Biesheuvel 195d27cfa1fSArd Biesheuvel phys += next - addr; 196d27cfa1fSArd Biesheuvel } while (addr = next, addr != end); 197d27cfa1fSArd Biesheuvel } 198d27cfa1fSArd Biesheuvel 19920a004e7SWill Deacon static void init_pmd(pud_t *pudp, unsigned long addr, unsigned long end, 200d27cfa1fSArd Biesheuvel phys_addr_t phys, pgprot_t prot, 20190292acaSYu Zhao phys_addr_t (*pgtable_alloc)(int), int flags) 202d27cfa1fSArd Biesheuvel { 203d27cfa1fSArd Biesheuvel unsigned long next; 20420a004e7SWill Deacon pmd_t *pmdp; 205c1cc1552SCatalin Marinas 20620a004e7SWill Deacon pmdp = pmd_set_fixmap_offset(pudp, addr); 207c1cc1552SCatalin Marinas do { 20820a004e7SWill Deacon pmd_t old_pmd = READ_ONCE(*pmdp); 209e98216b5SArd Biesheuvel 210c1cc1552SCatalin Marinas next = pmd_addr_end(addr, end); 211e98216b5SArd Biesheuvel 212c1cc1552SCatalin Marinas /* try section mapping first */ 21383863f25SLaura Abbott if (((addr | next | phys) & ~SECTION_MASK) == 0 && 214c0951366SArd Biesheuvel (flags & NO_BLOCK_MAPPINGS) == 0) { 21520a004e7SWill Deacon pmd_set_huge(pmdp, phys, prot); 216e98216b5SArd Biesheuvel 217a55f9929SCatalin Marinas /* 218e98216b5SArd Biesheuvel * After the PMD entry has been populated once, we 219e98216b5SArd Biesheuvel * only allow updates to the permission attributes. 220a55f9929SCatalin Marinas */ 221e98216b5SArd Biesheuvel BUG_ON(!pgattr_change_is_safe(pmd_val(old_pmd), 22220a004e7SWill Deacon READ_ONCE(pmd_val(*pmdp)))); 223a55f9929SCatalin Marinas } else { 22420a004e7SWill Deacon alloc_init_cont_pte(pmdp, addr, next, phys, prot, 225d27cfa1fSArd Biesheuvel pgtable_alloc, flags); 226e98216b5SArd Biesheuvel 227e98216b5SArd Biesheuvel BUG_ON(pmd_val(old_pmd) != 0 && 22820a004e7SWill Deacon pmd_val(old_pmd) != READ_ONCE(pmd_val(*pmdp))); 229a55f9929SCatalin Marinas } 230c1cc1552SCatalin Marinas phys += next - addr; 23120a004e7SWill Deacon } while (pmdp++, addr = next, addr != end); 232f4710445SMark Rutland 233f4710445SMark Rutland pmd_clear_fixmap(); 234c1cc1552SCatalin Marinas } 235c1cc1552SCatalin Marinas 23620a004e7SWill Deacon static void alloc_init_cont_pmd(pud_t *pudp, unsigned long addr, 237d27cfa1fSArd Biesheuvel unsigned long end, phys_addr_t phys, 238d27cfa1fSArd Biesheuvel pgprot_t prot, 23990292acaSYu Zhao phys_addr_t (*pgtable_alloc)(int), int flags) 240d27cfa1fSArd Biesheuvel { 241d27cfa1fSArd Biesheuvel unsigned long next; 24220a004e7SWill Deacon pud_t pud = READ_ONCE(*pudp); 243d27cfa1fSArd Biesheuvel 244d27cfa1fSArd Biesheuvel /* 245d27cfa1fSArd Biesheuvel * Check for initial section mappings in the pgd/pud. 246d27cfa1fSArd Biesheuvel */ 24720a004e7SWill Deacon BUG_ON(pud_sect(pud)); 24820a004e7SWill Deacon if (pud_none(pud)) { 249d27cfa1fSArd Biesheuvel phys_addr_t pmd_phys; 250d27cfa1fSArd Biesheuvel BUG_ON(!pgtable_alloc); 25190292acaSYu Zhao pmd_phys = pgtable_alloc(PMD_SHIFT); 25220a004e7SWill Deacon __pud_populate(pudp, pmd_phys, PUD_TYPE_TABLE); 25320a004e7SWill Deacon pud = READ_ONCE(*pudp); 254d27cfa1fSArd Biesheuvel } 25520a004e7SWill Deacon BUG_ON(pud_bad(pud)); 256d27cfa1fSArd Biesheuvel 257d27cfa1fSArd Biesheuvel do { 258d27cfa1fSArd Biesheuvel pgprot_t __prot = prot; 259d27cfa1fSArd Biesheuvel 260d27cfa1fSArd Biesheuvel next = pmd_cont_addr_end(addr, end); 261d27cfa1fSArd Biesheuvel 262d27cfa1fSArd Biesheuvel /* use a contiguous mapping if the range is suitably aligned */ 263d27cfa1fSArd Biesheuvel if ((((addr | next | phys) & ~CONT_PMD_MASK) == 0) && 264d27cfa1fSArd Biesheuvel (flags & NO_CONT_MAPPINGS) == 0) 265d27cfa1fSArd Biesheuvel __prot = __pgprot(pgprot_val(prot) | PTE_CONT); 266d27cfa1fSArd Biesheuvel 26720a004e7SWill Deacon init_pmd(pudp, addr, next, phys, __prot, pgtable_alloc, flags); 268d27cfa1fSArd Biesheuvel 269d27cfa1fSArd Biesheuvel phys += next - addr; 270d27cfa1fSArd Biesheuvel } while (addr = next, addr != end); 271d27cfa1fSArd Biesheuvel } 272d27cfa1fSArd Biesheuvel 273da141706SLaura Abbott static inline bool use_1G_block(unsigned long addr, unsigned long next, 274da141706SLaura Abbott unsigned long phys) 275da141706SLaura Abbott { 276da141706SLaura Abbott if (PAGE_SHIFT != 12) 277da141706SLaura Abbott return false; 278da141706SLaura Abbott 279da141706SLaura Abbott if (((addr | next | phys) & ~PUD_MASK) != 0) 280da141706SLaura Abbott return false; 281da141706SLaura Abbott 282da141706SLaura Abbott return true; 283da141706SLaura Abbott } 284da141706SLaura Abbott 28520a004e7SWill Deacon static void alloc_init_pud(pgd_t *pgdp, unsigned long addr, unsigned long end, 286da141706SLaura Abbott phys_addr_t phys, pgprot_t prot, 28790292acaSYu Zhao phys_addr_t (*pgtable_alloc)(int), 288c0951366SArd Biesheuvel int flags) 289c1cc1552SCatalin Marinas { 290c1cc1552SCatalin Marinas unsigned long next; 29120a004e7SWill Deacon pud_t *pudp; 29220a004e7SWill Deacon pgd_t pgd = READ_ONCE(*pgdp); 293c1cc1552SCatalin Marinas 29420a004e7SWill Deacon if (pgd_none(pgd)) { 295132233a7SLaura Abbott phys_addr_t pud_phys; 296132233a7SLaura Abbott BUG_ON(!pgtable_alloc); 29790292acaSYu Zhao pud_phys = pgtable_alloc(PUD_SHIFT); 29820a004e7SWill Deacon __pgd_populate(pgdp, pud_phys, PUD_TYPE_TABLE); 29920a004e7SWill Deacon pgd = READ_ONCE(*pgdp); 300c79b954bSJungseok Lee } 30120a004e7SWill Deacon BUG_ON(pgd_bad(pgd)); 302c79b954bSJungseok Lee 30320a004e7SWill Deacon pudp = pud_set_fixmap_offset(pgdp, addr); 304c1cc1552SCatalin Marinas do { 30520a004e7SWill Deacon pud_t old_pud = READ_ONCE(*pudp); 306e98216b5SArd Biesheuvel 307c1cc1552SCatalin Marinas next = pud_addr_end(addr, end); 308206a2a73SSteve Capper 309206a2a73SSteve Capper /* 310206a2a73SSteve Capper * For 4K granule only, attempt to put down a 1GB block 311206a2a73SSteve Capper */ 312c0951366SArd Biesheuvel if (use_1G_block(addr, next, phys) && 313c0951366SArd Biesheuvel (flags & NO_BLOCK_MAPPINGS) == 0) { 31420a004e7SWill Deacon pud_set_huge(pudp, phys, prot); 315206a2a73SSteve Capper 316206a2a73SSteve Capper /* 317e98216b5SArd Biesheuvel * After the PUD entry has been populated once, we 318e98216b5SArd Biesheuvel * only allow updates to the permission attributes. 319206a2a73SSteve Capper */ 320e98216b5SArd Biesheuvel BUG_ON(!pgattr_change_is_safe(pud_val(old_pud), 32120a004e7SWill Deacon READ_ONCE(pud_val(*pudp)))); 322206a2a73SSteve Capper } else { 32320a004e7SWill Deacon alloc_init_cont_pmd(pudp, addr, next, phys, prot, 324c0951366SArd Biesheuvel pgtable_alloc, flags); 325e98216b5SArd Biesheuvel 326e98216b5SArd Biesheuvel BUG_ON(pud_val(old_pud) != 0 && 32720a004e7SWill Deacon pud_val(old_pud) != READ_ONCE(pud_val(*pudp))); 328206a2a73SSteve Capper } 329c1cc1552SCatalin Marinas phys += next - addr; 33020a004e7SWill Deacon } while (pudp++, addr = next, addr != end); 331f4710445SMark Rutland 332f4710445SMark Rutland pud_clear_fixmap(); 333c1cc1552SCatalin Marinas } 334c1cc1552SCatalin Marinas 33540f87d31SArd Biesheuvel static void __create_pgd_mapping(pgd_t *pgdir, phys_addr_t phys, 33640f87d31SArd Biesheuvel unsigned long virt, phys_addr_t size, 33740f87d31SArd Biesheuvel pgprot_t prot, 33890292acaSYu Zhao phys_addr_t (*pgtable_alloc)(int), 339c0951366SArd Biesheuvel int flags) 340c1cc1552SCatalin Marinas { 341c1cc1552SCatalin Marinas unsigned long addr, length, end, next; 34220a004e7SWill Deacon pgd_t *pgdp = pgd_offset_raw(pgdir, virt); 343c1cc1552SCatalin Marinas 344cc5d2b3bSMark Rutland /* 345cc5d2b3bSMark Rutland * If the virtual and physical address don't have the same offset 346cc5d2b3bSMark Rutland * within a page, we cannot map the region as the caller expects. 347cc5d2b3bSMark Rutland */ 348cc5d2b3bSMark Rutland if (WARN_ON((phys ^ virt) & ~PAGE_MASK)) 349cc5d2b3bSMark Rutland return; 350cc5d2b3bSMark Rutland 3519c4e08a3SMark Rutland phys &= PAGE_MASK; 352c1cc1552SCatalin Marinas addr = virt & PAGE_MASK; 353c1cc1552SCatalin Marinas length = PAGE_ALIGN(size + (virt & ~PAGE_MASK)); 354c1cc1552SCatalin Marinas 355c1cc1552SCatalin Marinas end = addr + length; 356c1cc1552SCatalin Marinas do { 357c1cc1552SCatalin Marinas next = pgd_addr_end(addr, end); 35820a004e7SWill Deacon alloc_init_pud(pgdp, addr, next, phys, prot, pgtable_alloc, 359c0951366SArd Biesheuvel flags); 360c1cc1552SCatalin Marinas phys += next - addr; 36120a004e7SWill Deacon } while (pgdp++, addr = next, addr != end); 362c1cc1552SCatalin Marinas } 363c1cc1552SCatalin Marinas 364475ba3fcSWill Deacon static phys_addr_t __pgd_pgtable_alloc(int shift) 365369aaab8SYu Zhao { 36650f11a8aSMike Rapoport void *ptr = (void *)__get_free_page(GFP_PGTABLE_KERNEL); 367369aaab8SYu Zhao BUG_ON(!ptr); 368369aaab8SYu Zhao 369369aaab8SYu Zhao /* Ensure the zeroed page is visible to the page table walker */ 370369aaab8SYu Zhao dsb(ishst); 371369aaab8SYu Zhao return __pa(ptr); 372369aaab8SYu Zhao } 373369aaab8SYu Zhao 37490292acaSYu Zhao static phys_addr_t pgd_pgtable_alloc(int shift) 375da141706SLaura Abbott { 376475ba3fcSWill Deacon phys_addr_t pa = __pgd_pgtable_alloc(shift); 37790292acaSYu Zhao 37890292acaSYu Zhao /* 37990292acaSYu Zhao * Call proper page table ctor in case later we need to 38090292acaSYu Zhao * call core mm functions like apply_to_page_range() on 38190292acaSYu Zhao * this pre-allocated page table. 38290292acaSYu Zhao * 38390292acaSYu Zhao * We don't select ARCH_ENABLE_SPLIT_PMD_PTLOCK if pmd is 38490292acaSYu Zhao * folded, and if so pgtable_pmd_page_ctor() becomes nop. 38590292acaSYu Zhao */ 38690292acaSYu Zhao if (shift == PAGE_SHIFT) 387b4ed71f5SMark Rutland BUG_ON(!pgtable_pte_page_ctor(phys_to_page(pa))); 38890292acaSYu Zhao else if (shift == PMD_SHIFT) 389475ba3fcSWill Deacon BUG_ON(!pgtable_pmd_page_ctor(phys_to_page(pa))); 39021ab99c2SMark Rutland 391475ba3fcSWill Deacon return pa; 392da141706SLaura Abbott } 393da141706SLaura Abbott 394132233a7SLaura Abbott /* 395132233a7SLaura Abbott * This function can only be used to modify existing table entries, 396132233a7SLaura Abbott * without allocating new levels of table. Note that this permits the 397132233a7SLaura Abbott * creation of new section or page entries. 398132233a7SLaura Abbott */ 399132233a7SLaura Abbott static void __init create_mapping_noalloc(phys_addr_t phys, unsigned long virt, 400da141706SLaura Abbott phys_addr_t size, pgprot_t prot) 401d7ecbddfSMark Salter { 40277ad4ce6SMark Rutland if ((virt >= PAGE_END) && (virt < VMALLOC_START)) { 403d7ecbddfSMark Salter pr_warn("BUG: not creating mapping for %pa at 0x%016lx - outside kernel range\n", 404d7ecbddfSMark Salter &phys, virt); 405d7ecbddfSMark Salter return; 406d7ecbddfSMark Salter } 407d27cfa1fSArd Biesheuvel __create_pgd_mapping(init_mm.pgd, phys, virt, size, prot, NULL, 408d27cfa1fSArd Biesheuvel NO_CONT_MAPPINGS); 409d7ecbddfSMark Salter } 410d7ecbddfSMark Salter 4118ce837ceSArd Biesheuvel void __init create_pgd_mapping(struct mm_struct *mm, phys_addr_t phys, 4128ce837ceSArd Biesheuvel unsigned long virt, phys_addr_t size, 413f14c66ceSArd Biesheuvel pgprot_t prot, bool page_mappings_only) 4148ce837ceSArd Biesheuvel { 415c0951366SArd Biesheuvel int flags = 0; 416c0951366SArd Biesheuvel 4171378dc3dSArd Biesheuvel BUG_ON(mm == &init_mm); 4181378dc3dSArd Biesheuvel 419c0951366SArd Biesheuvel if (page_mappings_only) 420d27cfa1fSArd Biesheuvel flags = NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS; 421c0951366SArd Biesheuvel 42211509a30SMark Rutland __create_pgd_mapping(mm->pgd, phys, virt, size, prot, 423c0951366SArd Biesheuvel pgd_pgtable_alloc, flags); 424d7ecbddfSMark Salter } 425d7ecbddfSMark Salter 426aa8c09beSArd Biesheuvel static void update_mapping_prot(phys_addr_t phys, unsigned long virt, 427da141706SLaura Abbott phys_addr_t size, pgprot_t prot) 428da141706SLaura Abbott { 42977ad4ce6SMark Rutland if ((virt >= PAGE_END) && (virt < VMALLOC_START)) { 430aa8c09beSArd Biesheuvel pr_warn("BUG: not updating mapping for %pa at 0x%016lx - outside kernel range\n", 431da141706SLaura Abbott &phys, virt); 432da141706SLaura Abbott return; 433da141706SLaura Abbott } 434da141706SLaura Abbott 435d27cfa1fSArd Biesheuvel __create_pgd_mapping(init_mm.pgd, phys, virt, size, prot, NULL, 436d27cfa1fSArd Biesheuvel NO_CONT_MAPPINGS); 437aa8c09beSArd Biesheuvel 438aa8c09beSArd Biesheuvel /* flush the TLBs after updating live kernel mappings */ 439aa8c09beSArd Biesheuvel flush_tlb_kernel_range(virt, virt + size); 440da141706SLaura Abbott } 441da141706SLaura Abbott 44220a004e7SWill Deacon static void __init __map_memblock(pgd_t *pgdp, phys_addr_t start, 44398d2e153STakahiro Akashi phys_addr_t end, pgprot_t prot, int flags) 444da141706SLaura Abbott { 44520a004e7SWill Deacon __create_pgd_mapping(pgdp, start, __phys_to_virt(start), end - start, 44698d2e153STakahiro Akashi prot, early_pgtable_alloc, flags); 447da141706SLaura Abbott } 448da141706SLaura Abbott 4495ea5306cSArd Biesheuvel void __init mark_linear_text_alias_ro(void) 4505ea5306cSArd Biesheuvel { 4515ea5306cSArd Biesheuvel /* 4525ea5306cSArd Biesheuvel * Remove the write permissions from the linear alias of .text/.rodata 4535ea5306cSArd Biesheuvel */ 4545ea5306cSArd Biesheuvel update_mapping_prot(__pa_symbol(_text), (unsigned long)lm_alias(_text), 4555ea5306cSArd Biesheuvel (unsigned long)__init_begin - (unsigned long)_text, 4565ea5306cSArd Biesheuvel PAGE_KERNEL_RO); 4575ea5306cSArd Biesheuvel } 4585ea5306cSArd Biesheuvel 45920a004e7SWill Deacon static void __init map_mem(pgd_t *pgdp) 460c1cc1552SCatalin Marinas { 46198d2e153STakahiro Akashi phys_addr_t kernel_start = __pa_symbol(_text); 46298d2e153STakahiro Akashi phys_addr_t kernel_end = __pa_symbol(__init_begin); 463c1cc1552SCatalin Marinas struct memblock_region *reg; 46498d2e153STakahiro Akashi int flags = 0; 46598d2e153STakahiro Akashi 466c55191e9SArd Biesheuvel if (rodata_full || debug_pagealloc_enabled()) 46798d2e153STakahiro Akashi flags = NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS; 46898d2e153STakahiro Akashi 46998d2e153STakahiro Akashi /* 47098d2e153STakahiro Akashi * Take care not to create a writable alias for the 47198d2e153STakahiro Akashi * read-only text and rodata sections of the kernel image. 47298d2e153STakahiro Akashi * So temporarily mark them as NOMAP to skip mappings in 47398d2e153STakahiro Akashi * the following for-loop 47498d2e153STakahiro Akashi */ 47598d2e153STakahiro Akashi memblock_mark_nomap(kernel_start, kernel_end - kernel_start); 47698d2e153STakahiro Akashi #ifdef CONFIG_KEXEC_CORE 47798d2e153STakahiro Akashi if (crashk_res.end) 47898d2e153STakahiro Akashi memblock_mark_nomap(crashk_res.start, 47998d2e153STakahiro Akashi resource_size(&crashk_res)); 48098d2e153STakahiro Akashi #endif 481f6bc87c3SSteve Capper 482c1cc1552SCatalin Marinas /* map all the memory banks */ 483c1cc1552SCatalin Marinas for_each_memblock(memory, reg) { 484c1cc1552SCatalin Marinas phys_addr_t start = reg->base; 485c1cc1552SCatalin Marinas phys_addr_t end = start + reg->size; 486c1cc1552SCatalin Marinas 487c1cc1552SCatalin Marinas if (start >= end) 488c1cc1552SCatalin Marinas break; 48968709f45SArd Biesheuvel if (memblock_is_nomap(reg)) 49068709f45SArd Biesheuvel continue; 491c1cc1552SCatalin Marinas 49220a004e7SWill Deacon __map_memblock(pgdp, start, end, PAGE_KERNEL, flags); 493c1cc1552SCatalin Marinas } 49498d2e153STakahiro Akashi 49598d2e153STakahiro Akashi /* 49698d2e153STakahiro Akashi * Map the linear alias of the [_text, __init_begin) interval 49798d2e153STakahiro Akashi * as non-executable now, and remove the write permission in 49898d2e153STakahiro Akashi * mark_linear_text_alias_ro() below (which will be called after 49998d2e153STakahiro Akashi * alternative patching has completed). This makes the contents 50098d2e153STakahiro Akashi * of the region accessible to subsystems such as hibernate, 50198d2e153STakahiro Akashi * but protects it from inadvertent modification or execution. 50298d2e153STakahiro Akashi * Note that contiguous mappings cannot be remapped in this way, 50398d2e153STakahiro Akashi * so we should avoid them here. 50498d2e153STakahiro Akashi */ 50520a004e7SWill Deacon __map_memblock(pgdp, kernel_start, kernel_end, 50698d2e153STakahiro Akashi PAGE_KERNEL, NO_CONT_MAPPINGS); 50798d2e153STakahiro Akashi memblock_clear_nomap(kernel_start, kernel_end - kernel_start); 50898d2e153STakahiro Akashi 50998d2e153STakahiro Akashi #ifdef CONFIG_KEXEC_CORE 51098d2e153STakahiro Akashi /* 51198d2e153STakahiro Akashi * Use page-level mappings here so that we can shrink the region 51298d2e153STakahiro Akashi * in page granularity and put back unused memory to buddy system 51398d2e153STakahiro Akashi * through /sys/kernel/kexec_crash_size interface. 51498d2e153STakahiro Akashi */ 51598d2e153STakahiro Akashi if (crashk_res.end) { 51620a004e7SWill Deacon __map_memblock(pgdp, crashk_res.start, crashk_res.end + 1, 51798d2e153STakahiro Akashi PAGE_KERNEL, 51898d2e153STakahiro Akashi NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS); 51998d2e153STakahiro Akashi memblock_clear_nomap(crashk_res.start, 52098d2e153STakahiro Akashi resource_size(&crashk_res)); 52198d2e153STakahiro Akashi } 52298d2e153STakahiro Akashi #endif 523c1cc1552SCatalin Marinas } 524c1cc1552SCatalin Marinas 525da141706SLaura Abbott void mark_rodata_ro(void) 526da141706SLaura Abbott { 5272f39b5f9SJeremy Linton unsigned long section_size; 528f9040773SArd Biesheuvel 5292f39b5f9SJeremy Linton /* 5309fdc14c5SArd Biesheuvel * mark .rodata as read only. Use __init_begin rather than __end_rodata 5319fdc14c5SArd Biesheuvel * to cover NOTES and EXCEPTION_TABLE. 5322f39b5f9SJeremy Linton */ 5339fdc14c5SArd Biesheuvel section_size = (unsigned long)__init_begin - (unsigned long)__start_rodata; 534aa8c09beSArd Biesheuvel update_mapping_prot(__pa_symbol(__start_rodata), (unsigned long)__start_rodata, 5352f39b5f9SJeremy Linton section_size, PAGE_KERNEL_RO); 536e98216b5SArd Biesheuvel 5371404d6f1SLaura Abbott debug_checkwx(); 538da141706SLaura Abbott } 539da141706SLaura Abbott 54020a004e7SWill Deacon static void __init map_kernel_segment(pgd_t *pgdp, void *va_start, void *va_end, 541d27cfa1fSArd Biesheuvel pgprot_t prot, struct vm_struct *vma, 54292bbd16eSWill Deacon int flags, unsigned long vm_flags) 543068a17a5SMark Rutland { 5442077be67SLaura Abbott phys_addr_t pa_start = __pa_symbol(va_start); 545068a17a5SMark Rutland unsigned long size = va_end - va_start; 546068a17a5SMark Rutland 547068a17a5SMark Rutland BUG_ON(!PAGE_ALIGNED(pa_start)); 548068a17a5SMark Rutland BUG_ON(!PAGE_ALIGNED(size)); 549068a17a5SMark Rutland 55020a004e7SWill Deacon __create_pgd_mapping(pgdp, pa_start, (unsigned long)va_start, size, prot, 551d27cfa1fSArd Biesheuvel early_pgtable_alloc, flags); 552f9040773SArd Biesheuvel 55392bbd16eSWill Deacon if (!(vm_flags & VM_NO_GUARD)) 55492bbd16eSWill Deacon size += PAGE_SIZE; 55592bbd16eSWill Deacon 556f9040773SArd Biesheuvel vma->addr = va_start; 557f9040773SArd Biesheuvel vma->phys_addr = pa_start; 558f9040773SArd Biesheuvel vma->size = size; 55992bbd16eSWill Deacon vma->flags = VM_MAP | vm_flags; 560f9040773SArd Biesheuvel vma->caller = __builtin_return_address(0); 561f9040773SArd Biesheuvel 562f9040773SArd Biesheuvel vm_area_add_early(vma); 563068a17a5SMark Rutland } 564068a17a5SMark Rutland 56528b066daSArd Biesheuvel static int __init parse_rodata(char *arg) 56628b066daSArd Biesheuvel { 567c55191e9SArd Biesheuvel int ret = strtobool(arg, &rodata_enabled); 568c55191e9SArd Biesheuvel if (!ret) { 569c55191e9SArd Biesheuvel rodata_full = false; 570c55191e9SArd Biesheuvel return 0; 571c55191e9SArd Biesheuvel } 572c55191e9SArd Biesheuvel 573c55191e9SArd Biesheuvel /* permit 'full' in addition to boolean options */ 574c55191e9SArd Biesheuvel if (strcmp(arg, "full")) 575c55191e9SArd Biesheuvel return -EINVAL; 576c55191e9SArd Biesheuvel 577c55191e9SArd Biesheuvel rodata_enabled = true; 578c55191e9SArd Biesheuvel rodata_full = true; 579c55191e9SArd Biesheuvel return 0; 58028b066daSArd Biesheuvel } 58128b066daSArd Biesheuvel early_param("rodata", parse_rodata); 58228b066daSArd Biesheuvel 58351a0048bSWill Deacon #ifdef CONFIG_UNMAP_KERNEL_AT_EL0 58451a0048bSWill Deacon static int __init map_entry_trampoline(void) 58551a0048bSWill Deacon { 58651a0048bSWill Deacon pgprot_t prot = rodata_enabled ? PAGE_KERNEL_ROX : PAGE_KERNEL_EXEC; 58751a0048bSWill Deacon phys_addr_t pa_start = __pa_symbol(__entry_tramp_text_start); 58851a0048bSWill Deacon 58951a0048bSWill Deacon /* The trampoline is always mapped and can therefore be global */ 59051a0048bSWill Deacon pgprot_val(prot) &= ~PTE_NG; 59151a0048bSWill Deacon 59251a0048bSWill Deacon /* Map only the text into the trampoline page table */ 59351a0048bSWill Deacon memset(tramp_pg_dir, 0, PGD_SIZE); 59451a0048bSWill Deacon __create_pgd_mapping(tramp_pg_dir, pa_start, TRAMP_VALIAS, PAGE_SIZE, 595475ba3fcSWill Deacon prot, __pgd_pgtable_alloc, 0); 59651a0048bSWill Deacon 5976c27c408SWill Deacon /* Map both the text and data into the kernel page table */ 59851a0048bSWill Deacon __set_fixmap(FIX_ENTRY_TRAMP_TEXT, pa_start, prot); 5996c27c408SWill Deacon if (IS_ENABLED(CONFIG_RANDOMIZE_BASE)) { 6006c27c408SWill Deacon extern char __entry_tramp_data_start[]; 6016c27c408SWill Deacon 6026c27c408SWill Deacon __set_fixmap(FIX_ENTRY_TRAMP_DATA, 6036c27c408SWill Deacon __pa_symbol(__entry_tramp_data_start), 6046c27c408SWill Deacon PAGE_KERNEL_RO); 6056c27c408SWill Deacon } 6066c27c408SWill Deacon 60751a0048bSWill Deacon return 0; 60851a0048bSWill Deacon } 60951a0048bSWill Deacon core_initcall(map_entry_trampoline); 61051a0048bSWill Deacon #endif 61151a0048bSWill Deacon 612068a17a5SMark Rutland /* 613068a17a5SMark Rutland * Create fine-grained mappings for the kernel. 614068a17a5SMark Rutland */ 61520a004e7SWill Deacon static void __init map_kernel(pgd_t *pgdp) 616068a17a5SMark Rutland { 6172ebe088bSArd Biesheuvel static struct vm_struct vmlinux_text, vmlinux_rodata, vmlinux_inittext, 6182ebe088bSArd Biesheuvel vmlinux_initdata, vmlinux_data; 619068a17a5SMark Rutland 62028b066daSArd Biesheuvel /* 62128b066daSArd Biesheuvel * External debuggers may need to write directly to the text 62228b066daSArd Biesheuvel * mapping to install SW breakpoints. Allow this (only) when 62328b066daSArd Biesheuvel * explicitly requested with rodata=off. 62428b066daSArd Biesheuvel */ 62528b066daSArd Biesheuvel pgprot_t text_prot = rodata_enabled ? PAGE_KERNEL_ROX : PAGE_KERNEL_EXEC; 62628b066daSArd Biesheuvel 627d27cfa1fSArd Biesheuvel /* 628d27cfa1fSArd Biesheuvel * Only rodata will be remapped with different permissions later on, 629d27cfa1fSArd Biesheuvel * all other segments are allowed to use contiguous mappings. 630d27cfa1fSArd Biesheuvel */ 63120a004e7SWill Deacon map_kernel_segment(pgdp, _text, _etext, text_prot, &vmlinux_text, 0, 63292bbd16eSWill Deacon VM_NO_GUARD); 63320a004e7SWill Deacon map_kernel_segment(pgdp, __start_rodata, __inittext_begin, PAGE_KERNEL, 63492bbd16eSWill Deacon &vmlinux_rodata, NO_CONT_MAPPINGS, VM_NO_GUARD); 63520a004e7SWill Deacon map_kernel_segment(pgdp, __inittext_begin, __inittext_end, text_prot, 63692bbd16eSWill Deacon &vmlinux_inittext, 0, VM_NO_GUARD); 63720a004e7SWill Deacon map_kernel_segment(pgdp, __initdata_begin, __initdata_end, PAGE_KERNEL, 63892bbd16eSWill Deacon &vmlinux_initdata, 0, VM_NO_GUARD); 63920a004e7SWill Deacon map_kernel_segment(pgdp, _data, _end, PAGE_KERNEL, &vmlinux_data, 0, 0); 640068a17a5SMark Rutland 64120a004e7SWill Deacon if (!READ_ONCE(pgd_val(*pgd_offset_raw(pgdp, FIXADDR_START)))) { 642068a17a5SMark Rutland /* 643f9040773SArd Biesheuvel * The fixmap falls in a separate pgd to the kernel, and doesn't 644f9040773SArd Biesheuvel * live in the carveout for the swapper_pg_dir. We can simply 645f9040773SArd Biesheuvel * re-use the existing dir for the fixmap. 646068a17a5SMark Rutland */ 64720a004e7SWill Deacon set_pgd(pgd_offset_raw(pgdp, FIXADDR_START), 64820a004e7SWill Deacon READ_ONCE(*pgd_offset_k(FIXADDR_START))); 649f9040773SArd Biesheuvel } else if (CONFIG_PGTABLE_LEVELS > 3) { 650b333b0baSMark Rutland pgd_t *bm_pgdp; 651b333b0baSMark Rutland pud_t *bm_pudp; 652f9040773SArd Biesheuvel /* 653f9040773SArd Biesheuvel * The fixmap shares its top level pgd entry with the kernel 654f9040773SArd Biesheuvel * mapping. This can really only occur when we are running 655f9040773SArd Biesheuvel * with 16k/4 levels, so we can simply reuse the pud level 656f9040773SArd Biesheuvel * entry instead. 657f9040773SArd Biesheuvel */ 658f9040773SArd Biesheuvel BUG_ON(!IS_ENABLED(CONFIG_ARM64_16K_PAGES)); 659b333b0baSMark Rutland bm_pgdp = pgd_offset_raw(pgdp, FIXADDR_START); 660b333b0baSMark Rutland bm_pudp = pud_set_fixmap_offset(bm_pgdp, FIXADDR_START); 661b333b0baSMark Rutland pud_populate(&init_mm, bm_pudp, lm_alias(bm_pmd)); 662f9040773SArd Biesheuvel pud_clear_fixmap(); 663f9040773SArd Biesheuvel } else { 664f9040773SArd Biesheuvel BUG(); 665f9040773SArd Biesheuvel } 666068a17a5SMark Rutland 66720a004e7SWill Deacon kasan_copy_shadow(pgdp); 668068a17a5SMark Rutland } 669068a17a5SMark Rutland 670c1cc1552SCatalin Marinas void __init paging_init(void) 671c1cc1552SCatalin Marinas { 6722330b7caSJun Yao pgd_t *pgdp = pgd_set_fixmap(__pa_symbol(swapper_pg_dir)); 673068a17a5SMark Rutland 67420a004e7SWill Deacon map_kernel(pgdp); 67520a004e7SWill Deacon map_mem(pgdp); 676068a17a5SMark Rutland 677068a17a5SMark Rutland pgd_clear_fixmap(); 678068a17a5SMark Rutland 679068a17a5SMark Rutland cpu_replace_ttbr1(lm_alias(swapper_pg_dir)); 6802b5548b6SJun Yao init_mm.pgd = swapper_pg_dir; 681068a17a5SMark Rutland 6822b5548b6SJun Yao memblock_free(__pa_symbol(init_pg_dir), 6832b5548b6SJun Yao __pa_symbol(init_pg_end) - __pa_symbol(init_pg_dir)); 68424cc61d8SArd Biesheuvel 68524cc61d8SArd Biesheuvel memblock_allow_resize(); 686c1cc1552SCatalin Marinas } 687c1cc1552SCatalin Marinas 688c1cc1552SCatalin Marinas /* 689c1cc1552SCatalin Marinas * Check whether a kernel address is valid (derived from arch/x86/). 690c1cc1552SCatalin Marinas */ 691c1cc1552SCatalin Marinas int kern_addr_valid(unsigned long addr) 692c1cc1552SCatalin Marinas { 69320a004e7SWill Deacon pgd_t *pgdp; 69420a004e7SWill Deacon pud_t *pudp, pud; 69520a004e7SWill Deacon pmd_t *pmdp, pmd; 69620a004e7SWill Deacon pte_t *ptep, pte; 697c1cc1552SCatalin Marinas 698c1cc1552SCatalin Marinas if ((((long)addr) >> VA_BITS) != -1UL) 699c1cc1552SCatalin Marinas return 0; 700c1cc1552SCatalin Marinas 70120a004e7SWill Deacon pgdp = pgd_offset_k(addr); 70220a004e7SWill Deacon if (pgd_none(READ_ONCE(*pgdp))) 703c1cc1552SCatalin Marinas return 0; 704c1cc1552SCatalin Marinas 70520a004e7SWill Deacon pudp = pud_offset(pgdp, addr); 70620a004e7SWill Deacon pud = READ_ONCE(*pudp); 70720a004e7SWill Deacon if (pud_none(pud)) 708c1cc1552SCatalin Marinas return 0; 709c1cc1552SCatalin Marinas 71020a004e7SWill Deacon if (pud_sect(pud)) 71120a004e7SWill Deacon return pfn_valid(pud_pfn(pud)); 712206a2a73SSteve Capper 71320a004e7SWill Deacon pmdp = pmd_offset(pudp, addr); 71420a004e7SWill Deacon pmd = READ_ONCE(*pmdp); 71520a004e7SWill Deacon if (pmd_none(pmd)) 716c1cc1552SCatalin Marinas return 0; 717c1cc1552SCatalin Marinas 71820a004e7SWill Deacon if (pmd_sect(pmd)) 71920a004e7SWill Deacon return pfn_valid(pmd_pfn(pmd)); 720da6e4cb6SDave Anderson 72120a004e7SWill Deacon ptep = pte_offset_kernel(pmdp, addr); 72220a004e7SWill Deacon pte = READ_ONCE(*ptep); 72320a004e7SWill Deacon if (pte_none(pte)) 724c1cc1552SCatalin Marinas return 0; 725c1cc1552SCatalin Marinas 72620a004e7SWill Deacon return pfn_valid(pte_pfn(pte)); 727c1cc1552SCatalin Marinas } 728c1cc1552SCatalin Marinas #ifdef CONFIG_SPARSEMEM_VMEMMAP 729b433dce0SSuzuki K. Poulose #if !ARM64_SWAPPER_USES_SECTION_MAPS 7307b73d978SChristoph Hellwig int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node, 7317b73d978SChristoph Hellwig struct vmem_altmap *altmap) 732c1cc1552SCatalin Marinas { 7330aad818bSJohannes Weiner return vmemmap_populate_basepages(start, end, node); 734c1cc1552SCatalin Marinas } 735b433dce0SSuzuki K. Poulose #else /* !ARM64_SWAPPER_USES_SECTION_MAPS */ 7367b73d978SChristoph Hellwig int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node, 7377b73d978SChristoph Hellwig struct vmem_altmap *altmap) 738c1cc1552SCatalin Marinas { 7390aad818bSJohannes Weiner unsigned long addr = start; 740c1cc1552SCatalin Marinas unsigned long next; 74120a004e7SWill Deacon pgd_t *pgdp; 74220a004e7SWill Deacon pud_t *pudp; 74320a004e7SWill Deacon pmd_t *pmdp; 744c1cc1552SCatalin Marinas 745c1cc1552SCatalin Marinas do { 746c1cc1552SCatalin Marinas next = pmd_addr_end(addr, end); 747c1cc1552SCatalin Marinas 74820a004e7SWill Deacon pgdp = vmemmap_pgd_populate(addr, node); 74920a004e7SWill Deacon if (!pgdp) 750c1cc1552SCatalin Marinas return -ENOMEM; 751c1cc1552SCatalin Marinas 75220a004e7SWill Deacon pudp = vmemmap_pud_populate(pgdp, addr, node); 75320a004e7SWill Deacon if (!pudp) 754c1cc1552SCatalin Marinas return -ENOMEM; 755c1cc1552SCatalin Marinas 75620a004e7SWill Deacon pmdp = pmd_offset(pudp, addr); 75720a004e7SWill Deacon if (pmd_none(READ_ONCE(*pmdp))) { 758c1cc1552SCatalin Marinas void *p = NULL; 759c1cc1552SCatalin Marinas 760c1cc1552SCatalin Marinas p = vmemmap_alloc_block_buf(PMD_SIZE, node); 761c1cc1552SCatalin Marinas if (!p) 762c1cc1552SCatalin Marinas return -ENOMEM; 763c1cc1552SCatalin Marinas 76420a004e7SWill Deacon pmd_set_huge(pmdp, __pa(p), __pgprot(PROT_SECT_NORMAL)); 765c1cc1552SCatalin Marinas } else 76620a004e7SWill Deacon vmemmap_verify((pte_t *)pmdp, node, addr, next); 767c1cc1552SCatalin Marinas } while (addr = next, addr != end); 768c1cc1552SCatalin Marinas 769c1cc1552SCatalin Marinas return 0; 770c1cc1552SCatalin Marinas } 7718e01076aSOdin Ugedal #endif /* !ARM64_SWAPPER_USES_SECTION_MAPS */ 77224b6d416SChristoph Hellwig void vmemmap_free(unsigned long start, unsigned long end, 77324b6d416SChristoph Hellwig struct vmem_altmap *altmap) 7740197518cSTang Chen { 7750197518cSTang Chen } 776c1cc1552SCatalin Marinas #endif /* CONFIG_SPARSEMEM_VMEMMAP */ 777af86e597SLaura Abbott 778af86e597SLaura Abbott static inline pud_t * fixmap_pud(unsigned long addr) 779af86e597SLaura Abbott { 78020a004e7SWill Deacon pgd_t *pgdp = pgd_offset_k(addr); 78120a004e7SWill Deacon pgd_t pgd = READ_ONCE(*pgdp); 782af86e597SLaura Abbott 78320a004e7SWill Deacon BUG_ON(pgd_none(pgd) || pgd_bad(pgd)); 784af86e597SLaura Abbott 78520a004e7SWill Deacon return pud_offset_kimg(pgdp, addr); 786af86e597SLaura Abbott } 787af86e597SLaura Abbott 788af86e597SLaura Abbott static inline pmd_t * fixmap_pmd(unsigned long addr) 789af86e597SLaura Abbott { 79020a004e7SWill Deacon pud_t *pudp = fixmap_pud(addr); 79120a004e7SWill Deacon pud_t pud = READ_ONCE(*pudp); 792af86e597SLaura Abbott 79320a004e7SWill Deacon BUG_ON(pud_none(pud) || pud_bad(pud)); 794af86e597SLaura Abbott 79520a004e7SWill Deacon return pmd_offset_kimg(pudp, addr); 796af86e597SLaura Abbott } 797af86e597SLaura Abbott 798af86e597SLaura Abbott static inline pte_t * fixmap_pte(unsigned long addr) 799af86e597SLaura Abbott { 800157962f5SArd Biesheuvel return &bm_pte[pte_index(addr)]; 801af86e597SLaura Abbott } 802af86e597SLaura Abbott 8032077be67SLaura Abbott /* 8042077be67SLaura Abbott * The p*d_populate functions call virt_to_phys implicitly so they can't be used 8052077be67SLaura Abbott * directly on kernel symbols (bm_p*d). This function is called too early to use 8062077be67SLaura Abbott * lm_alias so __p*d_populate functions must be used to populate with the 8072077be67SLaura Abbott * physical address from __pa_symbol. 8082077be67SLaura Abbott */ 809af86e597SLaura Abbott void __init early_fixmap_init(void) 810af86e597SLaura Abbott { 81120a004e7SWill Deacon pgd_t *pgdp, pgd; 81220a004e7SWill Deacon pud_t *pudp; 81320a004e7SWill Deacon pmd_t *pmdp; 814af86e597SLaura Abbott unsigned long addr = FIXADDR_START; 815af86e597SLaura Abbott 81620a004e7SWill Deacon pgdp = pgd_offset_k(addr); 81720a004e7SWill Deacon pgd = READ_ONCE(*pgdp); 818f80fb3a3SArd Biesheuvel if (CONFIG_PGTABLE_LEVELS > 3 && 81920a004e7SWill Deacon !(pgd_none(pgd) || pgd_page_paddr(pgd) == __pa_symbol(bm_pud))) { 820f9040773SArd Biesheuvel /* 821f9040773SArd Biesheuvel * We only end up here if the kernel mapping and the fixmap 822f9040773SArd Biesheuvel * share the top level pgd entry, which should only happen on 823f9040773SArd Biesheuvel * 16k/4 levels configurations. 824f9040773SArd Biesheuvel */ 825f9040773SArd Biesheuvel BUG_ON(!IS_ENABLED(CONFIG_ARM64_16K_PAGES)); 82620a004e7SWill Deacon pudp = pud_offset_kimg(pgdp, addr); 827f9040773SArd Biesheuvel } else { 82820a004e7SWill Deacon if (pgd_none(pgd)) 82920a004e7SWill Deacon __pgd_populate(pgdp, __pa_symbol(bm_pud), PUD_TYPE_TABLE); 83020a004e7SWill Deacon pudp = fixmap_pud(addr); 831f9040773SArd Biesheuvel } 83220a004e7SWill Deacon if (pud_none(READ_ONCE(*pudp))) 83320a004e7SWill Deacon __pud_populate(pudp, __pa_symbol(bm_pmd), PMD_TYPE_TABLE); 83420a004e7SWill Deacon pmdp = fixmap_pmd(addr); 83520a004e7SWill Deacon __pmd_populate(pmdp, __pa_symbol(bm_pte), PMD_TYPE_TABLE); 836af86e597SLaura Abbott 837af86e597SLaura Abbott /* 838af86e597SLaura Abbott * The boot-ioremap range spans multiple pmds, for which 839157962f5SArd Biesheuvel * we are not prepared: 840af86e597SLaura Abbott */ 841af86e597SLaura Abbott BUILD_BUG_ON((__fix_to_virt(FIX_BTMAP_BEGIN) >> PMD_SHIFT) 842af86e597SLaura Abbott != (__fix_to_virt(FIX_BTMAP_END) >> PMD_SHIFT)); 843af86e597SLaura Abbott 84420a004e7SWill Deacon if ((pmdp != fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN))) 84520a004e7SWill Deacon || pmdp != fixmap_pmd(fix_to_virt(FIX_BTMAP_END))) { 846af86e597SLaura Abbott WARN_ON(1); 84720a004e7SWill Deacon pr_warn("pmdp %p != %p, %p\n", 84820a004e7SWill Deacon pmdp, fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN)), 849af86e597SLaura Abbott fixmap_pmd(fix_to_virt(FIX_BTMAP_END))); 850af86e597SLaura Abbott pr_warn("fix_to_virt(FIX_BTMAP_BEGIN): %08lx\n", 851af86e597SLaura Abbott fix_to_virt(FIX_BTMAP_BEGIN)); 852af86e597SLaura Abbott pr_warn("fix_to_virt(FIX_BTMAP_END): %08lx\n", 853af86e597SLaura Abbott fix_to_virt(FIX_BTMAP_END)); 854af86e597SLaura Abbott 855af86e597SLaura Abbott pr_warn("FIX_BTMAP_END: %d\n", FIX_BTMAP_END); 856af86e597SLaura Abbott pr_warn("FIX_BTMAP_BEGIN: %d\n", FIX_BTMAP_BEGIN); 857af86e597SLaura Abbott } 858af86e597SLaura Abbott } 859af86e597SLaura Abbott 86018b4b276SJames Morse /* 86118b4b276SJames Morse * Unusually, this is also called in IRQ context (ghes_iounmap_irq) so if we 86218b4b276SJames Morse * ever need to use IPIs for TLB broadcasting, then we're in trouble here. 86318b4b276SJames Morse */ 864af86e597SLaura Abbott void __set_fixmap(enum fixed_addresses idx, 865af86e597SLaura Abbott phys_addr_t phys, pgprot_t flags) 866af86e597SLaura Abbott { 867af86e597SLaura Abbott unsigned long addr = __fix_to_virt(idx); 86820a004e7SWill Deacon pte_t *ptep; 869af86e597SLaura Abbott 870b63dbef9SMark Rutland BUG_ON(idx <= FIX_HOLE || idx >= __end_of_fixed_addresses); 871af86e597SLaura Abbott 87220a004e7SWill Deacon ptep = fixmap_pte(addr); 873af86e597SLaura Abbott 874af86e597SLaura Abbott if (pgprot_val(flags)) { 87520a004e7SWill Deacon set_pte(ptep, pfn_pte(phys >> PAGE_SHIFT, flags)); 876af86e597SLaura Abbott } else { 87720a004e7SWill Deacon pte_clear(&init_mm, addr, ptep); 878af86e597SLaura Abbott flush_tlb_kernel_range(addr, addr+PAGE_SIZE); 879af86e597SLaura Abbott } 880af86e597SLaura Abbott } 88161bd93ceSArd Biesheuvel 882e112b032SHsin-Yi Wang void *__init fixmap_remap_fdt(phys_addr_t dt_phys, int *size, pgprot_t prot) 88361bd93ceSArd Biesheuvel { 88461bd93ceSArd Biesheuvel const u64 dt_virt_base = __fix_to_virt(FIX_FDT); 885f80fb3a3SArd Biesheuvel int offset; 88661bd93ceSArd Biesheuvel void *dt_virt; 88761bd93ceSArd Biesheuvel 88861bd93ceSArd Biesheuvel /* 88961bd93ceSArd Biesheuvel * Check whether the physical FDT address is set and meets the minimum 89061bd93ceSArd Biesheuvel * alignment requirement. Since we are relying on MIN_FDT_ALIGN to be 89104a84810SArd Biesheuvel * at least 8 bytes so that we can always access the magic and size 89204a84810SArd Biesheuvel * fields of the FDT header after mapping the first chunk, double check 89304a84810SArd Biesheuvel * here if that is indeed the case. 89461bd93ceSArd Biesheuvel */ 89561bd93ceSArd Biesheuvel BUILD_BUG_ON(MIN_FDT_ALIGN < 8); 89661bd93ceSArd Biesheuvel if (!dt_phys || dt_phys % MIN_FDT_ALIGN) 89761bd93ceSArd Biesheuvel return NULL; 89861bd93ceSArd Biesheuvel 89961bd93ceSArd Biesheuvel /* 90061bd93ceSArd Biesheuvel * Make sure that the FDT region can be mapped without the need to 90161bd93ceSArd Biesheuvel * allocate additional translation table pages, so that it is safe 902132233a7SLaura Abbott * to call create_mapping_noalloc() this early. 90361bd93ceSArd Biesheuvel * 90461bd93ceSArd Biesheuvel * On 64k pages, the FDT will be mapped using PTEs, so we need to 90561bd93ceSArd Biesheuvel * be in the same PMD as the rest of the fixmap. 90661bd93ceSArd Biesheuvel * On 4k pages, we'll use section mappings for the FDT so we only 90761bd93ceSArd Biesheuvel * have to be in the same PUD. 90861bd93ceSArd Biesheuvel */ 90961bd93ceSArd Biesheuvel BUILD_BUG_ON(dt_virt_base % SZ_2M); 91061bd93ceSArd Biesheuvel 911b433dce0SSuzuki K. Poulose BUILD_BUG_ON(__fix_to_virt(FIX_FDT_END) >> SWAPPER_TABLE_SHIFT != 912b433dce0SSuzuki K. Poulose __fix_to_virt(FIX_BTMAP_BEGIN) >> SWAPPER_TABLE_SHIFT); 91361bd93ceSArd Biesheuvel 914b433dce0SSuzuki K. Poulose offset = dt_phys % SWAPPER_BLOCK_SIZE; 91561bd93ceSArd Biesheuvel dt_virt = (void *)dt_virt_base + offset; 91661bd93ceSArd Biesheuvel 91761bd93ceSArd Biesheuvel /* map the first chunk so we can read the size from the header */ 918132233a7SLaura Abbott create_mapping_noalloc(round_down(dt_phys, SWAPPER_BLOCK_SIZE), 919132233a7SLaura Abbott dt_virt_base, SWAPPER_BLOCK_SIZE, prot); 92061bd93ceSArd Biesheuvel 92104a84810SArd Biesheuvel if (fdt_magic(dt_virt) != FDT_MAGIC) 92261bd93ceSArd Biesheuvel return NULL; 92361bd93ceSArd Biesheuvel 924f80fb3a3SArd Biesheuvel *size = fdt_totalsize(dt_virt); 925f80fb3a3SArd Biesheuvel if (*size > MAX_FDT_SIZE) 92661bd93ceSArd Biesheuvel return NULL; 92761bd93ceSArd Biesheuvel 928f80fb3a3SArd Biesheuvel if (offset + *size > SWAPPER_BLOCK_SIZE) 929132233a7SLaura Abbott create_mapping_noalloc(round_down(dt_phys, SWAPPER_BLOCK_SIZE), dt_virt_base, 930f80fb3a3SArd Biesheuvel round_up(offset + *size, SWAPPER_BLOCK_SIZE), prot); 931f80fb3a3SArd Biesheuvel 932f80fb3a3SArd Biesheuvel return dt_virt; 933f80fb3a3SArd Biesheuvel } 934f80fb3a3SArd Biesheuvel 9350f472d04SAnshuman Khandual int __init arch_ioremap_p4d_supported(void) 9360f472d04SAnshuman Khandual { 9370f472d04SAnshuman Khandual return 0; 9380f472d04SAnshuman Khandual } 9390f472d04SAnshuman Khandual 940324420bfSArd Biesheuvel int __init arch_ioremap_pud_supported(void) 941324420bfSArd Biesheuvel { 9427ba36eccSMark Rutland /* 9437ba36eccSMark Rutland * Only 4k granule supports level 1 block mappings. 9447ba36eccSMark Rutland * SW table walks can't handle removal of intermediate entries. 9457ba36eccSMark Rutland */ 9467ba36eccSMark Rutland return IS_ENABLED(CONFIG_ARM64_4K_PAGES) && 9477ba36eccSMark Rutland !IS_ENABLED(CONFIG_ARM64_PTDUMP_DEBUGFS); 948324420bfSArd Biesheuvel } 949324420bfSArd Biesheuvel 950324420bfSArd Biesheuvel int __init arch_ioremap_pmd_supported(void) 951324420bfSArd Biesheuvel { 9527ba36eccSMark Rutland /* See arch_ioremap_pud_supported() */ 9537ba36eccSMark Rutland return !IS_ENABLED(CONFIG_ARM64_PTDUMP_DEBUGFS); 954324420bfSArd Biesheuvel } 955324420bfSArd Biesheuvel 95620a004e7SWill Deacon int pud_set_huge(pud_t *pudp, phys_addr_t phys, pgprot_t prot) 957324420bfSArd Biesheuvel { 958f7f0097aSAnshuman Khandual pud_t new_pud = pfn_pud(__phys_to_pfn(phys), mk_pud_sect_prot(prot)); 95915122ee2SWill Deacon 96082034c23SLaura Abbott /* Only allow permission changes for now */ 96182034c23SLaura Abbott if (!pgattr_change_is_safe(READ_ONCE(pud_val(*pudp)), 96282034c23SLaura Abbott pud_val(new_pud))) 96315122ee2SWill Deacon return 0; 96415122ee2SWill Deacon 96587dedf7cSAnshuman Khandual VM_BUG_ON(phys & ~PUD_MASK); 96682034c23SLaura Abbott set_pud(pudp, new_pud); 967324420bfSArd Biesheuvel return 1; 968324420bfSArd Biesheuvel } 969324420bfSArd Biesheuvel 97020a004e7SWill Deacon int pmd_set_huge(pmd_t *pmdp, phys_addr_t phys, pgprot_t prot) 971324420bfSArd Biesheuvel { 972f7f0097aSAnshuman Khandual pmd_t new_pmd = pfn_pmd(__phys_to_pfn(phys), mk_pmd_sect_prot(prot)); 97315122ee2SWill Deacon 97482034c23SLaura Abbott /* Only allow permission changes for now */ 97582034c23SLaura Abbott if (!pgattr_change_is_safe(READ_ONCE(pmd_val(*pmdp)), 97682034c23SLaura Abbott pmd_val(new_pmd))) 97715122ee2SWill Deacon return 0; 97815122ee2SWill Deacon 97987dedf7cSAnshuman Khandual VM_BUG_ON(phys & ~PMD_MASK); 98082034c23SLaura Abbott set_pmd(pmdp, new_pmd); 981324420bfSArd Biesheuvel return 1; 982324420bfSArd Biesheuvel } 983324420bfSArd Biesheuvel 98420a004e7SWill Deacon int pud_clear_huge(pud_t *pudp) 985324420bfSArd Biesheuvel { 98620a004e7SWill Deacon if (!pud_sect(READ_ONCE(*pudp))) 987324420bfSArd Biesheuvel return 0; 98820a004e7SWill Deacon pud_clear(pudp); 989324420bfSArd Biesheuvel return 1; 990324420bfSArd Biesheuvel } 991324420bfSArd Biesheuvel 99220a004e7SWill Deacon int pmd_clear_huge(pmd_t *pmdp) 993324420bfSArd Biesheuvel { 99420a004e7SWill Deacon if (!pmd_sect(READ_ONCE(*pmdp))) 995324420bfSArd Biesheuvel return 0; 99620a004e7SWill Deacon pmd_clear(pmdp); 997324420bfSArd Biesheuvel return 1; 998324420bfSArd Biesheuvel } 999b6bdb751SToshi Kani 1000ec28bb9cSChintan Pandya int pmd_free_pte_page(pmd_t *pmdp, unsigned long addr) 1001b6bdb751SToshi Kani { 1002ec28bb9cSChintan Pandya pte_t *table; 1003ec28bb9cSChintan Pandya pmd_t pmd; 1004ec28bb9cSChintan Pandya 1005ec28bb9cSChintan Pandya pmd = READ_ONCE(*pmdp); 1006ec28bb9cSChintan Pandya 1007fac880c7SMark Rutland if (!pmd_table(pmd)) { 10089c006972SWill Deacon VM_WARN_ON(1); 1009ec28bb9cSChintan Pandya return 1; 1010b6bdb751SToshi Kani } 1011b6bdb751SToshi Kani 1012ec28bb9cSChintan Pandya table = pte_offset_kernel(pmdp, addr); 1013ec28bb9cSChintan Pandya pmd_clear(pmdp); 1014ec28bb9cSChintan Pandya __flush_tlb_kernel_pgtable(addr); 1015ec28bb9cSChintan Pandya pte_free_kernel(NULL, table); 1016ec28bb9cSChintan Pandya return 1; 1017ec28bb9cSChintan Pandya } 1018ec28bb9cSChintan Pandya 1019ec28bb9cSChintan Pandya int pud_free_pmd_page(pud_t *pudp, unsigned long addr) 1020b6bdb751SToshi Kani { 1021ec28bb9cSChintan Pandya pmd_t *table; 1022ec28bb9cSChintan Pandya pmd_t *pmdp; 1023ec28bb9cSChintan Pandya pud_t pud; 1024ec28bb9cSChintan Pandya unsigned long next, end; 1025ec28bb9cSChintan Pandya 1026ec28bb9cSChintan Pandya pud = READ_ONCE(*pudp); 1027ec28bb9cSChintan Pandya 1028fac880c7SMark Rutland if (!pud_table(pud)) { 10299c006972SWill Deacon VM_WARN_ON(1); 1030ec28bb9cSChintan Pandya return 1; 1031ec28bb9cSChintan Pandya } 1032ec28bb9cSChintan Pandya 1033ec28bb9cSChintan Pandya table = pmd_offset(pudp, addr); 1034ec28bb9cSChintan Pandya pmdp = table; 1035ec28bb9cSChintan Pandya next = addr; 1036ec28bb9cSChintan Pandya end = addr + PUD_SIZE; 1037ec28bb9cSChintan Pandya do { 1038ec28bb9cSChintan Pandya pmd_free_pte_page(pmdp, next); 1039ec28bb9cSChintan Pandya } while (pmdp++, next += PMD_SIZE, next != end); 1040ec28bb9cSChintan Pandya 1041ec28bb9cSChintan Pandya pud_clear(pudp); 1042ec28bb9cSChintan Pandya __flush_tlb_kernel_pgtable(addr); 1043ec28bb9cSChintan Pandya pmd_free(NULL, table); 1044ec28bb9cSChintan Pandya return 1; 1045b6bdb751SToshi Kani } 10464ab21506SRobin Murphy 10478e2d4340SWill Deacon int p4d_free_pud_page(p4d_t *p4d, unsigned long addr) 10488e2d4340SWill Deacon { 10498e2d4340SWill Deacon return 0; /* Don't attempt a block mapping */ 10508e2d4340SWill Deacon } 10518e2d4340SWill Deacon 10524ab21506SRobin Murphy #ifdef CONFIG_MEMORY_HOTPLUG 1053940519f0SMichal Hocko int arch_add_memory(int nid, u64 start, u64 size, 1054940519f0SMichal Hocko struct mhp_restrictions *restrictions) 10554ab21506SRobin Murphy { 10564ab21506SRobin Murphy int flags = 0; 10574ab21506SRobin Murphy 10584ab21506SRobin Murphy if (rodata_full || debug_pagealloc_enabled()) 10594ab21506SRobin Murphy flags = NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS; 10604ab21506SRobin Murphy 10614ab21506SRobin Murphy __create_pgd_mapping(swapper_pg_dir, start, __phys_to_virt(start), 1062475ba3fcSWill Deacon size, PAGE_KERNEL, __pgd_pgtable_alloc, flags); 10634ab21506SRobin Murphy 1064*16993c0fSDan Williams memblock_clear_nomap(start, size); 1065*16993c0fSDan Williams 10664ab21506SRobin Murphy return __add_pages(nid, start >> PAGE_SHIFT, size >> PAGE_SHIFT, 1067940519f0SMichal Hocko restrictions); 10684ab21506SRobin Murphy } 106922eb6346SDavid Hildenbrand void arch_remove_memory(int nid, u64 start, u64 size, 107022eb6346SDavid Hildenbrand struct vmem_altmap *altmap) 107122eb6346SDavid Hildenbrand { 107222eb6346SDavid Hildenbrand unsigned long start_pfn = start >> PAGE_SHIFT; 107322eb6346SDavid Hildenbrand unsigned long nr_pages = size >> PAGE_SHIFT; 107422eb6346SDavid Hildenbrand struct zone *zone; 107522eb6346SDavid Hildenbrand 107622eb6346SDavid Hildenbrand /* 107722eb6346SDavid Hildenbrand * FIXME: Cleanup page tables (also in arch_add_memory() in case 107822eb6346SDavid Hildenbrand * adding fails). Until then, this function should only be used 107922eb6346SDavid Hildenbrand * during memory hotplug (adding memory), not for memory 108022eb6346SDavid Hildenbrand * unplug. ARCH_ENABLE_MEMORY_HOTREMOVE must not be 108122eb6346SDavid Hildenbrand * unlocked yet. 108222eb6346SDavid Hildenbrand */ 108322eb6346SDavid Hildenbrand zone = page_zone(pfn_to_page(start_pfn)); 108422eb6346SDavid Hildenbrand __remove_pages(zone, start_pfn, nr_pages, altmap); 108522eb6346SDavid Hildenbrand } 108622eb6346SDavid Hildenbrand #endif 1087