xref: /openbmc/linux/arch/arm64/mm/mmu.c (revision 141d1497aae004808ecb156ca2bfb5e0bc460a2e)
1c1cc1552SCatalin Marinas /*
2c1cc1552SCatalin Marinas  * Based on arch/arm/mm/mmu.c
3c1cc1552SCatalin Marinas  *
4c1cc1552SCatalin Marinas  * Copyright (C) 1995-2005 Russell King
5c1cc1552SCatalin Marinas  * Copyright (C) 2012 ARM Ltd.
6c1cc1552SCatalin Marinas  *
7c1cc1552SCatalin Marinas  * This program is free software; you can redistribute it and/or modify
8c1cc1552SCatalin Marinas  * it under the terms of the GNU General Public License version 2 as
9c1cc1552SCatalin Marinas  * published by the Free Software Foundation.
10c1cc1552SCatalin Marinas  *
11c1cc1552SCatalin Marinas  * This program is distributed in the hope that it will be useful,
12c1cc1552SCatalin Marinas  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13c1cc1552SCatalin Marinas  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14c1cc1552SCatalin Marinas  * GNU General Public License for more details.
15c1cc1552SCatalin Marinas  *
16c1cc1552SCatalin Marinas  * You should have received a copy of the GNU General Public License
17c1cc1552SCatalin Marinas  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
18c1cc1552SCatalin Marinas  */
19c1cc1552SCatalin Marinas 
205a9e3e15SJisheng Zhang #include <linux/cache.h>
21c1cc1552SCatalin Marinas #include <linux/export.h>
22c1cc1552SCatalin Marinas #include <linux/kernel.h>
23c1cc1552SCatalin Marinas #include <linux/errno.h>
24c1cc1552SCatalin Marinas #include <linux/init.h>
2561bd93ceSArd Biesheuvel #include <linux/libfdt.h>
26c1cc1552SCatalin Marinas #include <linux/mman.h>
27c1cc1552SCatalin Marinas #include <linux/nodemask.h>
28c1cc1552SCatalin Marinas #include <linux/memblock.h>
29c1cc1552SCatalin Marinas #include <linux/fs.h>
302475ff9dSCatalin Marinas #include <linux/io.h>
312077be67SLaura Abbott #include <linux/mm.h>
32c1cc1552SCatalin Marinas 
3321ab99c2SMark Rutland #include <asm/barrier.h>
34c1cc1552SCatalin Marinas #include <asm/cputype.h>
35af86e597SLaura Abbott #include <asm/fixmap.h>
36068a17a5SMark Rutland #include <asm/kasan.h>
37b433dce0SSuzuki K. Poulose #include <asm/kernel-pgtable.h>
38c1cc1552SCatalin Marinas #include <asm/sections.h>
39c1cc1552SCatalin Marinas #include <asm/setup.h>
40c1cc1552SCatalin Marinas #include <asm/sizes.h>
41c1cc1552SCatalin Marinas #include <asm/tlb.h>
42c79b954bSJungseok Lee #include <asm/memblock.h>
43c1cc1552SCatalin Marinas #include <asm/mmu_context.h>
441404d6f1SLaura Abbott #include <asm/ptdump.h>
45c1cc1552SCatalin Marinas 
46dd006da2SArd Biesheuvel u64 idmap_t0sz = TCR_T0SZ(VA_BITS);
47dd006da2SArd Biesheuvel 
485a9e3e15SJisheng Zhang u64 kimage_voffset __ro_after_init;
49a7f8de16SArd Biesheuvel EXPORT_SYMBOL(kimage_voffset);
50a7f8de16SArd Biesheuvel 
51c1cc1552SCatalin Marinas /*
52c1cc1552SCatalin Marinas  * Empty_zero_page is a special page that is used for zero-initialized data
53c1cc1552SCatalin Marinas  * and COW.
54c1cc1552SCatalin Marinas  */
555227cfa7SMark Rutland unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)] __page_aligned_bss;
56c1cc1552SCatalin Marinas EXPORT_SYMBOL(empty_zero_page);
57c1cc1552SCatalin Marinas 
58f9040773SArd Biesheuvel static pte_t bm_pte[PTRS_PER_PTE] __page_aligned_bss;
59f9040773SArd Biesheuvel static pmd_t bm_pmd[PTRS_PER_PMD] __page_aligned_bss __maybe_unused;
60f9040773SArd Biesheuvel static pud_t bm_pud[PTRS_PER_PUD] __page_aligned_bss __maybe_unused;
61f9040773SArd Biesheuvel 
62c1cc1552SCatalin Marinas pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
63c1cc1552SCatalin Marinas 			      unsigned long size, pgprot_t vma_prot)
64c1cc1552SCatalin Marinas {
65c1cc1552SCatalin Marinas 	if (!pfn_valid(pfn))
66c1cc1552SCatalin Marinas 		return pgprot_noncached(vma_prot);
67c1cc1552SCatalin Marinas 	else if (file->f_flags & O_SYNC)
68c1cc1552SCatalin Marinas 		return pgprot_writecombine(vma_prot);
69c1cc1552SCatalin Marinas 	return vma_prot;
70c1cc1552SCatalin Marinas }
71c1cc1552SCatalin Marinas EXPORT_SYMBOL(phys_mem_access_prot);
72c1cc1552SCatalin Marinas 
73f4710445SMark Rutland static phys_addr_t __init early_pgtable_alloc(void)
74c1cc1552SCatalin Marinas {
757142392dSSuzuki K. Poulose 	phys_addr_t phys;
767142392dSSuzuki K. Poulose 	void *ptr;
777142392dSSuzuki K. Poulose 
7821ab99c2SMark Rutland 	phys = memblock_alloc(PAGE_SIZE, PAGE_SIZE);
79f4710445SMark Rutland 
80f4710445SMark Rutland 	/*
81f4710445SMark Rutland 	 * The FIX_{PGD,PUD,PMD} slots may be in active use, but the FIX_PTE
82f4710445SMark Rutland 	 * slot will be free, so we can (ab)use the FIX_PTE slot to initialise
83f4710445SMark Rutland 	 * any level of table.
84f4710445SMark Rutland 	 */
85f4710445SMark Rutland 	ptr = pte_set_fixmap(phys);
86f4710445SMark Rutland 
8721ab99c2SMark Rutland 	memset(ptr, 0, PAGE_SIZE);
8821ab99c2SMark Rutland 
89f4710445SMark Rutland 	/*
90f4710445SMark Rutland 	 * Implicit barriers also ensure the zeroed page is visible to the page
91f4710445SMark Rutland 	 * table walker
92f4710445SMark Rutland 	 */
93f4710445SMark Rutland 	pte_clear_fixmap();
94f4710445SMark Rutland 
95f4710445SMark Rutland 	return phys;
96c1cc1552SCatalin Marinas }
97c1cc1552SCatalin Marinas 
98e98216b5SArd Biesheuvel static bool pgattr_change_is_safe(u64 old, u64 new)
99e98216b5SArd Biesheuvel {
100e98216b5SArd Biesheuvel 	/*
101e98216b5SArd Biesheuvel 	 * The following mapping attributes may be updated in live
102e98216b5SArd Biesheuvel 	 * kernel mappings without the need for break-before-make.
103e98216b5SArd Biesheuvel 	 */
104e98216b5SArd Biesheuvel 	static const pteval_t mask = PTE_PXN | PTE_RDONLY | PTE_WRITE;
105e98216b5SArd Biesheuvel 
106*141d1497SArd Biesheuvel 	/* creating or taking down mappings is always safe */
107*141d1497SArd Biesheuvel 	if (old == 0 || new == 0)
108*141d1497SArd Biesheuvel 		return true;
109*141d1497SArd Biesheuvel 
110*141d1497SArd Biesheuvel 	/* live contiguous mappings may not be manipulated at all */
111*141d1497SArd Biesheuvel 	if ((old | new) & PTE_CONT)
112*141d1497SArd Biesheuvel 		return false;
113*141d1497SArd Biesheuvel 
114*141d1497SArd Biesheuvel 	return ((old ^ new) & ~mask) == 0;
115e98216b5SArd Biesheuvel }
116e98216b5SArd Biesheuvel 
117da141706SLaura Abbott static void alloc_init_pte(pmd_t *pmd, unsigned long addr,
118e393cf40SArd Biesheuvel 				  unsigned long end, phys_addr_t phys,
119da141706SLaura Abbott 				  pgprot_t prot,
120d81bbe6dSMark Rutland 				  phys_addr_t (*pgtable_alloc)(void))
121c1cc1552SCatalin Marinas {
122c1cc1552SCatalin Marinas 	pte_t *pte;
123c1cc1552SCatalin Marinas 
1244133af6cSCatalin Marinas 	BUG_ON(pmd_sect(*pmd));
1254133af6cSCatalin Marinas 	if (pmd_none(*pmd)) {
126132233a7SLaura Abbott 		phys_addr_t pte_phys;
127132233a7SLaura Abbott 		BUG_ON(!pgtable_alloc);
128132233a7SLaura Abbott 		pte_phys = pgtable_alloc();
129f4710445SMark Rutland 		pte = pte_set_fixmap(pte_phys);
130f4710445SMark Rutland 		__pmd_populate(pmd, pte_phys, PMD_TYPE_TABLE);
131f4710445SMark Rutland 		pte_clear_fixmap();
132c1cc1552SCatalin Marinas 	}
133a1c76574SMark Rutland 	BUG_ON(pmd_bad(*pmd));
134c1cc1552SCatalin Marinas 
135f4710445SMark Rutland 	pte = pte_set_fixmap_offset(pmd, addr);
136c1cc1552SCatalin Marinas 	do {
137e98216b5SArd Biesheuvel 		pte_t old_pte = *pte;
138e98216b5SArd Biesheuvel 
139e393cf40SArd Biesheuvel 		set_pte(pte, pfn_pte(__phys_to_pfn(phys), prot));
140e98216b5SArd Biesheuvel 
141e98216b5SArd Biesheuvel 		/*
142e98216b5SArd Biesheuvel 		 * After the PTE entry has been populated once, we
143e98216b5SArd Biesheuvel 		 * only allow updates to the permission attributes.
144e98216b5SArd Biesheuvel 		 */
145e98216b5SArd Biesheuvel 		BUG_ON(!pgattr_change_is_safe(pte_val(old_pte), pte_val(*pte)));
146e98216b5SArd Biesheuvel 
147e393cf40SArd Biesheuvel 		phys += PAGE_SIZE;
148667c2759SCatalin Marinas 	} while (pte++, addr += PAGE_SIZE, addr != end);
149f4710445SMark Rutland 
150f4710445SMark Rutland 	pte_clear_fixmap();
151c1cc1552SCatalin Marinas }
152c1cc1552SCatalin Marinas 
15311509a30SMark Rutland static void alloc_init_pmd(pud_t *pud, unsigned long addr, unsigned long end,
154da141706SLaura Abbott 				  phys_addr_t phys, pgprot_t prot,
15553e1b329SArd Biesheuvel 				  phys_addr_t (*pgtable_alloc)(void),
156f14c66ceSArd Biesheuvel 				  bool page_mappings_only)
157c1cc1552SCatalin Marinas {
158c1cc1552SCatalin Marinas 	pmd_t *pmd;
159c1cc1552SCatalin Marinas 	unsigned long next;
160c1cc1552SCatalin Marinas 
161c1cc1552SCatalin Marinas 	/*
162c1cc1552SCatalin Marinas 	 * Check for initial section mappings in the pgd/pud and remove them.
163c1cc1552SCatalin Marinas 	 */
1644133af6cSCatalin Marinas 	BUG_ON(pud_sect(*pud));
1654133af6cSCatalin Marinas 	if (pud_none(*pud)) {
166132233a7SLaura Abbott 		phys_addr_t pmd_phys;
167132233a7SLaura Abbott 		BUG_ON(!pgtable_alloc);
168132233a7SLaura Abbott 		pmd_phys = pgtable_alloc();
169f4710445SMark Rutland 		pmd = pmd_set_fixmap(pmd_phys);
170f4710445SMark Rutland 		__pud_populate(pud, pmd_phys, PUD_TYPE_TABLE);
171f4710445SMark Rutland 		pmd_clear_fixmap();
172c1cc1552SCatalin Marinas 	}
173a1c76574SMark Rutland 	BUG_ON(pud_bad(*pud));
174c1cc1552SCatalin Marinas 
175f4710445SMark Rutland 	pmd = pmd_set_fixmap_offset(pud, addr);
176c1cc1552SCatalin Marinas 	do {
177e98216b5SArd Biesheuvel 		pmd_t old_pmd = *pmd;
178e98216b5SArd Biesheuvel 
179c1cc1552SCatalin Marinas 		next = pmd_addr_end(addr, end);
180e98216b5SArd Biesheuvel 
181c1cc1552SCatalin Marinas 		/* try section mapping first */
18283863f25SLaura Abbott 		if (((addr | next | phys) & ~SECTION_MASK) == 0 &&
183f14c66ceSArd Biesheuvel 		      !page_mappings_only) {
184d81bbe6dSMark Rutland 			pmd_set_huge(pmd, phys, prot);
185e98216b5SArd Biesheuvel 
186a55f9929SCatalin Marinas 			/*
187e98216b5SArd Biesheuvel 			 * After the PMD entry has been populated once, we
188e98216b5SArd Biesheuvel 			 * only allow updates to the permission attributes.
189a55f9929SCatalin Marinas 			 */
190e98216b5SArd Biesheuvel 			BUG_ON(!pgattr_change_is_safe(pmd_val(old_pmd),
191e98216b5SArd Biesheuvel 						      pmd_val(*pmd)));
192a55f9929SCatalin Marinas 		} else {
193e393cf40SArd Biesheuvel 			alloc_init_pte(pmd, addr, next, phys,
194d81bbe6dSMark Rutland 				       prot, pgtable_alloc);
195e98216b5SArd Biesheuvel 
196e98216b5SArd Biesheuvel 			BUG_ON(pmd_val(old_pmd) != 0 &&
197e98216b5SArd Biesheuvel 			       pmd_val(old_pmd) != pmd_val(*pmd));
198a55f9929SCatalin Marinas 		}
199c1cc1552SCatalin Marinas 		phys += next - addr;
200c1cc1552SCatalin Marinas 	} while (pmd++, addr = next, addr != end);
201f4710445SMark Rutland 
202f4710445SMark Rutland 	pmd_clear_fixmap();
203c1cc1552SCatalin Marinas }
204c1cc1552SCatalin Marinas 
205da141706SLaura Abbott static inline bool use_1G_block(unsigned long addr, unsigned long next,
206da141706SLaura Abbott 			unsigned long phys)
207da141706SLaura Abbott {
208da141706SLaura Abbott 	if (PAGE_SHIFT != 12)
209da141706SLaura Abbott 		return false;
210da141706SLaura Abbott 
211da141706SLaura Abbott 	if (((addr | next | phys) & ~PUD_MASK) != 0)
212da141706SLaura Abbott 		return false;
213da141706SLaura Abbott 
214da141706SLaura Abbott 	return true;
215da141706SLaura Abbott }
216da141706SLaura Abbott 
21711509a30SMark Rutland static void alloc_init_pud(pgd_t *pgd, unsigned long addr, unsigned long end,
218da141706SLaura Abbott 				  phys_addr_t phys, pgprot_t prot,
21953e1b329SArd Biesheuvel 				  phys_addr_t (*pgtable_alloc)(void),
220f14c66ceSArd Biesheuvel 				  bool page_mappings_only)
221c1cc1552SCatalin Marinas {
222c79b954bSJungseok Lee 	pud_t *pud;
223c1cc1552SCatalin Marinas 	unsigned long next;
224c1cc1552SCatalin Marinas 
225c79b954bSJungseok Lee 	if (pgd_none(*pgd)) {
226132233a7SLaura Abbott 		phys_addr_t pud_phys;
227132233a7SLaura Abbott 		BUG_ON(!pgtable_alloc);
228132233a7SLaura Abbott 		pud_phys = pgtable_alloc();
229f4710445SMark Rutland 		__pgd_populate(pgd, pud_phys, PUD_TYPE_TABLE);
230c79b954bSJungseok Lee 	}
231c79b954bSJungseok Lee 	BUG_ON(pgd_bad(*pgd));
232c79b954bSJungseok Lee 
233f4710445SMark Rutland 	pud = pud_set_fixmap_offset(pgd, addr);
234c1cc1552SCatalin Marinas 	do {
235e98216b5SArd Biesheuvel 		pud_t old_pud = *pud;
236e98216b5SArd Biesheuvel 
237c1cc1552SCatalin Marinas 		next = pud_addr_end(addr, end);
238206a2a73SSteve Capper 
239206a2a73SSteve Capper 		/*
240206a2a73SSteve Capper 		 * For 4K granule only, attempt to put down a 1GB block
241206a2a73SSteve Capper 		 */
242f14c66ceSArd Biesheuvel 		if (use_1G_block(addr, next, phys) && !page_mappings_only) {
243c661cb1cSMark Rutland 			pud_set_huge(pud, phys, prot);
244206a2a73SSteve Capper 
245206a2a73SSteve Capper 			/*
246e98216b5SArd Biesheuvel 			 * After the PUD entry has been populated once, we
247e98216b5SArd Biesheuvel 			 * only allow updates to the permission attributes.
248206a2a73SSteve Capper 			 */
249e98216b5SArd Biesheuvel 			BUG_ON(!pgattr_change_is_safe(pud_val(old_pud),
250e98216b5SArd Biesheuvel 						      pud_val(*pud)));
251206a2a73SSteve Capper 		} else {
25211509a30SMark Rutland 			alloc_init_pmd(pud, addr, next, phys, prot,
253f14c66ceSArd Biesheuvel 				       pgtable_alloc, page_mappings_only);
254e98216b5SArd Biesheuvel 
255e98216b5SArd Biesheuvel 			BUG_ON(pud_val(old_pud) != 0 &&
256e98216b5SArd Biesheuvel 			       pud_val(old_pud) != pud_val(*pud));
257206a2a73SSteve Capper 		}
258c1cc1552SCatalin Marinas 		phys += next - addr;
259c1cc1552SCatalin Marinas 	} while (pud++, addr = next, addr != end);
260f4710445SMark Rutland 
261f4710445SMark Rutland 	pud_clear_fixmap();
262c1cc1552SCatalin Marinas }
263c1cc1552SCatalin Marinas 
26440f87d31SArd Biesheuvel static void __create_pgd_mapping(pgd_t *pgdir, phys_addr_t phys,
26540f87d31SArd Biesheuvel 				 unsigned long virt, phys_addr_t size,
26640f87d31SArd Biesheuvel 				 pgprot_t prot,
26753e1b329SArd Biesheuvel 				 phys_addr_t (*pgtable_alloc)(void),
268f14c66ceSArd Biesheuvel 				 bool page_mappings_only)
269c1cc1552SCatalin Marinas {
270c1cc1552SCatalin Marinas 	unsigned long addr, length, end, next;
27140f87d31SArd Biesheuvel 	pgd_t *pgd = pgd_offset_raw(pgdir, virt);
272c1cc1552SCatalin Marinas 
273cc5d2b3bSMark Rutland 	/*
274cc5d2b3bSMark Rutland 	 * If the virtual and physical address don't have the same offset
275cc5d2b3bSMark Rutland 	 * within a page, we cannot map the region as the caller expects.
276cc5d2b3bSMark Rutland 	 */
277cc5d2b3bSMark Rutland 	if (WARN_ON((phys ^ virt) & ~PAGE_MASK))
278cc5d2b3bSMark Rutland 		return;
279cc5d2b3bSMark Rutland 
2809c4e08a3SMark Rutland 	phys &= PAGE_MASK;
281c1cc1552SCatalin Marinas 	addr = virt & PAGE_MASK;
282c1cc1552SCatalin Marinas 	length = PAGE_ALIGN(size + (virt & ~PAGE_MASK));
283c1cc1552SCatalin Marinas 
284c1cc1552SCatalin Marinas 	end = addr + length;
285c1cc1552SCatalin Marinas 	do {
286c1cc1552SCatalin Marinas 		next = pgd_addr_end(addr, end);
28753e1b329SArd Biesheuvel 		alloc_init_pud(pgd, addr, next, phys, prot, pgtable_alloc,
288f14c66ceSArd Biesheuvel 			       page_mappings_only);
289c1cc1552SCatalin Marinas 		phys += next - addr;
290c1cc1552SCatalin Marinas 	} while (pgd++, addr = next, addr != end);
291c1cc1552SCatalin Marinas }
292c1cc1552SCatalin Marinas 
2931378dc3dSArd Biesheuvel static phys_addr_t pgd_pgtable_alloc(void)
294da141706SLaura Abbott {
29521ab99c2SMark Rutland 	void *ptr = (void *)__get_free_page(PGALLOC_GFP);
2961378dc3dSArd Biesheuvel 	if (!ptr || !pgtable_page_ctor(virt_to_page(ptr)))
2971378dc3dSArd Biesheuvel 		BUG();
29821ab99c2SMark Rutland 
29921ab99c2SMark Rutland 	/* Ensure the zeroed page is visible to the page table walker */
30021ab99c2SMark Rutland 	dsb(ishst);
301f4710445SMark Rutland 	return __pa(ptr);
302da141706SLaura Abbott }
303da141706SLaura Abbott 
304132233a7SLaura Abbott /*
305132233a7SLaura Abbott  * This function can only be used to modify existing table entries,
306132233a7SLaura Abbott  * without allocating new levels of table. Note that this permits the
307132233a7SLaura Abbott  * creation of new section or page entries.
308132233a7SLaura Abbott  */
309132233a7SLaura Abbott static void __init create_mapping_noalloc(phys_addr_t phys, unsigned long virt,
310da141706SLaura Abbott 				  phys_addr_t size, pgprot_t prot)
311d7ecbddfSMark Salter {
312d7ecbddfSMark Salter 	if (virt < VMALLOC_START) {
313d7ecbddfSMark Salter 		pr_warn("BUG: not creating mapping for %pa at 0x%016lx - outside kernel range\n",
314d7ecbddfSMark Salter 			&phys, virt);
315d7ecbddfSMark Salter 		return;
316d7ecbddfSMark Salter 	}
317f14c66ceSArd Biesheuvel 	__create_pgd_mapping(init_mm.pgd, phys, virt, size, prot, NULL, false);
318d7ecbddfSMark Salter }
319d7ecbddfSMark Salter 
3208ce837ceSArd Biesheuvel void __init create_pgd_mapping(struct mm_struct *mm, phys_addr_t phys,
3218ce837ceSArd Biesheuvel 			       unsigned long virt, phys_addr_t size,
322f14c66ceSArd Biesheuvel 			       pgprot_t prot, bool page_mappings_only)
3238ce837ceSArd Biesheuvel {
3241378dc3dSArd Biesheuvel 	BUG_ON(mm == &init_mm);
3251378dc3dSArd Biesheuvel 
32611509a30SMark Rutland 	__create_pgd_mapping(mm->pgd, phys, virt, size, prot,
327f14c66ceSArd Biesheuvel 			     pgd_pgtable_alloc, page_mappings_only);
328d7ecbddfSMark Salter }
329d7ecbddfSMark Salter 
330aa8c09beSArd Biesheuvel static void update_mapping_prot(phys_addr_t phys, unsigned long virt,
331da141706SLaura Abbott 				phys_addr_t size, pgprot_t prot)
332da141706SLaura Abbott {
333da141706SLaura Abbott 	if (virt < VMALLOC_START) {
334aa8c09beSArd Biesheuvel 		pr_warn("BUG: not updating mapping for %pa at 0x%016lx - outside kernel range\n",
335da141706SLaura Abbott 			&phys, virt);
336da141706SLaura Abbott 		return;
337da141706SLaura Abbott 	}
338da141706SLaura Abbott 
339eccc1bffSArd Biesheuvel 	__create_pgd_mapping(init_mm.pgd, phys, virt, size, prot, NULL, false);
340aa8c09beSArd Biesheuvel 
341aa8c09beSArd Biesheuvel 	/* flush the TLBs after updating live kernel mappings */
342aa8c09beSArd Biesheuvel 	flush_tlb_kernel_range(virt, virt + size);
343da141706SLaura Abbott }
344da141706SLaura Abbott 
345068a17a5SMark Rutland static void __init __map_memblock(pgd_t *pgd, phys_addr_t start, phys_addr_t end)
346da141706SLaura Abbott {
347eac8017fSMiles Chen 	phys_addr_t kernel_start = __pa_symbol(_text);
348eac8017fSMiles Chen 	phys_addr_t kernel_end = __pa_symbol(__init_begin);
349068a17a5SMark Rutland 
350da141706SLaura Abbott 	/*
351f9040773SArd Biesheuvel 	 * Take care not to create a writable alias for the
352f9040773SArd Biesheuvel 	 * read-only text and rodata sections of the kernel image.
353da141706SLaura Abbott 	 */
354da141706SLaura Abbott 
3559fdc14c5SArd Biesheuvel 	/* No overlap with the kernel text/rodata */
356068a17a5SMark Rutland 	if (end < kernel_start || start >= kernel_end) {
357068a17a5SMark Rutland 		__create_pgd_mapping(pgd, start, __phys_to_virt(start),
358068a17a5SMark Rutland 				     end - start, PAGE_KERNEL,
35953e1b329SArd Biesheuvel 				     early_pgtable_alloc,
360f14c66ceSArd Biesheuvel 				     debug_pagealloc_enabled());
361068a17a5SMark Rutland 		return;
362da141706SLaura Abbott 	}
363da141706SLaura Abbott 
364068a17a5SMark Rutland 	/*
3659fdc14c5SArd Biesheuvel 	 * This block overlaps the kernel text/rodata mappings.
366f9040773SArd Biesheuvel 	 * Map the portion(s) which don't overlap.
367068a17a5SMark Rutland 	 */
368068a17a5SMark Rutland 	if (start < kernel_start)
369068a17a5SMark Rutland 		__create_pgd_mapping(pgd, start,
370068a17a5SMark Rutland 				     __phys_to_virt(start),
371068a17a5SMark Rutland 				     kernel_start - start, PAGE_KERNEL,
37253e1b329SArd Biesheuvel 				     early_pgtable_alloc,
373f14c66ceSArd Biesheuvel 				     debug_pagealloc_enabled());
374068a17a5SMark Rutland 	if (kernel_end < end)
375068a17a5SMark Rutland 		__create_pgd_mapping(pgd, kernel_end,
376068a17a5SMark Rutland 				     __phys_to_virt(kernel_end),
377068a17a5SMark Rutland 				     end - kernel_end, PAGE_KERNEL,
37853e1b329SArd Biesheuvel 				     early_pgtable_alloc,
379f14c66ceSArd Biesheuvel 				     debug_pagealloc_enabled());
380f9040773SArd Biesheuvel 
381f9040773SArd Biesheuvel 	/*
3825ea5306cSArd Biesheuvel 	 * Map the linear alias of the [_text, __init_begin) interval
3835ea5306cSArd Biesheuvel 	 * as non-executable now, and remove the write permission in
3845ea5306cSArd Biesheuvel 	 * mark_linear_text_alias_ro() below (which will be called after
3855ea5306cSArd Biesheuvel 	 * alternative patching has completed). This makes the contents
3865ea5306cSArd Biesheuvel 	 * of the region accessible to subsystems such as hibernate,
3875ea5306cSArd Biesheuvel 	 * but protects it from inadvertent modification or execution.
388f9040773SArd Biesheuvel 	 */
389f9040773SArd Biesheuvel 	__create_pgd_mapping(pgd, kernel_start, __phys_to_virt(kernel_start),
3905ea5306cSArd Biesheuvel 			     kernel_end - kernel_start, PAGE_KERNEL,
391eccc1bffSArd Biesheuvel 			     early_pgtable_alloc, false);
392da141706SLaura Abbott }
393da141706SLaura Abbott 
3945ea5306cSArd Biesheuvel void __init mark_linear_text_alias_ro(void)
3955ea5306cSArd Biesheuvel {
3965ea5306cSArd Biesheuvel 	/*
3975ea5306cSArd Biesheuvel 	 * Remove the write permissions from the linear alias of .text/.rodata
3985ea5306cSArd Biesheuvel 	 */
3995ea5306cSArd Biesheuvel 	update_mapping_prot(__pa_symbol(_text), (unsigned long)lm_alias(_text),
4005ea5306cSArd Biesheuvel 			    (unsigned long)__init_begin - (unsigned long)_text,
4015ea5306cSArd Biesheuvel 			    PAGE_KERNEL_RO);
4025ea5306cSArd Biesheuvel }
4035ea5306cSArd Biesheuvel 
404068a17a5SMark Rutland static void __init map_mem(pgd_t *pgd)
405c1cc1552SCatalin Marinas {
406c1cc1552SCatalin Marinas 	struct memblock_region *reg;
407f6bc87c3SSteve Capper 
408c1cc1552SCatalin Marinas 	/* map all the memory banks */
409c1cc1552SCatalin Marinas 	for_each_memblock(memory, reg) {
410c1cc1552SCatalin Marinas 		phys_addr_t start = reg->base;
411c1cc1552SCatalin Marinas 		phys_addr_t end = start + reg->size;
412c1cc1552SCatalin Marinas 
413c1cc1552SCatalin Marinas 		if (start >= end)
414c1cc1552SCatalin Marinas 			break;
41568709f45SArd Biesheuvel 		if (memblock_is_nomap(reg))
41668709f45SArd Biesheuvel 			continue;
417c1cc1552SCatalin Marinas 
418068a17a5SMark Rutland 		__map_memblock(pgd, start, end);
419c1cc1552SCatalin Marinas 	}
420c1cc1552SCatalin Marinas }
421c1cc1552SCatalin Marinas 
422da141706SLaura Abbott void mark_rodata_ro(void)
423da141706SLaura Abbott {
4242f39b5f9SJeremy Linton 	unsigned long section_size;
425f9040773SArd Biesheuvel 
4262f39b5f9SJeremy Linton 	/*
4279fdc14c5SArd Biesheuvel 	 * mark .rodata as read only. Use __init_begin rather than __end_rodata
4289fdc14c5SArd Biesheuvel 	 * to cover NOTES and EXCEPTION_TABLE.
4292f39b5f9SJeremy Linton 	 */
4309fdc14c5SArd Biesheuvel 	section_size = (unsigned long)__init_begin - (unsigned long)__start_rodata;
431aa8c09beSArd Biesheuvel 	update_mapping_prot(__pa_symbol(__start_rodata), (unsigned long)__start_rodata,
4322f39b5f9SJeremy Linton 			    section_size, PAGE_KERNEL_RO);
433e98216b5SArd Biesheuvel 
4341404d6f1SLaura Abbott 	debug_checkwx();
435da141706SLaura Abbott }
436da141706SLaura Abbott 
4372c09ec06SArd Biesheuvel static void __init map_kernel_segment(pgd_t *pgd, void *va_start, void *va_end,
438f9040773SArd Biesheuvel 				      pgprot_t prot, struct vm_struct *vma)
439068a17a5SMark Rutland {
4402077be67SLaura Abbott 	phys_addr_t pa_start = __pa_symbol(va_start);
441068a17a5SMark Rutland 	unsigned long size = va_end - va_start;
442068a17a5SMark Rutland 
443068a17a5SMark Rutland 	BUG_ON(!PAGE_ALIGNED(pa_start));
444068a17a5SMark Rutland 	BUG_ON(!PAGE_ALIGNED(size));
445068a17a5SMark Rutland 
446068a17a5SMark Rutland 	__create_pgd_mapping(pgd, pa_start, (unsigned long)va_start, size, prot,
447eccc1bffSArd Biesheuvel 			     early_pgtable_alloc, false);
448f9040773SArd Biesheuvel 
449f9040773SArd Biesheuvel 	vma->addr	= va_start;
450f9040773SArd Biesheuvel 	vma->phys_addr	= pa_start;
451f9040773SArd Biesheuvel 	vma->size	= size;
452f9040773SArd Biesheuvel 	vma->flags	= VM_MAP;
453f9040773SArd Biesheuvel 	vma->caller	= __builtin_return_address(0);
454f9040773SArd Biesheuvel 
455f9040773SArd Biesheuvel 	vm_area_add_early(vma);
456068a17a5SMark Rutland }
457068a17a5SMark Rutland 
45828b066daSArd Biesheuvel static int __init parse_rodata(char *arg)
45928b066daSArd Biesheuvel {
46028b066daSArd Biesheuvel 	return strtobool(arg, &rodata_enabled);
46128b066daSArd Biesheuvel }
46228b066daSArd Biesheuvel early_param("rodata", parse_rodata);
46328b066daSArd Biesheuvel 
464068a17a5SMark Rutland /*
465068a17a5SMark Rutland  * Create fine-grained mappings for the kernel.
466068a17a5SMark Rutland  */
467068a17a5SMark Rutland static void __init map_kernel(pgd_t *pgd)
468068a17a5SMark Rutland {
4692ebe088bSArd Biesheuvel 	static struct vm_struct vmlinux_text, vmlinux_rodata, vmlinux_inittext,
4702ebe088bSArd Biesheuvel 				vmlinux_initdata, vmlinux_data;
471068a17a5SMark Rutland 
47228b066daSArd Biesheuvel 	/*
47328b066daSArd Biesheuvel 	 * External debuggers may need to write directly to the text
47428b066daSArd Biesheuvel 	 * mapping to install SW breakpoints. Allow this (only) when
47528b066daSArd Biesheuvel 	 * explicitly requested with rodata=off.
47628b066daSArd Biesheuvel 	 */
47728b066daSArd Biesheuvel 	pgprot_t text_prot = rodata_enabled ? PAGE_KERNEL_ROX : PAGE_KERNEL_EXEC;
47828b066daSArd Biesheuvel 
47928b066daSArd Biesheuvel 	map_kernel_segment(pgd, _text, _etext, text_prot, &vmlinux_text);
4802ebe088bSArd Biesheuvel 	map_kernel_segment(pgd, __start_rodata, __inittext_begin, PAGE_KERNEL,
4812ebe088bSArd Biesheuvel 			   &vmlinux_rodata);
4822ebe088bSArd Biesheuvel 	map_kernel_segment(pgd, __inittext_begin, __inittext_end, text_prot,
4832ebe088bSArd Biesheuvel 			   &vmlinux_inittext);
4842ebe088bSArd Biesheuvel 	map_kernel_segment(pgd, __initdata_begin, __initdata_end, PAGE_KERNEL,
4852ebe088bSArd Biesheuvel 			   &vmlinux_initdata);
4862c09ec06SArd Biesheuvel 	map_kernel_segment(pgd, _data, _end, PAGE_KERNEL, &vmlinux_data);
487068a17a5SMark Rutland 
488f9040773SArd Biesheuvel 	if (!pgd_val(*pgd_offset_raw(pgd, FIXADDR_START))) {
489068a17a5SMark Rutland 		/*
490f9040773SArd Biesheuvel 		 * The fixmap falls in a separate pgd to the kernel, and doesn't
491f9040773SArd Biesheuvel 		 * live in the carveout for the swapper_pg_dir. We can simply
492f9040773SArd Biesheuvel 		 * re-use the existing dir for the fixmap.
493068a17a5SMark Rutland 		 */
494f9040773SArd Biesheuvel 		set_pgd(pgd_offset_raw(pgd, FIXADDR_START),
495f9040773SArd Biesheuvel 			*pgd_offset_k(FIXADDR_START));
496f9040773SArd Biesheuvel 	} else if (CONFIG_PGTABLE_LEVELS > 3) {
497f9040773SArd Biesheuvel 		/*
498f9040773SArd Biesheuvel 		 * The fixmap shares its top level pgd entry with the kernel
499f9040773SArd Biesheuvel 		 * mapping. This can really only occur when we are running
500f9040773SArd Biesheuvel 		 * with 16k/4 levels, so we can simply reuse the pud level
501f9040773SArd Biesheuvel 		 * entry instead.
502f9040773SArd Biesheuvel 		 */
503f9040773SArd Biesheuvel 		BUG_ON(!IS_ENABLED(CONFIG_ARM64_16K_PAGES));
504f9040773SArd Biesheuvel 		set_pud(pud_set_fixmap_offset(pgd, FIXADDR_START),
5052077be67SLaura Abbott 			__pud(__pa_symbol(bm_pmd) | PUD_TYPE_TABLE));
506f9040773SArd Biesheuvel 		pud_clear_fixmap();
507f9040773SArd Biesheuvel 	} else {
508f9040773SArd Biesheuvel 		BUG();
509f9040773SArd Biesheuvel 	}
510068a17a5SMark Rutland 
511068a17a5SMark Rutland 	kasan_copy_shadow(pgd);
512068a17a5SMark Rutland }
513068a17a5SMark Rutland 
514c1cc1552SCatalin Marinas /*
515c1cc1552SCatalin Marinas  * paging_init() sets up the page tables, initialises the zone memory
516c1cc1552SCatalin Marinas  * maps and sets up the zero page.
517c1cc1552SCatalin Marinas  */
518c1cc1552SCatalin Marinas void __init paging_init(void)
519c1cc1552SCatalin Marinas {
520068a17a5SMark Rutland 	phys_addr_t pgd_phys = early_pgtable_alloc();
521068a17a5SMark Rutland 	pgd_t *pgd = pgd_set_fixmap(pgd_phys);
522068a17a5SMark Rutland 
523068a17a5SMark Rutland 	map_kernel(pgd);
524068a17a5SMark Rutland 	map_mem(pgd);
525068a17a5SMark Rutland 
526068a17a5SMark Rutland 	/*
527068a17a5SMark Rutland 	 * We want to reuse the original swapper_pg_dir so we don't have to
528068a17a5SMark Rutland 	 * communicate the new address to non-coherent secondaries in
529068a17a5SMark Rutland 	 * secondary_entry, and so cpu_switch_mm can generate the address with
530068a17a5SMark Rutland 	 * adrp+add rather than a load from some global variable.
531068a17a5SMark Rutland 	 *
532068a17a5SMark Rutland 	 * To do this we need to go via a temporary pgd.
533068a17a5SMark Rutland 	 */
534068a17a5SMark Rutland 	cpu_replace_ttbr1(__va(pgd_phys));
53512f043ffSArnd Bergmann 	memcpy(swapper_pg_dir, pgd, PGD_SIZE);
5362077be67SLaura Abbott 	cpu_replace_ttbr1(lm_alias(swapper_pg_dir));
537068a17a5SMark Rutland 
538068a17a5SMark Rutland 	pgd_clear_fixmap();
539068a17a5SMark Rutland 	memblock_free(pgd_phys, PAGE_SIZE);
540068a17a5SMark Rutland 
541068a17a5SMark Rutland 	/*
542068a17a5SMark Rutland 	 * We only reuse the PGD from the swapper_pg_dir, not the pud + pmd
543068a17a5SMark Rutland 	 * allocated with it.
544068a17a5SMark Rutland 	 */
5452077be67SLaura Abbott 	memblock_free(__pa_symbol(swapper_pg_dir) + PAGE_SIZE,
546068a17a5SMark Rutland 		      SWAPPER_DIR_SIZE - PAGE_SIZE);
547c1cc1552SCatalin Marinas }
548c1cc1552SCatalin Marinas 
549c1cc1552SCatalin Marinas /*
550c1cc1552SCatalin Marinas  * Check whether a kernel address is valid (derived from arch/x86/).
551c1cc1552SCatalin Marinas  */
552c1cc1552SCatalin Marinas int kern_addr_valid(unsigned long addr)
553c1cc1552SCatalin Marinas {
554c1cc1552SCatalin Marinas 	pgd_t *pgd;
555c1cc1552SCatalin Marinas 	pud_t *pud;
556c1cc1552SCatalin Marinas 	pmd_t *pmd;
557c1cc1552SCatalin Marinas 	pte_t *pte;
558c1cc1552SCatalin Marinas 
559c1cc1552SCatalin Marinas 	if ((((long)addr) >> VA_BITS) != -1UL)
560c1cc1552SCatalin Marinas 		return 0;
561c1cc1552SCatalin Marinas 
562c1cc1552SCatalin Marinas 	pgd = pgd_offset_k(addr);
563c1cc1552SCatalin Marinas 	if (pgd_none(*pgd))
564c1cc1552SCatalin Marinas 		return 0;
565c1cc1552SCatalin Marinas 
566c1cc1552SCatalin Marinas 	pud = pud_offset(pgd, addr);
567c1cc1552SCatalin Marinas 	if (pud_none(*pud))
568c1cc1552SCatalin Marinas 		return 0;
569c1cc1552SCatalin Marinas 
570206a2a73SSteve Capper 	if (pud_sect(*pud))
571206a2a73SSteve Capper 		return pfn_valid(pud_pfn(*pud));
572206a2a73SSteve Capper 
573c1cc1552SCatalin Marinas 	pmd = pmd_offset(pud, addr);
574c1cc1552SCatalin Marinas 	if (pmd_none(*pmd))
575c1cc1552SCatalin Marinas 		return 0;
576c1cc1552SCatalin Marinas 
577da6e4cb6SDave Anderson 	if (pmd_sect(*pmd))
578da6e4cb6SDave Anderson 		return pfn_valid(pmd_pfn(*pmd));
579da6e4cb6SDave Anderson 
580c1cc1552SCatalin Marinas 	pte = pte_offset_kernel(pmd, addr);
581c1cc1552SCatalin Marinas 	if (pte_none(*pte))
582c1cc1552SCatalin Marinas 		return 0;
583c1cc1552SCatalin Marinas 
584c1cc1552SCatalin Marinas 	return pfn_valid(pte_pfn(*pte));
585c1cc1552SCatalin Marinas }
586c1cc1552SCatalin Marinas #ifdef CONFIG_SPARSEMEM_VMEMMAP
587b433dce0SSuzuki K. Poulose #if !ARM64_SWAPPER_USES_SECTION_MAPS
5880aad818bSJohannes Weiner int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node)
589c1cc1552SCatalin Marinas {
5900aad818bSJohannes Weiner 	return vmemmap_populate_basepages(start, end, node);
591c1cc1552SCatalin Marinas }
592b433dce0SSuzuki K. Poulose #else	/* !ARM64_SWAPPER_USES_SECTION_MAPS */
5930aad818bSJohannes Weiner int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node)
594c1cc1552SCatalin Marinas {
5950aad818bSJohannes Weiner 	unsigned long addr = start;
596c1cc1552SCatalin Marinas 	unsigned long next;
597c1cc1552SCatalin Marinas 	pgd_t *pgd;
598c1cc1552SCatalin Marinas 	pud_t *pud;
599c1cc1552SCatalin Marinas 	pmd_t *pmd;
600c1cc1552SCatalin Marinas 
601c1cc1552SCatalin Marinas 	do {
602c1cc1552SCatalin Marinas 		next = pmd_addr_end(addr, end);
603c1cc1552SCatalin Marinas 
604c1cc1552SCatalin Marinas 		pgd = vmemmap_pgd_populate(addr, node);
605c1cc1552SCatalin Marinas 		if (!pgd)
606c1cc1552SCatalin Marinas 			return -ENOMEM;
607c1cc1552SCatalin Marinas 
608c1cc1552SCatalin Marinas 		pud = vmemmap_pud_populate(pgd, addr, node);
609c1cc1552SCatalin Marinas 		if (!pud)
610c1cc1552SCatalin Marinas 			return -ENOMEM;
611c1cc1552SCatalin Marinas 
612c1cc1552SCatalin Marinas 		pmd = pmd_offset(pud, addr);
613c1cc1552SCatalin Marinas 		if (pmd_none(*pmd)) {
614c1cc1552SCatalin Marinas 			void *p = NULL;
615c1cc1552SCatalin Marinas 
616c1cc1552SCatalin Marinas 			p = vmemmap_alloc_block_buf(PMD_SIZE, node);
617c1cc1552SCatalin Marinas 			if (!p)
618c1cc1552SCatalin Marinas 				return -ENOMEM;
619c1cc1552SCatalin Marinas 
620a501e324SCatalin Marinas 			set_pmd(pmd, __pmd(__pa(p) | PROT_SECT_NORMAL));
621c1cc1552SCatalin Marinas 		} else
622c1cc1552SCatalin Marinas 			vmemmap_verify((pte_t *)pmd, node, addr, next);
623c1cc1552SCatalin Marinas 	} while (addr = next, addr != end);
624c1cc1552SCatalin Marinas 
625c1cc1552SCatalin Marinas 	return 0;
626c1cc1552SCatalin Marinas }
627c1cc1552SCatalin Marinas #endif	/* CONFIG_ARM64_64K_PAGES */
6280aad818bSJohannes Weiner void vmemmap_free(unsigned long start, unsigned long end)
6290197518cSTang Chen {
6300197518cSTang Chen }
631c1cc1552SCatalin Marinas #endif	/* CONFIG_SPARSEMEM_VMEMMAP */
632af86e597SLaura Abbott 
633af86e597SLaura Abbott static inline pud_t * fixmap_pud(unsigned long addr)
634af86e597SLaura Abbott {
635af86e597SLaura Abbott 	pgd_t *pgd = pgd_offset_k(addr);
636af86e597SLaura Abbott 
637af86e597SLaura Abbott 	BUG_ON(pgd_none(*pgd) || pgd_bad(*pgd));
638af86e597SLaura Abbott 
639157962f5SArd Biesheuvel 	return pud_offset_kimg(pgd, addr);
640af86e597SLaura Abbott }
641af86e597SLaura Abbott 
642af86e597SLaura Abbott static inline pmd_t * fixmap_pmd(unsigned long addr)
643af86e597SLaura Abbott {
644af86e597SLaura Abbott 	pud_t *pud = fixmap_pud(addr);
645af86e597SLaura Abbott 
646af86e597SLaura Abbott 	BUG_ON(pud_none(*pud) || pud_bad(*pud));
647af86e597SLaura Abbott 
648157962f5SArd Biesheuvel 	return pmd_offset_kimg(pud, addr);
649af86e597SLaura Abbott }
650af86e597SLaura Abbott 
651af86e597SLaura Abbott static inline pte_t * fixmap_pte(unsigned long addr)
652af86e597SLaura Abbott {
653157962f5SArd Biesheuvel 	return &bm_pte[pte_index(addr)];
654af86e597SLaura Abbott }
655af86e597SLaura Abbott 
6562077be67SLaura Abbott /*
6572077be67SLaura Abbott  * The p*d_populate functions call virt_to_phys implicitly so they can't be used
6582077be67SLaura Abbott  * directly on kernel symbols (bm_p*d). This function is called too early to use
6592077be67SLaura Abbott  * lm_alias so __p*d_populate functions must be used to populate with the
6602077be67SLaura Abbott  * physical address from __pa_symbol.
6612077be67SLaura Abbott  */
662af86e597SLaura Abbott void __init early_fixmap_init(void)
663af86e597SLaura Abbott {
664af86e597SLaura Abbott 	pgd_t *pgd;
665af86e597SLaura Abbott 	pud_t *pud;
666af86e597SLaura Abbott 	pmd_t *pmd;
667af86e597SLaura Abbott 	unsigned long addr = FIXADDR_START;
668af86e597SLaura Abbott 
669af86e597SLaura Abbott 	pgd = pgd_offset_k(addr);
670f80fb3a3SArd Biesheuvel 	if (CONFIG_PGTABLE_LEVELS > 3 &&
6712077be67SLaura Abbott 	    !(pgd_none(*pgd) || pgd_page_paddr(*pgd) == __pa_symbol(bm_pud))) {
672f9040773SArd Biesheuvel 		/*
673f9040773SArd Biesheuvel 		 * We only end up here if the kernel mapping and the fixmap
674f9040773SArd Biesheuvel 		 * share the top level pgd entry, which should only happen on
675f9040773SArd Biesheuvel 		 * 16k/4 levels configurations.
676f9040773SArd Biesheuvel 		 */
677f9040773SArd Biesheuvel 		BUG_ON(!IS_ENABLED(CONFIG_ARM64_16K_PAGES));
678f9040773SArd Biesheuvel 		pud = pud_offset_kimg(pgd, addr);
679f9040773SArd Biesheuvel 	} else {
6802077be67SLaura Abbott 		if (pgd_none(*pgd))
6812077be67SLaura Abbott 			__pgd_populate(pgd, __pa_symbol(bm_pud), PUD_TYPE_TABLE);
682157962f5SArd Biesheuvel 		pud = fixmap_pud(addr);
683f9040773SArd Biesheuvel 	}
6842077be67SLaura Abbott 	if (pud_none(*pud))
6852077be67SLaura Abbott 		__pud_populate(pud, __pa_symbol(bm_pmd), PMD_TYPE_TABLE);
686157962f5SArd Biesheuvel 	pmd = fixmap_pmd(addr);
6872077be67SLaura Abbott 	__pmd_populate(pmd, __pa_symbol(bm_pte), PMD_TYPE_TABLE);
688af86e597SLaura Abbott 
689af86e597SLaura Abbott 	/*
690af86e597SLaura Abbott 	 * The boot-ioremap range spans multiple pmds, for which
691157962f5SArd Biesheuvel 	 * we are not prepared:
692af86e597SLaura Abbott 	 */
693af86e597SLaura Abbott 	BUILD_BUG_ON((__fix_to_virt(FIX_BTMAP_BEGIN) >> PMD_SHIFT)
694af86e597SLaura Abbott 		     != (__fix_to_virt(FIX_BTMAP_END) >> PMD_SHIFT));
695af86e597SLaura Abbott 
696af86e597SLaura Abbott 	if ((pmd != fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN)))
697af86e597SLaura Abbott 	     || pmd != fixmap_pmd(fix_to_virt(FIX_BTMAP_END))) {
698af86e597SLaura Abbott 		WARN_ON(1);
699af86e597SLaura Abbott 		pr_warn("pmd %p != %p, %p\n",
700af86e597SLaura Abbott 			pmd, fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN)),
701af86e597SLaura Abbott 			fixmap_pmd(fix_to_virt(FIX_BTMAP_END)));
702af86e597SLaura Abbott 		pr_warn("fix_to_virt(FIX_BTMAP_BEGIN): %08lx\n",
703af86e597SLaura Abbott 			fix_to_virt(FIX_BTMAP_BEGIN));
704af86e597SLaura Abbott 		pr_warn("fix_to_virt(FIX_BTMAP_END):   %08lx\n",
705af86e597SLaura Abbott 			fix_to_virt(FIX_BTMAP_END));
706af86e597SLaura Abbott 
707af86e597SLaura Abbott 		pr_warn("FIX_BTMAP_END:       %d\n", FIX_BTMAP_END);
708af86e597SLaura Abbott 		pr_warn("FIX_BTMAP_BEGIN:     %d\n", FIX_BTMAP_BEGIN);
709af86e597SLaura Abbott 	}
710af86e597SLaura Abbott }
711af86e597SLaura Abbott 
712af86e597SLaura Abbott void __set_fixmap(enum fixed_addresses idx,
713af86e597SLaura Abbott 			       phys_addr_t phys, pgprot_t flags)
714af86e597SLaura Abbott {
715af86e597SLaura Abbott 	unsigned long addr = __fix_to_virt(idx);
716af86e597SLaura Abbott 	pte_t *pte;
717af86e597SLaura Abbott 
718b63dbef9SMark Rutland 	BUG_ON(idx <= FIX_HOLE || idx >= __end_of_fixed_addresses);
719af86e597SLaura Abbott 
720af86e597SLaura Abbott 	pte = fixmap_pte(addr);
721af86e597SLaura Abbott 
722af86e597SLaura Abbott 	if (pgprot_val(flags)) {
723af86e597SLaura Abbott 		set_pte(pte, pfn_pte(phys >> PAGE_SHIFT, flags));
724af86e597SLaura Abbott 	} else {
725af86e597SLaura Abbott 		pte_clear(&init_mm, addr, pte);
726af86e597SLaura Abbott 		flush_tlb_kernel_range(addr, addr+PAGE_SIZE);
727af86e597SLaura Abbott 	}
728af86e597SLaura Abbott }
72961bd93ceSArd Biesheuvel 
730f80fb3a3SArd Biesheuvel void *__init __fixmap_remap_fdt(phys_addr_t dt_phys, int *size, pgprot_t prot)
73161bd93ceSArd Biesheuvel {
73261bd93ceSArd Biesheuvel 	const u64 dt_virt_base = __fix_to_virt(FIX_FDT);
733f80fb3a3SArd Biesheuvel 	int offset;
73461bd93ceSArd Biesheuvel 	void *dt_virt;
73561bd93ceSArd Biesheuvel 
73661bd93ceSArd Biesheuvel 	/*
73761bd93ceSArd Biesheuvel 	 * Check whether the physical FDT address is set and meets the minimum
73861bd93ceSArd Biesheuvel 	 * alignment requirement. Since we are relying on MIN_FDT_ALIGN to be
73904a84810SArd Biesheuvel 	 * at least 8 bytes so that we can always access the magic and size
74004a84810SArd Biesheuvel 	 * fields of the FDT header after mapping the first chunk, double check
74104a84810SArd Biesheuvel 	 * here if that is indeed the case.
74261bd93ceSArd Biesheuvel 	 */
74361bd93ceSArd Biesheuvel 	BUILD_BUG_ON(MIN_FDT_ALIGN < 8);
74461bd93ceSArd Biesheuvel 	if (!dt_phys || dt_phys % MIN_FDT_ALIGN)
74561bd93ceSArd Biesheuvel 		return NULL;
74661bd93ceSArd Biesheuvel 
74761bd93ceSArd Biesheuvel 	/*
74861bd93ceSArd Biesheuvel 	 * Make sure that the FDT region can be mapped without the need to
74961bd93ceSArd Biesheuvel 	 * allocate additional translation table pages, so that it is safe
750132233a7SLaura Abbott 	 * to call create_mapping_noalloc() this early.
75161bd93ceSArd Biesheuvel 	 *
75261bd93ceSArd Biesheuvel 	 * On 64k pages, the FDT will be mapped using PTEs, so we need to
75361bd93ceSArd Biesheuvel 	 * be in the same PMD as the rest of the fixmap.
75461bd93ceSArd Biesheuvel 	 * On 4k pages, we'll use section mappings for the FDT so we only
75561bd93ceSArd Biesheuvel 	 * have to be in the same PUD.
75661bd93ceSArd Biesheuvel 	 */
75761bd93ceSArd Biesheuvel 	BUILD_BUG_ON(dt_virt_base % SZ_2M);
75861bd93ceSArd Biesheuvel 
759b433dce0SSuzuki K. Poulose 	BUILD_BUG_ON(__fix_to_virt(FIX_FDT_END) >> SWAPPER_TABLE_SHIFT !=
760b433dce0SSuzuki K. Poulose 		     __fix_to_virt(FIX_BTMAP_BEGIN) >> SWAPPER_TABLE_SHIFT);
76161bd93ceSArd Biesheuvel 
762b433dce0SSuzuki K. Poulose 	offset = dt_phys % SWAPPER_BLOCK_SIZE;
76361bd93ceSArd Biesheuvel 	dt_virt = (void *)dt_virt_base + offset;
76461bd93ceSArd Biesheuvel 
76561bd93ceSArd Biesheuvel 	/* map the first chunk so we can read the size from the header */
766132233a7SLaura Abbott 	create_mapping_noalloc(round_down(dt_phys, SWAPPER_BLOCK_SIZE),
767132233a7SLaura Abbott 			dt_virt_base, SWAPPER_BLOCK_SIZE, prot);
76861bd93ceSArd Biesheuvel 
76904a84810SArd Biesheuvel 	if (fdt_magic(dt_virt) != FDT_MAGIC)
77061bd93ceSArd Biesheuvel 		return NULL;
77161bd93ceSArd Biesheuvel 
772f80fb3a3SArd Biesheuvel 	*size = fdt_totalsize(dt_virt);
773f80fb3a3SArd Biesheuvel 	if (*size > MAX_FDT_SIZE)
77461bd93ceSArd Biesheuvel 		return NULL;
77561bd93ceSArd Biesheuvel 
776f80fb3a3SArd Biesheuvel 	if (offset + *size > SWAPPER_BLOCK_SIZE)
777132233a7SLaura Abbott 		create_mapping_noalloc(round_down(dt_phys, SWAPPER_BLOCK_SIZE), dt_virt_base,
778f80fb3a3SArd Biesheuvel 			       round_up(offset + *size, SWAPPER_BLOCK_SIZE), prot);
779f80fb3a3SArd Biesheuvel 
780f80fb3a3SArd Biesheuvel 	return dt_virt;
781f80fb3a3SArd Biesheuvel }
782f80fb3a3SArd Biesheuvel 
783f80fb3a3SArd Biesheuvel void *__init fixmap_remap_fdt(phys_addr_t dt_phys)
784f80fb3a3SArd Biesheuvel {
785f80fb3a3SArd Biesheuvel 	void *dt_virt;
786f80fb3a3SArd Biesheuvel 	int size;
787f80fb3a3SArd Biesheuvel 
788f80fb3a3SArd Biesheuvel 	dt_virt = __fixmap_remap_fdt(dt_phys, &size, PAGE_KERNEL_RO);
789f80fb3a3SArd Biesheuvel 	if (!dt_virt)
790f80fb3a3SArd Biesheuvel 		return NULL;
79161bd93ceSArd Biesheuvel 
79261bd93ceSArd Biesheuvel 	memblock_reserve(dt_phys, size);
79361bd93ceSArd Biesheuvel 	return dt_virt;
79461bd93ceSArd Biesheuvel }
795324420bfSArd Biesheuvel 
796324420bfSArd Biesheuvel int __init arch_ioremap_pud_supported(void)
797324420bfSArd Biesheuvel {
798324420bfSArd Biesheuvel 	/* only 4k granule supports level 1 block mappings */
799324420bfSArd Biesheuvel 	return IS_ENABLED(CONFIG_ARM64_4K_PAGES);
800324420bfSArd Biesheuvel }
801324420bfSArd Biesheuvel 
802324420bfSArd Biesheuvel int __init arch_ioremap_pmd_supported(void)
803324420bfSArd Biesheuvel {
804324420bfSArd Biesheuvel 	return 1;
805324420bfSArd Biesheuvel }
806324420bfSArd Biesheuvel 
807324420bfSArd Biesheuvel int pud_set_huge(pud_t *pud, phys_addr_t phys, pgprot_t prot)
808324420bfSArd Biesheuvel {
809324420bfSArd Biesheuvel 	BUG_ON(phys & ~PUD_MASK);
810324420bfSArd Biesheuvel 	set_pud(pud, __pud(phys | PUD_TYPE_SECT | pgprot_val(mk_sect_prot(prot))));
811324420bfSArd Biesheuvel 	return 1;
812324420bfSArd Biesheuvel }
813324420bfSArd Biesheuvel 
814324420bfSArd Biesheuvel int pmd_set_huge(pmd_t *pmd, phys_addr_t phys, pgprot_t prot)
815324420bfSArd Biesheuvel {
816324420bfSArd Biesheuvel 	BUG_ON(phys & ~PMD_MASK);
817324420bfSArd Biesheuvel 	set_pmd(pmd, __pmd(phys | PMD_TYPE_SECT | pgprot_val(mk_sect_prot(prot))));
818324420bfSArd Biesheuvel 	return 1;
819324420bfSArd Biesheuvel }
820324420bfSArd Biesheuvel 
821324420bfSArd Biesheuvel int pud_clear_huge(pud_t *pud)
822324420bfSArd Biesheuvel {
823324420bfSArd Biesheuvel 	if (!pud_sect(*pud))
824324420bfSArd Biesheuvel 		return 0;
825324420bfSArd Biesheuvel 	pud_clear(pud);
826324420bfSArd Biesheuvel 	return 1;
827324420bfSArd Biesheuvel }
828324420bfSArd Biesheuvel 
829324420bfSArd Biesheuvel int pmd_clear_huge(pmd_t *pmd)
830324420bfSArd Biesheuvel {
831324420bfSArd Biesheuvel 	if (!pmd_sect(*pmd))
832324420bfSArd Biesheuvel 		return 0;
833324420bfSArd Biesheuvel 	pmd_clear(pmd);
834324420bfSArd Biesheuvel 	return 1;
835324420bfSArd Biesheuvel }
836