1c1cc1552SCatalin Marinas /* 2c1cc1552SCatalin Marinas * Based on arch/arm/mm/mmu.c 3c1cc1552SCatalin Marinas * 4c1cc1552SCatalin Marinas * Copyright (C) 1995-2005 Russell King 5c1cc1552SCatalin Marinas * Copyright (C) 2012 ARM Ltd. 6c1cc1552SCatalin Marinas * 7c1cc1552SCatalin Marinas * This program is free software; you can redistribute it and/or modify 8c1cc1552SCatalin Marinas * it under the terms of the GNU General Public License version 2 as 9c1cc1552SCatalin Marinas * published by the Free Software Foundation. 10c1cc1552SCatalin Marinas * 11c1cc1552SCatalin Marinas * This program is distributed in the hope that it will be useful, 12c1cc1552SCatalin Marinas * but WITHOUT ANY WARRANTY; without even the implied warranty of 13c1cc1552SCatalin Marinas * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14c1cc1552SCatalin Marinas * GNU General Public License for more details. 15c1cc1552SCatalin Marinas * 16c1cc1552SCatalin Marinas * You should have received a copy of the GNU General Public License 17c1cc1552SCatalin Marinas * along with this program. If not, see <http://www.gnu.org/licenses/>. 18c1cc1552SCatalin Marinas */ 19c1cc1552SCatalin Marinas 20c1cc1552SCatalin Marinas #include <linux/export.h> 21c1cc1552SCatalin Marinas #include <linux/kernel.h> 22c1cc1552SCatalin Marinas #include <linux/errno.h> 23c1cc1552SCatalin Marinas #include <linux/init.h> 2461bd93ceSArd Biesheuvel #include <linux/libfdt.h> 25c1cc1552SCatalin Marinas #include <linux/mman.h> 26c1cc1552SCatalin Marinas #include <linux/nodemask.h> 27c1cc1552SCatalin Marinas #include <linux/memblock.h> 28c1cc1552SCatalin Marinas #include <linux/fs.h> 292475ff9dSCatalin Marinas #include <linux/io.h> 3041089357SCatalin Marinas #include <linux/slab.h> 31da141706SLaura Abbott #include <linux/stop_machine.h> 32c1cc1552SCatalin Marinas 3321ab99c2SMark Rutland #include <asm/barrier.h> 34c1cc1552SCatalin Marinas #include <asm/cputype.h> 35af86e597SLaura Abbott #include <asm/fixmap.h> 36b433dce0SSuzuki K. Poulose #include <asm/kernel-pgtable.h> 37c1cc1552SCatalin Marinas #include <asm/sections.h> 38c1cc1552SCatalin Marinas #include <asm/setup.h> 39c1cc1552SCatalin Marinas #include <asm/sizes.h> 40c1cc1552SCatalin Marinas #include <asm/tlb.h> 41c79b954bSJungseok Lee #include <asm/memblock.h> 42c1cc1552SCatalin Marinas #include <asm/mmu_context.h> 43c1cc1552SCatalin Marinas 44c1cc1552SCatalin Marinas #include "mm.h" 45c1cc1552SCatalin Marinas 46dd006da2SArd Biesheuvel u64 idmap_t0sz = TCR_T0SZ(VA_BITS); 47dd006da2SArd Biesheuvel 48c1cc1552SCatalin Marinas /* 49c1cc1552SCatalin Marinas * Empty_zero_page is a special page that is used for zero-initialized data 50c1cc1552SCatalin Marinas * and COW. 51c1cc1552SCatalin Marinas */ 525227cfa7SMark Rutland unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)] __page_aligned_bss; 53c1cc1552SCatalin Marinas EXPORT_SYMBOL(empty_zero_page); 54c1cc1552SCatalin Marinas 55c1cc1552SCatalin Marinas pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, 56c1cc1552SCatalin Marinas unsigned long size, pgprot_t vma_prot) 57c1cc1552SCatalin Marinas { 58c1cc1552SCatalin Marinas if (!pfn_valid(pfn)) 59c1cc1552SCatalin Marinas return pgprot_noncached(vma_prot); 60c1cc1552SCatalin Marinas else if (file->f_flags & O_SYNC) 61c1cc1552SCatalin Marinas return pgprot_writecombine(vma_prot); 62c1cc1552SCatalin Marinas return vma_prot; 63c1cc1552SCatalin Marinas } 64c1cc1552SCatalin Marinas EXPORT_SYMBOL(phys_mem_access_prot); 65c1cc1552SCatalin Marinas 66f4710445SMark Rutland static phys_addr_t __init early_pgtable_alloc(void) 67c1cc1552SCatalin Marinas { 687142392dSSuzuki K. Poulose phys_addr_t phys; 697142392dSSuzuki K. Poulose void *ptr; 707142392dSSuzuki K. Poulose 7121ab99c2SMark Rutland phys = memblock_alloc(PAGE_SIZE, PAGE_SIZE); 727142392dSSuzuki K. Poulose BUG_ON(!phys); 73f4710445SMark Rutland 74f4710445SMark Rutland /* 75f4710445SMark Rutland * The FIX_{PGD,PUD,PMD} slots may be in active use, but the FIX_PTE 76f4710445SMark Rutland * slot will be free, so we can (ab)use the FIX_PTE slot to initialise 77f4710445SMark Rutland * any level of table. 78f4710445SMark Rutland */ 79f4710445SMark Rutland ptr = pte_set_fixmap(phys); 80f4710445SMark Rutland 8121ab99c2SMark Rutland memset(ptr, 0, PAGE_SIZE); 8221ab99c2SMark Rutland 83f4710445SMark Rutland /* 84f4710445SMark Rutland * Implicit barriers also ensure the zeroed page is visible to the page 85f4710445SMark Rutland * table walker 86f4710445SMark Rutland */ 87f4710445SMark Rutland pte_clear_fixmap(); 88f4710445SMark Rutland 89f4710445SMark Rutland return phys; 90c1cc1552SCatalin Marinas } 91c1cc1552SCatalin Marinas 92da141706SLaura Abbott /* 93da141706SLaura Abbott * remap a PMD into pages 94da141706SLaura Abbott */ 95da141706SLaura Abbott static void split_pmd(pmd_t *pmd, pte_t *pte) 96da141706SLaura Abbott { 97da141706SLaura Abbott unsigned long pfn = pmd_pfn(*pmd); 98da141706SLaura Abbott int i = 0; 99da141706SLaura Abbott 100da141706SLaura Abbott do { 101da141706SLaura Abbott /* 102da141706SLaura Abbott * Need to have the least restrictive permissions available 103667c2759SCatalin Marinas * permissions will be fixed up later 104da141706SLaura Abbott */ 105667c2759SCatalin Marinas set_pte(pte, pfn_pte(pfn, PAGE_KERNEL_EXEC)); 106da141706SLaura Abbott pfn++; 107da141706SLaura Abbott } while (pte++, i++, i < PTRS_PER_PTE); 108da141706SLaura Abbott } 109da141706SLaura Abbott 110da141706SLaura Abbott static void alloc_init_pte(pmd_t *pmd, unsigned long addr, 111667c2759SCatalin Marinas unsigned long end, unsigned long pfn, 112da141706SLaura Abbott pgprot_t prot, 113f4710445SMark Rutland phys_addr_t (*pgtable_alloc)(void)) 114c1cc1552SCatalin Marinas { 115c1cc1552SCatalin Marinas pte_t *pte; 116c1cc1552SCatalin Marinas 117a1c76574SMark Rutland if (pmd_none(*pmd) || pmd_sect(*pmd)) { 118f4710445SMark Rutland phys_addr_t pte_phys = pgtable_alloc(); 119f4710445SMark Rutland pte = pte_set_fixmap(pte_phys); 120da141706SLaura Abbott if (pmd_sect(*pmd)) 121da141706SLaura Abbott split_pmd(pmd, pte); 122f4710445SMark Rutland __pmd_populate(pmd, pte_phys, PMD_TYPE_TABLE); 123da141706SLaura Abbott flush_tlb_all(); 124f4710445SMark Rutland pte_clear_fixmap(); 125c1cc1552SCatalin Marinas } 126a1c76574SMark Rutland BUG_ON(pmd_bad(*pmd)); 127c1cc1552SCatalin Marinas 128f4710445SMark Rutland pte = pte_set_fixmap_offset(pmd, addr); 129c1cc1552SCatalin Marinas do { 130667c2759SCatalin Marinas set_pte(pte, pfn_pte(pfn, prot)); 131667c2759SCatalin Marinas pfn++; 132667c2759SCatalin Marinas } while (pte++, addr += PAGE_SIZE, addr != end); 133f4710445SMark Rutland 134f4710445SMark Rutland pte_clear_fixmap(); 135c1cc1552SCatalin Marinas } 136c1cc1552SCatalin Marinas 1379a17a213SJisheng Zhang static void split_pud(pud_t *old_pud, pmd_t *pmd) 138da141706SLaura Abbott { 139da141706SLaura Abbott unsigned long addr = pud_pfn(*old_pud) << PAGE_SHIFT; 140da141706SLaura Abbott pgprot_t prot = __pgprot(pud_val(*old_pud) ^ addr); 141da141706SLaura Abbott int i = 0; 142da141706SLaura Abbott 143da141706SLaura Abbott do { 1441e43ba9cSArd Biesheuvel set_pmd(pmd, __pmd(addr | pgprot_val(prot))); 145da141706SLaura Abbott addr += PMD_SIZE; 146da141706SLaura Abbott } while (pmd++, i++, i < PTRS_PER_PMD); 147da141706SLaura Abbott } 148da141706SLaura Abbott 149*11509a30SMark Rutland static void alloc_init_pmd(pud_t *pud, unsigned long addr, unsigned long end, 150da141706SLaura Abbott phys_addr_t phys, pgprot_t prot, 151f4710445SMark Rutland phys_addr_t (*pgtable_alloc)(void)) 152c1cc1552SCatalin Marinas { 153c1cc1552SCatalin Marinas pmd_t *pmd; 154c1cc1552SCatalin Marinas unsigned long next; 155c1cc1552SCatalin Marinas 156c1cc1552SCatalin Marinas /* 157c1cc1552SCatalin Marinas * Check for initial section mappings in the pgd/pud and remove them. 158c1cc1552SCatalin Marinas */ 159a1c76574SMark Rutland if (pud_none(*pud) || pud_sect(*pud)) { 160f4710445SMark Rutland phys_addr_t pmd_phys = pgtable_alloc(); 161f4710445SMark Rutland pmd = pmd_set_fixmap(pmd_phys); 162da141706SLaura Abbott if (pud_sect(*pud)) { 163da141706SLaura Abbott /* 164da141706SLaura Abbott * need to have the 1G of mappings continue to be 165da141706SLaura Abbott * present 166da141706SLaura Abbott */ 167da141706SLaura Abbott split_pud(pud, pmd); 168da141706SLaura Abbott } 169f4710445SMark Rutland __pud_populate(pud, pmd_phys, PUD_TYPE_TABLE); 170da141706SLaura Abbott flush_tlb_all(); 171f4710445SMark Rutland pmd_clear_fixmap(); 172c1cc1552SCatalin Marinas } 173a1c76574SMark Rutland BUG_ON(pud_bad(*pud)); 174c1cc1552SCatalin Marinas 175f4710445SMark Rutland pmd = pmd_set_fixmap_offset(pud, addr); 176c1cc1552SCatalin Marinas do { 177c1cc1552SCatalin Marinas next = pmd_addr_end(addr, end); 178c1cc1552SCatalin Marinas /* try section mapping first */ 179a55f9929SCatalin Marinas if (((addr | next | phys) & ~SECTION_MASK) == 0) { 180a55f9929SCatalin Marinas pmd_t old_pmd =*pmd; 1818ce837ceSArd Biesheuvel set_pmd(pmd, __pmd(phys | 1828ce837ceSArd Biesheuvel pgprot_val(mk_sect_prot(prot)))); 183a55f9929SCatalin Marinas /* 184a55f9929SCatalin Marinas * Check for previous table entries created during 185a55f9929SCatalin Marinas * boot (__create_page_tables) and flush them. 186a55f9929SCatalin Marinas */ 187523d6e9fSzhichang.yuan if (!pmd_none(old_pmd)) { 188a55f9929SCatalin Marinas flush_tlb_all(); 189523d6e9fSzhichang.yuan if (pmd_table(old_pmd)) { 190316b39dbSMark Rutland phys_addr_t table = pmd_page_paddr(old_pmd); 19141089357SCatalin Marinas if (!WARN_ON_ONCE(slab_is_available())) 192523d6e9fSzhichang.yuan memblock_free(table, PAGE_SIZE); 193523d6e9fSzhichang.yuan } 194523d6e9fSzhichang.yuan } 195a55f9929SCatalin Marinas } else { 196667c2759SCatalin Marinas alloc_init_pte(pmd, addr, next, __phys_to_pfn(phys), 19721ab99c2SMark Rutland prot, pgtable_alloc); 198a55f9929SCatalin Marinas } 199c1cc1552SCatalin Marinas phys += next - addr; 200c1cc1552SCatalin Marinas } while (pmd++, addr = next, addr != end); 201f4710445SMark Rutland 202f4710445SMark Rutland pmd_clear_fixmap(); 203c1cc1552SCatalin Marinas } 204c1cc1552SCatalin Marinas 205da141706SLaura Abbott static inline bool use_1G_block(unsigned long addr, unsigned long next, 206da141706SLaura Abbott unsigned long phys) 207da141706SLaura Abbott { 208da141706SLaura Abbott if (PAGE_SHIFT != 12) 209da141706SLaura Abbott return false; 210da141706SLaura Abbott 211da141706SLaura Abbott if (((addr | next | phys) & ~PUD_MASK) != 0) 212da141706SLaura Abbott return false; 213da141706SLaura Abbott 214da141706SLaura Abbott return true; 215da141706SLaura Abbott } 216da141706SLaura Abbott 217*11509a30SMark Rutland static void alloc_init_pud(pgd_t *pgd, unsigned long addr, unsigned long end, 218da141706SLaura Abbott phys_addr_t phys, pgprot_t prot, 219f4710445SMark Rutland phys_addr_t (*pgtable_alloc)(void)) 220c1cc1552SCatalin Marinas { 221c79b954bSJungseok Lee pud_t *pud; 222c1cc1552SCatalin Marinas unsigned long next; 223c1cc1552SCatalin Marinas 224c79b954bSJungseok Lee if (pgd_none(*pgd)) { 225f4710445SMark Rutland phys_addr_t pud_phys = pgtable_alloc(); 226f4710445SMark Rutland __pgd_populate(pgd, pud_phys, PUD_TYPE_TABLE); 227c79b954bSJungseok Lee } 228c79b954bSJungseok Lee BUG_ON(pgd_bad(*pgd)); 229c79b954bSJungseok Lee 230f4710445SMark Rutland pud = pud_set_fixmap_offset(pgd, addr); 231c1cc1552SCatalin Marinas do { 232c1cc1552SCatalin Marinas next = pud_addr_end(addr, end); 233206a2a73SSteve Capper 234206a2a73SSteve Capper /* 235206a2a73SSteve Capper * For 4K granule only, attempt to put down a 1GB block 236206a2a73SSteve Capper */ 237da141706SLaura Abbott if (use_1G_block(addr, next, phys)) { 238206a2a73SSteve Capper pud_t old_pud = *pud; 2398ce837ceSArd Biesheuvel set_pud(pud, __pud(phys | 2408ce837ceSArd Biesheuvel pgprot_val(mk_sect_prot(prot)))); 241206a2a73SSteve Capper 242206a2a73SSteve Capper /* 243206a2a73SSteve Capper * If we have an old value for a pud, it will 244206a2a73SSteve Capper * be pointing to a pmd table that we no longer 245206a2a73SSteve Capper * need (from swapper_pg_dir). 246206a2a73SSteve Capper * 247206a2a73SSteve Capper * Look up the old pmd table and free it. 248206a2a73SSteve Capper */ 249206a2a73SSteve Capper if (!pud_none(old_pud)) { 250206a2a73SSteve Capper flush_tlb_all(); 251523d6e9fSzhichang.yuan if (pud_table(old_pud)) { 252316b39dbSMark Rutland phys_addr_t table = pud_page_paddr(old_pud); 25341089357SCatalin Marinas if (!WARN_ON_ONCE(slab_is_available())) 254523d6e9fSzhichang.yuan memblock_free(table, PAGE_SIZE); 255523d6e9fSzhichang.yuan } 256206a2a73SSteve Capper } 257206a2a73SSteve Capper } else { 258*11509a30SMark Rutland alloc_init_pmd(pud, addr, next, phys, prot, 25921ab99c2SMark Rutland pgtable_alloc); 260206a2a73SSteve Capper } 261c1cc1552SCatalin Marinas phys += next - addr; 262c1cc1552SCatalin Marinas } while (pud++, addr = next, addr != end); 263f4710445SMark Rutland 264f4710445SMark Rutland pud_clear_fixmap(); 265c1cc1552SCatalin Marinas } 266c1cc1552SCatalin Marinas 267c1cc1552SCatalin Marinas /* 268c1cc1552SCatalin Marinas * Create the page directory entries and any necessary page tables for the 269c1cc1552SCatalin Marinas * mapping specified by 'md'. 270c1cc1552SCatalin Marinas */ 271*11509a30SMark Rutland static void init_pgd(pgd_t *pgd, phys_addr_t phys, unsigned long virt, 272da141706SLaura Abbott phys_addr_t size, pgprot_t prot, 273f4710445SMark Rutland phys_addr_t (*pgtable_alloc)(void)) 274c1cc1552SCatalin Marinas { 275c1cc1552SCatalin Marinas unsigned long addr, length, end, next; 276c1cc1552SCatalin Marinas 277cc5d2b3bSMark Rutland /* 278cc5d2b3bSMark Rutland * If the virtual and physical address don't have the same offset 279cc5d2b3bSMark Rutland * within a page, we cannot map the region as the caller expects. 280cc5d2b3bSMark Rutland */ 281cc5d2b3bSMark Rutland if (WARN_ON((phys ^ virt) & ~PAGE_MASK)) 282cc5d2b3bSMark Rutland return; 283cc5d2b3bSMark Rutland 2849c4e08a3SMark Rutland phys &= PAGE_MASK; 285c1cc1552SCatalin Marinas addr = virt & PAGE_MASK; 286c1cc1552SCatalin Marinas length = PAGE_ALIGN(size + (virt & ~PAGE_MASK)); 287c1cc1552SCatalin Marinas 288c1cc1552SCatalin Marinas end = addr + length; 289c1cc1552SCatalin Marinas do { 290c1cc1552SCatalin Marinas next = pgd_addr_end(addr, end); 291*11509a30SMark Rutland alloc_init_pud(pgd, addr, next, phys, prot, pgtable_alloc); 292c1cc1552SCatalin Marinas phys += next - addr; 293c1cc1552SCatalin Marinas } while (pgd++, addr = next, addr != end); 294c1cc1552SCatalin Marinas } 295c1cc1552SCatalin Marinas 296f4710445SMark Rutland static phys_addr_t late_pgtable_alloc(void) 297da141706SLaura Abbott { 29821ab99c2SMark Rutland void *ptr = (void *)__get_free_page(PGALLOC_GFP); 299da141706SLaura Abbott BUG_ON(!ptr); 30021ab99c2SMark Rutland 30121ab99c2SMark Rutland /* Ensure the zeroed page is visible to the page table walker */ 30221ab99c2SMark Rutland dsb(ishst); 303f4710445SMark Rutland return __pa(ptr); 304da141706SLaura Abbott } 305da141706SLaura Abbott 306*11509a30SMark Rutland static void __create_pgd_mapping(pgd_t *pgdir, phys_addr_t phys, 307*11509a30SMark Rutland unsigned long virt, phys_addr_t size, 308*11509a30SMark Rutland pgprot_t prot, 309*11509a30SMark Rutland phys_addr_t (*alloc)(void)) 310*11509a30SMark Rutland { 311*11509a30SMark Rutland init_pgd(pgd_offset_raw(pgdir, virt), phys, virt, size, prot, alloc); 312*11509a30SMark Rutland } 313*11509a30SMark Rutland 314c53e0baaSMark Rutland static void __init create_mapping(phys_addr_t phys, unsigned long virt, 315da141706SLaura Abbott phys_addr_t size, pgprot_t prot) 316d7ecbddfSMark Salter { 317d7ecbddfSMark Salter if (virt < VMALLOC_START) { 318d7ecbddfSMark Salter pr_warn("BUG: not creating mapping for %pa at 0x%016lx - outside kernel range\n", 319d7ecbddfSMark Salter &phys, virt); 320d7ecbddfSMark Salter return; 321d7ecbddfSMark Salter } 322*11509a30SMark Rutland __create_pgd_mapping(init_mm.pgd, phys, virt, size, prot, 323*11509a30SMark Rutland early_pgtable_alloc); 324d7ecbddfSMark Salter } 325d7ecbddfSMark Salter 3268ce837ceSArd Biesheuvel void __init create_pgd_mapping(struct mm_struct *mm, phys_addr_t phys, 3278ce837ceSArd Biesheuvel unsigned long virt, phys_addr_t size, 3288ce837ceSArd Biesheuvel pgprot_t prot) 3298ce837ceSArd Biesheuvel { 330*11509a30SMark Rutland __create_pgd_mapping(mm->pgd, phys, virt, size, prot, 33121ab99c2SMark Rutland late_pgtable_alloc); 332d7ecbddfSMark Salter } 333d7ecbddfSMark Salter 334da141706SLaura Abbott static void create_mapping_late(phys_addr_t phys, unsigned long virt, 335da141706SLaura Abbott phys_addr_t size, pgprot_t prot) 336da141706SLaura Abbott { 337da141706SLaura Abbott if (virt < VMALLOC_START) { 338da141706SLaura Abbott pr_warn("BUG: not creating mapping for %pa at 0x%016lx - outside kernel range\n", 339da141706SLaura Abbott &phys, virt); 340da141706SLaura Abbott return; 341da141706SLaura Abbott } 342da141706SLaura Abbott 343*11509a30SMark Rutland __create_pgd_mapping(init_mm.pgd, phys, virt, size, prot, 344*11509a30SMark Rutland late_pgtable_alloc); 345da141706SLaura Abbott } 346da141706SLaura Abbott 347da141706SLaura Abbott #ifdef CONFIG_DEBUG_RODATA 348da141706SLaura Abbott static void __init __map_memblock(phys_addr_t start, phys_addr_t end) 349da141706SLaura Abbott { 350da141706SLaura Abbott /* 351da141706SLaura Abbott * Set up the executable regions using the existing section mappings 352da141706SLaura Abbott * for now. This will get more fine grained later once all memory 353da141706SLaura Abbott * is mapped 354da141706SLaura Abbott */ 3554fee9f36SArd Biesheuvel unsigned long kernel_x_start = round_down(__pa(_stext), SWAPPER_BLOCK_SIZE); 3564fee9f36SArd Biesheuvel unsigned long kernel_x_end = round_up(__pa(__init_end), SWAPPER_BLOCK_SIZE); 357da141706SLaura Abbott 358da141706SLaura Abbott if (end < kernel_x_start) { 359da141706SLaura Abbott create_mapping(start, __phys_to_virt(start), 360da141706SLaura Abbott end - start, PAGE_KERNEL); 361da141706SLaura Abbott } else if (start >= kernel_x_end) { 362da141706SLaura Abbott create_mapping(start, __phys_to_virt(start), 363da141706SLaura Abbott end - start, PAGE_KERNEL); 364da141706SLaura Abbott } else { 365da141706SLaura Abbott if (start < kernel_x_start) 366da141706SLaura Abbott create_mapping(start, __phys_to_virt(start), 367da141706SLaura Abbott kernel_x_start - start, 368da141706SLaura Abbott PAGE_KERNEL); 369da141706SLaura Abbott create_mapping(kernel_x_start, 370da141706SLaura Abbott __phys_to_virt(kernel_x_start), 371da141706SLaura Abbott kernel_x_end - kernel_x_start, 372da141706SLaura Abbott PAGE_KERNEL_EXEC); 373da141706SLaura Abbott if (kernel_x_end < end) 374da141706SLaura Abbott create_mapping(kernel_x_end, 375da141706SLaura Abbott __phys_to_virt(kernel_x_end), 376da141706SLaura Abbott end - kernel_x_end, 377da141706SLaura Abbott PAGE_KERNEL); 378da141706SLaura Abbott } 379da141706SLaura Abbott 380da141706SLaura Abbott } 381da141706SLaura Abbott #else 382da141706SLaura Abbott static void __init __map_memblock(phys_addr_t start, phys_addr_t end) 383da141706SLaura Abbott { 384da141706SLaura Abbott create_mapping(start, __phys_to_virt(start), end - start, 385da141706SLaura Abbott PAGE_KERNEL_EXEC); 386da141706SLaura Abbott } 387da141706SLaura Abbott #endif 388da141706SLaura Abbott 389c1cc1552SCatalin Marinas static void __init map_mem(void) 390c1cc1552SCatalin Marinas { 391c1cc1552SCatalin Marinas struct memblock_region *reg; 392f6bc87c3SSteve Capper 393c1cc1552SCatalin Marinas /* map all the memory banks */ 394c1cc1552SCatalin Marinas for_each_memblock(memory, reg) { 395c1cc1552SCatalin Marinas phys_addr_t start = reg->base; 396c1cc1552SCatalin Marinas phys_addr_t end = start + reg->size; 397c1cc1552SCatalin Marinas 398c1cc1552SCatalin Marinas if (start >= end) 399c1cc1552SCatalin Marinas break; 40068709f45SArd Biesheuvel if (memblock_is_nomap(reg)) 40168709f45SArd Biesheuvel continue; 402c1cc1552SCatalin Marinas 403da141706SLaura Abbott __map_memblock(start, end); 404c1cc1552SCatalin Marinas } 405c1cc1552SCatalin Marinas } 406c1cc1552SCatalin Marinas 4079a17a213SJisheng Zhang static void __init fixup_executable(void) 408da141706SLaura Abbott { 409da141706SLaura Abbott #ifdef CONFIG_DEBUG_RODATA 410da141706SLaura Abbott /* now that we are actually fully mapped, make the start/end more fine grained */ 4114fee9f36SArd Biesheuvel if (!IS_ALIGNED((unsigned long)_stext, SWAPPER_BLOCK_SIZE)) { 412da141706SLaura Abbott unsigned long aligned_start = round_down(__pa(_stext), 4134fee9f36SArd Biesheuvel SWAPPER_BLOCK_SIZE); 414da141706SLaura Abbott 415da141706SLaura Abbott create_mapping(aligned_start, __phys_to_virt(aligned_start), 416da141706SLaura Abbott __pa(_stext) - aligned_start, 417da141706SLaura Abbott PAGE_KERNEL); 418da141706SLaura Abbott } 419da141706SLaura Abbott 4204fee9f36SArd Biesheuvel if (!IS_ALIGNED((unsigned long)__init_end, SWAPPER_BLOCK_SIZE)) { 421da141706SLaura Abbott unsigned long aligned_end = round_up(__pa(__init_end), 4224fee9f36SArd Biesheuvel SWAPPER_BLOCK_SIZE); 423da141706SLaura Abbott create_mapping(__pa(__init_end), (unsigned long)__init_end, 424da141706SLaura Abbott aligned_end - __pa(__init_end), 425da141706SLaura Abbott PAGE_KERNEL); 426da141706SLaura Abbott } 427da141706SLaura Abbott #endif 428da141706SLaura Abbott } 429da141706SLaura Abbott 430da141706SLaura Abbott #ifdef CONFIG_DEBUG_RODATA 431da141706SLaura Abbott void mark_rodata_ro(void) 432da141706SLaura Abbott { 433da141706SLaura Abbott create_mapping_late(__pa(_stext), (unsigned long)_stext, 434da141706SLaura Abbott (unsigned long)_etext - (unsigned long)_stext, 4350b2aa5b8SLaura Abbott PAGE_KERNEL_ROX); 436da141706SLaura Abbott 437da141706SLaura Abbott } 438da141706SLaura Abbott #endif 439da141706SLaura Abbott 440da141706SLaura Abbott void fixup_init(void) 441da141706SLaura Abbott { 442da141706SLaura Abbott create_mapping_late(__pa(__init_begin), (unsigned long)__init_begin, 443da141706SLaura Abbott (unsigned long)__init_end - (unsigned long)__init_begin, 444da141706SLaura Abbott PAGE_KERNEL); 445da141706SLaura Abbott } 446da141706SLaura Abbott 447c1cc1552SCatalin Marinas /* 448c1cc1552SCatalin Marinas * paging_init() sets up the page tables, initialises the zone memory 449c1cc1552SCatalin Marinas * maps and sets up the zero page. 450c1cc1552SCatalin Marinas */ 451c1cc1552SCatalin Marinas void __init paging_init(void) 452c1cc1552SCatalin Marinas { 453c1cc1552SCatalin Marinas map_mem(); 454da141706SLaura Abbott fixup_executable(); 455c1cc1552SCatalin Marinas 456c1cc1552SCatalin Marinas bootmem_init(); 457c1cc1552SCatalin Marinas } 458c1cc1552SCatalin Marinas 459c1cc1552SCatalin Marinas /* 460c1cc1552SCatalin Marinas * Check whether a kernel address is valid (derived from arch/x86/). 461c1cc1552SCatalin Marinas */ 462c1cc1552SCatalin Marinas int kern_addr_valid(unsigned long addr) 463c1cc1552SCatalin Marinas { 464c1cc1552SCatalin Marinas pgd_t *pgd; 465c1cc1552SCatalin Marinas pud_t *pud; 466c1cc1552SCatalin Marinas pmd_t *pmd; 467c1cc1552SCatalin Marinas pte_t *pte; 468c1cc1552SCatalin Marinas 469c1cc1552SCatalin Marinas if ((((long)addr) >> VA_BITS) != -1UL) 470c1cc1552SCatalin Marinas return 0; 471c1cc1552SCatalin Marinas 472c1cc1552SCatalin Marinas pgd = pgd_offset_k(addr); 473c1cc1552SCatalin Marinas if (pgd_none(*pgd)) 474c1cc1552SCatalin Marinas return 0; 475c1cc1552SCatalin Marinas 476c1cc1552SCatalin Marinas pud = pud_offset(pgd, addr); 477c1cc1552SCatalin Marinas if (pud_none(*pud)) 478c1cc1552SCatalin Marinas return 0; 479c1cc1552SCatalin Marinas 480206a2a73SSteve Capper if (pud_sect(*pud)) 481206a2a73SSteve Capper return pfn_valid(pud_pfn(*pud)); 482206a2a73SSteve Capper 483c1cc1552SCatalin Marinas pmd = pmd_offset(pud, addr); 484c1cc1552SCatalin Marinas if (pmd_none(*pmd)) 485c1cc1552SCatalin Marinas return 0; 486c1cc1552SCatalin Marinas 487da6e4cb6SDave Anderson if (pmd_sect(*pmd)) 488da6e4cb6SDave Anderson return pfn_valid(pmd_pfn(*pmd)); 489da6e4cb6SDave Anderson 490c1cc1552SCatalin Marinas pte = pte_offset_kernel(pmd, addr); 491c1cc1552SCatalin Marinas if (pte_none(*pte)) 492c1cc1552SCatalin Marinas return 0; 493c1cc1552SCatalin Marinas 494c1cc1552SCatalin Marinas return pfn_valid(pte_pfn(*pte)); 495c1cc1552SCatalin Marinas } 496c1cc1552SCatalin Marinas #ifdef CONFIG_SPARSEMEM_VMEMMAP 497b433dce0SSuzuki K. Poulose #if !ARM64_SWAPPER_USES_SECTION_MAPS 4980aad818bSJohannes Weiner int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node) 499c1cc1552SCatalin Marinas { 5000aad818bSJohannes Weiner return vmemmap_populate_basepages(start, end, node); 501c1cc1552SCatalin Marinas } 502b433dce0SSuzuki K. Poulose #else /* !ARM64_SWAPPER_USES_SECTION_MAPS */ 5030aad818bSJohannes Weiner int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node) 504c1cc1552SCatalin Marinas { 5050aad818bSJohannes Weiner unsigned long addr = start; 506c1cc1552SCatalin Marinas unsigned long next; 507c1cc1552SCatalin Marinas pgd_t *pgd; 508c1cc1552SCatalin Marinas pud_t *pud; 509c1cc1552SCatalin Marinas pmd_t *pmd; 510c1cc1552SCatalin Marinas 511c1cc1552SCatalin Marinas do { 512c1cc1552SCatalin Marinas next = pmd_addr_end(addr, end); 513c1cc1552SCatalin Marinas 514c1cc1552SCatalin Marinas pgd = vmemmap_pgd_populate(addr, node); 515c1cc1552SCatalin Marinas if (!pgd) 516c1cc1552SCatalin Marinas return -ENOMEM; 517c1cc1552SCatalin Marinas 518c1cc1552SCatalin Marinas pud = vmemmap_pud_populate(pgd, addr, node); 519c1cc1552SCatalin Marinas if (!pud) 520c1cc1552SCatalin Marinas return -ENOMEM; 521c1cc1552SCatalin Marinas 522c1cc1552SCatalin Marinas pmd = pmd_offset(pud, addr); 523c1cc1552SCatalin Marinas if (pmd_none(*pmd)) { 524c1cc1552SCatalin Marinas void *p = NULL; 525c1cc1552SCatalin Marinas 526c1cc1552SCatalin Marinas p = vmemmap_alloc_block_buf(PMD_SIZE, node); 527c1cc1552SCatalin Marinas if (!p) 528c1cc1552SCatalin Marinas return -ENOMEM; 529c1cc1552SCatalin Marinas 530a501e324SCatalin Marinas set_pmd(pmd, __pmd(__pa(p) | PROT_SECT_NORMAL)); 531c1cc1552SCatalin Marinas } else 532c1cc1552SCatalin Marinas vmemmap_verify((pte_t *)pmd, node, addr, next); 533c1cc1552SCatalin Marinas } while (addr = next, addr != end); 534c1cc1552SCatalin Marinas 535c1cc1552SCatalin Marinas return 0; 536c1cc1552SCatalin Marinas } 537c1cc1552SCatalin Marinas #endif /* CONFIG_ARM64_64K_PAGES */ 5380aad818bSJohannes Weiner void vmemmap_free(unsigned long start, unsigned long end) 5390197518cSTang Chen { 5400197518cSTang Chen } 541c1cc1552SCatalin Marinas #endif /* CONFIG_SPARSEMEM_VMEMMAP */ 542af86e597SLaura Abbott 543af86e597SLaura Abbott static pte_t bm_pte[PTRS_PER_PTE] __page_aligned_bss; 5449f25e6adSKirill A. Shutemov #if CONFIG_PGTABLE_LEVELS > 2 545af86e597SLaura Abbott static pmd_t bm_pmd[PTRS_PER_PMD] __page_aligned_bss; 546af86e597SLaura Abbott #endif 5479f25e6adSKirill A. Shutemov #if CONFIG_PGTABLE_LEVELS > 3 548af86e597SLaura Abbott static pud_t bm_pud[PTRS_PER_PUD] __page_aligned_bss; 549af86e597SLaura Abbott #endif 550af86e597SLaura Abbott 551af86e597SLaura Abbott static inline pud_t * fixmap_pud(unsigned long addr) 552af86e597SLaura Abbott { 553af86e597SLaura Abbott pgd_t *pgd = pgd_offset_k(addr); 554af86e597SLaura Abbott 555af86e597SLaura Abbott BUG_ON(pgd_none(*pgd) || pgd_bad(*pgd)); 556af86e597SLaura Abbott 557af86e597SLaura Abbott return pud_offset(pgd, addr); 558af86e597SLaura Abbott } 559af86e597SLaura Abbott 560af86e597SLaura Abbott static inline pmd_t * fixmap_pmd(unsigned long addr) 561af86e597SLaura Abbott { 562af86e597SLaura Abbott pud_t *pud = fixmap_pud(addr); 563af86e597SLaura Abbott 564af86e597SLaura Abbott BUG_ON(pud_none(*pud) || pud_bad(*pud)); 565af86e597SLaura Abbott 566af86e597SLaura Abbott return pmd_offset(pud, addr); 567af86e597SLaura Abbott } 568af86e597SLaura Abbott 569af86e597SLaura Abbott static inline pte_t * fixmap_pte(unsigned long addr) 570af86e597SLaura Abbott { 571af86e597SLaura Abbott pmd_t *pmd = fixmap_pmd(addr); 572af86e597SLaura Abbott 573af86e597SLaura Abbott BUG_ON(pmd_none(*pmd) || pmd_bad(*pmd)); 574af86e597SLaura Abbott 575af86e597SLaura Abbott return pte_offset_kernel(pmd, addr); 576af86e597SLaura Abbott } 577af86e597SLaura Abbott 578af86e597SLaura Abbott void __init early_fixmap_init(void) 579af86e597SLaura Abbott { 580af86e597SLaura Abbott pgd_t *pgd; 581af86e597SLaura Abbott pud_t *pud; 582af86e597SLaura Abbott pmd_t *pmd; 583af86e597SLaura Abbott unsigned long addr = FIXADDR_START; 584af86e597SLaura Abbott 585af86e597SLaura Abbott pgd = pgd_offset_k(addr); 586af86e597SLaura Abbott pgd_populate(&init_mm, pgd, bm_pud); 587af86e597SLaura Abbott pud = pud_offset(pgd, addr); 588af86e597SLaura Abbott pud_populate(&init_mm, pud, bm_pmd); 589af86e597SLaura Abbott pmd = pmd_offset(pud, addr); 590af86e597SLaura Abbott pmd_populate_kernel(&init_mm, pmd, bm_pte); 591af86e597SLaura Abbott 592af86e597SLaura Abbott /* 593af86e597SLaura Abbott * The boot-ioremap range spans multiple pmds, for which 594af86e597SLaura Abbott * we are not preparted: 595af86e597SLaura Abbott */ 596af86e597SLaura Abbott BUILD_BUG_ON((__fix_to_virt(FIX_BTMAP_BEGIN) >> PMD_SHIFT) 597af86e597SLaura Abbott != (__fix_to_virt(FIX_BTMAP_END) >> PMD_SHIFT)); 598af86e597SLaura Abbott 599af86e597SLaura Abbott if ((pmd != fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN))) 600af86e597SLaura Abbott || pmd != fixmap_pmd(fix_to_virt(FIX_BTMAP_END))) { 601af86e597SLaura Abbott WARN_ON(1); 602af86e597SLaura Abbott pr_warn("pmd %p != %p, %p\n", 603af86e597SLaura Abbott pmd, fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN)), 604af86e597SLaura Abbott fixmap_pmd(fix_to_virt(FIX_BTMAP_END))); 605af86e597SLaura Abbott pr_warn("fix_to_virt(FIX_BTMAP_BEGIN): %08lx\n", 606af86e597SLaura Abbott fix_to_virt(FIX_BTMAP_BEGIN)); 607af86e597SLaura Abbott pr_warn("fix_to_virt(FIX_BTMAP_END): %08lx\n", 608af86e597SLaura Abbott fix_to_virt(FIX_BTMAP_END)); 609af86e597SLaura Abbott 610af86e597SLaura Abbott pr_warn("FIX_BTMAP_END: %d\n", FIX_BTMAP_END); 611af86e597SLaura Abbott pr_warn("FIX_BTMAP_BEGIN: %d\n", FIX_BTMAP_BEGIN); 612af86e597SLaura Abbott } 613af86e597SLaura Abbott } 614af86e597SLaura Abbott 615af86e597SLaura Abbott void __set_fixmap(enum fixed_addresses idx, 616af86e597SLaura Abbott phys_addr_t phys, pgprot_t flags) 617af86e597SLaura Abbott { 618af86e597SLaura Abbott unsigned long addr = __fix_to_virt(idx); 619af86e597SLaura Abbott pte_t *pte; 620af86e597SLaura Abbott 621b63dbef9SMark Rutland BUG_ON(idx <= FIX_HOLE || idx >= __end_of_fixed_addresses); 622af86e597SLaura Abbott 623af86e597SLaura Abbott pte = fixmap_pte(addr); 624af86e597SLaura Abbott 625af86e597SLaura Abbott if (pgprot_val(flags)) { 626af86e597SLaura Abbott set_pte(pte, pfn_pte(phys >> PAGE_SHIFT, flags)); 627af86e597SLaura Abbott } else { 628af86e597SLaura Abbott pte_clear(&init_mm, addr, pte); 629af86e597SLaura Abbott flush_tlb_kernel_range(addr, addr+PAGE_SIZE); 630af86e597SLaura Abbott } 631af86e597SLaura Abbott } 63261bd93ceSArd Biesheuvel 63361bd93ceSArd Biesheuvel void *__init fixmap_remap_fdt(phys_addr_t dt_phys) 63461bd93ceSArd Biesheuvel { 63561bd93ceSArd Biesheuvel const u64 dt_virt_base = __fix_to_virt(FIX_FDT); 636fb226c3dSArd Biesheuvel pgprot_t prot = PAGE_KERNEL_RO; 637b433dce0SSuzuki K. Poulose int size, offset; 63861bd93ceSArd Biesheuvel void *dt_virt; 63961bd93ceSArd Biesheuvel 64061bd93ceSArd Biesheuvel /* 64161bd93ceSArd Biesheuvel * Check whether the physical FDT address is set and meets the minimum 64261bd93ceSArd Biesheuvel * alignment requirement. Since we are relying on MIN_FDT_ALIGN to be 64361bd93ceSArd Biesheuvel * at least 8 bytes so that we can always access the size field of the 64461bd93ceSArd Biesheuvel * FDT header after mapping the first chunk, double check here if that 64561bd93ceSArd Biesheuvel * is indeed the case. 64661bd93ceSArd Biesheuvel */ 64761bd93ceSArd Biesheuvel BUILD_BUG_ON(MIN_FDT_ALIGN < 8); 64861bd93ceSArd Biesheuvel if (!dt_phys || dt_phys % MIN_FDT_ALIGN) 64961bd93ceSArd Biesheuvel return NULL; 65061bd93ceSArd Biesheuvel 65161bd93ceSArd Biesheuvel /* 65261bd93ceSArd Biesheuvel * Make sure that the FDT region can be mapped without the need to 65361bd93ceSArd Biesheuvel * allocate additional translation table pages, so that it is safe 65461bd93ceSArd Biesheuvel * to call create_mapping() this early. 65561bd93ceSArd Biesheuvel * 65661bd93ceSArd Biesheuvel * On 64k pages, the FDT will be mapped using PTEs, so we need to 65761bd93ceSArd Biesheuvel * be in the same PMD as the rest of the fixmap. 65861bd93ceSArd Biesheuvel * On 4k pages, we'll use section mappings for the FDT so we only 65961bd93ceSArd Biesheuvel * have to be in the same PUD. 66061bd93ceSArd Biesheuvel */ 66161bd93ceSArd Biesheuvel BUILD_BUG_ON(dt_virt_base % SZ_2M); 66261bd93ceSArd Biesheuvel 663b433dce0SSuzuki K. Poulose BUILD_BUG_ON(__fix_to_virt(FIX_FDT_END) >> SWAPPER_TABLE_SHIFT != 664b433dce0SSuzuki K. Poulose __fix_to_virt(FIX_BTMAP_BEGIN) >> SWAPPER_TABLE_SHIFT); 66561bd93ceSArd Biesheuvel 666b433dce0SSuzuki K. Poulose offset = dt_phys % SWAPPER_BLOCK_SIZE; 66761bd93ceSArd Biesheuvel dt_virt = (void *)dt_virt_base + offset; 66861bd93ceSArd Biesheuvel 66961bd93ceSArd Biesheuvel /* map the first chunk so we can read the size from the header */ 670b433dce0SSuzuki K. Poulose create_mapping(round_down(dt_phys, SWAPPER_BLOCK_SIZE), dt_virt_base, 671b433dce0SSuzuki K. Poulose SWAPPER_BLOCK_SIZE, prot); 67261bd93ceSArd Biesheuvel 67361bd93ceSArd Biesheuvel if (fdt_check_header(dt_virt) != 0) 67461bd93ceSArd Biesheuvel return NULL; 67561bd93ceSArd Biesheuvel 67661bd93ceSArd Biesheuvel size = fdt_totalsize(dt_virt); 67761bd93ceSArd Biesheuvel if (size > MAX_FDT_SIZE) 67861bd93ceSArd Biesheuvel return NULL; 67961bd93ceSArd Biesheuvel 680b433dce0SSuzuki K. Poulose if (offset + size > SWAPPER_BLOCK_SIZE) 681b433dce0SSuzuki K. Poulose create_mapping(round_down(dt_phys, SWAPPER_BLOCK_SIZE), dt_virt_base, 682b433dce0SSuzuki K. Poulose round_up(offset + size, SWAPPER_BLOCK_SIZE), prot); 68361bd93ceSArd Biesheuvel 68461bd93ceSArd Biesheuvel memblock_reserve(dt_phys, size); 68561bd93ceSArd Biesheuvel 68661bd93ceSArd Biesheuvel return dt_virt; 68761bd93ceSArd Biesheuvel } 688