1c1cc1552SCatalin Marinas /* 2c1cc1552SCatalin Marinas * Based on arch/arm/mm/mmu.c 3c1cc1552SCatalin Marinas * 4c1cc1552SCatalin Marinas * Copyright (C) 1995-2005 Russell King 5c1cc1552SCatalin Marinas * Copyright (C) 2012 ARM Ltd. 6c1cc1552SCatalin Marinas * 7c1cc1552SCatalin Marinas * This program is free software; you can redistribute it and/or modify 8c1cc1552SCatalin Marinas * it under the terms of the GNU General Public License version 2 as 9c1cc1552SCatalin Marinas * published by the Free Software Foundation. 10c1cc1552SCatalin Marinas * 11c1cc1552SCatalin Marinas * This program is distributed in the hope that it will be useful, 12c1cc1552SCatalin Marinas * but WITHOUT ANY WARRANTY; without even the implied warranty of 13c1cc1552SCatalin Marinas * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14c1cc1552SCatalin Marinas * GNU General Public License for more details. 15c1cc1552SCatalin Marinas * 16c1cc1552SCatalin Marinas * You should have received a copy of the GNU General Public License 17c1cc1552SCatalin Marinas * along with this program. If not, see <http://www.gnu.org/licenses/>. 18c1cc1552SCatalin Marinas */ 19c1cc1552SCatalin Marinas 20c1cc1552SCatalin Marinas #include <linux/export.h> 21c1cc1552SCatalin Marinas #include <linux/kernel.h> 22c1cc1552SCatalin Marinas #include <linux/errno.h> 23c1cc1552SCatalin Marinas #include <linux/init.h> 2461bd93ceSArd Biesheuvel #include <linux/libfdt.h> 25c1cc1552SCatalin Marinas #include <linux/mman.h> 26c1cc1552SCatalin Marinas #include <linux/nodemask.h> 27c1cc1552SCatalin Marinas #include <linux/memblock.h> 28c1cc1552SCatalin Marinas #include <linux/fs.h> 292475ff9dSCatalin Marinas #include <linux/io.h> 3041089357SCatalin Marinas #include <linux/slab.h> 31da141706SLaura Abbott #include <linux/stop_machine.h> 32c1cc1552SCatalin Marinas 3321ab99c2SMark Rutland #include <asm/barrier.h> 34c1cc1552SCatalin Marinas #include <asm/cputype.h> 35af86e597SLaura Abbott #include <asm/fixmap.h> 36*068a17a5SMark Rutland #include <asm/kasan.h> 37b433dce0SSuzuki K. Poulose #include <asm/kernel-pgtable.h> 38c1cc1552SCatalin Marinas #include <asm/sections.h> 39c1cc1552SCatalin Marinas #include <asm/setup.h> 40c1cc1552SCatalin Marinas #include <asm/sizes.h> 41c1cc1552SCatalin Marinas #include <asm/tlb.h> 42c79b954bSJungseok Lee #include <asm/memblock.h> 43c1cc1552SCatalin Marinas #include <asm/mmu_context.h> 44c1cc1552SCatalin Marinas 45c1cc1552SCatalin Marinas #include "mm.h" 46c1cc1552SCatalin Marinas 47dd006da2SArd Biesheuvel u64 idmap_t0sz = TCR_T0SZ(VA_BITS); 48dd006da2SArd Biesheuvel 49c1cc1552SCatalin Marinas /* 50c1cc1552SCatalin Marinas * Empty_zero_page is a special page that is used for zero-initialized data 51c1cc1552SCatalin Marinas * and COW. 52c1cc1552SCatalin Marinas */ 535227cfa7SMark Rutland unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)] __page_aligned_bss; 54c1cc1552SCatalin Marinas EXPORT_SYMBOL(empty_zero_page); 55c1cc1552SCatalin Marinas 56c1cc1552SCatalin Marinas pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, 57c1cc1552SCatalin Marinas unsigned long size, pgprot_t vma_prot) 58c1cc1552SCatalin Marinas { 59c1cc1552SCatalin Marinas if (!pfn_valid(pfn)) 60c1cc1552SCatalin Marinas return pgprot_noncached(vma_prot); 61c1cc1552SCatalin Marinas else if (file->f_flags & O_SYNC) 62c1cc1552SCatalin Marinas return pgprot_writecombine(vma_prot); 63c1cc1552SCatalin Marinas return vma_prot; 64c1cc1552SCatalin Marinas } 65c1cc1552SCatalin Marinas EXPORT_SYMBOL(phys_mem_access_prot); 66c1cc1552SCatalin Marinas 67f4710445SMark Rutland static phys_addr_t __init early_pgtable_alloc(void) 68c1cc1552SCatalin Marinas { 697142392dSSuzuki K. Poulose phys_addr_t phys; 707142392dSSuzuki K. Poulose void *ptr; 717142392dSSuzuki K. Poulose 7221ab99c2SMark Rutland phys = memblock_alloc(PAGE_SIZE, PAGE_SIZE); 737142392dSSuzuki K. Poulose BUG_ON(!phys); 74f4710445SMark Rutland 75f4710445SMark Rutland /* 76f4710445SMark Rutland * The FIX_{PGD,PUD,PMD} slots may be in active use, but the FIX_PTE 77f4710445SMark Rutland * slot will be free, so we can (ab)use the FIX_PTE slot to initialise 78f4710445SMark Rutland * any level of table. 79f4710445SMark Rutland */ 80f4710445SMark Rutland ptr = pte_set_fixmap(phys); 81f4710445SMark Rutland 8221ab99c2SMark Rutland memset(ptr, 0, PAGE_SIZE); 8321ab99c2SMark Rutland 84f4710445SMark Rutland /* 85f4710445SMark Rutland * Implicit barriers also ensure the zeroed page is visible to the page 86f4710445SMark Rutland * table walker 87f4710445SMark Rutland */ 88f4710445SMark Rutland pte_clear_fixmap(); 89f4710445SMark Rutland 90f4710445SMark Rutland return phys; 91c1cc1552SCatalin Marinas } 92c1cc1552SCatalin Marinas 93da141706SLaura Abbott /* 94da141706SLaura Abbott * remap a PMD into pages 95da141706SLaura Abbott */ 96da141706SLaura Abbott static void split_pmd(pmd_t *pmd, pte_t *pte) 97da141706SLaura Abbott { 98da141706SLaura Abbott unsigned long pfn = pmd_pfn(*pmd); 99da141706SLaura Abbott int i = 0; 100da141706SLaura Abbott 101da141706SLaura Abbott do { 102da141706SLaura Abbott /* 103da141706SLaura Abbott * Need to have the least restrictive permissions available 104667c2759SCatalin Marinas * permissions will be fixed up later 105da141706SLaura Abbott */ 106667c2759SCatalin Marinas set_pte(pte, pfn_pte(pfn, PAGE_KERNEL_EXEC)); 107da141706SLaura Abbott pfn++; 108da141706SLaura Abbott } while (pte++, i++, i < PTRS_PER_PTE); 109da141706SLaura Abbott } 110da141706SLaura Abbott 111da141706SLaura Abbott static void alloc_init_pte(pmd_t *pmd, unsigned long addr, 112667c2759SCatalin Marinas unsigned long end, unsigned long pfn, 113da141706SLaura Abbott pgprot_t prot, 114f4710445SMark Rutland phys_addr_t (*pgtable_alloc)(void)) 115c1cc1552SCatalin Marinas { 116c1cc1552SCatalin Marinas pte_t *pte; 117c1cc1552SCatalin Marinas 118a1c76574SMark Rutland if (pmd_none(*pmd) || pmd_sect(*pmd)) { 119f4710445SMark Rutland phys_addr_t pte_phys = pgtable_alloc(); 120f4710445SMark Rutland pte = pte_set_fixmap(pte_phys); 121da141706SLaura Abbott if (pmd_sect(*pmd)) 122da141706SLaura Abbott split_pmd(pmd, pte); 123f4710445SMark Rutland __pmd_populate(pmd, pte_phys, PMD_TYPE_TABLE); 124da141706SLaura Abbott flush_tlb_all(); 125f4710445SMark Rutland pte_clear_fixmap(); 126c1cc1552SCatalin Marinas } 127a1c76574SMark Rutland BUG_ON(pmd_bad(*pmd)); 128c1cc1552SCatalin Marinas 129f4710445SMark Rutland pte = pte_set_fixmap_offset(pmd, addr); 130c1cc1552SCatalin Marinas do { 131667c2759SCatalin Marinas set_pte(pte, pfn_pte(pfn, prot)); 132667c2759SCatalin Marinas pfn++; 133667c2759SCatalin Marinas } while (pte++, addr += PAGE_SIZE, addr != end); 134f4710445SMark Rutland 135f4710445SMark Rutland pte_clear_fixmap(); 136c1cc1552SCatalin Marinas } 137c1cc1552SCatalin Marinas 1389a17a213SJisheng Zhang static void split_pud(pud_t *old_pud, pmd_t *pmd) 139da141706SLaura Abbott { 140da141706SLaura Abbott unsigned long addr = pud_pfn(*old_pud) << PAGE_SHIFT; 141da141706SLaura Abbott pgprot_t prot = __pgprot(pud_val(*old_pud) ^ addr); 142da141706SLaura Abbott int i = 0; 143da141706SLaura Abbott 144da141706SLaura Abbott do { 1451e43ba9cSArd Biesheuvel set_pmd(pmd, __pmd(addr | pgprot_val(prot))); 146da141706SLaura Abbott addr += PMD_SIZE; 147da141706SLaura Abbott } while (pmd++, i++, i < PTRS_PER_PMD); 148da141706SLaura Abbott } 149da141706SLaura Abbott 15011509a30SMark Rutland static void alloc_init_pmd(pud_t *pud, unsigned long addr, unsigned long end, 151da141706SLaura Abbott phys_addr_t phys, pgprot_t prot, 152f4710445SMark Rutland phys_addr_t (*pgtable_alloc)(void)) 153c1cc1552SCatalin Marinas { 154c1cc1552SCatalin Marinas pmd_t *pmd; 155c1cc1552SCatalin Marinas unsigned long next; 156c1cc1552SCatalin Marinas 157c1cc1552SCatalin Marinas /* 158c1cc1552SCatalin Marinas * Check for initial section mappings in the pgd/pud and remove them. 159c1cc1552SCatalin Marinas */ 160a1c76574SMark Rutland if (pud_none(*pud) || pud_sect(*pud)) { 161f4710445SMark Rutland phys_addr_t pmd_phys = pgtable_alloc(); 162f4710445SMark Rutland pmd = pmd_set_fixmap(pmd_phys); 163da141706SLaura Abbott if (pud_sect(*pud)) { 164da141706SLaura Abbott /* 165da141706SLaura Abbott * need to have the 1G of mappings continue to be 166da141706SLaura Abbott * present 167da141706SLaura Abbott */ 168da141706SLaura Abbott split_pud(pud, pmd); 169da141706SLaura Abbott } 170f4710445SMark Rutland __pud_populate(pud, pmd_phys, PUD_TYPE_TABLE); 171da141706SLaura Abbott flush_tlb_all(); 172f4710445SMark Rutland pmd_clear_fixmap(); 173c1cc1552SCatalin Marinas } 174a1c76574SMark Rutland BUG_ON(pud_bad(*pud)); 175c1cc1552SCatalin Marinas 176f4710445SMark Rutland pmd = pmd_set_fixmap_offset(pud, addr); 177c1cc1552SCatalin Marinas do { 178c1cc1552SCatalin Marinas next = pmd_addr_end(addr, end); 179c1cc1552SCatalin Marinas /* try section mapping first */ 180a55f9929SCatalin Marinas if (((addr | next | phys) & ~SECTION_MASK) == 0) { 181a55f9929SCatalin Marinas pmd_t old_pmd =*pmd; 1828ce837ceSArd Biesheuvel set_pmd(pmd, __pmd(phys | 1838ce837ceSArd Biesheuvel pgprot_val(mk_sect_prot(prot)))); 184a55f9929SCatalin Marinas /* 185a55f9929SCatalin Marinas * Check for previous table entries created during 186a55f9929SCatalin Marinas * boot (__create_page_tables) and flush them. 187a55f9929SCatalin Marinas */ 188523d6e9fSzhichang.yuan if (!pmd_none(old_pmd)) { 189a55f9929SCatalin Marinas flush_tlb_all(); 190523d6e9fSzhichang.yuan if (pmd_table(old_pmd)) { 191316b39dbSMark Rutland phys_addr_t table = pmd_page_paddr(old_pmd); 19241089357SCatalin Marinas if (!WARN_ON_ONCE(slab_is_available())) 193523d6e9fSzhichang.yuan memblock_free(table, PAGE_SIZE); 194523d6e9fSzhichang.yuan } 195523d6e9fSzhichang.yuan } 196a55f9929SCatalin Marinas } else { 197667c2759SCatalin Marinas alloc_init_pte(pmd, addr, next, __phys_to_pfn(phys), 19821ab99c2SMark Rutland prot, pgtable_alloc); 199a55f9929SCatalin Marinas } 200c1cc1552SCatalin Marinas phys += next - addr; 201c1cc1552SCatalin Marinas } while (pmd++, addr = next, addr != end); 202f4710445SMark Rutland 203f4710445SMark Rutland pmd_clear_fixmap(); 204c1cc1552SCatalin Marinas } 205c1cc1552SCatalin Marinas 206da141706SLaura Abbott static inline bool use_1G_block(unsigned long addr, unsigned long next, 207da141706SLaura Abbott unsigned long phys) 208da141706SLaura Abbott { 209da141706SLaura Abbott if (PAGE_SHIFT != 12) 210da141706SLaura Abbott return false; 211da141706SLaura Abbott 212da141706SLaura Abbott if (((addr | next | phys) & ~PUD_MASK) != 0) 213da141706SLaura Abbott return false; 214da141706SLaura Abbott 215da141706SLaura Abbott return true; 216da141706SLaura Abbott } 217da141706SLaura Abbott 21811509a30SMark Rutland static void alloc_init_pud(pgd_t *pgd, unsigned long addr, unsigned long end, 219da141706SLaura Abbott phys_addr_t phys, pgprot_t prot, 220f4710445SMark Rutland phys_addr_t (*pgtable_alloc)(void)) 221c1cc1552SCatalin Marinas { 222c79b954bSJungseok Lee pud_t *pud; 223c1cc1552SCatalin Marinas unsigned long next; 224c1cc1552SCatalin Marinas 225c79b954bSJungseok Lee if (pgd_none(*pgd)) { 226f4710445SMark Rutland phys_addr_t pud_phys = pgtable_alloc(); 227f4710445SMark Rutland __pgd_populate(pgd, pud_phys, PUD_TYPE_TABLE); 228c79b954bSJungseok Lee } 229c79b954bSJungseok Lee BUG_ON(pgd_bad(*pgd)); 230c79b954bSJungseok Lee 231f4710445SMark Rutland pud = pud_set_fixmap_offset(pgd, addr); 232c1cc1552SCatalin Marinas do { 233c1cc1552SCatalin Marinas next = pud_addr_end(addr, end); 234206a2a73SSteve Capper 235206a2a73SSteve Capper /* 236206a2a73SSteve Capper * For 4K granule only, attempt to put down a 1GB block 237206a2a73SSteve Capper */ 238da141706SLaura Abbott if (use_1G_block(addr, next, phys)) { 239206a2a73SSteve Capper pud_t old_pud = *pud; 2408ce837ceSArd Biesheuvel set_pud(pud, __pud(phys | 2418ce837ceSArd Biesheuvel pgprot_val(mk_sect_prot(prot)))); 242206a2a73SSteve Capper 243206a2a73SSteve Capper /* 244206a2a73SSteve Capper * If we have an old value for a pud, it will 245206a2a73SSteve Capper * be pointing to a pmd table that we no longer 246206a2a73SSteve Capper * need (from swapper_pg_dir). 247206a2a73SSteve Capper * 248206a2a73SSteve Capper * Look up the old pmd table and free it. 249206a2a73SSteve Capper */ 250206a2a73SSteve Capper if (!pud_none(old_pud)) { 251206a2a73SSteve Capper flush_tlb_all(); 252523d6e9fSzhichang.yuan if (pud_table(old_pud)) { 253316b39dbSMark Rutland phys_addr_t table = pud_page_paddr(old_pud); 25441089357SCatalin Marinas if (!WARN_ON_ONCE(slab_is_available())) 255523d6e9fSzhichang.yuan memblock_free(table, PAGE_SIZE); 256523d6e9fSzhichang.yuan } 257206a2a73SSteve Capper } 258206a2a73SSteve Capper } else { 25911509a30SMark Rutland alloc_init_pmd(pud, addr, next, phys, prot, 26021ab99c2SMark Rutland pgtable_alloc); 261206a2a73SSteve Capper } 262c1cc1552SCatalin Marinas phys += next - addr; 263c1cc1552SCatalin Marinas } while (pud++, addr = next, addr != end); 264f4710445SMark Rutland 265f4710445SMark Rutland pud_clear_fixmap(); 266c1cc1552SCatalin Marinas } 267c1cc1552SCatalin Marinas 268c1cc1552SCatalin Marinas /* 269c1cc1552SCatalin Marinas * Create the page directory entries and any necessary page tables for the 270c1cc1552SCatalin Marinas * mapping specified by 'md'. 271c1cc1552SCatalin Marinas */ 27211509a30SMark Rutland static void init_pgd(pgd_t *pgd, phys_addr_t phys, unsigned long virt, 273da141706SLaura Abbott phys_addr_t size, pgprot_t prot, 274f4710445SMark Rutland phys_addr_t (*pgtable_alloc)(void)) 275c1cc1552SCatalin Marinas { 276c1cc1552SCatalin Marinas unsigned long addr, length, end, next; 277c1cc1552SCatalin Marinas 278cc5d2b3bSMark Rutland /* 279cc5d2b3bSMark Rutland * If the virtual and physical address don't have the same offset 280cc5d2b3bSMark Rutland * within a page, we cannot map the region as the caller expects. 281cc5d2b3bSMark Rutland */ 282cc5d2b3bSMark Rutland if (WARN_ON((phys ^ virt) & ~PAGE_MASK)) 283cc5d2b3bSMark Rutland return; 284cc5d2b3bSMark Rutland 2859c4e08a3SMark Rutland phys &= PAGE_MASK; 286c1cc1552SCatalin Marinas addr = virt & PAGE_MASK; 287c1cc1552SCatalin Marinas length = PAGE_ALIGN(size + (virt & ~PAGE_MASK)); 288c1cc1552SCatalin Marinas 289c1cc1552SCatalin Marinas end = addr + length; 290c1cc1552SCatalin Marinas do { 291c1cc1552SCatalin Marinas next = pgd_addr_end(addr, end); 29211509a30SMark Rutland alloc_init_pud(pgd, addr, next, phys, prot, pgtable_alloc); 293c1cc1552SCatalin Marinas phys += next - addr; 294c1cc1552SCatalin Marinas } while (pgd++, addr = next, addr != end); 295c1cc1552SCatalin Marinas } 296c1cc1552SCatalin Marinas 297f4710445SMark Rutland static phys_addr_t late_pgtable_alloc(void) 298da141706SLaura Abbott { 29921ab99c2SMark Rutland void *ptr = (void *)__get_free_page(PGALLOC_GFP); 300da141706SLaura Abbott BUG_ON(!ptr); 30121ab99c2SMark Rutland 30221ab99c2SMark Rutland /* Ensure the zeroed page is visible to the page table walker */ 30321ab99c2SMark Rutland dsb(ishst); 304f4710445SMark Rutland return __pa(ptr); 305da141706SLaura Abbott } 306da141706SLaura Abbott 30711509a30SMark Rutland static void __create_pgd_mapping(pgd_t *pgdir, phys_addr_t phys, 30811509a30SMark Rutland unsigned long virt, phys_addr_t size, 30911509a30SMark Rutland pgprot_t prot, 31011509a30SMark Rutland phys_addr_t (*alloc)(void)) 31111509a30SMark Rutland { 31211509a30SMark Rutland init_pgd(pgd_offset_raw(pgdir, virt), phys, virt, size, prot, alloc); 31311509a30SMark Rutland } 31411509a30SMark Rutland 315c53e0baaSMark Rutland static void __init create_mapping(phys_addr_t phys, unsigned long virt, 316da141706SLaura Abbott phys_addr_t size, pgprot_t prot) 317d7ecbddfSMark Salter { 318d7ecbddfSMark Salter if (virt < VMALLOC_START) { 319d7ecbddfSMark Salter pr_warn("BUG: not creating mapping for %pa at 0x%016lx - outside kernel range\n", 320d7ecbddfSMark Salter &phys, virt); 321d7ecbddfSMark Salter return; 322d7ecbddfSMark Salter } 32311509a30SMark Rutland __create_pgd_mapping(init_mm.pgd, phys, virt, size, prot, 32411509a30SMark Rutland early_pgtable_alloc); 325d7ecbddfSMark Salter } 326d7ecbddfSMark Salter 3278ce837ceSArd Biesheuvel void __init create_pgd_mapping(struct mm_struct *mm, phys_addr_t phys, 3288ce837ceSArd Biesheuvel unsigned long virt, phys_addr_t size, 3298ce837ceSArd Biesheuvel pgprot_t prot) 3308ce837ceSArd Biesheuvel { 33111509a30SMark Rutland __create_pgd_mapping(mm->pgd, phys, virt, size, prot, 33221ab99c2SMark Rutland late_pgtable_alloc); 333d7ecbddfSMark Salter } 334d7ecbddfSMark Salter 335da141706SLaura Abbott static void create_mapping_late(phys_addr_t phys, unsigned long virt, 336da141706SLaura Abbott phys_addr_t size, pgprot_t prot) 337da141706SLaura Abbott { 338da141706SLaura Abbott if (virt < VMALLOC_START) { 339da141706SLaura Abbott pr_warn("BUG: not creating mapping for %pa at 0x%016lx - outside kernel range\n", 340da141706SLaura Abbott &phys, virt); 341da141706SLaura Abbott return; 342da141706SLaura Abbott } 343da141706SLaura Abbott 34411509a30SMark Rutland __create_pgd_mapping(init_mm.pgd, phys, virt, size, prot, 34511509a30SMark Rutland late_pgtable_alloc); 346da141706SLaura Abbott } 347da141706SLaura Abbott 348*068a17a5SMark Rutland static void __init __map_memblock(pgd_t *pgd, phys_addr_t start, phys_addr_t end) 349da141706SLaura Abbott { 350*068a17a5SMark Rutland 351*068a17a5SMark Rutland unsigned long kernel_start = __pa(_stext); 352*068a17a5SMark Rutland unsigned long kernel_end = __pa(_end); 353*068a17a5SMark Rutland 354da141706SLaura Abbott /* 355*068a17a5SMark Rutland * The kernel itself is mapped at page granularity. Map all other 356*068a17a5SMark Rutland * memory, making sure we don't overwrite the existing kernel mappings. 357da141706SLaura Abbott */ 358da141706SLaura Abbott 359*068a17a5SMark Rutland /* No overlap with the kernel. */ 360*068a17a5SMark Rutland if (end < kernel_start || start >= kernel_end) { 361*068a17a5SMark Rutland __create_pgd_mapping(pgd, start, __phys_to_virt(start), 362*068a17a5SMark Rutland end - start, PAGE_KERNEL, 363*068a17a5SMark Rutland early_pgtable_alloc); 364*068a17a5SMark Rutland return; 365da141706SLaura Abbott } 366da141706SLaura Abbott 367*068a17a5SMark Rutland /* 368*068a17a5SMark Rutland * This block overlaps the kernel mapping. Map the portion(s) which 369*068a17a5SMark Rutland * don't overlap. 370*068a17a5SMark Rutland */ 371*068a17a5SMark Rutland if (start < kernel_start) 372*068a17a5SMark Rutland __create_pgd_mapping(pgd, start, 373*068a17a5SMark Rutland __phys_to_virt(start), 374*068a17a5SMark Rutland kernel_start - start, PAGE_KERNEL, 375*068a17a5SMark Rutland early_pgtable_alloc); 376*068a17a5SMark Rutland if (kernel_end < end) 377*068a17a5SMark Rutland __create_pgd_mapping(pgd, kernel_end, 378*068a17a5SMark Rutland __phys_to_virt(kernel_end), 379*068a17a5SMark Rutland end - kernel_end, PAGE_KERNEL, 380*068a17a5SMark Rutland early_pgtable_alloc); 381da141706SLaura Abbott } 382da141706SLaura Abbott 383*068a17a5SMark Rutland static void __init map_mem(pgd_t *pgd) 384c1cc1552SCatalin Marinas { 385c1cc1552SCatalin Marinas struct memblock_region *reg; 386f6bc87c3SSteve Capper 387c1cc1552SCatalin Marinas /* map all the memory banks */ 388c1cc1552SCatalin Marinas for_each_memblock(memory, reg) { 389c1cc1552SCatalin Marinas phys_addr_t start = reg->base; 390c1cc1552SCatalin Marinas phys_addr_t end = start + reg->size; 391c1cc1552SCatalin Marinas 392c1cc1552SCatalin Marinas if (start >= end) 393c1cc1552SCatalin Marinas break; 39468709f45SArd Biesheuvel if (memblock_is_nomap(reg)) 39568709f45SArd Biesheuvel continue; 396c1cc1552SCatalin Marinas 397*068a17a5SMark Rutland __map_memblock(pgd, start, end); 398c1cc1552SCatalin Marinas } 399c1cc1552SCatalin Marinas } 400c1cc1552SCatalin Marinas 401da141706SLaura Abbott #ifdef CONFIG_DEBUG_RODATA 402da141706SLaura Abbott void mark_rodata_ro(void) 403da141706SLaura Abbott { 404da141706SLaura Abbott create_mapping_late(__pa(_stext), (unsigned long)_stext, 405da141706SLaura Abbott (unsigned long)_etext - (unsigned long)_stext, 4060b2aa5b8SLaura Abbott PAGE_KERNEL_ROX); 407da141706SLaura Abbott 408da141706SLaura Abbott } 409da141706SLaura Abbott #endif 410da141706SLaura Abbott 411da141706SLaura Abbott void fixup_init(void) 412da141706SLaura Abbott { 413da141706SLaura Abbott create_mapping_late(__pa(__init_begin), (unsigned long)__init_begin, 414da141706SLaura Abbott (unsigned long)__init_end - (unsigned long)__init_begin, 415da141706SLaura Abbott PAGE_KERNEL); 416da141706SLaura Abbott } 417da141706SLaura Abbott 418*068a17a5SMark Rutland static void __init map_kernel_chunk(pgd_t *pgd, void *va_start, void *va_end, 419*068a17a5SMark Rutland pgprot_t prot) 420*068a17a5SMark Rutland { 421*068a17a5SMark Rutland phys_addr_t pa_start = __pa(va_start); 422*068a17a5SMark Rutland unsigned long size = va_end - va_start; 423*068a17a5SMark Rutland 424*068a17a5SMark Rutland BUG_ON(!PAGE_ALIGNED(pa_start)); 425*068a17a5SMark Rutland BUG_ON(!PAGE_ALIGNED(size)); 426*068a17a5SMark Rutland 427*068a17a5SMark Rutland __create_pgd_mapping(pgd, pa_start, (unsigned long)va_start, size, prot, 428*068a17a5SMark Rutland early_pgtable_alloc); 429*068a17a5SMark Rutland } 430*068a17a5SMark Rutland 431*068a17a5SMark Rutland /* 432*068a17a5SMark Rutland * Create fine-grained mappings for the kernel. 433*068a17a5SMark Rutland */ 434*068a17a5SMark Rutland static void __init map_kernel(pgd_t *pgd) 435*068a17a5SMark Rutland { 436*068a17a5SMark Rutland 437*068a17a5SMark Rutland map_kernel_chunk(pgd, _stext, _etext, PAGE_KERNEL_EXEC); 438*068a17a5SMark Rutland map_kernel_chunk(pgd, __init_begin, __init_end, PAGE_KERNEL_EXEC); 439*068a17a5SMark Rutland map_kernel_chunk(pgd, _data, _end, PAGE_KERNEL); 440*068a17a5SMark Rutland 441*068a17a5SMark Rutland /* 442*068a17a5SMark Rutland * The fixmap falls in a separate pgd to the kernel, and doesn't live 443*068a17a5SMark Rutland * in the carveout for the swapper_pg_dir. We can simply re-use the 444*068a17a5SMark Rutland * existing dir for the fixmap. 445*068a17a5SMark Rutland */ 446*068a17a5SMark Rutland set_pgd(pgd_offset_raw(pgd, FIXADDR_START), *pgd_offset_k(FIXADDR_START)); 447*068a17a5SMark Rutland 448*068a17a5SMark Rutland kasan_copy_shadow(pgd); 449*068a17a5SMark Rutland } 450*068a17a5SMark Rutland 451c1cc1552SCatalin Marinas /* 452c1cc1552SCatalin Marinas * paging_init() sets up the page tables, initialises the zone memory 453c1cc1552SCatalin Marinas * maps and sets up the zero page. 454c1cc1552SCatalin Marinas */ 455c1cc1552SCatalin Marinas void __init paging_init(void) 456c1cc1552SCatalin Marinas { 457*068a17a5SMark Rutland phys_addr_t pgd_phys = early_pgtable_alloc(); 458*068a17a5SMark Rutland pgd_t *pgd = pgd_set_fixmap(pgd_phys); 459*068a17a5SMark Rutland 460*068a17a5SMark Rutland map_kernel(pgd); 461*068a17a5SMark Rutland map_mem(pgd); 462*068a17a5SMark Rutland 463*068a17a5SMark Rutland /* 464*068a17a5SMark Rutland * We want to reuse the original swapper_pg_dir so we don't have to 465*068a17a5SMark Rutland * communicate the new address to non-coherent secondaries in 466*068a17a5SMark Rutland * secondary_entry, and so cpu_switch_mm can generate the address with 467*068a17a5SMark Rutland * adrp+add rather than a load from some global variable. 468*068a17a5SMark Rutland * 469*068a17a5SMark Rutland * To do this we need to go via a temporary pgd. 470*068a17a5SMark Rutland */ 471*068a17a5SMark Rutland cpu_replace_ttbr1(__va(pgd_phys)); 472*068a17a5SMark Rutland memcpy(swapper_pg_dir, pgd, PAGE_SIZE); 473*068a17a5SMark Rutland cpu_replace_ttbr1(swapper_pg_dir); 474*068a17a5SMark Rutland 475*068a17a5SMark Rutland pgd_clear_fixmap(); 476*068a17a5SMark Rutland memblock_free(pgd_phys, PAGE_SIZE); 477*068a17a5SMark Rutland 478*068a17a5SMark Rutland /* 479*068a17a5SMark Rutland * We only reuse the PGD from the swapper_pg_dir, not the pud + pmd 480*068a17a5SMark Rutland * allocated with it. 481*068a17a5SMark Rutland */ 482*068a17a5SMark Rutland memblock_free(__pa(swapper_pg_dir) + PAGE_SIZE, 483*068a17a5SMark Rutland SWAPPER_DIR_SIZE - PAGE_SIZE); 484c1cc1552SCatalin Marinas 485c1cc1552SCatalin Marinas bootmem_init(); 486c1cc1552SCatalin Marinas } 487c1cc1552SCatalin Marinas 488c1cc1552SCatalin Marinas /* 489c1cc1552SCatalin Marinas * Check whether a kernel address is valid (derived from arch/x86/). 490c1cc1552SCatalin Marinas */ 491c1cc1552SCatalin Marinas int kern_addr_valid(unsigned long addr) 492c1cc1552SCatalin Marinas { 493c1cc1552SCatalin Marinas pgd_t *pgd; 494c1cc1552SCatalin Marinas pud_t *pud; 495c1cc1552SCatalin Marinas pmd_t *pmd; 496c1cc1552SCatalin Marinas pte_t *pte; 497c1cc1552SCatalin Marinas 498c1cc1552SCatalin Marinas if ((((long)addr) >> VA_BITS) != -1UL) 499c1cc1552SCatalin Marinas return 0; 500c1cc1552SCatalin Marinas 501c1cc1552SCatalin Marinas pgd = pgd_offset_k(addr); 502c1cc1552SCatalin Marinas if (pgd_none(*pgd)) 503c1cc1552SCatalin Marinas return 0; 504c1cc1552SCatalin Marinas 505c1cc1552SCatalin Marinas pud = pud_offset(pgd, addr); 506c1cc1552SCatalin Marinas if (pud_none(*pud)) 507c1cc1552SCatalin Marinas return 0; 508c1cc1552SCatalin Marinas 509206a2a73SSteve Capper if (pud_sect(*pud)) 510206a2a73SSteve Capper return pfn_valid(pud_pfn(*pud)); 511206a2a73SSteve Capper 512c1cc1552SCatalin Marinas pmd = pmd_offset(pud, addr); 513c1cc1552SCatalin Marinas if (pmd_none(*pmd)) 514c1cc1552SCatalin Marinas return 0; 515c1cc1552SCatalin Marinas 516da6e4cb6SDave Anderson if (pmd_sect(*pmd)) 517da6e4cb6SDave Anderson return pfn_valid(pmd_pfn(*pmd)); 518da6e4cb6SDave Anderson 519c1cc1552SCatalin Marinas pte = pte_offset_kernel(pmd, addr); 520c1cc1552SCatalin Marinas if (pte_none(*pte)) 521c1cc1552SCatalin Marinas return 0; 522c1cc1552SCatalin Marinas 523c1cc1552SCatalin Marinas return pfn_valid(pte_pfn(*pte)); 524c1cc1552SCatalin Marinas } 525c1cc1552SCatalin Marinas #ifdef CONFIG_SPARSEMEM_VMEMMAP 526b433dce0SSuzuki K. Poulose #if !ARM64_SWAPPER_USES_SECTION_MAPS 5270aad818bSJohannes Weiner int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node) 528c1cc1552SCatalin Marinas { 5290aad818bSJohannes Weiner return vmemmap_populate_basepages(start, end, node); 530c1cc1552SCatalin Marinas } 531b433dce0SSuzuki K. Poulose #else /* !ARM64_SWAPPER_USES_SECTION_MAPS */ 5320aad818bSJohannes Weiner int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node) 533c1cc1552SCatalin Marinas { 5340aad818bSJohannes Weiner unsigned long addr = start; 535c1cc1552SCatalin Marinas unsigned long next; 536c1cc1552SCatalin Marinas pgd_t *pgd; 537c1cc1552SCatalin Marinas pud_t *pud; 538c1cc1552SCatalin Marinas pmd_t *pmd; 539c1cc1552SCatalin Marinas 540c1cc1552SCatalin Marinas do { 541c1cc1552SCatalin Marinas next = pmd_addr_end(addr, end); 542c1cc1552SCatalin Marinas 543c1cc1552SCatalin Marinas pgd = vmemmap_pgd_populate(addr, node); 544c1cc1552SCatalin Marinas if (!pgd) 545c1cc1552SCatalin Marinas return -ENOMEM; 546c1cc1552SCatalin Marinas 547c1cc1552SCatalin Marinas pud = vmemmap_pud_populate(pgd, addr, node); 548c1cc1552SCatalin Marinas if (!pud) 549c1cc1552SCatalin Marinas return -ENOMEM; 550c1cc1552SCatalin Marinas 551c1cc1552SCatalin Marinas pmd = pmd_offset(pud, addr); 552c1cc1552SCatalin Marinas if (pmd_none(*pmd)) { 553c1cc1552SCatalin Marinas void *p = NULL; 554c1cc1552SCatalin Marinas 555c1cc1552SCatalin Marinas p = vmemmap_alloc_block_buf(PMD_SIZE, node); 556c1cc1552SCatalin Marinas if (!p) 557c1cc1552SCatalin Marinas return -ENOMEM; 558c1cc1552SCatalin Marinas 559a501e324SCatalin Marinas set_pmd(pmd, __pmd(__pa(p) | PROT_SECT_NORMAL)); 560c1cc1552SCatalin Marinas } else 561c1cc1552SCatalin Marinas vmemmap_verify((pte_t *)pmd, node, addr, next); 562c1cc1552SCatalin Marinas } while (addr = next, addr != end); 563c1cc1552SCatalin Marinas 564c1cc1552SCatalin Marinas return 0; 565c1cc1552SCatalin Marinas } 566c1cc1552SCatalin Marinas #endif /* CONFIG_ARM64_64K_PAGES */ 5670aad818bSJohannes Weiner void vmemmap_free(unsigned long start, unsigned long end) 5680197518cSTang Chen { 5690197518cSTang Chen } 570c1cc1552SCatalin Marinas #endif /* CONFIG_SPARSEMEM_VMEMMAP */ 571af86e597SLaura Abbott 572af86e597SLaura Abbott static pte_t bm_pte[PTRS_PER_PTE] __page_aligned_bss; 5739f25e6adSKirill A. Shutemov #if CONFIG_PGTABLE_LEVELS > 2 574af86e597SLaura Abbott static pmd_t bm_pmd[PTRS_PER_PMD] __page_aligned_bss; 575af86e597SLaura Abbott #endif 5769f25e6adSKirill A. Shutemov #if CONFIG_PGTABLE_LEVELS > 3 577af86e597SLaura Abbott static pud_t bm_pud[PTRS_PER_PUD] __page_aligned_bss; 578af86e597SLaura Abbott #endif 579af86e597SLaura Abbott 580af86e597SLaura Abbott static inline pud_t * fixmap_pud(unsigned long addr) 581af86e597SLaura Abbott { 582af86e597SLaura Abbott pgd_t *pgd = pgd_offset_k(addr); 583af86e597SLaura Abbott 584af86e597SLaura Abbott BUG_ON(pgd_none(*pgd) || pgd_bad(*pgd)); 585af86e597SLaura Abbott 586af86e597SLaura Abbott return pud_offset(pgd, addr); 587af86e597SLaura Abbott } 588af86e597SLaura Abbott 589af86e597SLaura Abbott static inline pmd_t * fixmap_pmd(unsigned long addr) 590af86e597SLaura Abbott { 591af86e597SLaura Abbott pud_t *pud = fixmap_pud(addr); 592af86e597SLaura Abbott 593af86e597SLaura Abbott BUG_ON(pud_none(*pud) || pud_bad(*pud)); 594af86e597SLaura Abbott 595af86e597SLaura Abbott return pmd_offset(pud, addr); 596af86e597SLaura Abbott } 597af86e597SLaura Abbott 598af86e597SLaura Abbott static inline pte_t * fixmap_pte(unsigned long addr) 599af86e597SLaura Abbott { 600af86e597SLaura Abbott pmd_t *pmd = fixmap_pmd(addr); 601af86e597SLaura Abbott 602af86e597SLaura Abbott BUG_ON(pmd_none(*pmd) || pmd_bad(*pmd)); 603af86e597SLaura Abbott 604af86e597SLaura Abbott return pte_offset_kernel(pmd, addr); 605af86e597SLaura Abbott } 606af86e597SLaura Abbott 607af86e597SLaura Abbott void __init early_fixmap_init(void) 608af86e597SLaura Abbott { 609af86e597SLaura Abbott pgd_t *pgd; 610af86e597SLaura Abbott pud_t *pud; 611af86e597SLaura Abbott pmd_t *pmd; 612af86e597SLaura Abbott unsigned long addr = FIXADDR_START; 613af86e597SLaura Abbott 614af86e597SLaura Abbott pgd = pgd_offset_k(addr); 615af86e597SLaura Abbott pgd_populate(&init_mm, pgd, bm_pud); 616af86e597SLaura Abbott pud = pud_offset(pgd, addr); 617af86e597SLaura Abbott pud_populate(&init_mm, pud, bm_pmd); 618af86e597SLaura Abbott pmd = pmd_offset(pud, addr); 619af86e597SLaura Abbott pmd_populate_kernel(&init_mm, pmd, bm_pte); 620af86e597SLaura Abbott 621af86e597SLaura Abbott /* 622af86e597SLaura Abbott * The boot-ioremap range spans multiple pmds, for which 623af86e597SLaura Abbott * we are not preparted: 624af86e597SLaura Abbott */ 625af86e597SLaura Abbott BUILD_BUG_ON((__fix_to_virt(FIX_BTMAP_BEGIN) >> PMD_SHIFT) 626af86e597SLaura Abbott != (__fix_to_virt(FIX_BTMAP_END) >> PMD_SHIFT)); 627af86e597SLaura Abbott 628af86e597SLaura Abbott if ((pmd != fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN))) 629af86e597SLaura Abbott || pmd != fixmap_pmd(fix_to_virt(FIX_BTMAP_END))) { 630af86e597SLaura Abbott WARN_ON(1); 631af86e597SLaura Abbott pr_warn("pmd %p != %p, %p\n", 632af86e597SLaura Abbott pmd, fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN)), 633af86e597SLaura Abbott fixmap_pmd(fix_to_virt(FIX_BTMAP_END))); 634af86e597SLaura Abbott pr_warn("fix_to_virt(FIX_BTMAP_BEGIN): %08lx\n", 635af86e597SLaura Abbott fix_to_virt(FIX_BTMAP_BEGIN)); 636af86e597SLaura Abbott pr_warn("fix_to_virt(FIX_BTMAP_END): %08lx\n", 637af86e597SLaura Abbott fix_to_virt(FIX_BTMAP_END)); 638af86e597SLaura Abbott 639af86e597SLaura Abbott pr_warn("FIX_BTMAP_END: %d\n", FIX_BTMAP_END); 640af86e597SLaura Abbott pr_warn("FIX_BTMAP_BEGIN: %d\n", FIX_BTMAP_BEGIN); 641af86e597SLaura Abbott } 642af86e597SLaura Abbott } 643af86e597SLaura Abbott 644af86e597SLaura Abbott void __set_fixmap(enum fixed_addresses idx, 645af86e597SLaura Abbott phys_addr_t phys, pgprot_t flags) 646af86e597SLaura Abbott { 647af86e597SLaura Abbott unsigned long addr = __fix_to_virt(idx); 648af86e597SLaura Abbott pte_t *pte; 649af86e597SLaura Abbott 650b63dbef9SMark Rutland BUG_ON(idx <= FIX_HOLE || idx >= __end_of_fixed_addresses); 651af86e597SLaura Abbott 652af86e597SLaura Abbott pte = fixmap_pte(addr); 653af86e597SLaura Abbott 654af86e597SLaura Abbott if (pgprot_val(flags)) { 655af86e597SLaura Abbott set_pte(pte, pfn_pte(phys >> PAGE_SHIFT, flags)); 656af86e597SLaura Abbott } else { 657af86e597SLaura Abbott pte_clear(&init_mm, addr, pte); 658af86e597SLaura Abbott flush_tlb_kernel_range(addr, addr+PAGE_SIZE); 659af86e597SLaura Abbott } 660af86e597SLaura Abbott } 66161bd93ceSArd Biesheuvel 66261bd93ceSArd Biesheuvel void *__init fixmap_remap_fdt(phys_addr_t dt_phys) 66361bd93ceSArd Biesheuvel { 66461bd93ceSArd Biesheuvel const u64 dt_virt_base = __fix_to_virt(FIX_FDT); 665fb226c3dSArd Biesheuvel pgprot_t prot = PAGE_KERNEL_RO; 666b433dce0SSuzuki K. Poulose int size, offset; 66761bd93ceSArd Biesheuvel void *dt_virt; 66861bd93ceSArd Biesheuvel 66961bd93ceSArd Biesheuvel /* 67061bd93ceSArd Biesheuvel * Check whether the physical FDT address is set and meets the minimum 67161bd93ceSArd Biesheuvel * alignment requirement. Since we are relying on MIN_FDT_ALIGN to be 67261bd93ceSArd Biesheuvel * at least 8 bytes so that we can always access the size field of the 67361bd93ceSArd Biesheuvel * FDT header after mapping the first chunk, double check here if that 67461bd93ceSArd Biesheuvel * is indeed the case. 67561bd93ceSArd Biesheuvel */ 67661bd93ceSArd Biesheuvel BUILD_BUG_ON(MIN_FDT_ALIGN < 8); 67761bd93ceSArd Biesheuvel if (!dt_phys || dt_phys % MIN_FDT_ALIGN) 67861bd93ceSArd Biesheuvel return NULL; 67961bd93ceSArd Biesheuvel 68061bd93ceSArd Biesheuvel /* 68161bd93ceSArd Biesheuvel * Make sure that the FDT region can be mapped without the need to 68261bd93ceSArd Biesheuvel * allocate additional translation table pages, so that it is safe 68361bd93ceSArd Biesheuvel * to call create_mapping() this early. 68461bd93ceSArd Biesheuvel * 68561bd93ceSArd Biesheuvel * On 64k pages, the FDT will be mapped using PTEs, so we need to 68661bd93ceSArd Biesheuvel * be in the same PMD as the rest of the fixmap. 68761bd93ceSArd Biesheuvel * On 4k pages, we'll use section mappings for the FDT so we only 68861bd93ceSArd Biesheuvel * have to be in the same PUD. 68961bd93ceSArd Biesheuvel */ 69061bd93ceSArd Biesheuvel BUILD_BUG_ON(dt_virt_base % SZ_2M); 69161bd93ceSArd Biesheuvel 692b433dce0SSuzuki K. Poulose BUILD_BUG_ON(__fix_to_virt(FIX_FDT_END) >> SWAPPER_TABLE_SHIFT != 693b433dce0SSuzuki K. Poulose __fix_to_virt(FIX_BTMAP_BEGIN) >> SWAPPER_TABLE_SHIFT); 69461bd93ceSArd Biesheuvel 695b433dce0SSuzuki K. Poulose offset = dt_phys % SWAPPER_BLOCK_SIZE; 69661bd93ceSArd Biesheuvel dt_virt = (void *)dt_virt_base + offset; 69761bd93ceSArd Biesheuvel 69861bd93ceSArd Biesheuvel /* map the first chunk so we can read the size from the header */ 699b433dce0SSuzuki K. Poulose create_mapping(round_down(dt_phys, SWAPPER_BLOCK_SIZE), dt_virt_base, 700b433dce0SSuzuki K. Poulose SWAPPER_BLOCK_SIZE, prot); 70161bd93ceSArd Biesheuvel 70261bd93ceSArd Biesheuvel if (fdt_check_header(dt_virt) != 0) 70361bd93ceSArd Biesheuvel return NULL; 70461bd93ceSArd Biesheuvel 70561bd93ceSArd Biesheuvel size = fdt_totalsize(dt_virt); 70661bd93ceSArd Biesheuvel if (size > MAX_FDT_SIZE) 70761bd93ceSArd Biesheuvel return NULL; 70861bd93ceSArd Biesheuvel 709b433dce0SSuzuki K. Poulose if (offset + size > SWAPPER_BLOCK_SIZE) 710b433dce0SSuzuki K. Poulose create_mapping(round_down(dt_phys, SWAPPER_BLOCK_SIZE), dt_virt_base, 711b433dce0SSuzuki K. Poulose round_up(offset + size, SWAPPER_BLOCK_SIZE), prot); 71261bd93ceSArd Biesheuvel 71361bd93ceSArd Biesheuvel memblock_reserve(dt_phys, size); 71461bd93ceSArd Biesheuvel 71561bd93ceSArd Biesheuvel return dt_virt; 71661bd93ceSArd Biesheuvel } 717