1caab277bSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only 21d18c47cSCatalin Marinas /* 31d18c47cSCatalin Marinas * Based on arch/arm/mm/mmap.c 41d18c47cSCatalin Marinas * 51d18c47cSCatalin Marinas * Copyright (C) 2012 ARM Ltd. 61d18c47cSCatalin Marinas */ 71d18c47cSCatalin Marinas 8*c7b9095eSWill Deacon #include <linux/io.h> 91151f838SArd Biesheuvel #include <linux/memblock.h> 10507d6644SShaokun Zhang #include <linux/types.h> 111d18c47cSCatalin Marinas 12507d6644SShaokun Zhang #include <asm/page.h> 131d18c47cSCatalin Marinas 141d18c47cSCatalin Marinas /* 151d18c47cSCatalin Marinas * You really shouldn't be using read() or write() on /dev/mem. This might go 161d18c47cSCatalin Marinas * away in the future. 171d18c47cSCatalin Marinas */ 18097cbd8dSMin-Hua Chen int valid_phys_addr_range(phys_addr_t addr, size_t size) 191d18c47cSCatalin Marinas { 201151f838SArd Biesheuvel /* 211151f838SArd Biesheuvel * Check whether addr is covered by a memory region without the 221151f838SArd Biesheuvel * MEMBLOCK_NOMAP attribute, and whether that region covers the 231151f838SArd Biesheuvel * entire range. In theory, this could lead to false negatives 241151f838SArd Biesheuvel * if the range is covered by distinct but adjacent memory regions 251151f838SArd Biesheuvel * that only differ in other attributes. However, few of such 261151f838SArd Biesheuvel * attributes have been defined, and it is debatable whether it 271151f838SArd Biesheuvel * follows that /dev/mem read() calls should be able traverse 281151f838SArd Biesheuvel * such boundaries. 291151f838SArd Biesheuvel */ 301151f838SArd Biesheuvel return memblock_is_region_memory(addr, size) && 311151f838SArd Biesheuvel memblock_is_map_memory(addr); 321d18c47cSCatalin Marinas } 331d18c47cSCatalin Marinas 341d18c47cSCatalin Marinas /* 351d18c47cSCatalin Marinas * Do not allow /dev/mem mappings beyond the supported physical range. 361d18c47cSCatalin Marinas */ 371d18c47cSCatalin Marinas int valid_mmap_phys_addr_range(unsigned long pfn, size_t size) 381d18c47cSCatalin Marinas { 391d18c47cSCatalin Marinas return !(((pfn << PAGE_SHIFT) + size) & ~PHYS_MASK); 401d18c47cSCatalin Marinas } 41