1b2441318SGreg Kroah-Hartman // SPDX-License-Identifier: GPL-2.0 20d55303cSDeepa Dinamani #include <linux/compat.h> 32ee0d7fdSJean Pihet #include <linux/errno.h> 42ee0d7fdSJean Pihet #include <linux/kernel.h> 52ee0d7fdSJean Pihet #include <linux/perf_event.h> 62ee0d7fdSJean Pihet #include <linux/bug.h> 768db0cf1SIngo Molnar #include <linux/sched/task_stack.h> 8ff268ff7SMark Salter 92ee0d7fdSJean Pihet #include <asm/perf_regs.h> 102ee0d7fdSJean Pihet #include <asm/ptrace.h> 112ee0d7fdSJean Pihet 12*cbb0c02cSJames Clark static u64 perf_ext_regs_value(int idx) 13*cbb0c02cSJames Clark { 14*cbb0c02cSJames Clark switch (idx) { 15*cbb0c02cSJames Clark case PERF_REG_ARM64_VG: 16*cbb0c02cSJames Clark if (WARN_ON_ONCE(!system_supports_sve())) 17*cbb0c02cSJames Clark return 0; 18*cbb0c02cSJames Clark 19*cbb0c02cSJames Clark /* 20*cbb0c02cSJames Clark * Vector granule is current length in bits of SVE registers 21*cbb0c02cSJames Clark * divided by 64. 22*cbb0c02cSJames Clark */ 23*cbb0c02cSJames Clark return (task_get_sve_vl(current) * 8) / 64; 24*cbb0c02cSJames Clark default: 25*cbb0c02cSJames Clark WARN_ON_ONCE(true); 26*cbb0c02cSJames Clark return 0; 27*cbb0c02cSJames Clark } 28*cbb0c02cSJames Clark } 29*cbb0c02cSJames Clark 302ee0d7fdSJean Pihet u64 perf_reg_value(struct pt_regs *regs, int idx) 312ee0d7fdSJean Pihet { 32*cbb0c02cSJames Clark if (WARN_ON_ONCE((u32)idx >= PERF_REG_ARM64_EXTENDED_MAX)) 332ee0d7fdSJean Pihet return 0; 342ee0d7fdSJean Pihet 352ee0d7fdSJean Pihet /* 368dfe804aSJiping Ma * Our handling of compat tasks (PERF_SAMPLE_REGS_ABI_32) is weird, but 37ad14c192SXiaoming Ni * we're stuck with it for ABI compatibility reasons. 388dfe804aSJiping Ma * 398dfe804aSJiping Ma * For a 32-bit consumer inspecting a 32-bit task, then it will look at 408dfe804aSJiping Ma * the first 16 registers (see arch/arm/include/uapi/asm/perf_regs.h). 418dfe804aSJiping Ma * These correspond directly to a prefix of the registers saved in our 428dfe804aSJiping Ma * 'struct pt_regs', with the exception of the PC, so we copy that down 438dfe804aSJiping Ma * (x15 corresponds to SP_hyp in the architecture). 448dfe804aSJiping Ma * 458dfe804aSJiping Ma * So far, so good. 468dfe804aSJiping Ma * 478dfe804aSJiping Ma * The oddity arises when a 64-bit consumer looks at a 32-bit task and 488dfe804aSJiping Ma * asks for registers beyond PERF_REG_ARM_MAX. In this case, we return 498dfe804aSJiping Ma * SP_usr, LR_usr and PC in the positions where the AArch64 SP, LR and 508dfe804aSJiping Ma * PC registers would normally live. The initial idea was to allow a 518dfe804aSJiping Ma * 64-bit unwinder to unwind a 32-bit task and, although it's not clear 528dfe804aSJiping Ma * how well that works in practice, somebody might be relying on it. 538dfe804aSJiping Ma * 548dfe804aSJiping Ma * At the time we make a sample, we don't know whether the consumer is 558dfe804aSJiping Ma * 32-bit or 64-bit, so we have to cater for both possibilities. 562ee0d7fdSJean Pihet */ 572ee0d7fdSJean Pihet if (compat_user_mode(regs)) { 582ee0d7fdSJean Pihet if ((u32)idx == PERF_REG_ARM64_SP) 592ee0d7fdSJean Pihet return regs->compat_sp; 602ee0d7fdSJean Pihet if ((u32)idx == PERF_REG_ARM64_LR) 612ee0d7fdSJean Pihet return regs->compat_lr; 628dfe804aSJiping Ma if (idx == 15) 638dfe804aSJiping Ma return regs->pc; 642ee0d7fdSJean Pihet } 652ee0d7fdSJean Pihet 665b75a6afSWill Deacon if ((u32)idx == PERF_REG_ARM64_SP) 675b75a6afSWill Deacon return regs->sp; 685b75a6afSWill Deacon 695b75a6afSWill Deacon if ((u32)idx == PERF_REG_ARM64_PC) 705b75a6afSWill Deacon return regs->pc; 715b75a6afSWill Deacon 72*cbb0c02cSJames Clark if ((u32)idx >= PERF_REG_ARM64_MAX) 73*cbb0c02cSJames Clark return perf_ext_regs_value(idx); 74*cbb0c02cSJames Clark 752ee0d7fdSJean Pihet return regs->regs[idx]; 762ee0d7fdSJean Pihet } 772ee0d7fdSJean Pihet 782ee0d7fdSJean Pihet #define REG_RESERVED (~((1ULL << PERF_REG_ARM64_MAX) - 1)) 792ee0d7fdSJean Pihet 802ee0d7fdSJean Pihet int perf_reg_validate(u64 mask) 812ee0d7fdSJean Pihet { 82*cbb0c02cSJames Clark u64 reserved_mask = REG_RESERVED; 83*cbb0c02cSJames Clark 84*cbb0c02cSJames Clark if (system_supports_sve()) 85*cbb0c02cSJames Clark reserved_mask &= ~(1ULL << PERF_REG_ARM64_VG); 86*cbb0c02cSJames Clark 87*cbb0c02cSJames Clark if (!mask || mask & reserved_mask) 882ee0d7fdSJean Pihet return -EINVAL; 892ee0d7fdSJean Pihet 902ee0d7fdSJean Pihet return 0; 912ee0d7fdSJean Pihet } 922ee0d7fdSJean Pihet 932ee0d7fdSJean Pihet u64 perf_reg_abi(struct task_struct *task) 942ee0d7fdSJean Pihet { 952ee0d7fdSJean Pihet if (is_compat_thread(task_thread_info(task))) 962ee0d7fdSJean Pihet return PERF_SAMPLE_REGS_ABI_32; 972ee0d7fdSJean Pihet else 982ee0d7fdSJean Pihet return PERF_SAMPLE_REGS_ABI_64; 992ee0d7fdSJean Pihet } 10088a7c26aSAndy Lutomirski 10188a7c26aSAndy Lutomirski void perf_get_regs_user(struct perf_regs *regs_user, 10276a4efa8SPeter Zijlstra struct pt_regs *regs) 10388a7c26aSAndy Lutomirski { 10488a7c26aSAndy Lutomirski regs_user->regs = task_pt_regs(current); 10588a7c26aSAndy Lutomirski regs_user->abi = perf_reg_abi(current); 10688a7c26aSAndy Lutomirski } 107