xref: /openbmc/linux/arch/arm64/include/asm/mmu.h (revision b519538dfefc2f8478a1bcb458459c861d431784)
14f04d8f0SCatalin Marinas /*
24f04d8f0SCatalin Marinas  * Copyright (C) 2012 ARM Ltd.
34f04d8f0SCatalin Marinas  *
44f04d8f0SCatalin Marinas  * This program is free software; you can redistribute it and/or modify
54f04d8f0SCatalin Marinas  * it under the terms of the GNU General Public License version 2 as
64f04d8f0SCatalin Marinas  * published by the Free Software Foundation.
74f04d8f0SCatalin Marinas  *
84f04d8f0SCatalin Marinas  * This program is distributed in the hope that it will be useful,
94f04d8f0SCatalin Marinas  * but WITHOUT ANY WARRANTY; without even the implied warranty of
104f04d8f0SCatalin Marinas  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
114f04d8f0SCatalin Marinas  * GNU General Public License for more details.
124f04d8f0SCatalin Marinas  *
134f04d8f0SCatalin Marinas  * You should have received a copy of the GNU General Public License
144f04d8f0SCatalin Marinas  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
154f04d8f0SCatalin Marinas  */
164f04d8f0SCatalin Marinas #ifndef __ASM_MMU_H
174f04d8f0SCatalin Marinas #define __ASM_MMU_H
184f04d8f0SCatalin Marinas 
195ce93ab6SYury Norov #define MMCF_AARCH32	0x1	/* mm context flag for AArch32 executables */
200c8ea531SWill Deacon #define USER_ASID_FLAG	(UL(1) << 48)
21*b519538dSWill Deacon #define TTBR_ASID_MASK	(UL(0xffff) << 48)
225ce93ab6SYury Norov 
23fc0e1299SWill Deacon #ifndef __ASSEMBLY__
24fc0e1299SWill Deacon 
254f04d8f0SCatalin Marinas typedef struct {
265aec715dSWill Deacon 	atomic64_t	id;
274f04d8f0SCatalin Marinas 	void		*vdso;
2806beb72fSPratyush Anand 	unsigned long	flags;
294f04d8f0SCatalin Marinas } mm_context_t;
304f04d8f0SCatalin Marinas 
315aec715dSWill Deacon /*
325aec715dSWill Deacon  * This macro is only used by the TLBI code, which cannot race with an
335aec715dSWill Deacon  * ASID change and therefore doesn't need to reload the counter using
345aec715dSWill Deacon  * atomic64_read.
355aec715dSWill Deacon  */
365aec715dSWill Deacon #define ASID(mm)	((mm)->context.id.counter & 0xffff)
374f04d8f0SCatalin Marinas 
38fc0e1299SWill Deacon static inline bool arm64_kernel_unmapped_at_el0(void)
39fc0e1299SWill Deacon {
40ea1e3de8SWill Deacon 	return IS_ENABLED(CONFIG_UNMAP_KERNEL_AT_EL0) &&
41ea1e3de8SWill Deacon 	       cpus_have_const_cap(ARM64_UNMAP_KERNEL_AT_EL0);
42fc0e1299SWill Deacon }
43fc0e1299SWill Deacon 
444f04d8f0SCatalin Marinas extern void paging_init(void);
453194ac6eSDavid Daney extern void bootmem_init(void);
462475ff9dSCatalin Marinas extern void __iomem *early_io_map(phys_addr_t phys, unsigned long virt);
470bf757c7SMark Salter extern void init_mem_pgprot(void);
488ce837ceSArd Biesheuvel extern void create_pgd_mapping(struct mm_struct *mm, phys_addr_t phys,
498ce837ceSArd Biesheuvel 			       unsigned long virt, phys_addr_t size,
50f14c66ceSArd Biesheuvel 			       pgprot_t prot, bool page_mappings_only);
5161bd93ceSArd Biesheuvel extern void *fixmap_remap_fdt(phys_addr_t dt_phys);
525ea5306cSArd Biesheuvel extern void mark_linear_text_alias_ro(void);
534f04d8f0SCatalin Marinas 
54fc0e1299SWill Deacon #endif	/* !__ASSEMBLY__ */
554f04d8f0SCatalin Marinas #endif
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