14f04d8f0SCatalin Marinas /* 24f04d8f0SCatalin Marinas * Copyright (C) 2012 ARM Ltd. 34f04d8f0SCatalin Marinas * 44f04d8f0SCatalin Marinas * This program is free software; you can redistribute it and/or modify 54f04d8f0SCatalin Marinas * it under the terms of the GNU General Public License version 2 as 64f04d8f0SCatalin Marinas * published by the Free Software Foundation. 74f04d8f0SCatalin Marinas * 84f04d8f0SCatalin Marinas * This program is distributed in the hope that it will be useful, 94f04d8f0SCatalin Marinas * but WITHOUT ANY WARRANTY; without even the implied warranty of 104f04d8f0SCatalin Marinas * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 114f04d8f0SCatalin Marinas * GNU General Public License for more details. 124f04d8f0SCatalin Marinas * 134f04d8f0SCatalin Marinas * You should have received a copy of the GNU General Public License 144f04d8f0SCatalin Marinas * along with this program. If not, see <http://www.gnu.org/licenses/>. 154f04d8f0SCatalin Marinas */ 164f04d8f0SCatalin Marinas #ifndef __ASM_MMU_H 174f04d8f0SCatalin Marinas #define __ASM_MMU_H 184f04d8f0SCatalin Marinas 195ce93ab6SYury Norov #define MMCF_AARCH32 0x1 /* mm context flag for AArch32 executables */ 20*79e9aa59SJames Morse #define USER_ASID_BIT 48 21*79e9aa59SJames Morse #define USER_ASID_FLAG (UL(1) << USER_ASID_BIT) 22b519538dSWill Deacon #define TTBR_ASID_MASK (UL(0xffff) << 48) 235ce93ab6SYury Norov 24fc0e1299SWill Deacon #ifndef __ASSEMBLY__ 25fc0e1299SWill Deacon 264f04d8f0SCatalin Marinas typedef struct { 275aec715dSWill Deacon atomic64_t id; 284f04d8f0SCatalin Marinas void *vdso; 2906beb72fSPratyush Anand unsigned long flags; 304f04d8f0SCatalin Marinas } mm_context_t; 314f04d8f0SCatalin Marinas 325aec715dSWill Deacon /* 335aec715dSWill Deacon * This macro is only used by the TLBI code, which cannot race with an 345aec715dSWill Deacon * ASID change and therefore doesn't need to reload the counter using 355aec715dSWill Deacon * atomic64_read. 365aec715dSWill Deacon */ 375aec715dSWill Deacon #define ASID(mm) ((mm)->context.id.counter & 0xffff) 384f04d8f0SCatalin Marinas 39fc0e1299SWill Deacon static inline bool arm64_kernel_unmapped_at_el0(void) 40fc0e1299SWill Deacon { 41ea1e3de8SWill Deacon return IS_ENABLED(CONFIG_UNMAP_KERNEL_AT_EL0) && 42ea1e3de8SWill Deacon cpus_have_const_cap(ARM64_UNMAP_KERNEL_AT_EL0); 43fc0e1299SWill Deacon } 44fc0e1299SWill Deacon 450f15adbbSWill Deacon typedef void (*bp_hardening_cb_t)(void); 460f15adbbSWill Deacon 470f15adbbSWill Deacon struct bp_hardening_data { 480f15adbbSWill Deacon int hyp_vectors_slot; 490f15adbbSWill Deacon bp_hardening_cb_t fn; 500f15adbbSWill Deacon }; 510f15adbbSWill Deacon 520f15adbbSWill Deacon #ifdef CONFIG_HARDEN_BRANCH_PREDICTOR 530f15adbbSWill Deacon extern char __bp_harden_hyp_vecs_start[], __bp_harden_hyp_vecs_end[]; 540f15adbbSWill Deacon 550f15adbbSWill Deacon DECLARE_PER_CPU_READ_MOSTLY(struct bp_hardening_data, bp_hardening_data); 560f15adbbSWill Deacon 570f15adbbSWill Deacon static inline struct bp_hardening_data *arm64_get_bp_hardening_data(void) 580f15adbbSWill Deacon { 590f15adbbSWill Deacon return this_cpu_ptr(&bp_hardening_data); 600f15adbbSWill Deacon } 610f15adbbSWill Deacon 620f15adbbSWill Deacon static inline void arm64_apply_bp_hardening(void) 630f15adbbSWill Deacon { 640f15adbbSWill Deacon struct bp_hardening_data *d; 650f15adbbSWill Deacon 660f15adbbSWill Deacon if (!cpus_have_const_cap(ARM64_HARDEN_BRANCH_PREDICTOR)) 670f15adbbSWill Deacon return; 680f15adbbSWill Deacon 690f15adbbSWill Deacon d = arm64_get_bp_hardening_data(); 700f15adbbSWill Deacon if (d->fn) 710f15adbbSWill Deacon d->fn(); 720f15adbbSWill Deacon } 730f15adbbSWill Deacon #else 740f15adbbSWill Deacon static inline struct bp_hardening_data *arm64_get_bp_hardening_data(void) 750f15adbbSWill Deacon { 760f15adbbSWill Deacon return NULL; 770f15adbbSWill Deacon } 780f15adbbSWill Deacon 790f15adbbSWill Deacon static inline void arm64_apply_bp_hardening(void) { } 800f15adbbSWill Deacon #endif /* CONFIG_HARDEN_BRANCH_PREDICTOR */ 810f15adbbSWill Deacon 824f04d8f0SCatalin Marinas extern void paging_init(void); 833194ac6eSDavid Daney extern void bootmem_init(void); 842475ff9dSCatalin Marinas extern void __iomem *early_io_map(phys_addr_t phys, unsigned long virt); 850bf757c7SMark Salter extern void init_mem_pgprot(void); 868ce837ceSArd Biesheuvel extern void create_pgd_mapping(struct mm_struct *mm, phys_addr_t phys, 878ce837ceSArd Biesheuvel unsigned long virt, phys_addr_t size, 88f14c66ceSArd Biesheuvel pgprot_t prot, bool page_mappings_only); 8961bd93ceSArd Biesheuvel extern void *fixmap_remap_fdt(phys_addr_t dt_phys); 905ea5306cSArd Biesheuvel extern void mark_linear_text_alias_ro(void); 914f04d8f0SCatalin Marinas 92fc0e1299SWill Deacon #endif /* !__ASSEMBLY__ */ 934f04d8f0SCatalin Marinas #endif 94