1caab277bSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */
24f04d8f0SCatalin Marinas /*
34f04d8f0SCatalin Marinas * Based on arch/arm/include/asm/memory.h
44f04d8f0SCatalin Marinas *
54f04d8f0SCatalin Marinas * Copyright (C) 2000-2002 Russell King
64f04d8f0SCatalin Marinas * Copyright (C) 2012 ARM Ltd.
74f04d8f0SCatalin Marinas *
84f04d8f0SCatalin Marinas * Note: this file should not be included by non-asm/.h files
94f04d8f0SCatalin Marinas */
104f04d8f0SCatalin Marinas #ifndef __ASM_MEMORY_H
114f04d8f0SCatalin Marinas #define __ASM_MEMORY_H
124f04d8f0SCatalin Marinas
134f04d8f0SCatalin Marinas #include <linux/const.h>
14d0b3c32eSWill Deacon #include <linux/sizes.h>
15b6531456SMark Rutland #include <asm/page-def.h>
164f04d8f0SCatalin Marinas
174f04d8f0SCatalin Marinas /*
18aa03c428SMark Rutland * Size of the PCI I/O space. This must remain a power of two so that
19aa03c428SMark Rutland * IO_SPACE_LIMIT acts as a mask for the low bits of I/O addresses.
20aa03c428SMark Rutland */
21aa03c428SMark Rutland #define PCI_IO_SIZE SZ_16M
22aa03c428SMark Rutland
23aa03c428SMark Rutland /*
243e1907d5SArd Biesheuvel * VMEMMAP_SIZE - allows the whole linear region to be covered by
253e1907d5SArd Biesheuvel * a struct page array
26ce3aaed8SSteve Capper *
27ce3aaed8SSteve Capper * If we are configured with a 52-bit kernel VA then our VMEMMAP_SIZE
2877ad4ce6SMark Rutland * needs to cover the memory region from the beginning of the 52-bit
2977ad4ce6SMark Rutland * PAGE_OFFSET all the way to PAGE_END for 48-bit. This allows us to
30ce3aaed8SSteve Capper * keep a constant PAGE_OFFSET and "fallback" to using the higher end
31ce3aaed8SSteve Capper * of the VMEMMAP where 52-bit support is not available in hardware.
323e1907d5SArd Biesheuvel */
338c96400dSArd Biesheuvel #define VMEMMAP_SHIFT (PAGE_SHIFT - STRUCT_PAGE_MAX_SHIFT)
348c96400dSArd Biesheuvel #define VMEMMAP_SIZE ((_PAGE_END(VA_BITS_MIN) - PAGE_OFFSET) >> VMEMMAP_SHIFT)
353e1907d5SArd Biesheuvel
363e1907d5SArd Biesheuvel /*
3777ad4ce6SMark Rutland * PAGE_OFFSET - the virtual address of the start of the linear map, at the
3877ad4ce6SMark Rutland * start of the TTBR1 address space.
3977ad4ce6SMark Rutland * PAGE_END - the end of the linear map, where all other kernel mappings begin.
4077ad4ce6SMark Rutland * KIMAGE_VADDR - the virtual address of the start of the kernel image.
414f04d8f0SCatalin Marinas * VA_BITS - the maximum number of bits for virtual addresses.
424f04d8f0SCatalin Marinas */
43e41ceed0SJungseok Lee #define VA_BITS (CONFIG_ARM64_VA_BITS)
44a5ac40f5SWill Deacon #define _PAGE_OFFSET(va) (-(UL(1) << (va)))
45b6d00d47SSteve Capper #define PAGE_OFFSET (_PAGE_OFFSET(VA_BITS))
46f9040773SArd Biesheuvel #define KIMAGE_VADDR (MODULES_END)
47f9040773SArd Biesheuvel #define MODULES_END (MODULES_VADDR + MODULES_VSIZE)
48b89ddf4cSRussell King #define MODULES_VADDR (_PAGE_END(VA_BITS_MIN))
49f80fb3a3SArd Biesheuvel #define MODULES_VSIZE (SZ_2G)
508c96400dSArd Biesheuvel #define VMEMMAP_START (-(UL(1) << (VA_BITS - VMEMMAP_SHIFT)))
51bbd6ec60SAnshuman Khandual #define VMEMMAP_END (VMEMMAP_START + VMEMMAP_SIZE)
529ad7c6d5SArd Biesheuvel #define PCI_IO_END (VMEMMAP_START - SZ_8M)
53aa03c428SMark Rutland #define PCI_IO_START (PCI_IO_END - PCI_IO_SIZE)
549ad7c6d5SArd Biesheuvel #define FIXADDR_TOP (VMEMMAP_START - SZ_32M)
554f04d8f0SCatalin Marinas
5690ec95cdSSteve Capper #if VA_BITS > 48
5790ec95cdSSteve Capper #define VA_BITS_MIN (48)
5890ec95cdSSteve Capper #else
5990ec95cdSSteve Capper #define VA_BITS_MIN (VA_BITS)
6090ec95cdSSteve Capper #endif
6168933aa9SWill Deacon
6277ad4ce6SMark Rutland #define _PAGE_END(va) (-(UL(1) << ((va) - 1)))
634f04d8f0SCatalin Marinas
6428c72583SJames Morse #define KERNEL_START _text
6528c72583SJames Morse #define KERNEL_END _end
6628c72583SJames Morse
674f04d8f0SCatalin Marinas /*
68b2f557eaSAndrey Konovalov * Generic and tag-based KASAN require 1/8th and 1/16th of the kernel virtual
69b2f557eaSAndrey Konovalov * address space for the shadow region respectively. They can bloat the stack
70b2f557eaSAndrey Konovalov * significantly, so double the (minimum) stack size when they are in use.
71f9040773SArd Biesheuvel */
720fea6e9aSAndrey Konovalov #if defined(CONFIG_KASAN_GENERIC) || defined(CONFIG_KASAN_SW_TAGS)
736bd1d0beSSteve Capper #define KASAN_SHADOW_OFFSET _AC(CONFIG_KASAN_SHADOW_OFFSET, UL)
746bd1d0beSSteve Capper #define KASAN_SHADOW_END ((UL(1) << (64 - KASAN_SHADOW_SCALE_SHIFT)) \
756bd1d0beSSteve Capper + KASAN_SHADOW_OFFSET)
76f4693c27SArd Biesheuvel #define PAGE_END (KASAN_SHADOW_END - (1UL << (vabits_actual - KASAN_SHADOW_SCALE_SHIFT)))
77b02faed1SMark Rutland #define KASAN_THREAD_SHIFT 1
78f9040773SArd Biesheuvel #else
79b02faed1SMark Rutland #define KASAN_THREAD_SHIFT 0
80f4693c27SArd Biesheuvel #define PAGE_END (_PAGE_END(VA_BITS_MIN))
8168933aa9SWill Deacon #endif /* CONFIG_KASAN */
82f9040773SArd Biesheuvel
83b02faed1SMark Rutland #define MIN_THREAD_SHIFT (14 + KASAN_THREAD_SHIFT)
84e3067861SMark Rutland
85e3067861SMark Rutland /*
86e3067861SMark Rutland * VMAP'd stacks are allocated at page granularity, so we must ensure that such
87e3067861SMark Rutland * stacks are a multiple of page size.
88e3067861SMark Rutland */
89e3067861SMark Rutland #if defined(CONFIG_VMAP_STACK) && (MIN_THREAD_SHIFT < PAGE_SHIFT)
90e3067861SMark Rutland #define THREAD_SHIFT PAGE_SHIFT
91e3067861SMark Rutland #else
92e3067861SMark Rutland #define THREAD_SHIFT MIN_THREAD_SHIFT
93e3067861SMark Rutland #endif
94dbc9344aSMark Rutland
95dbc9344aSMark Rutland #if THREAD_SHIFT >= PAGE_SHIFT
96dbc9344aSMark Rutland #define THREAD_SIZE_ORDER (THREAD_SHIFT - PAGE_SHIFT)
97dbc9344aSMark Rutland #endif
98dbc9344aSMark Rutland
99dbc9344aSMark Rutland #define THREAD_SIZE (UL(1) << THREAD_SHIFT)
100dbc9344aSMark Rutland
101e3067861SMark Rutland /*
102e3067861SMark Rutland * By aligning VMAP'd stacks to 2 * THREAD_SIZE, we can detect overflow by
103e3067861SMark Rutland * checking sp & (1 << THREAD_SHIFT), which we can do cheaply in the entry
104e3067861SMark Rutland * assembly.
105e3067861SMark Rutland */
106e3067861SMark Rutland #ifdef CONFIG_VMAP_STACK
107e3067861SMark Rutland #define THREAD_ALIGN (2 * THREAD_SIZE)
108e3067861SMark Rutland #else
109e3067861SMark Rutland #define THREAD_ALIGN THREAD_SIZE
110e3067861SMark Rutland #endif
111e3067861SMark Rutland
112f60ad4edSMark Rutland #define IRQ_STACK_SIZE THREAD_SIZE
113f60ad4edSMark Rutland
114872d8327SMark Rutland #define OVERFLOW_STACK_SIZE SZ_4K
115872d8327SMark Rutland
116f9040773SArd Biesheuvel /*
1176928bcc8SKalesh Singh * With the minimum frame size of [x29, x30], exactly half the combined
1186928bcc8SKalesh Singh * sizes of the hyp and overflow stacks is the maximum size needed to
1196928bcc8SKalesh Singh * save the unwinded stacktrace; plus an additional entry to delimit the
1206928bcc8SKalesh Singh * end.
1216928bcc8SKalesh Singh */
1226928bcc8SKalesh Singh #define NVHE_STACKTRACE_SIZE ((OVERFLOW_STACK_SIZE + PAGE_SIZE) / 2 + sizeof(long))
1236928bcc8SKalesh Singh
1246928bcc8SKalesh Singh /*
1258018ba4eSMark Rutland * Alignment of kernel segments (e.g. .text, .data).
126e16e65a0SArd Biesheuvel *
1278018ba4eSMark Rutland * 4 KB granule: 16 level 3 entries, with contiguous bit
1288018ba4eSMark Rutland * 16 KB granule: 4 level 3 entries, without contiguous bit
1298018ba4eSMark Rutland * 64 KB granule: 1 level 3 entry
1308018ba4eSMark Rutland */
1318018ba4eSMark Rutland #define SEGMENT_ALIGN SZ_64K
1328018ba4eSMark Rutland
133ab893fb9SArd Biesheuvel /*
1344f04d8f0SCatalin Marinas * Memory types available.
1359f341931SCatalin Marinas *
1369f341931SCatalin Marinas * IMPORTANT: MT_NORMAL must be index 0 since vm_get_page_prot() may 'or' in
1379f341931SCatalin Marinas * the MT_NORMAL_TAGGED memory type for PROT_MTE mappings. Note
1389f341931SCatalin Marinas * that protection_map[] only contains MT_NORMAL attributes.
1394f04d8f0SCatalin Marinas */
1409f341931SCatalin Marinas #define MT_NORMAL 0
1419f341931SCatalin Marinas #define MT_NORMAL_TAGGED 1
1429f341931SCatalin Marinas #define MT_NORMAL_NC 2
14321cfe6edSWill Deacon #define MT_DEVICE_nGnRnE 3
14421cfe6edSWill Deacon #define MT_DEVICE_nGnRE 4
1454f04d8f0SCatalin Marinas
14636311607SMarc Zyngier /*
14736311607SMarc Zyngier * Memory types for Stage-2 translation
14836311607SMarc Zyngier */
14936311607SMarc Zyngier #define MT_S2_NORMAL 0xf
15036311607SMarc Zyngier #define MT_S2_DEVICE_nGnRE 0x1
15136311607SMarc Zyngier
152e48d53a9SMarc Zyngier /*
153e48d53a9SMarc Zyngier * Memory types for Stage-2 translation when ID_AA64MMFR2_EL1.FWB is 0001
154e48d53a9SMarc Zyngier * Stage-2 enforces Normal-WB and Device-nGnRE
155e48d53a9SMarc Zyngier */
156e48d53a9SMarc Zyngier #define MT_S2_FWB_NORMAL 6
157e48d53a9SMarc Zyngier #define MT_S2_FWB_DEVICE_nGnRE 1
158e48d53a9SMarc Zyngier
159324420bfSArd Biesheuvel #ifdef CONFIG_ARM64_4K_PAGES
160324420bfSArd Biesheuvel #define IOREMAP_MAX_ORDER (PUD_SHIFT)
161324420bfSArd Biesheuvel #else
162324420bfSArd Biesheuvel #define IOREMAP_MAX_ORDER (PMD_SHIFT)
163324420bfSArd Biesheuvel #endif
164324420bfSArd Biesheuvel
16500ef5434SJoey Gouly /*
16600ef5434SJoey Gouly * Open-coded (swapper_pg_dir - reserved_pg_dir) as this cannot be calculated
16700ef5434SJoey Gouly * until link time.
16800ef5434SJoey Gouly */
16900ef5434SJoey Gouly #define RESERVED_SWAPPER_OFFSET (PAGE_SIZE)
17000ef5434SJoey Gouly
1710188a894SJoey Gouly /*
1720188a894SJoey Gouly * Open-coded (swapper_pg_dir - tramp_pg_dir) as this cannot be calculated
1730188a894SJoey Gouly * until link time.
1740188a894SJoey Gouly */
1750188a894SJoey Gouly #define TRAMP_SWAPPER_OFFSET (2 * PAGE_SIZE)
1760188a894SJoey Gouly
1774f04d8f0SCatalin Marinas #ifndef __ASSEMBLY__
1784f04d8f0SCatalin Marinas
1798439e62aSArd Biesheuvel #include <linux/bitops.h>
1805f1f7f6cSWill Deacon #include <linux/compiler.h>
181a92405f0SArd Biesheuvel #include <linux/mmdebug.h>
1825f1f7f6cSWill Deacon #include <linux/types.h>
183010338d7SArd Biesheuvel #include <asm/boot.h>
1845f1f7f6cSWill Deacon #include <asm/bug.h>
1855f1f7f6cSWill Deacon
1860d9b1ffeSArd Biesheuvel #if VA_BITS > 48
1875f1f7f6cSWill Deacon extern u64 vabits_actual;
1880d9b1ffeSArd Biesheuvel #else
1890d9b1ffeSArd Biesheuvel #define vabits_actual ((u64)VA_BITS)
1900d9b1ffeSArd Biesheuvel #endif
191a92405f0SArd Biesheuvel
192020d044fSArd Biesheuvel extern s64 memstart_addr;
1934f04d8f0SCatalin Marinas /* PHYS_OFFSET - the physical address of the start of memory. */
194a92405f0SArd Biesheuvel #define PHYS_OFFSET ({ VM_BUG_ON(memstart_addr & 1); memstart_addr; })
195a7f8de16SArd Biesheuvel
196120dc60dSArd Biesheuvel /* the virtual base of the kernel image */
197f80fb3a3SArd Biesheuvel extern u64 kimage_vaddr;
198f80fb3a3SArd Biesheuvel
199a7f8de16SArd Biesheuvel /* the offset between the kernel virtual and physical mappings */
200a7f8de16SArd Biesheuvel extern u64 kimage_voffset;
2014f04d8f0SCatalin Marinas
kaslr_offset(void)2027ede8665SAlexander Popov static inline unsigned long kaslr_offset(void)
2037ede8665SAlexander Popov {
2047ede8665SAlexander Popov return kimage_vaddr - KIMAGE_VADDR;
2057ede8665SAlexander Popov }
2067ede8665SAlexander Popov
207010338d7SArd Biesheuvel #ifdef CONFIG_RANDOMIZE_BASE
208010338d7SArd Biesheuvel void kaslr_init(void);
kaslr_enabled(void)209010338d7SArd Biesheuvel static inline bool kaslr_enabled(void)
210010338d7SArd Biesheuvel {
211010338d7SArd Biesheuvel extern bool __kaslr_is_enabled;
212010338d7SArd Biesheuvel return __kaslr_is_enabled;
213010338d7SArd Biesheuvel }
214010338d7SArd Biesheuvel #else
kaslr_init(void)215010338d7SArd Biesheuvel static inline void kaslr_init(void) { }
kaslr_enabled(void)216010338d7SArd Biesheuvel static inline bool kaslr_enabled(void) { return false; }
2174f04d8f0SCatalin Marinas #endif
218a7f8de16SArd Biesheuvel
21934ba2c42SArd Biesheuvel /*
220a7f8de16SArd Biesheuvel * Allow all memory at the discovery stage. We will clip it later.
221a7f8de16SArd Biesheuvel */
22234ba2c42SArd Biesheuvel #define MIN_MEMBLOCK_ADDR 0
22334ba2c42SArd Biesheuvel #define MAX_MEMBLOCK_ADDR U64_MAX
2244f04d8f0SCatalin Marinas
2254f04d8f0SCatalin Marinas /*
2264f04d8f0SCatalin Marinas * PFNs are used to describe any physical page; this means
2274f04d8f0SCatalin Marinas * PFN 0 == physical address 0.
2284f04d8f0SCatalin Marinas *
2294f04d8f0SCatalin Marinas * This is the PFN of the first RAM page in the kernel
2304f04d8f0SCatalin Marinas * direct-mapped view. We assume this is the first page
2314f04d8f0SCatalin Marinas * of RAM in the mem_map as well.
2324f04d8f0SCatalin Marinas */
2334f04d8f0SCatalin Marinas #define PHYS_PFN_OFFSET (PHYS_OFFSET >> PAGE_SHIFT)
2349c23f847SAndrey Konovalov
2359c23f847SAndrey Konovalov /*
2369c23f847SAndrey Konovalov * When dealing with data aborts, watchpoints, or instruction traps we may end
2379c23f847SAndrey Konovalov * up with a tagged userland pointer. Clear the tag to get a sane pointer to
238597399d0SWill Deacon * pass on to access_ok(), for instance.
2399c1cac42SWill Deacon */
2409c23f847SAndrey Konovalov #define __untagged_addr(addr) \
241597399d0SWill Deacon ((__force __typeof__(addr))sign_extend64((__force u64)(addr), 55))
242d0022c0eSWill Deacon
243597399d0SWill Deacon #define untagged_addr(addr) ({ \
244597399d0SWill Deacon u64 __addr = (__force u64)(addr); \
245597399d0SWill Deacon __addr &= __untagged_addr(__addr); \
246597399d0SWill Deacon (__force __typeof__(addr))__addr; \
2472e903b91SAndrey Konovalov })
2483c9e3aa1SAndrey Konovalov
249597399d0SWill Deacon #if defined(CONFIG_KASAN_SW_TAGS) || defined(CONFIG_KASAN_HW_TAGS)
2503c9e3aa1SAndrey Konovalov #define __tag_shifted(tag) ((u64)(tag) << 56)
2513c9e3aa1SAndrey Konovalov #define __tag_reset(addr) __untagged_addr(addr)
2526bbd497fSWill Deacon #define __tag_get(addr) (__u8)((u64)(addr) >> 56)
2533c9e3aa1SAndrey Konovalov #else
2543c9e3aa1SAndrey Konovalov #define __tag_shifted(tag) 0UL
2552e903b91SAndrey Konovalov #define __tag_reset(addr) (addr)
2563c9e3aa1SAndrey Konovalov #define __tag_get(addr) 0
2576bbd497fSWill Deacon #endif /* CONFIG_KASAN_SW_TAGS || CONFIG_KASAN_HW_TAGS */
2586bbd497fSWill Deacon
__tag_set(const void * addr,u8 tag)2596bbd497fSWill Deacon static inline const void *__tag_set(const void *addr, u8 tag)
2606bbd497fSWill Deacon {
2616bbd497fSWill Deacon u64 __addr = (u64)addr & ~__tag_shifted(0xff);
262ec6d06efSLaura Abbott return (const void *)(__addr | __tag_shifted(tag));
263ccbe2aabSAndrey Konovalov }
2640eafff1cSAndrey Konovalov
2650eafff1cSAndrey Konovalov #ifdef CONFIG_KASAN_HW_TAGS
2660eafff1cSAndrey Konovalov #define arch_enable_tag_checks_sync() mte_enable_kernel_sync()
267*0d3c9468SAndrey Konovalov #define arch_enable_tag_checks_async() mte_enable_kernel_async()
268*0d3c9468SAndrey Konovalov #define arch_enable_tag_checks_asymm() mte_enable_kernel_asymm()
269e80a76aaSAndrey Konovalov #define arch_suppress_tag_checks_start() mte_enable_tco()
270ccbe2aabSAndrey Konovalov #define arch_suppress_tag_checks_stop() mte_disable_tco()
271ccbe2aabSAndrey Konovalov #define arch_force_async_tag_fault() mte_check_tfsr_exit()
272d9b6f907SAndrey Konovalov #define arch_get_random_tag() mte_get_random_tag()
273d9b6f907SAndrey Konovalov #define arch_get_mem_tag(addr) mte_get_mem_tag(addr)
274ccbe2aabSAndrey Konovalov #define arch_set_mem_tag_range(addr, size, tag, init) \
275ccbe2aabSAndrey Konovalov mte_set_mem_tag_range((addr), (size), (tag), (init))
276ec6d06efSLaura Abbott #endif /* CONFIG_KASAN_HW_TAGS */
277ec6d06efSLaura Abbott
278ec6d06efSLaura Abbott /*
279ec6d06efSLaura Abbott * Physical vs virtual RAM address space conversion. These are
280ec6d06efSLaura Abbott * private definitions which should NOT be used outside memory.h
281ec6d06efSLaura Abbott * files. Use virt_to_phys/phys_to_virt/__pa/__va instead.
282ec6d06efSLaura Abbott */
283ec6d06efSLaura Abbott
284519ea6f1SVincenzo Frascino
285519ea6f1SVincenzo Frascino /*
286519ea6f1SVincenzo Frascino * Check whether an arbitrary address is within the linear map, which
287ec6d06efSLaura Abbott * lives in the [PAGE_OFFSET, PAGE_END) interval at the bottom of the
28822cd5edbSCatalin Marinas * kernel's TTBR1 address range.
289ec6d06efSLaura Abbott */
29022cd5edbSCatalin Marinas #define __is_lm_address(addr) (((u64)(addr) - PAGE_OFFSET) < (PAGE_END - PAGE_OFFSET))
291ec6d06efSLaura Abbott
292ec6d06efSLaura Abbott #define __lm_to_phys(addr) (((addr) - PAGE_OFFSET) + PHYS_OFFSET)
293ec6d06efSLaura Abbott #define __kimg_to_phys(addr) ((addr) - kimage_voffset)
294577c2b35SWill Deacon
295d0b3c32eSWill Deacon #define __virt_to_phys_nodebug(x) ({ \
296ec6d06efSLaura Abbott phys_addr_t __x = (phys_addr_t)(__tag_reset(x)); \
297ec6d06efSLaura Abbott __is_lm_address(__x) ? __lm_to_phys(__x) : __kimg_to_phys(__x); \
298ec6d06efSLaura Abbott })
299ec6d06efSLaura Abbott
300ec6d06efSLaura Abbott #define __pa_symbol_nodebug(x) __kimg_to_phys((phys_addr_t)(x))
301ec6d06efSLaura Abbott
302ec6d06efSLaura Abbott #ifdef CONFIG_DEBUG_VIRTUAL
303ec6d06efSLaura Abbott extern phys_addr_t __virt_to_phys(unsigned long x);
304ec6d06efSLaura Abbott extern phys_addr_t __phys_addr_symbol(unsigned long x);
305ec6d06efSLaura Abbott #else
30668933aa9SWill Deacon #define __virt_to_phys(x) __virt_to_phys_nodebug(x)
3079e22eb61SLaura Abbott #define __phys_addr_symbol(x) __pa_symbol_nodebug(x)
3087bc1a0f9SArd Biesheuvel #endif /* CONFIG_DEBUG_VIRTUAL */
3099e22eb61SLaura Abbott
3109e22eb61SLaura Abbott #define __phys_to_virt(x) ((unsigned long)((x) - PHYS_OFFSET) | PAGE_OFFSET)
3119e22eb61SLaura Abbott #define __phys_to_kimg(x) ((unsigned long)((x) + kimage_voffset))
3129e22eb61SLaura Abbott
3139e22eb61SLaura Abbott /*
3149e22eb61SLaura Abbott * Convert a page to/from a physical address
3159e22eb61SLaura Abbott */
3169e22eb61SLaura Abbott #define page_to_phys(page) (__pfn_to_phys(page_to_pfn(page)))
3179e22eb61SLaura Abbott #define phys_to_page(phys) (pfn_to_page(__phys_to_pfn(phys)))
3184f04d8f0SCatalin Marinas
3194f04d8f0SCatalin Marinas /*
3204f04d8f0SCatalin Marinas * Note: Drivers should NOT use these. They are the wrong
3214f04d8f0SCatalin Marinas * translation for translating DMA addresses. Use the driver
32209a57239SThierry Reding * DMA support - see dma-mapping.h.
3234f04d8f0SCatalin Marinas */
3244f04d8f0SCatalin Marinas #define virt_to_phys virt_to_phys
virt_to_phys(const volatile void * x)3254f04d8f0SCatalin Marinas static inline phys_addr_t virt_to_phys(const volatile void *x)
3264f04d8f0SCatalin Marinas {
3274f04d8f0SCatalin Marinas return __virt_to_phys((unsigned long)(x));
32809a57239SThierry Reding }
3294f04d8f0SCatalin Marinas
3304f04d8f0SCatalin Marinas #define phys_to_virt phys_to_virt
phys_to_virt(phys_addr_t x)3314f04d8f0SCatalin Marinas static inline void *phys_to_virt(phys_addr_t x)
3324f04d8f0SCatalin Marinas {
3334f04d8f0SCatalin Marinas return (void *)(__phys_to_virt(x));
3344f04d8f0SCatalin Marinas }
3354f04d8f0SCatalin Marinas
3364f04d8f0SCatalin Marinas /* Needed already here for resolving __phys_to_pfn() in virt_to_pfn() */
3374f04d8f0SCatalin Marinas #include <asm-generic/memory_model.h>
338ec6d06efSLaura Abbott
virt_to_pfn(const void * kaddr)339ec6d06efSLaura Abbott static inline unsigned long virt_to_pfn(const void *kaddr)
3404f04d8f0SCatalin Marinas {
3414f04d8f0SCatalin Marinas return __phys_to_pfn(virt_to_phys(kaddr));
342869dcfd1SLaura Abbott }
3432077be67SLaura Abbott
3444f04d8f0SCatalin Marinas /*
3454f04d8f0SCatalin Marinas * Drivers should NOT use these either.
346d0b3c32eSWill Deacon */
347d0b3c32eSWill Deacon #define __pa(x) __virt_to_phys((unsigned long)(x))
3484f04d8f0SCatalin Marinas #define __pa_symbol(x) __phys_addr_symbol(RELOC_HIDE((unsigned long)(x), 0))
3495fd6690cSNeil Zhang #define __pa_nodebug(x) __virt_to_phys_nodebug((unsigned long)(x))
3504f04d8f0SCatalin Marinas #define __va(x) ((void *)__phys_to_virt((phys_addr_t)(x)))
351782276b4SCatalin Marinas #define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
35286c83365SAndrey Konovalov #define sym_to_pfn(x) __phys_to_pfn(__pa_symbol(x))
35386c83365SAndrey Konovalov
35486c83365SAndrey Konovalov /*
35586c83365SAndrey Konovalov * virt_to_page(x) convert a _valid_ virtual address to struct page *
35686c83365SAndrey Konovalov * virt_addr_valid(x) indicates whether a virtual address is valid
357d0b3c32eSWill Deacon */
3589f287591SArd Biesheuvel #define ARCH_PFN_OFFSET ((unsigned long)PHYS_PFN_OFFSET)
35996628f0fSWill Deacon
36096628f0fSWill Deacon #if defined(CONFIG_DEBUG_VIRTUAL)
361c1090bb1SArd Biesheuvel #define page_to_virt(x) ({ \
362c1090bb1SArd Biesheuvel __typeof__(x) __page = x; \
36396628f0fSWill Deacon void *__addr = __va(page_to_phys(__page)); \
3642813b9c0SAndrey Konovalov (void *)__tag_set((const void *)__addr, page_kasan_tag(__page));\
3652813b9c0SAndrey Konovalov })
36696628f0fSWill Deacon #define virt_to_page(x) pfn_to_page(virt_to_pfn(x))
367c1090bb1SArd Biesheuvel #else
368c1090bb1SArd Biesheuvel #define page_to_virt(x) ({ \
369c1090bb1SArd Biesheuvel __typeof__(x) __page = x; \
37096628f0fSWill Deacon u64 __idx = ((u64)__page - VMEMMAP_START) / sizeof(struct page);\
371782276b4SCatalin Marinas u64 __addr = PAGE_OFFSET + (__idx * PAGE_SIZE); \
3729f287591SArd Biesheuvel (void *)__tag_set((const void *)__addr, page_kasan_tag(__page));\
37368dd8ef3SWill Deacon })
37491cb2c8bSCatalin Marinas
375873ba463SMike Rapoport #define virt_to_page(x) ({ \
37668dd8ef3SWill Deacon u64 __idx = (__tag_reset((u64)x) - PAGE_OFFSET) / PAGE_SIZE; \
3774f04d8f0SCatalin Marinas u64 __addr = VMEMMAP_START + (__idx * sizeof(struct page)); \
378638d5031SAnshuman Khandual (struct page *)__addr; \
37968933aa9SWill Deacon })
380ca219452SLaura Abbott #endif /* CONFIG_DEBUG_VIRTUAL */
3818a5b403dSArd Biesheuvel
3828a5b403dSArd Biesheuvel #define virt_addr_valid(addr) ({ \
3838a5b403dSArd Biesheuvel __typeof__(addr) __addr = __tag_reset(addr); \
3848a5b403dSArd Biesheuvel __is_lm_address(__addr) && pfn_is_map_memory(virt_to_pfn(__addr)); \
3858a5b403dSArd Biesheuvel })
3868a5b403dSArd Biesheuvel
3878a5b403dSArd Biesheuvel void dump_mem_limit(void);
3888a5b403dSArd Biesheuvel #endif /* !ASSEMBLY */
3898a5b403dSArd Biesheuvel
3908a5b403dSArd Biesheuvel /*
3918a5b403dSArd Biesheuvel * Given that the GIC architecture permits ITS implementations that can only be
392450d0e74SZhou Guanghui * configured with a LPI table address once, GICv3 systems with many CPUs may
393450d0e74SZhou Guanghui * end up reserving a lot of different regions after a kexec for their LPI
394450d0e74SZhou Guanghui * tables (one per CPU), as we are forced to reuse the same memory after kexec
395450d0e74SZhou Guanghui * (and thus reserve it persistently with EFI beforehand)
396450d0e74SZhou Guanghui */
397450d0e74SZhou Guanghui #if defined(CONFIG_EFI) && defined(CONFIG_ARM_GIC_V3_ITS)
398450d0e74SZhou Guanghui # define INIT_MEMBLOCK_RESERVED_REGIONS (INIT_MEMBLOCK_REGIONS + NR_CPUS + 1)
399450d0e74SZhou Guanghui #endif
400450d0e74SZhou Guanghui
4014f04d8f0SCatalin Marinas /*
4024f04d8f0SCatalin Marinas * memory regions which marked with flag MEMBLOCK_NOMAP(for example, the memory
40368933aa9SWill Deacon * of the EFI_UNUSABLE_MEMORY type) may divide a continuous memory block into
404 * multiple parts. As a result, the number of memory regions is large.
405 */
406 #ifdef CONFIG_EFI
407 #define INIT_MEMBLOCK_MEMORY_REGIONS (INIT_MEMBLOCK_REGIONS * 8)
408 #endif
409
410 #include <asm-generic/memory_model.h>
411
412 #endif /* __ASM_MEMORY_H */
413