xref: /openbmc/linux/arch/arm64/include/asm/kernel-pgtable.h (revision 38e4b6605e5cde68ba388f3175e7b4962694674c)
1caab277bSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */
287d1587bSSuzuki K. Poulose /*
387d1587bSSuzuki K. Poulose  * Kernel page table mapping
487d1587bSSuzuki K. Poulose  *
587d1587bSSuzuki K. Poulose  * Copyright (C) 2015 ARM Ltd.
687d1587bSSuzuki K. Poulose  */
787d1587bSSuzuki K. Poulose 
887d1587bSSuzuki K. Poulose #ifndef __ASM_KERNEL_PGTABLE_H
987d1587bSSuzuki K. Poulose #define __ASM_KERNEL_PGTABLE_H
1087d1587bSSuzuki K. Poulose 
11f70b3a23SArd Biesheuvel #include <asm/boot.h>
125f1f7f6cSWill Deacon #include <asm/pgtable-hwdef.h>
1306e9bf2fSArd Biesheuvel #include <asm/sparsemem.h>
14b433dce0SSuzuki K. Poulose 
15b433dce0SSuzuki K. Poulose /*
16b433dce0SSuzuki K. Poulose  * The linear mapping and the start of memory are both 2M aligned (per
17b433dce0SSuzuki K. Poulose  * the arm64 booting.txt requirements). Hence we can use section mapping
18b433dce0SSuzuki K. Poulose  * with 4K (section size = 2M) but not with 16K (section size = 32M) or
19b433dce0SSuzuki K. Poulose  * 64K (section size = 512M).
20b433dce0SSuzuki K. Poulose  */
21b433dce0SSuzuki K. Poulose 
2287d1587bSSuzuki K. Poulose /*
2387d1587bSSuzuki K. Poulose  * The idmap and swapper page tables need some space reserved in the kernel
2487d1587bSSuzuki K. Poulose  * image. Both require pgd, pud (4 levels only) and pmd tables to (section)
2587d1587bSSuzuki K. Poulose  * map the kernel. With the 64K page configuration, swapper and idmap need to
2687d1587bSSuzuki K. Poulose  * map to pte level. The swapper also maps the FDT (see __create_page_tables
2787d1587bSSuzuki K. Poulose  * for more information). Note that the number of ID map translation levels
2887d1587bSSuzuki K. Poulose  * could be increased on the fly if system RAM is out of reach for the default
29c265af51SSuzuki K. Poulose  * VA range, so pages required to map highest possible PA are reserved in all
30c265af51SSuzuki K. Poulose  * cases.
3187d1587bSSuzuki K. Poulose  */
32*38e4b660SAnshuman Khandual #ifdef CONFIG_ARM64_4K_PAGES
3387d1587bSSuzuki K. Poulose #define SWAPPER_PGTABLE_LEVELS	(CONFIG_PGTABLE_LEVELS - 1)
34b433dce0SSuzuki K. Poulose #else
35b433dce0SSuzuki K. Poulose #define SWAPPER_PGTABLE_LEVELS	(CONFIG_PGTABLE_LEVELS)
3687d1587bSSuzuki K. Poulose #endif
3787d1587bSSuzuki K. Poulose 
380370b31eSSteve Capper 
390370b31eSSteve Capper /*
400370b31eSSteve Capper  * If KASLR is enabled, then an offset K is added to the kernel address
410370b31eSSteve Capper  * space. The bottom 21 bits of this offset are zero to guarantee 2MB
420370b31eSSteve Capper  * alignment for PA and VA.
430370b31eSSteve Capper  *
440370b31eSSteve Capper  * For each pagetable level of the swapper, we know that the shift will
450370b31eSSteve Capper  * be larger than 21 (for the 4KB granule case we use section maps thus
460370b31eSSteve Capper  * the smallest shift is actually 30) thus there is the possibility that
470370b31eSSteve Capper  * KASLR can increase the number of pagetable entries by 1, so we make
480370b31eSSteve Capper  * room for this extra entry.
490370b31eSSteve Capper  *
500370b31eSSteve Capper  * Note KASLR cannot increase the number of required entries for a level
510370b31eSSteve Capper  * by more than one because it increments both the virtual start and end
520370b31eSSteve Capper  * addresses equally (the extra entry comes from the case where the end
530370b31eSSteve Capper  * address is just pushed over a boundary and the start address isn't).
540370b31eSSteve Capper  */
550370b31eSSteve Capper 
560370b31eSSteve Capper #ifdef CONFIG_RANDOMIZE_BASE
570370b31eSSteve Capper #define EARLY_KASLR	(1)
580370b31eSSteve Capper #else
590370b31eSSteve Capper #define EARLY_KASLR	(0)
600370b31eSSteve Capper #endif
610370b31eSSteve Capper 
625fbc49ceSArd Biesheuvel #define EARLY_ENTRIES(vstart, vend, shift, add) \
635fbc49ceSArd Biesheuvel 	((((vend) - 1) >> (shift)) - ((vstart) >> (shift)) + 1 + add)
640370b31eSSteve Capper 
655fbc49ceSArd Biesheuvel #define EARLY_PGDS(vstart, vend, add) (EARLY_ENTRIES(vstart, vend, PGDIR_SHIFT, add))
660370b31eSSteve Capper 
670370b31eSSteve Capper #if SWAPPER_PGTABLE_LEVELS > 3
685fbc49ceSArd Biesheuvel #define EARLY_PUDS(vstart, vend, add) (EARLY_ENTRIES(vstart, vend, PUD_SHIFT, add))
690370b31eSSteve Capper #else
705fbc49ceSArd Biesheuvel #define EARLY_PUDS(vstart, vend, add) (0)
710370b31eSSteve Capper #endif
720370b31eSSteve Capper 
730370b31eSSteve Capper #if SWAPPER_PGTABLE_LEVELS > 2
745fbc49ceSArd Biesheuvel #define EARLY_PMDS(vstart, vend, add) (EARLY_ENTRIES(vstart, vend, SWAPPER_TABLE_SHIFT, add))
750370b31eSSteve Capper #else
765fbc49ceSArd Biesheuvel #define EARLY_PMDS(vstart, vend, add) (0)
770370b31eSSteve Capper #endif
780370b31eSSteve Capper 
795fbc49ceSArd Biesheuvel #define EARLY_PAGES(vstart, vend, add) ( 1 			/* PGDIR page */				\
805fbc49ceSArd Biesheuvel 			+ EARLY_PGDS((vstart), (vend), add) 	/* each PGDIR needs a next level page table */	\
815fbc49ceSArd Biesheuvel 			+ EARLY_PUDS((vstart), (vend), add)	/* each PUD needs a next level page table */	\
825fbc49ceSArd Biesheuvel 			+ EARLY_PMDS((vstart), (vend), add))	/* each PMD needs a next level page table */
835fbc49ceSArd Biesheuvel #define INIT_DIR_SIZE (PAGE_SIZE * EARLY_PAGES(KIMAGE_VADDR, _end, EARLY_KASLR))
84c3cee924SArd Biesheuvel 
85c3cee924SArd Biesheuvel /* the initial ID map may need two extra pages if it needs to be extended */
86c3cee924SArd Biesheuvel #if VA_BITS < 48
87f70b3a23SArd Biesheuvel #define INIT_IDMAP_DIR_SIZE	((INIT_IDMAP_DIR_PAGES + 2) * PAGE_SIZE)
88c3cee924SArd Biesheuvel #else
89f70b3a23SArd Biesheuvel #define INIT_IDMAP_DIR_SIZE	(INIT_IDMAP_DIR_PAGES * PAGE_SIZE)
90c3cee924SArd Biesheuvel #endif
915fbc49ceSArd Biesheuvel #define INIT_IDMAP_DIR_PAGES	EARLY_PAGES(KIMAGE_VADDR, _end + MAX_FDT_SIZE + SWAPPER_BLOCK_SIZE, 1)
9287d1587bSSuzuki K. Poulose 
9387d1587bSSuzuki K. Poulose /* Initial memory map size */
94*38e4b660SAnshuman Khandual #ifdef CONFIG_ARM64_4K_PAGES
954aaa87abSAnshuman Khandual #define SWAPPER_BLOCK_SHIFT	PMD_SHIFT
964aaa87abSAnshuman Khandual #define SWAPPER_BLOCK_SIZE	PMD_SIZE
9787d1587bSSuzuki K. Poulose #define SWAPPER_TABLE_SHIFT	PUD_SHIFT
98b433dce0SSuzuki K. Poulose #else
99b433dce0SSuzuki K. Poulose #define SWAPPER_BLOCK_SHIFT	PAGE_SHIFT
100b433dce0SSuzuki K. Poulose #define SWAPPER_BLOCK_SIZE	PAGE_SIZE
101b433dce0SSuzuki K. Poulose #define SWAPPER_TABLE_SHIFT	PMD_SHIFT
10287d1587bSSuzuki K. Poulose #endif
10387d1587bSSuzuki K. Poulose 
10487d1587bSSuzuki K. Poulose /*
10587d1587bSSuzuki K. Poulose  * Initial memory map attributes.
10687d1587bSSuzuki K. Poulose  */
10741acec62SWill Deacon #define SWAPPER_PTE_FLAGS	(PTE_TYPE_PAGE | PTE_AF | PTE_SHARED)
10841acec62SWill Deacon #define SWAPPER_PMD_FLAGS	(PMD_TYPE_SECT | PMD_SECT_AF | PMD_SECT_S)
10987d1587bSSuzuki K. Poulose 
110*38e4b660SAnshuman Khandual #ifdef CONFIG_ARM64_4K_PAGES
111c3cee924SArd Biesheuvel #define SWAPPER_RW_MMUFLAGS	(PMD_ATTRINDX(MT_NORMAL) | SWAPPER_PMD_FLAGS)
112c3cee924SArd Biesheuvel #define SWAPPER_RX_MMUFLAGS	(SWAPPER_RW_MMUFLAGS | PMD_SECT_RDONLY)
113b433dce0SSuzuki K. Poulose #else
114c3cee924SArd Biesheuvel #define SWAPPER_RW_MMUFLAGS	(PTE_ATTRINDX(MT_NORMAL) | SWAPPER_PTE_FLAGS)
115c3cee924SArd Biesheuvel #define SWAPPER_RX_MMUFLAGS	(SWAPPER_RW_MMUFLAGS | PTE_RDONLY)
11687d1587bSSuzuki K. Poulose #endif
11787d1587bSSuzuki K. Poulose 
118a7f8de16SArd Biesheuvel /*
119a7f8de16SArd Biesheuvel  * To make optimal use of block mappings when laying out the linear
120a7f8de16SArd Biesheuvel  * mapping, round down the base of physical memory to a size that can
121a7f8de16SArd Biesheuvel  * be mapped efficiently, i.e., either PUD_SIZE (4k granule) or PMD_SIZE
122a7f8de16SArd Biesheuvel  * (64k granule), or a multiple that can be mapped using contiguous bits
123a7f8de16SArd Biesheuvel  * in the page tables: 32 * PMD_SIZE (16k granule)
124a7f8de16SArd Biesheuvel  */
12506e9bf2fSArd Biesheuvel #if defined(CONFIG_ARM64_4K_PAGES)
12606e9bf2fSArd Biesheuvel #define ARM64_MEMSTART_SHIFT		PUD_SHIFT
12706e9bf2fSArd Biesheuvel #elif defined(CONFIG_ARM64_16K_PAGES)
128ca6ece6aSAnshuman Khandual #define ARM64_MEMSTART_SHIFT		CONT_PMD_SHIFT
129a7f8de16SArd Biesheuvel #else
13006e9bf2fSArd Biesheuvel #define ARM64_MEMSTART_SHIFT		PMD_SHIFT
13106e9bf2fSArd Biesheuvel #endif
13206e9bf2fSArd Biesheuvel 
13306e9bf2fSArd Biesheuvel /*
13406e9bf2fSArd Biesheuvel  * sparsemem vmemmap imposes an additional requirement on the alignment of
13506e9bf2fSArd Biesheuvel  * memstart_addr, due to the fact that the base of the vmemmap region
13606e9bf2fSArd Biesheuvel  * has a direct correspondence, and needs to appear sufficiently aligned
13706e9bf2fSArd Biesheuvel  * in the virtual address space.
13806e9bf2fSArd Biesheuvel  */
139782276b4SCatalin Marinas #if ARM64_MEMSTART_SHIFT < SECTION_SIZE_BITS
14006e9bf2fSArd Biesheuvel #define ARM64_MEMSTART_ALIGN	(1UL << SECTION_SIZE_BITS)
14106e9bf2fSArd Biesheuvel #else
14206e9bf2fSArd Biesheuvel #define ARM64_MEMSTART_ALIGN	(1UL << ARM64_MEMSTART_SHIFT)
143a7f8de16SArd Biesheuvel #endif
14487d1587bSSuzuki K. Poulose 
14587d1587bSSuzuki K. Poulose #endif	/* __ASM_KERNEL_PGTABLE_H */
146