xref: /openbmc/linux/arch/arm64/include/asm/kernel-pgtable.h (revision 06e9bf2fd9b372bc1c757995b6ca1cfab0720acb)
187d1587bSSuzuki K. Poulose /*
287d1587bSSuzuki K. Poulose  * Kernel page table mapping
387d1587bSSuzuki K. Poulose  *
487d1587bSSuzuki K. Poulose  * Copyright (C) 2015 ARM Ltd.
587d1587bSSuzuki K. Poulose  *
687d1587bSSuzuki K. Poulose  * This program is free software; you can redistribute it and/or modify
787d1587bSSuzuki K. Poulose  * it under the terms of the GNU General Public License version 2 as
887d1587bSSuzuki K. Poulose  * published by the Free Software Foundation.
987d1587bSSuzuki K. Poulose  *
1087d1587bSSuzuki K. Poulose  * This program is distributed in the hope that it will be useful,
1187d1587bSSuzuki K. Poulose  * but WITHOUT ANY WARRANTY; without even the implied warranty of
1287d1587bSSuzuki K. Poulose  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
1387d1587bSSuzuki K. Poulose  * GNU General Public License for more details.
1487d1587bSSuzuki K. Poulose  *
1587d1587bSSuzuki K. Poulose  * You should have received a copy of the GNU General Public License
1687d1587bSSuzuki K. Poulose  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
1787d1587bSSuzuki K. Poulose  */
1887d1587bSSuzuki K. Poulose 
1987d1587bSSuzuki K. Poulose #ifndef __ASM_KERNEL_PGTABLE_H
2087d1587bSSuzuki K. Poulose #define __ASM_KERNEL_PGTABLE_H
2187d1587bSSuzuki K. Poulose 
22*06e9bf2fSArd Biesheuvel #include <asm/sparsemem.h>
23b433dce0SSuzuki K. Poulose 
24b433dce0SSuzuki K. Poulose /*
25b433dce0SSuzuki K. Poulose  * The linear mapping and the start of memory are both 2M aligned (per
26b433dce0SSuzuki K. Poulose  * the arm64 booting.txt requirements). Hence we can use section mapping
27b433dce0SSuzuki K. Poulose  * with 4K (section size = 2M) but not with 16K (section size = 32M) or
28b433dce0SSuzuki K. Poulose  * 64K (section size = 512M).
29b433dce0SSuzuki K. Poulose  */
30b433dce0SSuzuki K. Poulose #ifdef CONFIG_ARM64_4K_PAGES
31b433dce0SSuzuki K. Poulose #define ARM64_SWAPPER_USES_SECTION_MAPS 1
32b433dce0SSuzuki K. Poulose #else
33b433dce0SSuzuki K. Poulose #define ARM64_SWAPPER_USES_SECTION_MAPS 0
34b433dce0SSuzuki K. Poulose #endif
35b433dce0SSuzuki K. Poulose 
3687d1587bSSuzuki K. Poulose /*
3787d1587bSSuzuki K. Poulose  * The idmap and swapper page tables need some space reserved in the kernel
3887d1587bSSuzuki K. Poulose  * image. Both require pgd, pud (4 levels only) and pmd tables to (section)
3987d1587bSSuzuki K. Poulose  * map the kernel. With the 64K page configuration, swapper and idmap need to
4087d1587bSSuzuki K. Poulose  * map to pte level. The swapper also maps the FDT (see __create_page_tables
4187d1587bSSuzuki K. Poulose  * for more information). Note that the number of ID map translation levels
4287d1587bSSuzuki K. Poulose  * could be increased on the fly if system RAM is out of reach for the default
43c265af51SSuzuki K. Poulose  * VA range, so pages required to map highest possible PA are reserved in all
44c265af51SSuzuki K. Poulose  * cases.
4587d1587bSSuzuki K. Poulose  */
46b433dce0SSuzuki K. Poulose #if ARM64_SWAPPER_USES_SECTION_MAPS
4787d1587bSSuzuki K. Poulose #define SWAPPER_PGTABLE_LEVELS	(CONFIG_PGTABLE_LEVELS - 1)
48c265af51SSuzuki K. Poulose #define IDMAP_PGTABLE_LEVELS	(ARM64_HW_PGTABLE_LEVELS(PHYS_MASK_SHIFT) - 1)
49b433dce0SSuzuki K. Poulose #else
50b433dce0SSuzuki K. Poulose #define SWAPPER_PGTABLE_LEVELS	(CONFIG_PGTABLE_LEVELS)
51c265af51SSuzuki K. Poulose #define IDMAP_PGTABLE_LEVELS	(ARM64_HW_PGTABLE_LEVELS(PHYS_MASK_SHIFT))
5287d1587bSSuzuki K. Poulose #endif
5387d1587bSSuzuki K. Poulose 
5487d1587bSSuzuki K. Poulose #define SWAPPER_DIR_SIZE	(SWAPPER_PGTABLE_LEVELS * PAGE_SIZE)
55c265af51SSuzuki K. Poulose #define IDMAP_DIR_SIZE		(IDMAP_PGTABLE_LEVELS * PAGE_SIZE)
5687d1587bSSuzuki K. Poulose 
5787d1587bSSuzuki K. Poulose /* Initial memory map size */
58b433dce0SSuzuki K. Poulose #if ARM64_SWAPPER_USES_SECTION_MAPS
5987d1587bSSuzuki K. Poulose #define SWAPPER_BLOCK_SHIFT	SECTION_SHIFT
6087d1587bSSuzuki K. Poulose #define SWAPPER_BLOCK_SIZE	SECTION_SIZE
6187d1587bSSuzuki K. Poulose #define SWAPPER_TABLE_SHIFT	PUD_SHIFT
62b433dce0SSuzuki K. Poulose #else
63b433dce0SSuzuki K. Poulose #define SWAPPER_BLOCK_SHIFT	PAGE_SHIFT
64b433dce0SSuzuki K. Poulose #define SWAPPER_BLOCK_SIZE	PAGE_SIZE
65b433dce0SSuzuki K. Poulose #define SWAPPER_TABLE_SHIFT	PMD_SHIFT
6687d1587bSSuzuki K. Poulose #endif
6787d1587bSSuzuki K. Poulose 
68b433dce0SSuzuki K. Poulose /* The size of the initial kernel direct mapping */
69b433dce0SSuzuki K. Poulose #define SWAPPER_INIT_MAP_SIZE	(_AC(1, UL) << SWAPPER_TABLE_SHIFT)
7087d1587bSSuzuki K. Poulose 
7187d1587bSSuzuki K. Poulose /*
7287d1587bSSuzuki K. Poulose  * Initial memory map attributes.
7387d1587bSSuzuki K. Poulose  */
7487d1587bSSuzuki K. Poulose #define SWAPPER_PTE_FLAGS	(PTE_TYPE_PAGE | PTE_AF | PTE_SHARED)
7587d1587bSSuzuki K. Poulose #define SWAPPER_PMD_FLAGS	(PMD_TYPE_SECT | PMD_SECT_AF | PMD_SECT_S)
7687d1587bSSuzuki K. Poulose 
77b433dce0SSuzuki K. Poulose #if ARM64_SWAPPER_USES_SECTION_MAPS
7887d1587bSSuzuki K. Poulose #define SWAPPER_MM_MMUFLAGS	(PMD_ATTRINDX(MT_NORMAL) | SWAPPER_PMD_FLAGS)
79b433dce0SSuzuki K. Poulose #else
80b433dce0SSuzuki K. Poulose #define SWAPPER_MM_MMUFLAGS	(PTE_ATTRINDX(MT_NORMAL) | SWAPPER_PTE_FLAGS)
8187d1587bSSuzuki K. Poulose #endif
8287d1587bSSuzuki K. Poulose 
83a7f8de16SArd Biesheuvel /*
84a7f8de16SArd Biesheuvel  * To make optimal use of block mappings when laying out the linear
85a7f8de16SArd Biesheuvel  * mapping, round down the base of physical memory to a size that can
86a7f8de16SArd Biesheuvel  * be mapped efficiently, i.e., either PUD_SIZE (4k granule) or PMD_SIZE
87a7f8de16SArd Biesheuvel  * (64k granule), or a multiple that can be mapped using contiguous bits
88a7f8de16SArd Biesheuvel  * in the page tables: 32 * PMD_SIZE (16k granule)
89a7f8de16SArd Biesheuvel  */
90*06e9bf2fSArd Biesheuvel #if defined(CONFIG_ARM64_4K_PAGES)
91*06e9bf2fSArd Biesheuvel #define ARM64_MEMSTART_SHIFT		PUD_SHIFT
92*06e9bf2fSArd Biesheuvel #elif defined(CONFIG_ARM64_16K_PAGES)
93*06e9bf2fSArd Biesheuvel #define ARM64_MEMSTART_SHIFT		(PMD_SHIFT + 5)
94a7f8de16SArd Biesheuvel #else
95*06e9bf2fSArd Biesheuvel #define ARM64_MEMSTART_SHIFT		PMD_SHIFT
96*06e9bf2fSArd Biesheuvel #endif
97*06e9bf2fSArd Biesheuvel 
98*06e9bf2fSArd Biesheuvel /*
99*06e9bf2fSArd Biesheuvel  * sparsemem vmemmap imposes an additional requirement on the alignment of
100*06e9bf2fSArd Biesheuvel  * memstart_addr, due to the fact that the base of the vmemmap region
101*06e9bf2fSArd Biesheuvel  * has a direct correspondence, and needs to appear sufficiently aligned
102*06e9bf2fSArd Biesheuvel  * in the virtual address space.
103*06e9bf2fSArd Biesheuvel  */
104*06e9bf2fSArd Biesheuvel #if defined(CONFIG_SPARSEMEM_VMEMMAP) && ARM64_MEMSTART_SHIFT < SECTION_SIZE_BITS
105*06e9bf2fSArd Biesheuvel #define ARM64_MEMSTART_ALIGN	(1UL << SECTION_SIZE_BITS)
106*06e9bf2fSArd Biesheuvel #else
107*06e9bf2fSArd Biesheuvel #define ARM64_MEMSTART_ALIGN	(1UL << ARM64_MEMSTART_SHIFT)
108a7f8de16SArd Biesheuvel #endif
10987d1587bSSuzuki K. Poulose 
11087d1587bSSuzuki K. Poulose #endif	/* __ASM_KERNEL_PGTABLE_H */
111