1caab277bSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 287d1587bSSuzuki K. Poulose /* 387d1587bSSuzuki K. Poulose * Kernel page table mapping 487d1587bSSuzuki K. Poulose * 587d1587bSSuzuki K. Poulose * Copyright (C) 2015 ARM Ltd. 687d1587bSSuzuki K. Poulose */ 787d1587bSSuzuki K. Poulose 887d1587bSSuzuki K. Poulose #ifndef __ASM_KERNEL_PGTABLE_H 987d1587bSSuzuki K. Poulose #define __ASM_KERNEL_PGTABLE_H 1087d1587bSSuzuki K. Poulose 11f70b3a23SArd Biesheuvel #include <asm/boot.h> 125f1f7f6cSWill Deacon #include <asm/pgtable-hwdef.h> 1306e9bf2fSArd Biesheuvel #include <asm/sparsemem.h> 14b433dce0SSuzuki K. Poulose 15b433dce0SSuzuki K. Poulose /* 16b433dce0SSuzuki K. Poulose * The linear mapping and the start of memory are both 2M aligned (per 17b433dce0SSuzuki K. Poulose * the arm64 booting.txt requirements). Hence we can use section mapping 18b433dce0SSuzuki K. Poulose * with 4K (section size = 2M) but not with 16K (section size = 32M) or 19b433dce0SSuzuki K. Poulose * 64K (section size = 512M). 20b433dce0SSuzuki K. Poulose */ 21b433dce0SSuzuki K. Poulose 2287d1587bSSuzuki K. Poulose /* 2387d1587bSSuzuki K. Poulose * The idmap and swapper page tables need some space reserved in the kernel 2487d1587bSSuzuki K. Poulose * image. Both require pgd, pud (4 levels only) and pmd tables to (section) 2587d1587bSSuzuki K. Poulose * map the kernel. With the 64K page configuration, swapper and idmap need to 2687d1587bSSuzuki K. Poulose * map to pte level. The swapper also maps the FDT (see __create_page_tables 2787d1587bSSuzuki K. Poulose * for more information). Note that the number of ID map translation levels 2887d1587bSSuzuki K. Poulose * could be increased on the fly if system RAM is out of reach for the default 29c265af51SSuzuki K. Poulose * VA range, so pages required to map highest possible PA are reserved in all 30c265af51SSuzuki K. Poulose * cases. 3187d1587bSSuzuki K. Poulose */ 3238e4b660SAnshuman Khandual #ifdef CONFIG_ARM64_4K_PAGES 3387d1587bSSuzuki K. Poulose #define SWAPPER_PGTABLE_LEVELS (CONFIG_PGTABLE_LEVELS - 1) 34b433dce0SSuzuki K. Poulose #else 35b433dce0SSuzuki K. Poulose #define SWAPPER_PGTABLE_LEVELS (CONFIG_PGTABLE_LEVELS) 3687d1587bSSuzuki K. Poulose #endif 3787d1587bSSuzuki K. Poulose 380370b31eSSteve Capper 390370b31eSSteve Capper /* 400370b31eSSteve Capper * If KASLR is enabled, then an offset K is added to the kernel address 410370b31eSSteve Capper * space. The bottom 21 bits of this offset are zero to guarantee 2MB 420370b31eSSteve Capper * alignment for PA and VA. 430370b31eSSteve Capper * 440370b31eSSteve Capper * For each pagetable level of the swapper, we know that the shift will 450370b31eSSteve Capper * be larger than 21 (for the 4KB granule case we use section maps thus 460370b31eSSteve Capper * the smallest shift is actually 30) thus there is the possibility that 470370b31eSSteve Capper * KASLR can increase the number of pagetable entries by 1, so we make 480370b31eSSteve Capper * room for this extra entry. 490370b31eSSteve Capper * 500370b31eSSteve Capper * Note KASLR cannot increase the number of required entries for a level 510370b31eSSteve Capper * by more than one because it increments both the virtual start and end 520370b31eSSteve Capper * addresses equally (the extra entry comes from the case where the end 530370b31eSSteve Capper * address is just pushed over a boundary and the start address isn't). 540370b31eSSteve Capper */ 550370b31eSSteve Capper 560370b31eSSteve Capper #ifdef CONFIG_RANDOMIZE_BASE 570370b31eSSteve Capper #define EARLY_KASLR (1) 580370b31eSSteve Capper #else 590370b31eSSteve Capper #define EARLY_KASLR (0) 600370b31eSSteve Capper #endif 610370b31eSSteve Capper 62414c109bSMark Rutland #define SPAN_NR_ENTRIES(vstart, vend, shift) \ 63414c109bSMark Rutland ((((vend) - 1) >> (shift)) - ((vstart) >> (shift)) + 1) 64414c109bSMark Rutland 655fbc49ceSArd Biesheuvel #define EARLY_ENTRIES(vstart, vend, shift, add) \ 66414c109bSMark Rutland (SPAN_NR_ENTRIES(vstart, vend, shift) + (add)) 670370b31eSSteve Capper 685fbc49ceSArd Biesheuvel #define EARLY_PGDS(vstart, vend, add) (EARLY_ENTRIES(vstart, vend, PGDIR_SHIFT, add)) 690370b31eSSteve Capper 700370b31eSSteve Capper #if SWAPPER_PGTABLE_LEVELS > 3 715fbc49ceSArd Biesheuvel #define EARLY_PUDS(vstart, vend, add) (EARLY_ENTRIES(vstart, vend, PUD_SHIFT, add)) 720370b31eSSteve Capper #else 735fbc49ceSArd Biesheuvel #define EARLY_PUDS(vstart, vend, add) (0) 740370b31eSSteve Capper #endif 750370b31eSSteve Capper 760370b31eSSteve Capper #if SWAPPER_PGTABLE_LEVELS > 2 775fbc49ceSArd Biesheuvel #define EARLY_PMDS(vstart, vend, add) (EARLY_ENTRIES(vstart, vend, SWAPPER_TABLE_SHIFT, add)) 780370b31eSSteve Capper #else 795fbc49ceSArd Biesheuvel #define EARLY_PMDS(vstart, vend, add) (0) 800370b31eSSteve Capper #endif 810370b31eSSteve Capper 825fbc49ceSArd Biesheuvel #define EARLY_PAGES(vstart, vend, add) ( 1 /* PGDIR page */ \ 835fbc49ceSArd Biesheuvel + EARLY_PGDS((vstart), (vend), add) /* each PGDIR needs a next level page table */ \ 845fbc49ceSArd Biesheuvel + EARLY_PUDS((vstart), (vend), add) /* each PUD needs a next level page table */ \ 855fbc49ceSArd Biesheuvel + EARLY_PMDS((vstart), (vend), add)) /* each PMD needs a next level page table */ 865fbc49ceSArd Biesheuvel #define INIT_DIR_SIZE (PAGE_SIZE * EARLY_PAGES(KIMAGE_VADDR, _end, EARLY_KASLR)) 87c3cee924SArd Biesheuvel 88c3cee924SArd Biesheuvel /* the initial ID map may need two extra pages if it needs to be extended */ 89c3cee924SArd Biesheuvel #if VA_BITS < 48 90f70b3a23SArd Biesheuvel #define INIT_IDMAP_DIR_SIZE ((INIT_IDMAP_DIR_PAGES + 2) * PAGE_SIZE) 91c3cee924SArd Biesheuvel #else 92f70b3a23SArd Biesheuvel #define INIT_IDMAP_DIR_SIZE (INIT_IDMAP_DIR_PAGES * PAGE_SIZE) 93c3cee924SArd Biesheuvel #endif 945fbc49ceSArd Biesheuvel #define INIT_IDMAP_DIR_PAGES EARLY_PAGES(KIMAGE_VADDR, _end + MAX_FDT_SIZE + SWAPPER_BLOCK_SIZE, 1) 9587d1587bSSuzuki K. Poulose 9687d1587bSSuzuki K. Poulose /* Initial memory map size */ 9738e4b660SAnshuman Khandual #ifdef CONFIG_ARM64_4K_PAGES 984aaa87abSAnshuman Khandual #define SWAPPER_BLOCK_SHIFT PMD_SHIFT 994aaa87abSAnshuman Khandual #define SWAPPER_BLOCK_SIZE PMD_SIZE 10087d1587bSSuzuki K. Poulose #define SWAPPER_TABLE_SHIFT PUD_SHIFT 101b433dce0SSuzuki K. Poulose #else 102b433dce0SSuzuki K. Poulose #define SWAPPER_BLOCK_SHIFT PAGE_SHIFT 103b433dce0SSuzuki K. Poulose #define SWAPPER_BLOCK_SIZE PAGE_SIZE 104b433dce0SSuzuki K. Poulose #define SWAPPER_TABLE_SHIFT PMD_SHIFT 10587d1587bSSuzuki K. Poulose #endif 10687d1587bSSuzuki K. Poulose 10787d1587bSSuzuki K. Poulose /* 10887d1587bSSuzuki K. Poulose * Initial memory map attributes. 10987d1587bSSuzuki K. Poulose */ 110*f0af339fSJoey Gouly #define SWAPPER_PTE_FLAGS (PTE_TYPE_PAGE | PTE_AF | PTE_SHARED | PTE_UXN) 111*f0af339fSJoey Gouly #define SWAPPER_PMD_FLAGS (PMD_TYPE_SECT | PMD_SECT_AF | PMD_SECT_S | PTE_UXN) 11287d1587bSSuzuki K. Poulose 11338e4b660SAnshuman Khandual #ifdef CONFIG_ARM64_4K_PAGES 114*f0af339fSJoey Gouly #define SWAPPER_RW_MMUFLAGS (PMD_ATTRINDX(MT_NORMAL) | SWAPPER_PMD_FLAGS | PTE_WRITE) 115c3cee924SArd Biesheuvel #define SWAPPER_RX_MMUFLAGS (SWAPPER_RW_MMUFLAGS | PMD_SECT_RDONLY) 116b433dce0SSuzuki K. Poulose #else 117*f0af339fSJoey Gouly #define SWAPPER_RW_MMUFLAGS (PTE_ATTRINDX(MT_NORMAL) | SWAPPER_PTE_FLAGS | PTE_WRITE) 118c3cee924SArd Biesheuvel #define SWAPPER_RX_MMUFLAGS (SWAPPER_RW_MMUFLAGS | PTE_RDONLY) 11987d1587bSSuzuki K. Poulose #endif 12087d1587bSSuzuki K. Poulose 12187d1587bSSuzuki K. Poulose #endif /* __ASM_KERNEL_PGTABLE_H */ 122