1*caab277bSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 2478fcb2cSWill Deacon /* 3478fcb2cSWill Deacon * Copyright (C) 2012 ARM Ltd. 4478fcb2cSWill Deacon */ 5478fcb2cSWill Deacon #ifndef __ASM_DEBUG_MONITORS_H 6478fcb2cSWill Deacon #define __ASM_DEBUG_MONITORS_H 7478fcb2cSWill Deacon 8478fcb2cSWill Deacon #ifdef __KERNEL__ 9478fcb2cSWill Deacon 10d7a33f4fSDave P Martin #include <linux/errno.h> 11d7a33f4fSDave P Martin #include <linux/types.h> 12f98deee9SArd Biesheuvel #include <asm/brk-imm.h> 1303923696SDave P Martin #include <asm/esr.h> 14951757aeSDave P Martin #include <asm/insn.h> 15d7a33f4fSDave P Martin #include <asm/ptrace.h> 16951757aeSDave P Martin 1751ba2481SMarc Zyngier /* Low-level stepping controls. */ 1851ba2481SMarc Zyngier #define DBG_MDSCR_SS (1 << 0) 1951ba2481SMarc Zyngier #define DBG_SPSR_SS (1 << 21) 2051ba2481SMarc Zyngier 2151ba2481SMarc Zyngier /* MDSCR_EL1 enabling bits */ 2251ba2481SMarc Zyngier #define DBG_MDSCR_KDE (1 << 13) 2351ba2481SMarc Zyngier #define DBG_MDSCR_MDE (1 << 15) 2451ba2481SMarc Zyngier #define DBG_MDSCR_MASK ~(DBG_MDSCR_KDE | DBG_MDSCR_MDE) 2551ba2481SMarc Zyngier 26478fcb2cSWill Deacon #define DBG_ESR_EVT(x) (((x) >> 27) & 0x7) 27478fcb2cSWill Deacon 28478fcb2cSWill Deacon /* AArch64 */ 29478fcb2cSWill Deacon #define DBG_ESR_EVT_HWBP 0x0 30478fcb2cSWill Deacon #define DBG_ESR_EVT_HWSS 0x1 31478fcb2cSWill Deacon #define DBG_ESR_EVT_HWWP 0x2 32478fcb2cSWill Deacon #define DBG_ESR_EVT_BRK 0x6 33478fcb2cSWill Deacon 34bcf5763bSVijaya Kumar K /* 35bcf5763bSVijaya Kumar K * Break point instruction encoding 36bcf5763bSVijaya Kumar K */ 37951757aeSDave P Martin #define BREAK_INSTR_SIZE AARCH64_INSN_SIZE 38bcf5763bSVijaya Kumar K 39bcf5763bSVijaya Kumar K /* 40bcf5763bSVijaya Kumar K * BRK instruction encoding 41bcf5763bSVijaya Kumar K * The #imm16 value should be placed at bits[20:5] within BRK ins 42bcf5763bSVijaya Kumar K */ 43bcf5763bSVijaya Kumar K #define AARCH64_BREAK_MON 0xd4200000 44bcf5763bSVijaya Kumar K 45bcf5763bSVijaya Kumar K /* 46a9ae04c9SMark Brown * BRK instruction for provoking a fault on purpose 47a9ae04c9SMark Brown * Unlike kgdb, #imm16 value with unallocated handler is used for faulting. 48a9ae04c9SMark Brown */ 49a9ae04c9SMark Brown #define AARCH64_BREAK_FAULT (AARCH64_BREAK_MON | (FAULT_BRK_IMM << 5)) 50a9ae04c9SMark Brown 51c696b934SDave P Martin #define AARCH64_BREAK_KGDB_DYN_DBG \ 52c696b934SDave P Martin (AARCH64_BREAK_MON | (KGDB_DYN_DBG_BRK_IMM << 5)) 53bcf5763bSVijaya Kumar K 54bcf5763bSVijaya Kumar K #define CACHE_FLUSH_IS_SAFE 1 55bcf5763bSVijaya Kumar K 562dd0e8d2SSandeepa Prabhu /* kprobes BRK opcodes with ESR encoding */ 57453b7740SWill Deacon #define BRK64_OPCODE_KPROBES (AARCH64_BREAK_MON | (KPROBES_BRK_IMM << 5)) 589842ceaeSPratyush Anand /* uprobes BRK opcodes with ESR encoding */ 59453b7740SWill Deacon #define BRK64_OPCODE_UPROBES (AARCH64_BREAK_MON | (UPROBES_BRK_IMM << 5)) 602dd0e8d2SSandeepa Prabhu 61478fcb2cSWill Deacon /* AArch32 */ 62478fcb2cSWill Deacon #define DBG_ESR_EVT_BKPT 0x4 63478fcb2cSWill Deacon #define DBG_ESR_EVT_VECC 0x5 64478fcb2cSWill Deacon 65478fcb2cSWill Deacon #define AARCH32_BREAK_ARM 0x07f001f0 66478fcb2cSWill Deacon #define AARCH32_BREAK_THUMB 0xde01 67478fcb2cSWill Deacon #define AARCH32_BREAK_THUMB2_LO 0xf7f0 68478fcb2cSWill Deacon #define AARCH32_BREAK_THUMB2_HI 0xa000 69478fcb2cSWill Deacon 70478fcb2cSWill Deacon #ifndef __ASSEMBLY__ 71478fcb2cSWill Deacon struct task_struct; 72478fcb2cSWill Deacon 73478fcb2cSWill Deacon #define DBG_ARCH_ID_RESERVED 0 /* In case of ptrace ABI updates. */ 74478fcb2cSWill Deacon 75ee6214ceSSandeepa Prabhu #define DBG_HOOK_HANDLED 0 76ee6214ceSSandeepa Prabhu #define DBG_HOOK_ERROR 1 77ee6214ceSSandeepa Prabhu 78ee6214ceSSandeepa Prabhu struct step_hook { 79ee6214ceSSandeepa Prabhu struct list_head node; 80ee6214ceSSandeepa Prabhu int (*fn)(struct pt_regs *regs, unsigned int esr); 81ee6214ceSSandeepa Prabhu }; 82ee6214ceSSandeepa Prabhu 8326a04d84SWill Deacon void register_user_step_hook(struct step_hook *hook); 8426a04d84SWill Deacon void unregister_user_step_hook(struct step_hook *hook); 8526a04d84SWill Deacon 8626a04d84SWill Deacon void register_kernel_step_hook(struct step_hook *hook); 8726a04d84SWill Deacon void unregister_kernel_step_hook(struct step_hook *hook); 88ee6214ceSSandeepa Prabhu 89ee6214ceSSandeepa Prabhu struct break_hook { 90ee6214ceSSandeepa Prabhu struct list_head node; 91ee6214ceSSandeepa Prabhu int (*fn)(struct pt_regs *regs, unsigned int esr); 9226a04d84SWill Deacon u16 imm; 9326a04d84SWill Deacon u16 mask; /* These bits are ignored when comparing with imm */ 94ee6214ceSSandeepa Prabhu }; 95ee6214ceSSandeepa Prabhu 9626a04d84SWill Deacon void register_user_break_hook(struct break_hook *hook); 9726a04d84SWill Deacon void unregister_user_break_hook(struct break_hook *hook); 9826a04d84SWill Deacon 9926a04d84SWill Deacon void register_kernel_break_hook(struct break_hook *hook); 10026a04d84SWill Deacon void unregister_kernel_break_hook(struct break_hook *hook); 101ee6214ceSSandeepa Prabhu 102478fcb2cSWill Deacon u8 debug_monitors_arch(void); 103478fcb2cSWill Deacon 1046f883d10SWill Deacon enum dbg_active_el { 10551ba2481SMarc Zyngier DBG_ACTIVE_EL0 = 0, 10651ba2481SMarc Zyngier DBG_ACTIVE_EL1, 10751ba2481SMarc Zyngier }; 10851ba2481SMarc Zyngier 1096f883d10SWill Deacon void enable_debug_monitors(enum dbg_active_el el); 1106f883d10SWill Deacon void disable_debug_monitors(enum dbg_active_el el); 111478fcb2cSWill Deacon 112478fcb2cSWill Deacon void user_rewind_single_step(struct task_struct *task); 113478fcb2cSWill Deacon void user_fastforward_single_step(struct task_struct *task); 114478fcb2cSWill Deacon 115478fcb2cSWill Deacon void kernel_enable_single_step(struct pt_regs *regs); 116478fcb2cSWill Deacon void kernel_disable_single_step(void); 117478fcb2cSWill Deacon int kernel_active_single_step(void); 118478fcb2cSWill Deacon 119478fcb2cSWill Deacon #ifdef CONFIG_HAVE_HW_BREAKPOINT 120478fcb2cSWill Deacon int reinstall_suspended_bps(struct pt_regs *regs); 121478fcb2cSWill Deacon #else 122478fcb2cSWill Deacon static inline int reinstall_suspended_bps(struct pt_regs *regs) 123478fcb2cSWill Deacon { 124478fcb2cSWill Deacon return -ENODEV; 125478fcb2cSWill Deacon } 126478fcb2cSWill Deacon #endif 127478fcb2cSWill Deacon 1281442b6edSWill Deacon int aarch32_break_handler(struct pt_regs *regs); 1291442b6edSWill Deacon 130478fcb2cSWill Deacon #endif /* __ASSEMBLY */ 131478fcb2cSWill Deacon #endif /* __KERNEL__ */ 132478fcb2cSWill Deacon #endif /* __ASM_DEBUG_MONITORS_H */ 133