xref: /openbmc/linux/arch/arm64/include/asm/debug-monitors.h (revision bcf5763b0d58d20e288ac52f96cbd7788e262cac)
1478fcb2cSWill Deacon /*
2478fcb2cSWill Deacon  * Copyright (C) 2012 ARM Ltd.
3478fcb2cSWill Deacon  *
4478fcb2cSWill Deacon  * This program is free software; you can redistribute it and/or modify
5478fcb2cSWill Deacon  * it under the terms of the GNU General Public License version 2 as
6478fcb2cSWill Deacon  * published by the Free Software Foundation.
7478fcb2cSWill Deacon  *
8478fcb2cSWill Deacon  * This program is distributed in the hope that it will be useful,
9478fcb2cSWill Deacon  * but WITHOUT ANY WARRANTY; without even the implied warranty of
10478fcb2cSWill Deacon  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
11478fcb2cSWill Deacon  * GNU General Public License for more details.
12478fcb2cSWill Deacon  *
13478fcb2cSWill Deacon  * You should have received a copy of the GNU General Public License
14478fcb2cSWill Deacon  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
15478fcb2cSWill Deacon  */
16478fcb2cSWill Deacon #ifndef __ASM_DEBUG_MONITORS_H
17478fcb2cSWill Deacon #define __ASM_DEBUG_MONITORS_H
18478fcb2cSWill Deacon 
19478fcb2cSWill Deacon #ifdef __KERNEL__
20478fcb2cSWill Deacon 
21478fcb2cSWill Deacon #define	DBG_ESR_EVT(x)		(((x) >> 27) & 0x7)
22478fcb2cSWill Deacon 
23478fcb2cSWill Deacon /* AArch64 */
24478fcb2cSWill Deacon #define DBG_ESR_EVT_HWBP	0x0
25478fcb2cSWill Deacon #define DBG_ESR_EVT_HWSS	0x1
26478fcb2cSWill Deacon #define DBG_ESR_EVT_HWWP	0x2
27478fcb2cSWill Deacon #define DBG_ESR_EVT_BRK		0x6
28478fcb2cSWill Deacon 
29*bcf5763bSVijaya Kumar K /*
30*bcf5763bSVijaya Kumar K  * Break point instruction encoding
31*bcf5763bSVijaya Kumar K  */
32*bcf5763bSVijaya Kumar K #define BREAK_INSTR_SIZE		4
33*bcf5763bSVijaya Kumar K 
34*bcf5763bSVijaya Kumar K /*
35*bcf5763bSVijaya Kumar K  * ESR values expected for dynamic and compile time BRK instruction
36*bcf5763bSVijaya Kumar K  */
37*bcf5763bSVijaya Kumar K #define DBG_ESR_VAL_BRK(x)	(0xf2000000 | ((x) & 0xfffff))
38*bcf5763bSVijaya Kumar K 
39*bcf5763bSVijaya Kumar K /*
40*bcf5763bSVijaya Kumar K  * #imm16 values used for BRK instruction generation
41*bcf5763bSVijaya Kumar K  * Allowed values for kgbd are 0x400 - 0x7ff
42*bcf5763bSVijaya Kumar K  * 0x400: for dynamic BRK instruction
43*bcf5763bSVijaya Kumar K  * 0x401: for compile time BRK instruction
44*bcf5763bSVijaya Kumar K  */
45*bcf5763bSVijaya Kumar K #define KGDB_DYN_DGB_BRK_IMM		0x400
46*bcf5763bSVijaya Kumar K #define KDBG_COMPILED_DBG_BRK_IMM	0x401
47*bcf5763bSVijaya Kumar K 
48*bcf5763bSVijaya Kumar K /*
49*bcf5763bSVijaya Kumar K  * BRK instruction encoding
50*bcf5763bSVijaya Kumar K  * The #imm16 value should be placed at bits[20:5] within BRK ins
51*bcf5763bSVijaya Kumar K  */
52*bcf5763bSVijaya Kumar K #define AARCH64_BREAK_MON	0xd4200000
53*bcf5763bSVijaya Kumar K 
54*bcf5763bSVijaya Kumar K /*
55*bcf5763bSVijaya Kumar K  * Extract byte from BRK instruction
56*bcf5763bSVijaya Kumar K  */
57*bcf5763bSVijaya Kumar K #define KGDB_DYN_DGB_BRK_INS_BYTE(x) \
58*bcf5763bSVijaya Kumar K 	((((AARCH64_BREAK_MON) & 0xffe0001f) >> (x * 8)) & 0xff)
59*bcf5763bSVijaya Kumar K 
60*bcf5763bSVijaya Kumar K /*
61*bcf5763bSVijaya Kumar K  * Extract byte from BRK #imm16
62*bcf5763bSVijaya Kumar K  */
63*bcf5763bSVijaya Kumar K #define KGBD_DYN_DGB_BRK_IMM_BYTE(x) \
64*bcf5763bSVijaya Kumar K 	(((((KGDB_DYN_DGB_BRK_IMM) & 0xffff) << 5) >> (x * 8)) & 0xff)
65*bcf5763bSVijaya Kumar K 
66*bcf5763bSVijaya Kumar K #define KGDB_DYN_DGB_BRK_BYTE(x) \
67*bcf5763bSVijaya Kumar K 	(KGDB_DYN_DGB_BRK_INS_BYTE(x) | KGBD_DYN_DGB_BRK_IMM_BYTE(x))
68*bcf5763bSVijaya Kumar K 
69*bcf5763bSVijaya Kumar K #define  KGDB_DYN_BRK_INS_BYTE0  KGDB_DYN_DGB_BRK_BYTE(0)
70*bcf5763bSVijaya Kumar K #define  KGDB_DYN_BRK_INS_BYTE1  KGDB_DYN_DGB_BRK_BYTE(1)
71*bcf5763bSVijaya Kumar K #define  KGDB_DYN_BRK_INS_BYTE2  KGDB_DYN_DGB_BRK_BYTE(2)
72*bcf5763bSVijaya Kumar K #define  KGDB_DYN_BRK_INS_BYTE3  KGDB_DYN_DGB_BRK_BYTE(3)
73*bcf5763bSVijaya Kumar K 
74*bcf5763bSVijaya Kumar K #define CACHE_FLUSH_IS_SAFE		1
75*bcf5763bSVijaya Kumar K 
76478fcb2cSWill Deacon enum debug_el {
77478fcb2cSWill Deacon 	DBG_ACTIVE_EL0 = 0,
78478fcb2cSWill Deacon 	DBG_ACTIVE_EL1,
79478fcb2cSWill Deacon };
80478fcb2cSWill Deacon 
81478fcb2cSWill Deacon /* AArch32 */
82478fcb2cSWill Deacon #define DBG_ESR_EVT_BKPT	0x4
83478fcb2cSWill Deacon #define DBG_ESR_EVT_VECC	0x5
84478fcb2cSWill Deacon 
85478fcb2cSWill Deacon #define AARCH32_BREAK_ARM	0x07f001f0
86478fcb2cSWill Deacon #define AARCH32_BREAK_THUMB	0xde01
87478fcb2cSWill Deacon #define AARCH32_BREAK_THUMB2_LO	0xf7f0
88478fcb2cSWill Deacon #define AARCH32_BREAK_THUMB2_HI	0xa000
89478fcb2cSWill Deacon 
90478fcb2cSWill Deacon #ifndef __ASSEMBLY__
91478fcb2cSWill Deacon struct task_struct;
92478fcb2cSWill Deacon 
93478fcb2cSWill Deacon #define DBG_ARCH_ID_RESERVED	0	/* In case of ptrace ABI updates. */
94478fcb2cSWill Deacon 
95ee6214ceSSandeepa Prabhu #define DBG_HOOK_HANDLED	0
96ee6214ceSSandeepa Prabhu #define DBG_HOOK_ERROR		1
97ee6214ceSSandeepa Prabhu 
98ee6214ceSSandeepa Prabhu struct step_hook {
99ee6214ceSSandeepa Prabhu 	struct list_head node;
100ee6214ceSSandeepa Prabhu 	int (*fn)(struct pt_regs *regs, unsigned int esr);
101ee6214ceSSandeepa Prabhu };
102ee6214ceSSandeepa Prabhu 
103ee6214ceSSandeepa Prabhu void register_step_hook(struct step_hook *hook);
104ee6214ceSSandeepa Prabhu void unregister_step_hook(struct step_hook *hook);
105ee6214ceSSandeepa Prabhu 
106ee6214ceSSandeepa Prabhu struct break_hook {
107ee6214ceSSandeepa Prabhu 	struct list_head node;
108ee6214ceSSandeepa Prabhu 	u32 esr_val;
109ee6214ceSSandeepa Prabhu 	u32 esr_mask;
110ee6214ceSSandeepa Prabhu 	int (*fn)(struct pt_regs *regs, unsigned int esr);
111ee6214ceSSandeepa Prabhu };
112ee6214ceSSandeepa Prabhu 
113ee6214ceSSandeepa Prabhu void register_break_hook(struct break_hook *hook);
114ee6214ceSSandeepa Prabhu void unregister_break_hook(struct break_hook *hook);
115ee6214ceSSandeepa Prabhu 
116478fcb2cSWill Deacon u8 debug_monitors_arch(void);
117478fcb2cSWill Deacon 
118478fcb2cSWill Deacon void enable_debug_monitors(enum debug_el el);
119478fcb2cSWill Deacon void disable_debug_monitors(enum debug_el el);
120478fcb2cSWill Deacon 
121478fcb2cSWill Deacon void user_rewind_single_step(struct task_struct *task);
122478fcb2cSWill Deacon void user_fastforward_single_step(struct task_struct *task);
123478fcb2cSWill Deacon 
124478fcb2cSWill Deacon void kernel_enable_single_step(struct pt_regs *regs);
125478fcb2cSWill Deacon void kernel_disable_single_step(void);
126478fcb2cSWill Deacon int kernel_active_single_step(void);
127478fcb2cSWill Deacon 
128478fcb2cSWill Deacon #ifdef CONFIG_HAVE_HW_BREAKPOINT
129478fcb2cSWill Deacon int reinstall_suspended_bps(struct pt_regs *regs);
130478fcb2cSWill Deacon #else
131478fcb2cSWill Deacon static inline int reinstall_suspended_bps(struct pt_regs *regs)
132478fcb2cSWill Deacon {
133478fcb2cSWill Deacon 	return -ENODEV;
134478fcb2cSWill Deacon }
135478fcb2cSWill Deacon #endif
136478fcb2cSWill Deacon 
1371442b6edSWill Deacon int aarch32_break_handler(struct pt_regs *regs);
1381442b6edSWill Deacon 
139478fcb2cSWill Deacon #endif	/* __ASSEMBLY */
140478fcb2cSWill Deacon #endif	/* __KERNEL__ */
141478fcb2cSWill Deacon #endif	/* __ASM_DEBUG_MONITORS_H */
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